IB/ehca: Support small QP queues
[linux-2.6.git] / drivers / infiniband / hw / ehca / ehca_qp.c
1 /*
2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3  *
4  *  QP functions
5  *
6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
8  *           Waleri Fomin <fomin@de.ibm.com>
9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
10  *           Reinhard Ernst <rernst@de.ibm.com>
11  *           Heiko J Schick <schickhj@de.ibm.com>
12  *
13  *  Copyright (c) 2005 IBM Corporation
14  *
15  *  All rights reserved.
16  *
17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
18  *  BSD.
19  *
20  * OpenIB BSD License
21  *
22  * Redistribution and use in source and binary forms, with or without
23  * modification, are permitted provided that the following conditions are met:
24  *
25  * Redistributions of source code must retain the above copyright notice, this
26  * list of conditions and the following disclaimer.
27  *
28  * Redistributions in binary form must reproduce the above copyright notice,
29  * this list of conditions and the following disclaimer in the documentation
30  * and/or other materials
31  * provided with the distribution.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43  * POSSIBILITY OF SUCH DAMAGE.
44  */
45
46
47 #include <asm/current.h>
48
49 #include "ehca_classes.h"
50 #include "ehca_tools.h"
51 #include "ehca_qes.h"
52 #include "ehca_iverbs.h"
53 #include "hcp_if.h"
54 #include "hipz_fns.h"
55
56 static struct kmem_cache *qp_cache;
57
58 /*
59  * attributes not supported by query qp
60  */
61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
63                                      IB_QP_ACCESS_FLAGS       | \
64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
65
66 /*
67  * ehca (internal) qp state values
68  */
69 enum ehca_qp_state {
70         EHCA_QPS_RESET = 1,
71         EHCA_QPS_INIT = 2,
72         EHCA_QPS_RTR = 3,
73         EHCA_QPS_RTS = 5,
74         EHCA_QPS_SQD = 6,
75         EHCA_QPS_SQE = 8,
76         EHCA_QPS_ERR = 128
77 };
78
79 /*
80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
81  */
82 enum ib_qp_statetrans {
83         IB_QPST_ANY2RESET,
84         IB_QPST_ANY2ERR,
85         IB_QPST_RESET2INIT,
86         IB_QPST_INIT2RTR,
87         IB_QPST_INIT2INIT,
88         IB_QPST_RTR2RTS,
89         IB_QPST_RTS2SQD,
90         IB_QPST_RTS2RTS,
91         IB_QPST_SQD2RTS,
92         IB_QPST_SQE2RTS,
93         IB_QPST_SQD2SQD,
94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
95 };
96
97 /*
98  * ib2ehca_qp_state maps IB to ehca qp_state
99  * returns ehca qp state corresponding to given ib qp state
100  */
101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
102 {
103         switch (ib_qp_state) {
104         case IB_QPS_RESET:
105                 return EHCA_QPS_RESET;
106         case IB_QPS_INIT:
107                 return EHCA_QPS_INIT;
108         case IB_QPS_RTR:
109                 return EHCA_QPS_RTR;
110         case IB_QPS_RTS:
111                 return EHCA_QPS_RTS;
112         case IB_QPS_SQD:
113                 return EHCA_QPS_SQD;
114         case IB_QPS_SQE:
115                 return EHCA_QPS_SQE;
116         case IB_QPS_ERR:
117                 return EHCA_QPS_ERR;
118         default:
119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
120                 return -EINVAL;
121         }
122 }
123
124 /*
125  * ehca2ib_qp_state maps ehca to IB qp_state
126  * returns ib qp state corresponding to given ehca qp state
127  */
128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
129                                                 ehca_qp_state)
130 {
131         switch (ehca_qp_state) {
132         case EHCA_QPS_RESET:
133                 return IB_QPS_RESET;
134         case EHCA_QPS_INIT:
135                 return IB_QPS_INIT;
136         case EHCA_QPS_RTR:
137                 return IB_QPS_RTR;
138         case EHCA_QPS_RTS:
139                 return IB_QPS_RTS;
140         case EHCA_QPS_SQD:
141                 return IB_QPS_SQD;
142         case EHCA_QPS_SQE:
143                 return IB_QPS_SQE;
144         case EHCA_QPS_ERR:
145                 return IB_QPS_ERR;
146         default:
147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
148                 return -EINVAL;
149         }
150 }
151
152 /*
153  * ehca_qp_type used as index for req_attr and opt_attr of
154  * struct ehca_modqp_statetrans
155  */
156 enum ehca_qp_type {
157         QPT_RC = 0,
158         QPT_UC = 1,
159         QPT_UD = 2,
160         QPT_SQP = 3,
161         QPT_MAX
162 };
163
164 /*
165  * ib2ehcaqptype maps Ib to ehca qp_type
166  * returns ehca qp type corresponding to ib qp type
167  */
168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
169 {
170         switch (ibqptype) {
171         case IB_QPT_SMI:
172         case IB_QPT_GSI:
173                 return QPT_SQP;
174         case IB_QPT_RC:
175                 return QPT_RC;
176         case IB_QPT_UC:
177                 return QPT_UC;
178         case IB_QPT_UD:
179                 return QPT_UD;
180         default:
181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
182                 return -EINVAL;
183         }
184 }
185
186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
187                                                          int ib_tostate)
188 {
189         int index = -EINVAL;
190         switch (ib_tostate) {
191         case IB_QPS_RESET:
192                 index = IB_QPST_ANY2RESET;
193                 break;
194         case IB_QPS_INIT:
195                 switch (ib_fromstate) {
196                 case IB_QPS_RESET:
197                         index = IB_QPST_RESET2INIT;
198                         break;
199                 case IB_QPS_INIT:
200                         index = IB_QPST_INIT2INIT;
201                         break;
202                 }
203                 break;
204         case IB_QPS_RTR:
205                 if (ib_fromstate == IB_QPS_INIT)
206                         index = IB_QPST_INIT2RTR;
207                 break;
208         case IB_QPS_RTS:
209                 switch (ib_fromstate) {
210                 case IB_QPS_RTR:
211                         index = IB_QPST_RTR2RTS;
212                         break;
213                 case IB_QPS_RTS:
214                         index = IB_QPST_RTS2RTS;
215                         break;
216                 case IB_QPS_SQD:
217                         index = IB_QPST_SQD2RTS;
218                         break;
219                 case IB_QPS_SQE:
220                         index = IB_QPST_SQE2RTS;
221                         break;
222                 }
223                 break;
224         case IB_QPS_SQD:
225                 if (ib_fromstate == IB_QPS_RTS)
226                         index = IB_QPST_RTS2SQD;
227                 break;
228         case IB_QPS_SQE:
229                 break;
230         case IB_QPS_ERR:
231                 index = IB_QPST_ANY2ERR;
232                 break;
233         default:
234                 break;
235         }
236         return index;
237 }
238
239 /*
240  * ibqptype2servicetype returns hcp service type corresponding to given
241  * ib qp type used by create_qp()
242  */
243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
244 {
245         switch (ibqptype) {
246         case IB_QPT_SMI:
247         case IB_QPT_GSI:
248                 return ST_UD;
249         case IB_QPT_RC:
250                 return ST_RC;
251         case IB_QPT_UC:
252                 return ST_UC;
253         case IB_QPT_UD:
254                 return ST_UD;
255         case IB_QPT_RAW_IPV6:
256                 return -EINVAL;
257         case IB_QPT_RAW_ETY:
258                 return -EINVAL;
259         default:
260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
261                 return -EINVAL;
262         }
263 }
264
265 /*
266  * init userspace queue info from ipz_queue data
267  */
268 static inline void queue2resp(struct ipzu_queue_resp *resp,
269                               struct ipz_queue *queue)
270 {
271         resp->qe_size = queue->qe_size;
272         resp->act_nr_of_sg = queue->act_nr_of_sg;
273         resp->queue_length = queue->queue_length;
274         resp->pagesize = queue->pagesize;
275         resp->toggle_state = queue->toggle_state;
276 }
277
278 /*
279  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
280  */
281 static inline int init_qp_queue(struct ehca_shca *shca,
282                                 struct ehca_pd *pd,
283                                 struct ehca_qp *my_qp,
284                                 struct ipz_queue *queue,
285                                 int q_type,
286                                 u64 expected_hret,
287                                 struct ehca_alloc_queue_parms *parms,
288                                 int wqe_size)
289 {
290         int ret, cnt, ipz_rc, nr_q_pages;
291         void *vpage;
292         u64 rpage, h_ret;
293         struct ib_device *ib_dev = &shca->ib_device;
294         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
295
296         if (!parms->queue_size)
297                 return 0;
298
299         if (parms->is_small) {
300                 nr_q_pages = 1;
301                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
302                                         128 << parms->page_size,
303                                         wqe_size, parms->act_nr_sges, 1);
304         } else {
305                 nr_q_pages = parms->queue_size;
306                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
307                                         EHCA_PAGESIZE, wqe_size,
308                                         parms->act_nr_sges, 0);
309         }
310
311         if (!ipz_rc) {
312                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
313                          ipz_rc);
314                 return -EBUSY;
315         }
316
317         /* register queue pages */
318         for (cnt = 0; cnt < nr_q_pages; cnt++) {
319                 vpage = ipz_qpageit_get_inc(queue);
320                 if (!vpage) {
321                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
322                                  "failed p_vpage= %p", vpage);
323                         ret = -EINVAL;
324                         goto init_qp_queue1;
325                 }
326                 rpage = virt_to_abs(vpage);
327
328                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
329                                                  my_qp->ipz_qp_handle,
330                                                  NULL, 0, q_type,
331                                                  rpage, parms->is_small ? 0 : 1,
332                                                  my_qp->galpas.kernel);
333                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
334                         if (h_ret != expected_hret) {
335                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
336                                          "h_ret= %lx ", h_ret);
337                                 ret = ehca2ib_return_code(h_ret);
338                                 goto init_qp_queue1;
339                         }
340                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
341                         if (vpage) {
342                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
343                                          "should not succeed vpage=%p", vpage);
344                                 ret = -EINVAL;
345                                 goto init_qp_queue1;
346                         }
347                 } else {
348                         if (h_ret != H_PAGE_REGISTERED) {
349                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
350                                          "h_ret= %lx ", h_ret);
351                                 ret = ehca2ib_return_code(h_ret);
352                                 goto init_qp_queue1;
353                         }
354                 }
355         }
356
357         ipz_qeit_reset(queue);
358
359         return 0;
360
361 init_qp_queue1:
362         ipz_queue_dtor(pd, queue);
363         return ret;
364 }
365
366 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
367 {
368         if (is_llqp)
369                 return 128 << act_nr_sge;
370         else
371                 return offsetof(struct ehca_wqe,
372                                 u.nud.sg_list[act_nr_sge]);
373 }
374
375 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
376                                        int req_nr_sge, int is_llqp)
377 {
378         u32 wqe_size, q_size;
379         int act_nr_sge = req_nr_sge;
380
381         if (!is_llqp)
382                 /* round up #SGEs so WQE size is a power of 2 */
383                 for (act_nr_sge = 4; act_nr_sge <= 252;
384                      act_nr_sge = 4 + 2 * act_nr_sge)
385                         if (act_nr_sge >= req_nr_sge)
386                                 break;
387
388         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
389         q_size = wqe_size * (queue->max_wr + 1);
390
391         if (q_size <= 512)
392                 queue->page_size = 2;
393         else if (q_size <= 1024)
394                 queue->page_size = 3;
395         else
396                 queue->page_size = 0;
397
398         queue->is_small = (queue->page_size != 0);
399 }
400
401 /*
402  * Create an ib_qp struct that is either a QP or an SRQ, depending on
403  * the value of the is_srq parameter. If init_attr and srq_init_attr share
404  * fields, the field out of init_attr is used.
405  */
406 static struct ehca_qp *internal_create_qp(
407         struct ib_pd *pd,
408         struct ib_qp_init_attr *init_attr,
409         struct ib_srq_init_attr *srq_init_attr,
410         struct ib_udata *udata, int is_srq)
411 {
412         struct ehca_qp *my_qp;
413         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
414         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
415                                               ib_device);
416         struct ib_ucontext *context = NULL;
417         u64 h_ret;
418         int is_llqp = 0, has_srq = 0;
419         int qp_type, max_send_sge, max_recv_sge, ret;
420
421         /* h_call's out parameters */
422         struct ehca_alloc_qp_parms parms;
423         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
424         unsigned long flags;
425
426         memset(&parms, 0, sizeof(parms));
427         qp_type = init_attr->qp_type;
428
429         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
430                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
431                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
432                          init_attr->sq_sig_type);
433                 return ERR_PTR(-EINVAL);
434         }
435
436         /* save LLQP info */
437         if (qp_type & 0x80) {
438                 is_llqp = 1;
439                 parms.ext_type = EQPT_LLQP;
440                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
441         }
442         qp_type &= 0x1F;
443         init_attr->qp_type &= 0x1F;
444
445         /* handle SRQ base QPs */
446         if (init_attr->srq) {
447                 struct ehca_qp *my_srq =
448                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
449
450                 has_srq = 1;
451                 parms.ext_type = EQPT_SRQBASE;
452                 parms.srq_qpn = my_srq->real_qp_num;
453                 parms.srq_token = my_srq->token;
454         }
455
456         if (is_llqp && has_srq) {
457                 ehca_err(pd->device, "LLQPs can't have an SRQ");
458                 return ERR_PTR(-EINVAL);
459         }
460
461         /* handle SRQs */
462         if (is_srq) {
463                 parms.ext_type = EQPT_SRQ;
464                 parms.srq_limit = srq_init_attr->attr.srq_limit;
465                 if (init_attr->cap.max_recv_sge > 3) {
466                         ehca_err(pd->device, "no more than three SGEs "
467                                  "supported for SRQ  pd=%p  max_sge=%x",
468                                  pd, init_attr->cap.max_recv_sge);
469                         return ERR_PTR(-EINVAL);
470                 }
471         }
472
473         /* check QP type */
474         if (qp_type != IB_QPT_UD &&
475             qp_type != IB_QPT_UC &&
476             qp_type != IB_QPT_RC &&
477             qp_type != IB_QPT_SMI &&
478             qp_type != IB_QPT_GSI) {
479                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
480                 return ERR_PTR(-EINVAL);
481         }
482
483         if (is_llqp) {
484                 switch (qp_type) {
485                 case IB_QPT_RC:
486                         if ((init_attr->cap.max_send_wr > 255) ||
487                             (init_attr->cap.max_recv_wr > 255)) {
488                                 ehca_err(pd->device,
489                                          "Invalid Number of max_sq_wr=%x "
490                                          "or max_rq_wr=%x for RC LLQP",
491                                          init_attr->cap.max_send_wr,
492                                          init_attr->cap.max_recv_wr);
493                                 return ERR_PTR(-EINVAL);
494                         }
495                         break;
496                 case IB_QPT_UD:
497                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
498                                 ehca_err(pd->device, "UD LLQP not supported "
499                                          "by this adapter");
500                                 return ERR_PTR(-ENOSYS);
501                         }
502                         if (!(init_attr->cap.max_send_sge <= 5
503                             && init_attr->cap.max_send_sge >= 1
504                             && init_attr->cap.max_recv_sge <= 5
505                             && init_attr->cap.max_recv_sge >= 1)) {
506                                 ehca_err(pd->device,
507                                          "Invalid Number of max_send_sge=%x "
508                                          "or max_recv_sge=%x for UD LLQP",
509                                          init_attr->cap.max_send_sge,
510                                          init_attr->cap.max_recv_sge);
511                                 return ERR_PTR(-EINVAL);
512                         } else if (init_attr->cap.max_send_wr > 255) {
513                                 ehca_err(pd->device,
514                                          "Invalid Number of "
515                                          "ax_send_wr=%x for UD QP_TYPE=%x",
516                                          init_attr->cap.max_send_wr, qp_type);
517                                 return ERR_PTR(-EINVAL);
518                         }
519                         break;
520                 default:
521                         ehca_err(pd->device, "unsupported LL QP Type=%x",
522                                  qp_type);
523                         return ERR_PTR(-EINVAL);
524                         break;
525                 }
526         }
527
528         if (pd->uobject && udata)
529                 context = pd->uobject->context;
530
531         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
532         if (!my_qp) {
533                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
534                 return ERR_PTR(-ENOMEM);
535         }
536
537         spin_lock_init(&my_qp->spinlock_s);
538         spin_lock_init(&my_qp->spinlock_r);
539         my_qp->qp_type = qp_type;
540         my_qp->ext_type = parms.ext_type;
541
542         if (init_attr->recv_cq)
543                 my_qp->recv_cq =
544                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
545         if (init_attr->send_cq)
546                 my_qp->send_cq =
547                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
548
549         do {
550                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
551                         ret = -ENOMEM;
552                         ehca_err(pd->device, "Can't reserve idr resources.");
553                         goto create_qp_exit0;
554                 }
555
556                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
557                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
558                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
559
560         } while (ret == -EAGAIN);
561
562         if (ret) {
563                 ret = -ENOMEM;
564                 ehca_err(pd->device, "Can't allocate new idr entry.");
565                 goto create_qp_exit0;
566         }
567
568         parms.servicetype = ibqptype2servicetype(qp_type);
569         if (parms.servicetype < 0) {
570                 ret = -EINVAL;
571                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
572                 goto create_qp_exit0;
573         }
574
575         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
576                 parms.sigtype = HCALL_SIGT_EVERY;
577         else
578                 parms.sigtype = HCALL_SIGT_BY_WQE;
579
580         /* UD_AV CIRCUMVENTION */
581         max_send_sge = init_attr->cap.max_send_sge;
582         max_recv_sge = init_attr->cap.max_recv_sge;
583         if (parms.servicetype == ST_UD && !is_llqp) {
584                 max_send_sge += 2;
585                 max_recv_sge += 2;
586         }
587
588         parms.token = my_qp->token;
589         parms.eq_handle = shca->eq.ipz_eq_handle;
590         parms.pd = my_pd->fw_pd;
591         if (my_qp->send_cq)
592                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
593         if (my_qp->recv_cq)
594                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
595
596         parms.squeue.max_wr = init_attr->cap.max_send_wr;
597         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
598         parms.squeue.max_sge = max_send_sge;
599         parms.rqueue.max_sge = max_recv_sge;
600
601         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)
602             && !(context && udata)) { /* no small QP support in userspace ATM */
603                 ehca_determine_small_queue(
604                         &parms.squeue, max_send_sge, is_llqp);
605                 ehca_determine_small_queue(
606                         &parms.rqueue, max_recv_sge, is_llqp);
607                 parms.qp_storage =
608                         (parms.squeue.is_small || parms.rqueue.is_small);
609         }
610
611         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
612         if (h_ret != H_SUCCESS) {
613                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
614                          h_ret);
615                 ret = ehca2ib_return_code(h_ret);
616                 goto create_qp_exit1;
617         }
618
619         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
620         my_qp->ipz_qp_handle = parms.qp_handle;
621         my_qp->galpas = parms.galpas;
622
623         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
624         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
625
626         switch (qp_type) {
627         case IB_QPT_RC:
628                 if (is_llqp) {
629                         parms.squeue.act_nr_sges = 1;
630                         parms.rqueue.act_nr_sges = 1;
631                 }
632                 break;
633         case IB_QPT_UD:
634         case IB_QPT_GSI:
635         case IB_QPT_SMI:
636                 /* UD circumvention */
637                 if (is_llqp) {
638                         parms.squeue.act_nr_sges = 1;
639                         parms.rqueue.act_nr_sges = 1;
640                 } else {
641                         parms.squeue.act_nr_sges -= 2;
642                         parms.rqueue.act_nr_sges -= 2;
643                 }
644
645                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
646                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
647                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
648                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
649                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
650                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
651                 }
652
653                 break;
654
655         default:
656                 break;
657         }
658
659         /* initialize r/squeue and register queue pages */
660         if (HAS_SQ(my_qp)) {
661                 ret = init_qp_queue(
662                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
663                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
664                         &parms.squeue, swqe_size);
665                 if (ret) {
666                         ehca_err(pd->device, "Couldn't initialize squeue "
667                                  "and pages  ret=%x", ret);
668                         goto create_qp_exit2;
669                 }
670         }
671
672         if (HAS_RQ(my_qp)) {
673                 ret = init_qp_queue(
674                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
675                         H_SUCCESS, &parms.rqueue, rwqe_size);
676                 if (ret) {
677                         ehca_err(pd->device, "Couldn't initialize rqueue "
678                                  "and pages ret=%x", ret);
679                         goto create_qp_exit3;
680                 }
681         }
682
683         if (is_srq) {
684                 my_qp->ib_srq.pd = &my_pd->ib_pd;
685                 my_qp->ib_srq.device = my_pd->ib_pd.device;
686
687                 my_qp->ib_srq.srq_context = init_attr->qp_context;
688                 my_qp->ib_srq.event_handler = init_attr->event_handler;
689         } else {
690                 my_qp->ib_qp.qp_num = ib_qp_num;
691                 my_qp->ib_qp.pd = &my_pd->ib_pd;
692                 my_qp->ib_qp.device = my_pd->ib_pd.device;
693
694                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
695                 my_qp->ib_qp.send_cq = init_attr->send_cq;
696
697                 my_qp->ib_qp.qp_type = qp_type;
698                 my_qp->ib_qp.srq = init_attr->srq;
699
700                 my_qp->ib_qp.qp_context = init_attr->qp_context;
701                 my_qp->ib_qp.event_handler = init_attr->event_handler;
702         }
703
704         init_attr->cap.max_inline_data = 0; /* not supported yet */
705         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
706         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
707         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
708         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
709         my_qp->init_attr = *init_attr;
710
711         /* NOTE: define_apq0() not supported yet */
712         if (qp_type == IB_QPT_GSI) {
713                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
714                 if (h_ret != H_SUCCESS) {
715                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
716                                  h_ret);
717                         ret = ehca2ib_return_code(h_ret);
718                         goto create_qp_exit4;
719                 }
720         }
721
722         if (my_qp->send_cq) {
723                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
724                 if (ret) {
725                         ehca_err(pd->device,
726                                  "Couldn't assign qp to send_cq ret=%x", ret);
727                         goto create_qp_exit4;
728                 }
729         }
730
731         /* copy queues, galpa data to user space */
732         if (context && udata) {
733                 struct ehca_create_qp_resp resp;
734                 memset(&resp, 0, sizeof(resp));
735
736                 resp.qp_num = my_qp->real_qp_num;
737                 resp.token = my_qp->token;
738                 resp.qp_type = my_qp->qp_type;
739                 resp.ext_type = my_qp->ext_type;
740                 resp.qkey = my_qp->qkey;
741                 resp.real_qp_num = my_qp->real_qp_num;
742                 resp.ipz_rqueue.offset = my_qp->ipz_rqueue.offset;
743                 resp.ipz_squeue.offset = my_qp->ipz_squeue.offset;
744                 if (HAS_SQ(my_qp))
745                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
746                 if (HAS_RQ(my_qp))
747                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
748
749                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
750                         ehca_err(pd->device, "Copy to udata failed");
751                         ret = -EINVAL;
752                         goto create_qp_exit4;
753                 }
754         }
755
756         return my_qp;
757
758 create_qp_exit4:
759         if (HAS_RQ(my_qp))
760                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
761
762 create_qp_exit3:
763         if (HAS_SQ(my_qp))
764                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
765
766 create_qp_exit2:
767         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
768
769 create_qp_exit1:
770         write_lock_irqsave(&ehca_qp_idr_lock, flags);
771         idr_remove(&ehca_qp_idr, my_qp->token);
772         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
773
774 create_qp_exit0:
775         kmem_cache_free(qp_cache, my_qp);
776         return ERR_PTR(ret);
777 }
778
779 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
780                              struct ib_qp_init_attr *qp_init_attr,
781                              struct ib_udata *udata)
782 {
783         struct ehca_qp *ret;
784
785         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
786         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
787 }
788
789 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
790                                struct ib_uobject *uobject);
791
792 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
793                                struct ib_srq_init_attr *srq_init_attr,
794                                struct ib_udata *udata)
795 {
796         struct ib_qp_init_attr qp_init_attr;
797         struct ehca_qp *my_qp;
798         struct ib_srq *ret;
799         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
800                                               ib_device);
801         struct hcp_modify_qp_control_block *mqpcb;
802         u64 hret, update_mask;
803
804         /* For common attributes, internal_create_qp() takes its info
805          * out of qp_init_attr, so copy all common attrs there.
806          */
807         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
808         qp_init_attr.event_handler = srq_init_attr->event_handler;
809         qp_init_attr.qp_context = srq_init_attr->srq_context;
810         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
811         qp_init_attr.qp_type = IB_QPT_RC;
812         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
813         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
814
815         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
816         if (IS_ERR(my_qp))
817                 return (struct ib_srq *)my_qp;
818
819         /* copy back return values */
820         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
821         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
822
823         /* drive SRQ into RTR state */
824         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
825         if (!mqpcb) {
826                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
827                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
828                 ret = ERR_PTR(-ENOMEM);
829                 goto create_srq1;
830         }
831
832         mqpcb->qp_state = EHCA_QPS_INIT;
833         mqpcb->prim_phys_port = 1;
834         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
835         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
836                                 my_qp->ipz_qp_handle,
837                                 &my_qp->pf,
838                                 update_mask,
839                                 mqpcb, my_qp->galpas.kernel);
840         if (hret != H_SUCCESS) {
841                 ehca_err(pd->device, "Could not modify SRQ to INIT"
842                          "ehca_qp=%p qp_num=%x hret=%lx",
843                          my_qp, my_qp->real_qp_num, hret);
844                 goto create_srq2;
845         }
846
847         mqpcb->qp_enable = 1;
848         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
849         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
850                                 my_qp->ipz_qp_handle,
851                                 &my_qp->pf,
852                                 update_mask,
853                                 mqpcb, my_qp->galpas.kernel);
854         if (hret != H_SUCCESS) {
855                 ehca_err(pd->device, "Could not enable SRQ"
856                          "ehca_qp=%p qp_num=%x hret=%lx",
857                          my_qp, my_qp->real_qp_num, hret);
858                 goto create_srq2;
859         }
860
861         mqpcb->qp_state  = EHCA_QPS_RTR;
862         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
863         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
864                                 my_qp->ipz_qp_handle,
865                                 &my_qp->pf,
866                                 update_mask,
867                                 mqpcb, my_qp->galpas.kernel);
868         if (hret != H_SUCCESS) {
869                 ehca_err(pd->device, "Could not modify SRQ to RTR"
870                          "ehca_qp=%p qp_num=%x hret=%lx",
871                          my_qp, my_qp->real_qp_num, hret);
872                 goto create_srq2;
873         }
874
875         return &my_qp->ib_srq;
876
877 create_srq2:
878         ret = ERR_PTR(ehca2ib_return_code(hret));
879         ehca_free_fw_ctrlblock(mqpcb);
880
881 create_srq1:
882         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
883
884         return ret;
885 }
886
887 /*
888  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
889  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
890  * returns total number of bad wqes in bad_wqe_cnt
891  */
892 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
893                            int *bad_wqe_cnt)
894 {
895         u64 h_ret;
896         struct ipz_queue *squeue;
897         void *bad_send_wqe_p, *bad_send_wqe_v;
898         u64 q_ofs;
899         struct ehca_wqe *wqe;
900         int qp_num = my_qp->ib_qp.qp_num;
901
902         /* get send wqe pointer */
903         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
904                                            my_qp->ipz_qp_handle, &my_qp->pf,
905                                            &bad_send_wqe_p, NULL, 2);
906         if (h_ret != H_SUCCESS) {
907                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
908                          " ehca_qp=%p qp_num=%x h_ret=%lx",
909                          my_qp, qp_num, h_ret);
910                 return ehca2ib_return_code(h_ret);
911         }
912         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
913         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
914                  qp_num, bad_send_wqe_p);
915         /* convert wqe pointer to vadr */
916         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
917         if (ehca_debug_level)
918                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
919         squeue = &my_qp->ipz_squeue;
920         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
921                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
922                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
923                 return -EFAULT;
924         }
925
926         /* loop sets wqe's purge bit */
927         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
928         *bad_wqe_cnt = 0;
929         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
930                 if (ehca_debug_level)
931                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
932                 wqe->nr_of_data_seg = 0; /* suppress data access */
933                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
934                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
935                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
936                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
937         }
938         /*
939          * bad wqe will be reprocessed and ignored when pol_cq() is called,
940          *  i.e. nr of wqes with flush error status is one less
941          */
942         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
943                  qp_num, (*bad_wqe_cnt)-1);
944         wqe->wqef = 0;
945
946         return 0;
947 }
948
949 /*
950  * internal_modify_qp with circumvention to handle aqp0 properly
951  * smi_reset2init indicates if this is an internal reset-to-init-call for
952  * smi. This flag must always be zero if called from ehca_modify_qp()!
953  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
954  */
955 static int internal_modify_qp(struct ib_qp *ibqp,
956                               struct ib_qp_attr *attr,
957                               int attr_mask, int smi_reset2init)
958 {
959         enum ib_qp_state qp_cur_state, qp_new_state;
960         int cnt, qp_attr_idx, ret = 0;
961         enum ib_qp_statetrans statetrans;
962         struct hcp_modify_qp_control_block *mqpcb;
963         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
964         struct ehca_shca *shca =
965                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
966         u64 update_mask;
967         u64 h_ret;
968         int bad_wqe_cnt = 0;
969         int squeue_locked = 0;
970         unsigned long flags = 0;
971
972         /* do query_qp to obtain current attr values */
973         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
974         if (!mqpcb) {
975                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
976                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
977                 return -ENOMEM;
978         }
979
980         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
981                                 my_qp->ipz_qp_handle,
982                                 &my_qp->pf,
983                                 mqpcb, my_qp->galpas.kernel);
984         if (h_ret != H_SUCCESS) {
985                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
986                          "ehca_qp=%p qp_num=%x h_ret=%lx",
987                          my_qp, ibqp->qp_num, h_ret);
988                 ret = ehca2ib_return_code(h_ret);
989                 goto modify_qp_exit1;
990         }
991
992         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
993
994         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
995                 ret = -EINVAL;
996                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
997                          "ehca_qp=%p qp_num=%x",
998                          mqpcb->qp_state, my_qp, ibqp->qp_num);
999                 goto modify_qp_exit1;
1000         }
1001         /*
1002          * circumvention to set aqp0 initial state to init
1003          * as expected by IB spec
1004          */
1005         if (smi_reset2init == 0 &&
1006             ibqp->qp_type == IB_QPT_SMI &&
1007             qp_cur_state == IB_QPS_RESET &&
1008             (attr_mask & IB_QP_STATE) &&
1009             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1010                 struct ib_qp_attr smiqp_attr = {
1011                         .qp_state = IB_QPS_INIT,
1012                         .port_num = my_qp->init_attr.port_num,
1013                         .pkey_index = 0,
1014                         .qkey = 0
1015                 };
1016                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1017                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1018                 int smirc = internal_modify_qp(
1019                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1020                 if (smirc) {
1021                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1022                                  "ehca_modify_qp() rc=%x", smirc);
1023                         ret = H_PARAMETER;
1024                         goto modify_qp_exit1;
1025                 }
1026                 qp_cur_state = IB_QPS_INIT;
1027                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1028         }
1029         /* is transmitted current state  equal to "real" current state */
1030         if ((attr_mask & IB_QP_CUR_STATE) &&
1031             qp_cur_state != attr->cur_qp_state) {
1032                 ret = -EINVAL;
1033                 ehca_err(ibqp->device,
1034                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1035                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1036                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1037                 goto modify_qp_exit1;
1038         }
1039
1040         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1041                  "new qp_state=%x attribute_mask=%x",
1042                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1043
1044         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1045         if (!smi_reset2init &&
1046             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1047                                 attr_mask)) {
1048                 ret = -EINVAL;
1049                 ehca_err(ibqp->device,
1050                          "Invalid qp transition new_state=%x cur_state=%x "
1051                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1052                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1053                 goto modify_qp_exit1;
1054         }
1055
1056         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1057         if (mqpcb->qp_state)
1058                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1059         else {
1060                 ret = -EINVAL;
1061                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1062                          "ehca_qp=%p qp_num=%x",
1063                          qp_new_state, my_qp, ibqp->qp_num);
1064                 goto modify_qp_exit1;
1065         }
1066
1067         /* retrieve state transition struct to get req and opt attrs */
1068         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1069         if (statetrans < 0) {
1070                 ret = -EINVAL;
1071                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1072                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1073                          "qp_num=%x", qp_cur_state, qp_new_state,
1074                          statetrans, my_qp, ibqp->qp_num);
1075                 goto modify_qp_exit1;
1076         }
1077
1078         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1079
1080         if (qp_attr_idx < 0) {
1081                 ret = qp_attr_idx;
1082                 ehca_err(ibqp->device,
1083                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1084                          ibqp->qp_type, my_qp, ibqp->qp_num);
1085                 goto modify_qp_exit1;
1086         }
1087
1088         ehca_dbg(ibqp->device,
1089                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1090                  my_qp, ibqp->qp_num, statetrans);
1091
1092         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1093          * in non-LL UD QPs.
1094          */
1095         if ((my_qp->qp_type == IB_QPT_UD) &&
1096             (my_qp->ext_type != EQPT_LLQP) &&
1097             (statetrans == IB_QPST_INIT2RTR) &&
1098             (shca->hw_level >= 0x22)) {
1099                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1100                 mqpcb->send_grh_flag = 1;
1101         }
1102
1103         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1104         if ((my_qp->qp_type == IB_QPT_UD ||
1105              my_qp->qp_type == IB_QPT_GSI ||
1106              my_qp->qp_type == IB_QPT_SMI) &&
1107             statetrans == IB_QPST_SQE2RTS) {
1108                 /* mark next free wqe if kernel */
1109                 if (!ibqp->uobject) {
1110                         struct ehca_wqe *wqe;
1111                         /* lock send queue */
1112                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1113                         squeue_locked = 1;
1114                         /* mark next free wqe */
1115                         wqe = (struct ehca_wqe *)
1116                                 ipz_qeit_get(&my_qp->ipz_squeue);
1117                         wqe->optype = wqe->wqef = 0xff;
1118                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1119                                  ibqp->qp_num, wqe);
1120                 }
1121                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1122                 if (ret) {
1123                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1124                                  "ehca_qp=%p qp_num=%x ret=%x",
1125                                  my_qp, ibqp->qp_num, ret);
1126                         goto modify_qp_exit2;
1127                 }
1128         }
1129
1130         /*
1131          * enable RDMA_Atomic_Control if reset->init und reliable con
1132          * this is necessary since gen2 does not provide that flag,
1133          * but pHyp requires it
1134          */
1135         if (statetrans == IB_QPST_RESET2INIT &&
1136             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1137                 mqpcb->rdma_atomic_ctrl = 3;
1138                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1139         }
1140         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1141         if (statetrans == IB_QPST_INIT2RTR &&
1142             (ibqp->qp_type == IB_QPT_UC) &&
1143             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1144                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1145                 update_mask |=
1146                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1147         }
1148
1149         if (attr_mask & IB_QP_PKEY_INDEX) {
1150                 mqpcb->prim_p_key_idx = attr->pkey_index;
1151                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1152         }
1153         if (attr_mask & IB_QP_PORT) {
1154                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1155                         ret = -EINVAL;
1156                         ehca_err(ibqp->device, "Invalid port=%x. "
1157                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1158                                  attr->port_num, my_qp, ibqp->qp_num,
1159                                  shca->num_ports);
1160                         goto modify_qp_exit2;
1161                 }
1162                 mqpcb->prim_phys_port = attr->port_num;
1163                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1164         }
1165         if (attr_mask & IB_QP_QKEY) {
1166                 mqpcb->qkey = attr->qkey;
1167                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1168         }
1169         if (attr_mask & IB_QP_AV) {
1170                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1171                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1172                                                 init_attr.port_num].rate);
1173
1174                 mqpcb->dlid = attr->ah_attr.dlid;
1175                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1176                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1177                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1178                 mqpcb->service_level = attr->ah_attr.sl;
1179                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1180
1181                 if (ah_mult < ehca_mult)
1182                         mqpcb->max_static_rate = (ah_mult > 0) ?
1183                         ((ehca_mult - 1) / ah_mult) : 0;
1184                 else
1185                         mqpcb->max_static_rate = 0;
1186                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1187
1188                 /*
1189                  * Always supply the GRH flag, even if it's zero, to give the
1190                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1191                  */
1192                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1193
1194                 /*
1195                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1196                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1197                  */
1198                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1199                         mqpcb->send_grh_flag = 1;
1200
1201                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1202                         update_mask |=
1203                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1204
1205                         for (cnt = 0; cnt < 16; cnt++)
1206                                 mqpcb->dest_gid.byte[cnt] =
1207                                         attr->ah_attr.grh.dgid.raw[cnt];
1208
1209                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1210                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1211                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1212                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1213                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1214                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1215                         update_mask |=
1216                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1217                 }
1218         }
1219
1220         if (attr_mask & IB_QP_PATH_MTU) {
1221                 mqpcb->path_mtu = attr->path_mtu;
1222                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1223         }
1224         if (attr_mask & IB_QP_TIMEOUT) {
1225                 mqpcb->timeout = attr->timeout;
1226                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1227         }
1228         if (attr_mask & IB_QP_RETRY_CNT) {
1229                 mqpcb->retry_count = attr->retry_cnt;
1230                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1231         }
1232         if (attr_mask & IB_QP_RNR_RETRY) {
1233                 mqpcb->rnr_retry_count = attr->rnr_retry;
1234                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1235         }
1236         if (attr_mask & IB_QP_RQ_PSN) {
1237                 mqpcb->receive_psn = attr->rq_psn;
1238                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1239         }
1240         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1241                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1242                         attr->max_dest_rd_atomic : 2;
1243                 update_mask |=
1244                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1245         }
1246         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1247                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1248                         attr->max_rd_atomic : 2;
1249                 update_mask |=
1250                         EHCA_BMASK_SET
1251                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1252         }
1253         if (attr_mask & IB_QP_ALT_PATH) {
1254                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1255                 int ehca_mult = ib_rate_to_mult(
1256                         shca->sport[my_qp->init_attr.port_num].rate);
1257
1258                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1259                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1260                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1261                 update_mask |=
1262                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1263                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1264                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1265
1266                 if (ah_mult < ehca_mult)
1267                         mqpcb->max_static_rate = (ah_mult > 0) ?
1268                         ((ehca_mult - 1) / ah_mult) : 0;
1269                 else
1270                         mqpcb->max_static_rate_al = 0;
1271
1272                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1273
1274                 /*
1275                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1276                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1277                  */
1278                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1279                         mqpcb->send_grh_flag_al = 1 << 31;
1280                         update_mask |=
1281                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1282                         mqpcb->source_gid_idx_al =
1283                                 attr->alt_ah_attr.grh.sgid_index;
1284                         update_mask |=
1285                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1286
1287                         for (cnt = 0; cnt < 16; cnt++)
1288                                 mqpcb->dest_gid_al.byte[cnt] =
1289                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1290
1291                         update_mask |=
1292                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1293                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1294                         update_mask |=
1295                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1296                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1297                         update_mask |=
1298                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1299                         mqpcb->traffic_class_al =
1300                                 attr->alt_ah_attr.grh.traffic_class;
1301                         update_mask |=
1302                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1303                 }
1304         }
1305
1306         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1307                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1308                 update_mask |=
1309                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1310         }
1311
1312         if (attr_mask & IB_QP_SQ_PSN) {
1313                 mqpcb->send_psn = attr->sq_psn;
1314                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1315         }
1316
1317         if (attr_mask & IB_QP_DEST_QPN) {
1318                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1319                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1320         }
1321
1322         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1323                 mqpcb->path_migration_state = attr->path_mig_state;
1324                 update_mask |=
1325                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1326         }
1327
1328         if (attr_mask & IB_QP_CAP) {
1329                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1330                 update_mask |=
1331                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1332                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1333                 update_mask |=
1334                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1335                 /* no support for max_send/recv_sge yet */
1336         }
1337
1338         if (ehca_debug_level)
1339                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1340
1341         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1342                                  my_qp->ipz_qp_handle,
1343                                  &my_qp->pf,
1344                                  update_mask,
1345                                  mqpcb, my_qp->galpas.kernel);
1346
1347         if (h_ret != H_SUCCESS) {
1348                 ret = ehca2ib_return_code(h_ret);
1349                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1350                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1351                 goto modify_qp_exit2;
1352         }
1353
1354         if ((my_qp->qp_type == IB_QPT_UD ||
1355              my_qp->qp_type == IB_QPT_GSI ||
1356              my_qp->qp_type == IB_QPT_SMI) &&
1357             statetrans == IB_QPST_SQE2RTS) {
1358                 /* doorbell to reprocessing wqes */
1359                 iosync(); /* serialize GAL register access */
1360                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1361                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1362         }
1363
1364         if (statetrans == IB_QPST_RESET2INIT ||
1365             statetrans == IB_QPST_INIT2INIT) {
1366                 mqpcb->qp_enable = 1;
1367                 mqpcb->qp_state = EHCA_QPS_INIT;
1368                 update_mask = 0;
1369                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1370
1371                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1372                                          my_qp->ipz_qp_handle,
1373                                          &my_qp->pf,
1374                                          update_mask,
1375                                          mqpcb,
1376                                          my_qp->galpas.kernel);
1377
1378                 if (h_ret != H_SUCCESS) {
1379                         ret = ehca2ib_return_code(h_ret);
1380                         ehca_err(ibqp->device, "ENABLE in context of "
1381                                  "RESET_2_INIT failed! Maybe you didn't get "
1382                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1383                                  h_ret, my_qp, ibqp->qp_num);
1384                         goto modify_qp_exit2;
1385                 }
1386         }
1387
1388         if (statetrans == IB_QPST_ANY2RESET) {
1389                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1390                 ipz_qeit_reset(&my_qp->ipz_squeue);
1391         }
1392
1393         if (attr_mask & IB_QP_QKEY)
1394                 my_qp->qkey = attr->qkey;
1395
1396 modify_qp_exit2:
1397         if (squeue_locked) { /* this means: sqe -> rts */
1398                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1399                 my_qp->sqerr_purgeflag = 1;
1400         }
1401
1402 modify_qp_exit1:
1403         ehca_free_fw_ctrlblock(mqpcb);
1404
1405         return ret;
1406 }
1407
1408 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1409                    struct ib_udata *udata)
1410 {
1411         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1412         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1413                                              ib_pd);
1414         u32 cur_pid = current->tgid;
1415
1416         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1417             my_pd->ownpid != cur_pid) {
1418                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1419                          cur_pid, my_pd->ownpid);
1420                 return -EINVAL;
1421         }
1422
1423         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1424 }
1425
1426 int ehca_query_qp(struct ib_qp *qp,
1427                   struct ib_qp_attr *qp_attr,
1428                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1429 {
1430         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1431         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1432                                              ib_pd);
1433         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1434                                               ib_device);
1435         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1436         struct hcp_modify_qp_control_block *qpcb;
1437         u32 cur_pid = current->tgid;
1438         int cnt, ret = 0;
1439         u64 h_ret;
1440
1441         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1442             my_pd->ownpid != cur_pid) {
1443                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1444                          cur_pid, my_pd->ownpid);
1445                 return -EINVAL;
1446         }
1447
1448         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1449                 ehca_err(qp->device, "Invalid attribute mask "
1450                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1451                          my_qp, qp->qp_num, qp_attr_mask);
1452                 return -EINVAL;
1453         }
1454
1455         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1456         if (!qpcb) {
1457                 ehca_err(qp->device, "Out of memory for qpcb "
1458                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1459                 return -ENOMEM;
1460         }
1461
1462         h_ret = hipz_h_query_qp(adapter_handle,
1463                                 my_qp->ipz_qp_handle,
1464                                 &my_qp->pf,
1465                                 qpcb, my_qp->galpas.kernel);
1466
1467         if (h_ret != H_SUCCESS) {
1468                 ret = ehca2ib_return_code(h_ret);
1469                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1470                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1471                          my_qp, qp->qp_num, h_ret);
1472                 goto query_qp_exit1;
1473         }
1474
1475         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1476         qp_attr->qp_state = qp_attr->cur_qp_state;
1477
1478         if (qp_attr->cur_qp_state == -EINVAL) {
1479                 ret = -EINVAL;
1480                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1481                          "ehca_qp=%p qp_num=%x",
1482                          qpcb->qp_state, my_qp, qp->qp_num);
1483                 goto query_qp_exit1;
1484         }
1485
1486         if (qp_attr->qp_state == IB_QPS_SQD)
1487                 qp_attr->sq_draining = 1;
1488
1489         qp_attr->qkey = qpcb->qkey;
1490         qp_attr->path_mtu = qpcb->path_mtu;
1491         qp_attr->path_mig_state = qpcb->path_migration_state;
1492         qp_attr->rq_psn = qpcb->receive_psn;
1493         qp_attr->sq_psn = qpcb->send_psn;
1494         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1495         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1496         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1497         /* UD_AV CIRCUMVENTION */
1498         if (my_qp->qp_type == IB_QPT_UD) {
1499                 qp_attr->cap.max_send_sge =
1500                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1501                 qp_attr->cap.max_recv_sge =
1502                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1503         } else {
1504                 qp_attr->cap.max_send_sge =
1505                         qpcb->actual_nr_sges_in_sq_wqe;
1506                 qp_attr->cap.max_recv_sge =
1507                         qpcb->actual_nr_sges_in_rq_wqe;
1508         }
1509
1510         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1511         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1512
1513         qp_attr->pkey_index =
1514                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1515
1516         qp_attr->port_num =
1517                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1518
1519         qp_attr->timeout = qpcb->timeout;
1520         qp_attr->retry_cnt = qpcb->retry_count;
1521         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1522
1523         qp_attr->alt_pkey_index =
1524                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1525
1526         qp_attr->alt_port_num = qpcb->alt_phys_port;
1527         qp_attr->alt_timeout = qpcb->timeout_al;
1528
1529         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1530         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1531
1532         /* primary av */
1533         qp_attr->ah_attr.sl = qpcb->service_level;
1534
1535         if (qpcb->send_grh_flag) {
1536                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1537         }
1538
1539         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1540         qp_attr->ah_attr.dlid = qpcb->dlid;
1541         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1542         qp_attr->ah_attr.port_num = qp_attr->port_num;
1543
1544         /* primary GRH */
1545         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1546         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1547         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1548         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1549
1550         for (cnt = 0; cnt < 16; cnt++)
1551                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1552                         qpcb->dest_gid.byte[cnt];
1553
1554         /* alternate AV */
1555         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1556         if (qpcb->send_grh_flag_al) {
1557                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1558         }
1559
1560         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1561         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1562         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1563
1564         /* alternate GRH */
1565         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1566         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1567         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1568         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1569
1570         for (cnt = 0; cnt < 16; cnt++)
1571                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1572                         qpcb->dest_gid_al.byte[cnt];
1573
1574         /* return init attributes given in ehca_create_qp */
1575         if (qp_init_attr)
1576                 *qp_init_attr = my_qp->init_attr;
1577
1578         if (ehca_debug_level)
1579                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1580
1581 query_qp_exit1:
1582         ehca_free_fw_ctrlblock(qpcb);
1583
1584         return ret;
1585 }
1586
1587 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1588                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1589 {
1590         struct ehca_qp *my_qp =
1591                 container_of(ibsrq, struct ehca_qp, ib_srq);
1592         struct ehca_pd *my_pd =
1593                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1594         struct ehca_shca *shca =
1595                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1596         struct hcp_modify_qp_control_block *mqpcb;
1597         u64 update_mask;
1598         u64 h_ret;
1599         int ret = 0;
1600
1601         u32 cur_pid = current->tgid;
1602         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1603             my_pd->ownpid != cur_pid) {
1604                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1605                          cur_pid, my_pd->ownpid);
1606                 return -EINVAL;
1607         }
1608
1609         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1610         if (!mqpcb) {
1611                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1612                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1613                 return -ENOMEM;
1614         }
1615
1616         update_mask = 0;
1617         if (attr_mask & IB_SRQ_LIMIT) {
1618                 attr_mask &= ~IB_SRQ_LIMIT;
1619                 update_mask |=
1620                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1621                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1622                 mqpcb->curr_srq_limit =
1623                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1624                 mqpcb->qp_aff_asyn_ev_log_reg =
1625                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1626         }
1627
1628         /* by now, all bits in attr_mask should have been cleared */
1629         if (attr_mask) {
1630                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1631                          "attr_mask=%x", attr_mask);
1632                 ret = -EINVAL;
1633                 goto modify_srq_exit0;
1634         }
1635
1636         if (ehca_debug_level)
1637                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1638
1639         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1640                                  NULL, update_mask, mqpcb,
1641                                  my_qp->galpas.kernel);
1642
1643         if (h_ret != H_SUCCESS) {
1644                 ret = ehca2ib_return_code(h_ret);
1645                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1646                          "ehca_qp=%p qp_num=%x",
1647                          h_ret, my_qp, my_qp->real_qp_num);
1648         }
1649
1650 modify_srq_exit0:
1651         ehca_free_fw_ctrlblock(mqpcb);
1652
1653         return ret;
1654 }
1655
1656 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1657 {
1658         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1659         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1660         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1661                                               ib_device);
1662         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1663         struct hcp_modify_qp_control_block *qpcb;
1664         u32 cur_pid = current->tgid;
1665         int ret = 0;
1666         u64 h_ret;
1667
1668         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1669             my_pd->ownpid != cur_pid) {
1670                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1671                          cur_pid, my_pd->ownpid);
1672                 return -EINVAL;
1673         }
1674
1675         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1676         if (!qpcb) {
1677                 ehca_err(srq->device, "Out of memory for qpcb "
1678                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1679                 return -ENOMEM;
1680         }
1681
1682         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1683                                 NULL, qpcb, my_qp->galpas.kernel);
1684
1685         if (h_ret != H_SUCCESS) {
1686                 ret = ehca2ib_return_code(h_ret);
1687                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1688                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1689                          my_qp, my_qp->real_qp_num, h_ret);
1690                 goto query_srq_exit1;
1691         }
1692
1693         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1694         srq_attr->srq_limit = EHCA_BMASK_GET(
1695                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1696
1697         if (ehca_debug_level)
1698                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1699
1700 query_srq_exit1:
1701         ehca_free_fw_ctrlblock(qpcb);
1702
1703         return ret;
1704 }
1705
1706 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1707                                struct ib_uobject *uobject)
1708 {
1709         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1710         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1711                                              ib_pd);
1712         u32 cur_pid = current->tgid;
1713         u32 qp_num = my_qp->real_qp_num;
1714         int ret;
1715         u64 h_ret;
1716         u8 port_num;
1717         enum ib_qp_type qp_type;
1718         unsigned long flags;
1719
1720         if (uobject) {
1721                 if (my_qp->mm_count_galpa ||
1722                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1723                         ehca_err(dev, "Resources still referenced in "
1724                                  "user space qp_num=%x", qp_num);
1725                         return -EINVAL;
1726                 }
1727                 if (my_pd->ownpid != cur_pid) {
1728                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1729                                  cur_pid, my_pd->ownpid);
1730                         return -EINVAL;
1731                 }
1732         }
1733
1734         if (my_qp->send_cq) {
1735                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1736                 if (ret) {
1737                         ehca_err(dev, "Couldn't unassign qp from "
1738                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1739                                  qp_num, my_qp->send_cq->cq_number);
1740                         return ret;
1741                 }
1742         }
1743
1744         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1745         idr_remove(&ehca_qp_idr, my_qp->token);
1746         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1747
1748         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1749         if (h_ret != H_SUCCESS) {
1750                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1751                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1752                 return ehca2ib_return_code(h_ret);
1753         }
1754
1755         port_num = my_qp->init_attr.port_num;
1756         qp_type  = my_qp->init_attr.qp_type;
1757
1758         /* no support for IB_QPT_SMI yet */
1759         if (qp_type == IB_QPT_GSI) {
1760                 struct ib_event event;
1761                 ehca_info(dev, "device %s: port %x is inactive.",
1762                           shca->ib_device.name, port_num);
1763                 event.device = &shca->ib_device;
1764                 event.event = IB_EVENT_PORT_ERR;
1765                 event.element.port_num = port_num;
1766                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1767                 ib_dispatch_event(&event);
1768         }
1769
1770         if (HAS_RQ(my_qp))
1771                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1772         if (HAS_SQ(my_qp))
1773                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1774         kmem_cache_free(qp_cache, my_qp);
1775         return 0;
1776 }
1777
1778 int ehca_destroy_qp(struct ib_qp *qp)
1779 {
1780         return internal_destroy_qp(qp->device,
1781                                    container_of(qp, struct ehca_qp, ib_qp),
1782                                    qp->uobject);
1783 }
1784
1785 int ehca_destroy_srq(struct ib_srq *srq)
1786 {
1787         return internal_destroy_qp(srq->device,
1788                                    container_of(srq, struct ehca_qp, ib_srq),
1789                                    srq->uobject);
1790 }
1791
1792 int ehca_init_qp_cache(void)
1793 {
1794         qp_cache = kmem_cache_create("ehca_cache_qp",
1795                                      sizeof(struct ehca_qp), 0,
1796                                      SLAB_HWCACHE_ALIGN,
1797                                      NULL);
1798         if (!qp_cache)
1799                 return -ENOMEM;
1800         return 0;
1801 }
1802
1803 void ehca_cleanup_qp_cache(void)
1804 {
1805         if (qp_cache)
1806                 kmem_cache_destroy(qp_cache);
1807 }