drivers/block/DAC960.c

   1 /*
   2
   3   Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
   4
   5   Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
   6
   7   This program is free software; you may redistribute and/or modify it under
   8   the terms of the GNU General Public License Version 2 as published by the
   9   Free Software Foundation.
  10
  11   This program is distributed in the hope that it will be useful, but
  12   WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
  13   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14   for complete details.
  15
  16 */
  17
  18
  19 #define DAC960_DriverVersion                    "2.5.47"
  20 #define DAC960_DriverDate                       "14 November 2002"
  21
  22
  23 #include <linux/module.h>
  24 #include <linux/types.h>
  25 #include <linux/miscdevice.h>
  26 #include <linux/blkdev.h>
  27 #include <linux/bio.h>
  28 #include <linux/completion.h>
  29 #include <linux/delay.h>
  30 #include <linux/genhd.h>
  31 #include <linux/hdreg.h>
  32 #include <linux/blkpg.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/ioport.h>
  35 #include <linux/mm.h>
  36 #include <linux/slab.h>
  37 #include <linux/proc_fs.h>
  38 #include <linux/reboot.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/timer.h>
  41 #include <linux/pci.h>
  42 #include <linux/init.h>
  43 #include <asm/io.h>
  44 #include <asm/uaccess.h>
  45 #include "DAC960.h"
  46
  47 #define DAC960_GAM_MINOR        252
  48
  49
  50 static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
  51 static int DAC960_ControllerCount;
  52 static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
  53
  54 static long disk_size(DAC960_Controller_T *p, int drive_nr)
  55 {
  56         if (p->FirmwareType == DAC960_V1_Controller) {
  57                 if (drive_nr >= p->LogicalDriveCount)
  58                         return 0;
  59                 return p->V1.LogicalDriveInformation[drive_nr].
  60                         LogicalDriveSize;
  61         } else {
  62                 DAC960_V2_LogicalDeviceInfo_T *i =
  63                         p->V2.LogicalDeviceInformation[drive_nr];
  64                 if (i == NULL)
  65                         return 0;
  66                 return i->ConfigurableDeviceSize;
  67         }
  68 }
  69
  70 static int DAC960_open(struct inode *inode, struct file *file)
  71 {
  72         struct gendisk *disk = inode->i_bdev->bd_disk;
  73         DAC960_Controller_T *p = disk->queue->queuedata;
  74         int drive_nr = (long)disk->private_data;
  75
  76         if (p->FirmwareType == DAC960_V1_Controller) {
  77                 if (p->V1.LogicalDriveInformation[drive_nr].
  78                     LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
  79                         return -ENXIO;
  80         } else {
  81                 DAC960_V2_LogicalDeviceInfo_T *i =
  82                         p->V2.LogicalDeviceInformation[drive_nr];
  83                 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
  84                         return -ENXIO;
  85         }
  86
  87         check_disk_change(inode->i_bdev);
  88
  89         if (!get_capacity(p->disks[drive_nr]))
  90                 return -ENXIO;
  91         return 0;
  92 }
  93
  94 static int DAC960_ioctl(struct inode *inode, struct file *file,
  95                         unsigned int cmd, unsigned long arg)
  96 {
  97         struct gendisk *disk = inode->i_bdev->bd_disk;
  98         DAC960_Controller_T *p = disk->queue->queuedata;
  99         int drive_nr = (long)disk->private_data;
 100         struct hd_geometry g;
 101         struct hd_geometry __user *loc = (struct hd_geometry __user *)arg;
 102
 103         if (cmd != HDIO_GETGEO || !loc)
 104                 return -EINVAL;
 105
 106         if (p->FirmwareType == DAC960_V1_Controller) {
 107                 g.heads = p->V1.GeometryTranslationHeads;
 108                 g.sectors = p->V1.GeometryTranslationSectors;
 109                 g.cylinders = p->V1.LogicalDriveInformation[drive_nr].
 110                         LogicalDriveSize / (g.heads * g.sectors);
 111         } else {
 112                 DAC960_V2_LogicalDeviceInfo_T *i =
 113                         p->V2.LogicalDeviceInformation[drive_nr];
 114                 switch (i->DriveGeometry) {
 115                 case DAC960_V2_Geometry_128_32:
 116                         g.heads = 128;
 117                         g.sectors = 32;
 118                         break;
 119                 case DAC960_V2_Geometry_255_63:
 120                         g.heads = 255;
 121                         g.sectors = 63;
 122                         break;
 123                 default:
 124                         DAC960_Error("Illegal Logical Device Geometry %d\n",
 125                                         p, i->DriveGeometry);
 126                         return -EINVAL;
 127                 }
 128
 129                 g.cylinders = i->ConfigurableDeviceSize / (g.heads * g.sectors);
 130         }
 131
 132         g.start = get_start_sect(inode->i_bdev);
 133
 134         return copy_to_user(loc, &g, sizeof g) ? -EFAULT : 0;
 135 }
 136
 137 static int DAC960_media_changed(struct gendisk *disk)
 138 {
 139         DAC960_Controller_T *p = disk->queue->queuedata;
 140         int drive_nr = (long)disk->private_data;
 141
 142         if (!p->LogicalDriveInitiallyAccessible[drive_nr])
 143                 return 1;
 144         return 0;
 145 }
 146
 147 static int DAC960_revalidate_disk(struct gendisk *disk)
 148 {
 149         DAC960_Controller_T *p = disk->queue->queuedata;
 150         int unit = (long)disk->private_data;
 151
 152         set_capacity(disk, disk_size(p, unit));
 153         return 0;
 154 }
 155
 156 static struct block_device_operations DAC960_BlockDeviceOperations = {
 157         .owner                  = THIS_MODULE,
 158         .open                   = DAC960_open,
 159         .ioctl                  = DAC960_ioctl,
 160         .media_changed          = DAC960_media_changed,
 161         .revalidate_disk        = DAC960_revalidate_disk,
 162 };
 163
 164
 165 /*
 166   DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
 167   Copyright Notice, and Electronic Mail Address.
 168 */
 169
 170 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
 171 {
 172   DAC960_Announce("***** DAC960 RAID Driver Version "
 173                   DAC960_DriverVersion " of "
 174                   DAC960_DriverDate " *****\n", Controller);
 175   DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
 176                   "<lnz@dandelion.com>\n", Controller);
 177 }
 178
 179
 180 /*
 181   DAC960_Failure prints a standardized error message, and then returns false.
 182 */
 183
 184 static boolean DAC960_Failure(DAC960_Controller_T *Controller,
 185                               unsigned char *ErrorMessage)
 186 {
 187   DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
 188                Controller);
 189   if (Controller->IO_Address == 0)
 190     DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
 191                  "PCI Address 0x%X\n", Controller,
 192                  Controller->Bus, Controller->Device,
 193                  Controller->Function, Controller->PCI_Address);
 194   else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
 195                     "0x%X PCI Address 0x%X\n", Controller,
 196                     Controller->Bus, Controller->Device,
 197                     Controller->Function, Controller->IO_Address,
 198                     Controller->PCI_Address);
 199   DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
 200   return false;
 201 }
 202
 203 /*
 204   init_dma_loaf() and slice_dma_loaf() are helper functions for
 205   aggregating the dma-mapped memory for a well-known collection of
 206   data structures that are of different lengths.
 207
 208   These routines don't guarantee any alignment.  The caller must
 209   include any space needed for alignment in the sizes of the structures
 210   that are passed in.
 211  */
 212
 213 static boolean init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
 214                                                                  size_t len)
 215 {
 216         void *cpu_addr;
 217         dma_addr_t dma_handle;
 218
 219         cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
 220         if (cpu_addr == NULL)
 221                 return false;
 222
 223         loaf->cpu_free = loaf->cpu_base = cpu_addr;
 224         loaf->dma_free =loaf->dma_base = dma_handle;
 225         loaf->length = len;
 226         memset(cpu_addr, 0, len);
 227         return true;
 228 }
 229
 230 static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
 231                                         dma_addr_t *dma_handle)
 232 {
 233         void *cpu_end = loaf->cpu_free + len;
 234         void *cpu_addr = loaf->cpu_free;
 235
 236         if (cpu_end > loaf->cpu_base + loaf->length)
 237                 BUG();
 238         *dma_handle = loaf->dma_free;
 239         loaf->cpu_free = cpu_end;
 240         loaf->dma_free += len;
 241         return cpu_addr;
 242 }
 243
 244 static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
 245 {
 246         if (loaf_handle->cpu_base != NULL)
 247                 pci_free_consistent(dev, loaf_handle->length,
 248                         loaf_handle->cpu_base, loaf_handle->dma_base);
 249 }
 250
 251
 252 /*
 253   DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
 254   data structures for Controller.  It returns true on success and false on
 255   failure.
 256 */
 257
 258 static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
 259 {
 260   int CommandAllocationLength, CommandAllocationGroupSize;
 261   int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
 262   void *AllocationPointer = NULL;
 263   void *ScatterGatherCPU = NULL;
 264   dma_addr_t ScatterGatherDMA;
 265   struct pci_pool *ScatterGatherPool;
 266   void *RequestSenseCPU = NULL;
 267   dma_addr_t RequestSenseDMA;
 268   struct pci_pool *RequestSensePool = NULL;
 269
 270   if (Controller->FirmwareType == DAC960_V1_Controller)
 271     {
 272       CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
 273       CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
 274       ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
 275                 Controller->PCIDevice,
 276         DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
 277         sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
 278       if (ScatterGatherPool == NULL)
 279             return DAC960_Failure(Controller,
 280                         "AUXILIARY STRUCTURE CREATION (SG)");
 281       Controller->ScatterGatherPool = ScatterGatherPool;
 282     }
 283   else
 284     {
 285       CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
 286       CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
 287       ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
 288                 Controller->PCIDevice,
 289         DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
 290         sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
 291       if (ScatterGatherPool == NULL)
 292             return DAC960_Failure(Controller,
 293                         "AUXILIARY STRUCTURE CREATION (SG)");
 294       RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
 295                 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
 296                 sizeof(int), 0);
 297       if (RequestSensePool == NULL) {
 298             pci_pool_destroy(ScatterGatherPool);
 299             return DAC960_Failure(Controller,
 300                         "AUXILIARY STRUCTURE CREATION (SG)");
 301       }
 302       Controller->ScatterGatherPool = ScatterGatherPool;
 303       Controller->V2.RequestSensePool = RequestSensePool;
 304     }
 305   Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
 306   Controller->FreeCommands = NULL;
 307   for (CommandIdentifier = 1;
 308        CommandIdentifier <= Controller->DriverQueueDepth;
 309        CommandIdentifier++)
 310     {
 311       DAC960_Command_T *Command;
 312       if (--CommandsRemaining <= 0)
 313         {
 314           CommandsRemaining =
 315                 Controller->DriverQueueDepth - CommandIdentifier + 1;
 316           if (CommandsRemaining > CommandAllocationGroupSize)
 317                 CommandsRemaining = CommandAllocationGroupSize;
 318           CommandGroupByteCount =
 319                 CommandsRemaining * CommandAllocationLength;
 320           AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC);
 321           if (AllocationPointer == NULL)
 322                 return DAC960_Failure(Controller,
 323                                         "AUXILIARY STRUCTURE CREATION");
 324           memset(AllocationPointer, 0, CommandGroupByteCount);
 325          }
 326       Command = (DAC960_Command_T *) AllocationPointer;
 327       AllocationPointer += CommandAllocationLength;
 328       Command->CommandIdentifier = CommandIdentifier;
 329       Command->Controller = Controller;
 330       Command->Next = Controller->FreeCommands;
 331       Controller->FreeCommands = Command;
 332       Controller->Commands[CommandIdentifier-1] = Command;
 333       ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, SLAB_ATOMIC,
 334                                                         &ScatterGatherDMA);
 335       if (ScatterGatherCPU == NULL)
 336           return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
 337
 338       if (RequestSensePool != NULL) {
 339           RequestSenseCPU = pci_pool_alloc(RequestSensePool, SLAB_ATOMIC,
 340                                                 &RequestSenseDMA);
 341           if (RequestSenseCPU == NULL) {
 342                 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
 343                                 ScatterGatherDMA);
 344                 return DAC960_Failure(Controller,
 345                                         "AUXILIARY STRUCTURE CREATION");
 346           }
 347         }
 348      if (Controller->FirmwareType == DAC960_V1_Controller) {
 349         Command->cmd_sglist = Command->V1.ScatterList;
 350         Command->V1.ScatterGatherList =
 351                 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
 352         Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
 353       } else {
 354         Command->cmd_sglist = Command->V2.ScatterList;
 355         Command->V2.ScatterGatherList =
 356                 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
 357         Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
 358         Command->V2.RequestSense =
 359                                 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
 360         Command->V2.RequestSenseDMA = RequestSenseDMA;
 361       }
 362     }
 363   return true;
 364 }
 365
 366
 367 /*
 368   DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
 369   structures for Controller.
 370 */
 371
 372 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
 373 {
 374   int i;
 375   struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
 376   struct pci_pool *RequestSensePool = NULL;
 377   void *ScatterGatherCPU;
 378   dma_addr_t ScatterGatherDMA;
 379   void *RequestSenseCPU;
 380   dma_addr_t RequestSenseDMA;
 381   DAC960_Command_T *CommandGroup = NULL;
 382
 383
 384   if (Controller->FirmwareType == DAC960_V2_Controller)
 385         RequestSensePool = Controller->V2.RequestSensePool;
 386
 387   Controller->FreeCommands = NULL;
 388   for (i = 0; i < Controller->DriverQueueDepth; i++)
 389     {
 390       DAC960_Command_T *Command = Controller->Commands[i];
 391
 392       if (Command == NULL)
 393           continue;
 394
 395       if (Controller->FirmwareType == DAC960_V1_Controller) {
 396           ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
 397           ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
 398           RequestSenseCPU = NULL;
 399           RequestSenseDMA = (dma_addr_t)0;
 400       } else {
 401           ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
 402           ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
 403           RequestSenseCPU = (void *)Command->V2.RequestSense;
 404           RequestSenseDMA = Command->V2.RequestSenseDMA;
 405       }
 406       if (ScatterGatherCPU != NULL)
 407           pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
 408       if (RequestSenseCPU != NULL)
 409           pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
 410
 411       if ((Command->CommandIdentifier
 412            % Controller->CommandAllocationGroupSize) == 1) {
 413            /*
 414             * We can't free the group of commands until all of the
 415             * request sense and scatter gather dma structures are free.
 416             * Remember the beginning of the group, but don't free it
 417             * until we've reached the beginning of the next group.
 418             */
 419            if (CommandGroup != NULL)
 420                 kfree(CommandGroup);
 421             CommandGroup = Command;
 422       }
 423       Controller->Commands[i] = NULL;
 424     }
 425   if (CommandGroup != NULL)
 426       kfree(CommandGroup);
 427
 428   if (Controller->CombinedStatusBuffer != NULL)
 429     {
 430       kfree(Controller->CombinedStatusBuffer);
 431       Controller->CombinedStatusBuffer = NULL;
 432       Controller->CurrentStatusBuffer = NULL;
 433     }
 434
 435   if (ScatterGatherPool != NULL)
 436         pci_pool_destroy(ScatterGatherPool);
 437   if (Controller->FirmwareType == DAC960_V1_Controller) return;
 438
 439   if (RequestSensePool != NULL)
 440         pci_pool_destroy(RequestSensePool);
 441
 442   for (i = 0; i < DAC960_MaxLogicalDrives; i++)
 443     if (Controller->V2.LogicalDeviceInformation[i] != NULL)
 444       {
 445         kfree(Controller->V2.LogicalDeviceInformation[i]);
 446         Controller->V2.LogicalDeviceInformation[i] = NULL;
 447       }
 448
 449   for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
 450     {
 451       if (Controller->V2.PhysicalDeviceInformation[i] != NULL)
 452         {
 453           kfree(Controller->V2.PhysicalDeviceInformation[i]);
 454           Controller->V2.PhysicalDeviceInformation[i] = NULL;
 455         }
 456       if (Controller->V2.InquiryUnitSerialNumber[i] != NULL)
 457         {
 458           kfree(Controller->V2.InquiryUnitSerialNumber[i]);
 459           Controller->V2.InquiryUnitSerialNumber[i] = NULL;
 460         }
 461     }
 462 }
 463
 464
 465 /*
 466   DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
 467   Firmware Controllers.
 468 */
 469
 470 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
 471 {
 472   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 473   memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
 474   Command->V1.CommandStatus = 0;
 475 }
 476
 477
 478 /*
 479   DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
 480   Firmware Controllers.
 481 */
 482
 483 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
 484 {
 485   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 486   memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
 487   Command->V2.CommandStatus = 0;
 488 }
 489
 490
 491 /*
 492   DAC960_AllocateCommand allocates a Command structure from Controller's
 493   free list.  During driver initialization, a special initialization command
 494   has been placed on the free list to guarantee that command allocation can
 495   never fail.
 496 */
 497
 498 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
 499                                                        *Controller)
 500 {
 501   DAC960_Command_T *Command = Controller->FreeCommands;
 502   if (Command == NULL) return NULL;
 503   Controller->FreeCommands = Command->Next;
 504   Command->Next = NULL;
 505   return Command;
 506 }
 507
 508
 509 /*
 510   DAC960_DeallocateCommand deallocates Command, returning it to Controller's
 511   free list.
 512 */
 513
 514 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
 515 {
 516   DAC960_Controller_T *Controller = Command->Controller;
 517
 518   Command->Request = NULL;
 519   Command->Next = Controller->FreeCommands;
 520   Controller->FreeCommands = Command;
 521 }
 522
 523
 524 /*
 525   DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
 526 */
 527
 528 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
 529 {
 530   spin_unlock_irq(&Controller->queue_lock);
 531   __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
 532   spin_lock_irq(&Controller->queue_lock);
 533 }
 534
 535
 536 /*
 537   DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
 538 */
 539
 540 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
 541 {
 542   DAC960_Controller_T *Controller = Command->Controller;
 543   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 544   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 545   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
 546     Controller->V2.NextCommandMailbox;
 547   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 548   DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
 549   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
 550       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
 551     DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
 552   Controller->V2.PreviousCommandMailbox2 =
 553     Controller->V2.PreviousCommandMailbox1;
 554   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
 555   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
 556     NextCommandMailbox = Controller->V2.FirstCommandMailbox;
 557   Controller->V2.NextCommandMailbox = NextCommandMailbox;
 558 }
 559
 560
 561 /*
 562   DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
 563 */
 564
 565 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
 566 {
 567   DAC960_Controller_T *Controller = Command->Controller;
 568   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 569   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 570   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
 571     Controller->V2.NextCommandMailbox;
 572   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 573   DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
 574   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
 575       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
 576     DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
 577   Controller->V2.PreviousCommandMailbox2 =
 578     Controller->V2.PreviousCommandMailbox1;
 579   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
 580   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
 581     NextCommandMailbox = Controller->V2.FirstCommandMailbox;
 582   Controller->V2.NextCommandMailbox = NextCommandMailbox;
 583 }
 584
 585
 586 /*
 587   DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
 588   Controllers with Dual Mode Firmware.
 589 */
 590
 591 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
 592 {
 593   DAC960_Controller_T *Controller = Command->Controller;
 594   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 595   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 596   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
 597     Controller->V1.NextCommandMailbox;
 598   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 599   DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
 600   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
 601       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
 602     DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
 603   Controller->V1.PreviousCommandMailbox2 =
 604     Controller->V1.PreviousCommandMailbox1;
 605   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
 606   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
 607     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
 608   Controller->V1.NextCommandMailbox = NextCommandMailbox;
 609 }
 610
 611
 612 /*
 613   DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
 614   Controllers with Single Mode Firmware.
 615 */
 616
 617 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
 618 {
 619   DAC960_Controller_T *Controller = Command->Controller;
 620   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 621   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 622   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
 623     Controller->V1.NextCommandMailbox;
 624   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 625   DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
 626   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
 627       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
 628     DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
 629   Controller->V1.PreviousCommandMailbox2 =
 630     Controller->V1.PreviousCommandMailbox1;
 631   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
 632   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
 633     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
 634   Controller->V1.NextCommandMailbox = NextCommandMailbox;
 635 }
 636
 637
 638 /*
 639   DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
 640   Controllers with Dual Mode Firmware.
 641 */
 642
 643 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
 644 {
 645   DAC960_Controller_T *Controller = Command->Controller;
 646   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 647   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 648   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
 649     Controller->V1.NextCommandMailbox;
 650   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 651   DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
 652   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
 653       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
 654     DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
 655   Controller->V1.PreviousCommandMailbox2 =
 656     Controller->V1.PreviousCommandMailbox1;
 657   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
 658   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
 659     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
 660   Controller->V1.NextCommandMailbox = NextCommandMailbox;
 661 }
 662
 663
 664 /*
 665   DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
 666   Controllers with Single Mode Firmware.
 667 */
 668
 669 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
 670 {
 671   DAC960_Controller_T *Controller = Command->Controller;
 672   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 673   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 674   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
 675     Controller->V1.NextCommandMailbox;
 676   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 677   DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
 678   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
 679       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
 680     DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
 681   Controller->V1.PreviousCommandMailbox2 =
 682     Controller->V1.PreviousCommandMailbox1;
 683   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
 684   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
 685     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
 686   Controller->V1.NextCommandMailbox = NextCommandMailbox;
 687 }
 688
 689
 690 /*
 691   DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
 692 */
 693
 694 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
 695 {
 696   DAC960_Controller_T *Controller = Command->Controller;
 697   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 698   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 699   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 700   while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
 701     udelay(1);
 702   DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
 703   DAC960_PD_NewCommand(ControllerBaseAddress);
 704 }
 705
 706
 707 /*
 708   DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
 709 */
 710
 711 static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
 712 {
 713   DAC960_Controller_T *Controller = Command->Controller;
 714   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
 715   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 716   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
 717   switch (CommandMailbox->Common.CommandOpcode)
 718     {
 719     case DAC960_V1_Enquiry:
 720       CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
 721       break;
 722     case DAC960_V1_GetDeviceState:
 723       CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
 724       break;
 725     case DAC960_V1_Read:
 726       CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
 727       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
 728       break;
 729     case DAC960_V1_Write:
 730       CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
 731       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
 732       break;
 733     case DAC960_V1_ReadWithScatterGather:
 734       CommandMailbox->Common.CommandOpcode =
 735         DAC960_V1_ReadWithScatterGather_Old;
 736       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
 737       break;
 738     case DAC960_V1_WriteWithScatterGather:
 739       CommandMailbox->Common.CommandOpcode =
 740         DAC960_V1_WriteWithScatterGather_Old;
 741       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
 742       break;
 743     default:
 744       break;
 745     }
 746   while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
 747     udelay(1);
 748   DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
 749   DAC960_PD_NewCommand(ControllerBaseAddress);
 750 }
 751
 752
 753 /*
 754   DAC960_ExecuteCommand executes Command and waits for completion.
 755 */
 756
 757 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
 758 {
 759   DAC960_Controller_T *Controller = Command->Controller;
 760   DECLARE_COMPLETION(Completion);
 761   unsigned long flags;
 762   Command->Completion = &Completion;
 763
 764   spin_lock_irqsave(&Controller->queue_lock, flags);
 765   DAC960_QueueCommand(Command);
 766   spin_unlock_irqrestore(&Controller->queue_lock, flags);
 767
 768   if (in_interrupt())
 769           return;
 770   wait_for_completion(&Completion);
 771 }
 772
 773
 774 /*
 775   DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
 776   Command and waits for completion.  It returns true on success and false
 777   on failure.
 778 */
 779
 780 static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
 781                                       DAC960_V1_CommandOpcode_T CommandOpcode,
 782                                       dma_addr_t DataDMA)
 783 {
 784   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 785   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 786   DAC960_V1_CommandStatus_T CommandStatus;
 787   DAC960_V1_ClearCommand(Command);
 788   Command->CommandType = DAC960_ImmediateCommand;
 789   CommandMailbox->Type3.CommandOpcode = CommandOpcode;
 790   CommandMailbox->Type3.BusAddress = DataDMA;
 791   DAC960_ExecuteCommand(Command);
 792   CommandStatus = Command->V1.CommandStatus;
 793   DAC960_DeallocateCommand(Command);
 794   return (CommandStatus == DAC960_V1_NormalCompletion);
 795 }
 796
 797
 798 /*
 799   DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
 800   Command and waits for completion.  It returns true on success and false
 801   on failure.
 802 */
 803
 804 static boolean DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
 805                                        DAC960_V1_CommandOpcode_T CommandOpcode,
 806                                        unsigned char CommandOpcode2,
 807                                        dma_addr_t DataDMA)
 808 {
 809   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 810   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 811   DAC960_V1_CommandStatus_T CommandStatus;
 812   DAC960_V1_ClearCommand(Command);
 813   Command->CommandType = DAC960_ImmediateCommand;
 814   CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
 815   CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
 816   CommandMailbox->Type3B.BusAddress = DataDMA;
 817   DAC960_ExecuteCommand(Command);
 818   CommandStatus = Command->V1.CommandStatus;
 819   DAC960_DeallocateCommand(Command);
 820   return (CommandStatus == DAC960_V1_NormalCompletion);
 821 }
 822
 823
 824 /*
 825   DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
 826   Command and waits for completion.  It returns true on success and false
 827   on failure.
 828 */
 829
 830 static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
 831                                        DAC960_V1_CommandOpcode_T CommandOpcode,
 832                                        unsigned char Channel,
 833                                        unsigned char TargetID,
 834                                        dma_addr_t DataDMA)
 835 {
 836   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 837   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
 838   DAC960_V1_CommandStatus_T CommandStatus;
 839   DAC960_V1_ClearCommand(Command);
 840   Command->CommandType = DAC960_ImmediateCommand;
 841   CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
 842   CommandMailbox->Type3D.Channel = Channel;
 843   CommandMailbox->Type3D.TargetID = TargetID;
 844   CommandMailbox->Type3D.BusAddress = DataDMA;
 845   DAC960_ExecuteCommand(Command);
 846   CommandStatus = Command->V1.CommandStatus;
 847   DAC960_DeallocateCommand(Command);
 848   return (CommandStatus == DAC960_V1_NormalCompletion);
 849 }
 850
 851
 852 /*
 853   DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
 854   Reading IOCTL Command and waits for completion.  It returns true on success
 855   and false on failure.
 856
 857   Return data in The controller's HealthStatusBuffer, which is dma-able memory
 858 */
 859
 860 static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
 861 {
 862   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 863   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 864   DAC960_V2_CommandStatus_T CommandStatus;
 865   DAC960_V2_ClearCommand(Command);
 866   Command->CommandType = DAC960_ImmediateCommand;
 867   CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
 868   CommandMailbox->Common.CommandControlBits
 869                         .DataTransferControllerToHost = true;
 870   CommandMailbox->Common.CommandControlBits
 871                         .NoAutoRequestSense = true;
 872   CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
 873   CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
 874   CommandMailbox->Common.DataTransferMemoryAddress
 875                         .ScatterGatherSegments[0]
 876                         .SegmentDataPointer =
 877     Controller->V2.HealthStatusBufferDMA;
 878   CommandMailbox->Common.DataTransferMemoryAddress
 879                         .ScatterGatherSegments[0]
 880                         .SegmentByteCount =
 881     CommandMailbox->Common.DataTransferSize;
 882   DAC960_ExecuteCommand(Command);
 883   CommandStatus = Command->V2.CommandStatus;
 884   DAC960_DeallocateCommand(Command);
 885   return (CommandStatus == DAC960_V2_NormalCompletion);
 886 }
 887
 888
 889 /*
 890   DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
 891   Information Reading IOCTL Command and waits for completion.  It returns
 892   true on success and false on failure.
 893
 894   Data is returned in the controller's V2.NewControllerInformation dma-able
 895   memory buffer.
 896 */
 897
 898 static boolean DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
 899 {
 900   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 901   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 902   DAC960_V2_CommandStatus_T CommandStatus;
 903   DAC960_V2_ClearCommand(Command);
 904   Command->CommandType = DAC960_ImmediateCommand;
 905   CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
 906   CommandMailbox->ControllerInfo.CommandControlBits
 907                                 .DataTransferControllerToHost = true;
 908   CommandMailbox->ControllerInfo.CommandControlBits
 909                                 .NoAutoRequestSense = true;
 910   CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
 911   CommandMailbox->ControllerInfo.ControllerNumber = 0;
 912   CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
 913   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
 914                                 .ScatterGatherSegments[0]
 915                                 .SegmentDataPointer =
 916         Controller->V2.NewControllerInformationDMA;
 917   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
 918                                 .ScatterGatherSegments[0]
 919                                 .SegmentByteCount =
 920     CommandMailbox->ControllerInfo.DataTransferSize;
 921   DAC960_ExecuteCommand(Command);
 922   CommandStatus = Command->V2.CommandStatus;
 923   DAC960_DeallocateCommand(Command);
 924   return (CommandStatus == DAC960_V2_NormalCompletion);
 925 }
 926
 927
 928 /*
 929   DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
 930   Device Information Reading IOCTL Command and waits for completion.  It
 931   returns true on success and false on failure.
 932
 933   Data is returned in the controller's V2.NewLogicalDeviceInformation
 934 */
 935
 936 static boolean DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
 937                                            unsigned short LogicalDeviceNumber)
 938 {
 939   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 940   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 941   DAC960_V2_CommandStatus_T CommandStatus;
 942
 943   DAC960_V2_ClearCommand(Command);
 944   Command->CommandType = DAC960_ImmediateCommand;
 945   CommandMailbox->LogicalDeviceInfo.CommandOpcode =
 946                                 DAC960_V2_IOCTL;
 947   CommandMailbox->LogicalDeviceInfo.CommandControlBits
 948                                    .DataTransferControllerToHost = true;
 949   CommandMailbox->LogicalDeviceInfo.CommandControlBits
 950                                    .NoAutoRequestSense = true;
 951   CommandMailbox->LogicalDeviceInfo.DataTransferSize =
 952                                 sizeof(DAC960_V2_LogicalDeviceInfo_T);
 953   CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
 954     LogicalDeviceNumber;
 955   CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
 956   CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
 957                                    .ScatterGatherSegments[0]
 958                                    .SegmentDataPointer =
 959         Controller->V2.NewLogicalDeviceInformationDMA;
 960   CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
 961                                    .ScatterGatherSegments[0]
 962                                    .SegmentByteCount =
 963     CommandMailbox->LogicalDeviceInfo.DataTransferSize;
 964   DAC960_ExecuteCommand(Command);
 965   CommandStatus = Command->V2.CommandStatus;
 966   DAC960_DeallocateCommand(Command);
 967   return (CommandStatus == DAC960_V2_NormalCompletion);
 968 }
 969
 970
 971 /*
 972   DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
 973   Physical Device Information" IOCTL Command and waits for completion.  It
 974   returns true on success and false on failure.
 975
 976   The Channel, TargetID, LogicalUnit arguments should be 0 the first time
 977   this function is called for a given controller.  This will return data
 978   for the "first" device on that controller.  The returned data includes a
 979   Channel, TargetID, LogicalUnit that can be passed in to this routine to
 980   get data for the NEXT device on that controller.
 981
 982   Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
 983   memory buffer.
 984
 985 */
 986
 987 static boolean DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
 988                                             unsigned char Channel,
 989                                             unsigned char TargetID,
 990                                             unsigned char LogicalUnit)
 991 {
 992   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
 993   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
 994   DAC960_V2_CommandStatus_T CommandStatus;
 995
 996   DAC960_V2_ClearCommand(Command);
 997   Command->CommandType = DAC960_ImmediateCommand;
 998   CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
 999   CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1000                                     .DataTransferControllerToHost = true;
1001   CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1002                                     .NoAutoRequestSense = true;
1003   CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1004                                 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1005   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1006   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1007   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1008   CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1009                                         DAC960_V2_GetPhysicalDeviceInfoValid;
1010   CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1011                                     .ScatterGatherSegments[0]
1012                                     .SegmentDataPointer =
1013                                         Controller->V2.NewPhysicalDeviceInformationDMA;
1014   CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1015                                     .ScatterGatherSegments[0]
1016                                     .SegmentByteCount =
1017     CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1018   DAC960_ExecuteCommand(Command);
1019   CommandStatus = Command->V2.CommandStatus;
1020   DAC960_DeallocateCommand(Command);
1021   return (CommandStatus == DAC960_V2_NormalCompletion);
1022 }
1023
1024
1025 static void DAC960_V2_ConstructNewUnitSerialNumber(
1026         DAC960_Controller_T *Controller,
1027         DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1028         int LogicalUnit)
1029 {
1030       CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1031       CommandMailbox->SCSI_10.CommandControlBits
1032                              .DataTransferControllerToHost = true;
1033       CommandMailbox->SCSI_10.CommandControlBits
1034                              .NoAutoRequestSense = true;
1035       CommandMailbox->SCSI_10.DataTransferSize =
1036         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1037       CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1038       CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1039       CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1040       CommandMailbox->SCSI_10.CDBLength = 6;
1041       CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1042       CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1043       CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1044       CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1045       CommandMailbox->SCSI_10.SCSI_CDB[4] =
1046         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1047       CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1048       CommandMailbox->SCSI_10.DataTransferMemoryAddress
1049                              .ScatterGatherSegments[0]
1050                              .SegmentDataPointer =
1051                 Controller->V2.NewInquiryUnitSerialNumberDMA;
1052       CommandMailbox->SCSI_10.DataTransferMemoryAddress
1053                              .ScatterGatherSegments[0]
1054                              .SegmentByteCount =
1055                 CommandMailbox->SCSI_10.DataTransferSize;
1056 }
1057
1058
1059 /*
1060   DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1061   Inquiry command to a SCSI device identified by Channel number,
1062   Target id, Logical Unit Number.  This function Waits for completion
1063   of the command.
1064
1065   The return data includes Unit Serial Number information for the
1066   specified device.
1067
1068   Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1069   memory buffer.
1070 */
1071
1072 static boolean DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1073                         int Channel, int TargetID, int LogicalUnit)
1074 {
1075       DAC960_Command_T *Command;
1076       DAC960_V2_CommandMailbox_T *CommandMailbox;
1077       DAC960_V2_CommandStatus_T CommandStatus;
1078
1079       Command = DAC960_AllocateCommand(Controller);
1080       CommandMailbox = &Command->V2.CommandMailbox;
1081       DAC960_V2_ClearCommand(Command);
1082       Command->CommandType = DAC960_ImmediateCommand;
1083
1084       DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1085                         Channel, TargetID, LogicalUnit);
1086
1087       DAC960_ExecuteCommand(Command);
1088       CommandStatus = Command->V2.CommandStatus;
1089       DAC960_DeallocateCommand(Command);
1090       return (CommandStatus == DAC960_V2_NormalCompletion);
1091 }
1092
1093
1094 /*
1095   DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1096   Operation IOCTL Command and waits for completion.  It returns true on
1097   success and false on failure.
1098 */
1099
1100 static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1101                                          DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1102                                          DAC960_V2_OperationDevice_T
1103                                            OperationDevice)
1104 {
1105   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1106   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1107   DAC960_V2_CommandStatus_T CommandStatus;
1108   DAC960_V2_ClearCommand(Command);
1109   Command->CommandType = DAC960_ImmediateCommand;
1110   CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1111   CommandMailbox->DeviceOperation.CommandControlBits
1112                                  .DataTransferControllerToHost = true;
1113   CommandMailbox->DeviceOperation.CommandControlBits
1114                                  .NoAutoRequestSense = true;
1115   CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1116   CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1117   DAC960_ExecuteCommand(Command);
1118   CommandStatus = Command->V2.CommandStatus;
1119   DAC960_DeallocateCommand(Command);
1120   return (CommandStatus == DAC960_V2_NormalCompletion);
1121 }
1122
1123
1124 /*
1125   DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1126   for DAC960 V1 Firmware Controllers.
1127
1128   PD and P controller types have no memory mailbox, but still need the
1129   other dma mapped memory.
1130 */
1131
1132 static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1133                                                       *Controller)
1134 {
1135   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1136   DAC960_HardwareType_T hw_type = Controller->HardwareType;
1137   struct pci_dev *PCI_Device = Controller->PCIDevice;
1138   struct dma_loaf *DmaPages = &Controller->DmaPages;
1139   size_t DmaPagesSize;
1140   size_t CommandMailboxesSize;
1141   size_t StatusMailboxesSize;
1142
1143   DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1144   dma_addr_t CommandMailboxesMemoryDMA;
1145
1146   DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1147   dma_addr_t StatusMailboxesMemoryDMA;
1148
1149   DAC960_V1_CommandMailbox_T CommandMailbox;
1150   DAC960_V1_CommandStatus_T CommandStatus;
1151   int TimeoutCounter;
1152   int i;
1153
1154
1155   if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask))
1156         return DAC960_Failure(Controller, "DMA mask out of range");
1157   Controller->BounceBufferLimit = DAC690_V1_PciDmaMask;
1158
1159   if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1160     CommandMailboxesSize =  0;
1161     StatusMailboxesSize = 0;
1162   } else {
1163     CommandMailboxesSize =  DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1164     StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1165   }
1166   DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1167         sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1168         sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1169         sizeof(DAC960_V1_RebuildProgress_T) +
1170         sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1171         sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1172         sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1173         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1174
1175   if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1176         return false;
1177
1178
1179   if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1180         goto skip_mailboxes;
1181
1182   CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1183                 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1184
1185   /* These are the base addresses for the command memory mailbox array */
1186   Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1187   Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1188
1189   CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1190   Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1191   Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1192   Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1193   Controller->V1.PreviousCommandMailbox2 =
1194                                         Controller->V1.LastCommandMailbox - 1;
1195
1196   /* These are the base addresses for the status memory mailbox array */
1197   StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1198                 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1199
1200   Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1201   Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1202   StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1203   Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1204   Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1205
1206 skip_mailboxes:
1207   Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1208                 sizeof(DAC960_V1_DCDB_T),
1209                 &Controller->V1.MonitoringDCDB_DMA);
1210
1211   Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1212                 sizeof(DAC960_V1_Enquiry_T),
1213                 &Controller->V1.NewEnquiryDMA);
1214
1215   Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1216                 sizeof(DAC960_V1_ErrorTable_T),
1217                 &Controller->V1.NewErrorTableDMA);
1218
1219   Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1220                 sizeof(DAC960_V1_EventLogEntry_T),
1221                 &Controller->V1.EventLogEntryDMA);
1222
1223   Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1224                 sizeof(DAC960_V1_RebuildProgress_T),
1225                 &Controller->V1.RebuildProgressDMA);
1226
1227   Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1228                 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1229                 &Controller->V1.NewLogicalDriveInformationDMA);
1230
1231   Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1232                 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1233                 &Controller->V1.BackgroundInitializationStatusDMA);
1234
1235   Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1236                 sizeof(DAC960_V1_DeviceState_T),
1237                 &Controller->V1.NewDeviceStateDMA);
1238
1239   Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1240                 sizeof(DAC960_SCSI_Inquiry_T),
1241                 &Controller->V1.NewInquiryStandardDataDMA);
1242
1243   Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1244                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1245                 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1246
1247   if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1248         return true;
1249
1250   /* Enable the Memory Mailbox Interface. */
1251   Controller->V1.DualModeMemoryMailboxInterface = true;
1252   CommandMailbox.TypeX.CommandOpcode = 0x2B;
1253   CommandMailbox.TypeX.CommandIdentifier = 0;
1254   CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1255   CommandMailbox.TypeX.CommandMailboxesBusAddress =
1256                                 Controller->V1.FirstCommandMailboxDMA;
1257   CommandMailbox.TypeX.StatusMailboxesBusAddress =
1258                                 Controller->V1.FirstStatusMailboxDMA;
1259 #define TIMEOUT_COUNT 1000000
1260
1261   for (i = 0; i < 2; i++)
1262     switch (Controller->HardwareType)
1263       {
1264       case DAC960_LA_Controller:
1265         TimeoutCounter = TIMEOUT_COUNT;
1266         while (--TimeoutCounter >= 0)
1267           {
1268             if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1269               break;
1270             udelay(10);
1271           }
1272         if (TimeoutCounter < 0) return false;
1273         DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1274         DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1275         TimeoutCounter = TIMEOUT_COUNT;
1276         while (--TimeoutCounter >= 0)
1277           {
1278             if (DAC960_LA_HardwareMailboxStatusAvailableP(
1279                   ControllerBaseAddress))
1280               break;
1281             udelay(10);
1282           }
1283         if (TimeoutCounter < 0) return false;
1284         CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1285         DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1286         DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1287         if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1288         Controller->V1.DualModeMemoryMailboxInterface = false;
1289         CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1290         break;
1291       case DAC960_PG_Controller:
1292         TimeoutCounter = TIMEOUT_COUNT;
1293         while (--TimeoutCounter >= 0)
1294           {
1295             if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1296               break;
1297             udelay(10);
1298           }
1299         if (TimeoutCounter < 0) return false;
1300         DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1301         DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1302
1303         TimeoutCounter = TIMEOUT_COUNT;
1304         while (--TimeoutCounter >= 0)
1305           {
1306             if (DAC960_PG_HardwareMailboxStatusAvailableP(
1307                   ControllerBaseAddress))
1308               break;
1309             udelay(10);
1310           }
1311         if (TimeoutCounter < 0) return false;
1312         CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1313         DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1314         DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1315         if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1316         Controller->V1.DualModeMemoryMailboxInterface = false;
1317         CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1318         break;
1319       default:
1320         DAC960_Failure(Controller, "Unknown Controller Type\n");
1321         break;
1322       }
1323   return false;
1324 }
1325
1326
1327 /*
1328   DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1329   for DAC960 V2 Firmware Controllers.
1330
1331   Aggregate the space needed for the controller's memory mailbox and
1332   the other data structures that will be targets of dma transfers with
1333   the controller.  Allocate a dma-mapped region of memory to hold these
1334   structures.  Then, save CPU pointers and dma_addr_t values to reference
1335   the structures that are contained in that region.
1336 */
1337
1338 static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1339                                                       *Controller)
1340 {
1341   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1342   struct pci_dev *PCI_Device = Controller->PCIDevice;
1343   struct dma_loaf *DmaPages = &Controller->DmaPages;
1344   size_t DmaPagesSize;
1345   size_t CommandMailboxesSize;
1346   size_t StatusMailboxesSize;
1347
1348   DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1349   dma_addr_t CommandMailboxesMemoryDMA;
1350
1351   DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1352   dma_addr_t StatusMailboxesMemoryDMA;
1353
1354   DAC960_V2_CommandMailbox_T *CommandMailbox;
1355   dma_addr_t    CommandMailboxDMA;
1356   DAC960_V2_CommandStatus_T CommandStatus;
1357
1358   if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask))
1359         return DAC960_Failure(Controller, "DMA mask out of range");
1360   Controller->BounceBufferLimit = DAC690_V2_PciDmaMask;
1361
1362   /* This is a temporary dma mapping, used only in the scope of this function */
1363   CommandMailbox =
1364           (DAC960_V2_CommandMailbox_T *)pci_alloc_consistent( PCI_Device,
1365                 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1366   if (CommandMailbox == NULL)
1367           return false;
1368
1369   CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1370   StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1371   DmaPagesSize =
1372     CommandMailboxesSize + StatusMailboxesSize +
1373     sizeof(DAC960_V2_HealthStatusBuffer_T) +
1374     sizeof(DAC960_V2_ControllerInfo_T) +
1375     sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1376     sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1377     sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1378     sizeof(DAC960_V2_Event_T) +
1379     sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1380
1381   if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1382         pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1383                                         CommandMailbox, CommandMailboxDMA);
1384         return false;
1385   }
1386
1387   CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1388                 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1389
1390   /* These are the base addresses for the command memory mailbox array */
1391   Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1392   Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1393
1394   CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1395   Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1396   Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1397   Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1398   Controller->V2.PreviousCommandMailbox2 =
1399                                         Controller->V2.LastCommandMailbox - 1;
1400
1401   /* These are the base addresses for the status memory mailbox array */
1402   StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1403                 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1404
1405   Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1406   Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1407   StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1408   Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1409   Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1410
1411   Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1412                 sizeof(DAC960_V2_HealthStatusBuffer_T),
1413                 &Controller->V2.HealthStatusBufferDMA);
1414
1415   Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1416                 sizeof(DAC960_V2_ControllerInfo_T),
1417                 &Controller->V2.NewControllerInformationDMA);
1418
1419   Controller->V2.NewLogicalDeviceInformation =  slice_dma_loaf(DmaPages,
1420                 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1421                 &Controller->V2.NewLogicalDeviceInformationDMA);
1422
1423   Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1424                 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1425                 &Controller->V2.NewPhysicalDeviceInformationDMA);
1426
1427   Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1428                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1429                 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1430
1431   Controller->V2.Event = slice_dma_loaf(DmaPages,
1432                 sizeof(DAC960_V2_Event_T),
1433                 &Controller->V2.EventDMA);
1434
1435   Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1436                 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1437                 &Controller->V2.PhysicalToLogicalDeviceDMA);
1438
1439   /*
1440     Enable the Memory Mailbox Interface.
1441
1442     I don't know why we can't just use one of the memory mailboxes
1443     we just allocated to do this, instead of using this temporary one.
1444     Try this change later.
1445   */
1446   memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1447   CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1448   CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1449   CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1450   CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1451     (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1452   CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1453     (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1454   CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1455   CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1456   CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1457   CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1458   CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1459   CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1460                                         Controller->V2.HealthStatusBufferDMA;
1461   CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1462                                         Controller->V2.FirstCommandMailboxDMA;
1463   CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1464                                         Controller->V2.FirstStatusMailboxDMA;
1465   switch (Controller->HardwareType)
1466     {
1467     case DAC960_BA_Controller:
1468       while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1469         udelay(1);
1470       DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1471       DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1472       while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1473         udelay(1);
1474       CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1475       DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1476       DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1477       break;
1478     case DAC960_LP_Controller:
1479       while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1480         udelay(1);
1481       DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1482       DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1483       while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1484         udelay(1);
1485       CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1486       DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1487       DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1488       break;
1489     default:
1490       DAC960_Failure(Controller, "Unknown Controller Type\n");
1491       CommandStatus = DAC960_V2_AbormalCompletion;
1492       break;
1493     }
1494   pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1495                                         CommandMailbox, CommandMailboxDMA);
1496   return (CommandStatus == DAC960_V2_NormalCompletion);
1497 }
1498
1499
1500 /*
1501   DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1502   from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1503 */
1504
1505 static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1506                                                      *Controller)
1507 {
1508   DAC960_V1_Enquiry2_T *Enquiry2;
1509   dma_addr_t Enquiry2DMA;
1510   DAC960_V1_Config2_T *Config2;
1511   dma_addr_t Config2DMA;
1512   int LogicalDriveNumber, Channel, TargetID;
1513   struct dma_loaf local_dma;
1514
1515   if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1516                 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1517         return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1518
1519   Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1520   Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1521
1522   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1523                               Controller->V1.NewEnquiryDMA)) {
1524     free_dma_loaf(Controller->PCIDevice, &local_dma);
1525     return DAC960_Failure(Controller, "ENQUIRY");
1526   }
1527   memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1528                                                 sizeof(DAC960_V1_Enquiry_T));
1529
1530   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1531     free_dma_loaf(Controller->PCIDevice, &local_dma);
1532     return DAC960_Failure(Controller, "ENQUIRY2");
1533   }
1534
1535   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1536     free_dma_loaf(Controller->PCIDevice, &local_dma);
1537     return DAC960_Failure(Controller, "READ CONFIG2");
1538   }
1539
1540   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1541                               Controller->V1.NewLogicalDriveInformationDMA)) {
1542     free_dma_loaf(Controller->PCIDevice, &local_dma);
1543     return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1544   }
1545   memcpy(&Controller->V1.LogicalDriveInformation,
1546                 Controller->V1.NewLogicalDriveInformation,
1547                 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1548
1549   for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1550     for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1551       if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1552                                    Channel, TargetID,
1553                                    Controller->V1.NewDeviceStateDMA)) {
1554                 free_dma_loaf(Controller->PCIDevice, &local_dma);
1555                 return DAC960_Failure(Controller, "GET DEVICE STATE");
1556         }
1557         memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1558                 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1559      }
1560   /*
1561     Initialize the Controller Model Name and Full Model Name fields.
1562   */
1563   switch (Enquiry2->HardwareID.SubModel)
1564     {
1565     case DAC960_V1_P_PD_PU:
1566       if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1567         strcpy(Controller->ModelName, "DAC960PU");
1568       else strcpy(Controller->ModelName, "DAC960PD");
1569       break;
1570     case DAC960_V1_PL:
1571       strcpy(Controller->ModelName, "DAC960PL");
1572       break;
1573     case DAC960_V1_PG:
1574       strcpy(Controller->ModelName, "DAC960PG");
1575       break;
1576     case DAC960_V1_PJ:
1577       strcpy(Controller->ModelName, "DAC960PJ");
1578       break;
1579     case DAC960_V1_PR:
1580       strcpy(Controller->ModelName, "DAC960PR");
1581       break;
1582     case DAC960_V1_PT:
1583       strcpy(Controller->ModelName, "DAC960PT");
1584       break;
1585     case DAC960_V1_PTL0:
1586       strcpy(Controller->ModelName, "DAC960PTL0");
1587       break;
1588     case DAC960_V1_PRL:
1589       strcpy(Controller->ModelName, "DAC960PRL");
1590       break;
1591     case DAC960_V1_PTL1:
1592       strcpy(Controller->ModelName, "DAC960PTL1");
1593       break;
1594     case DAC960_V1_1164P:
1595       strcpy(Controller->ModelName, "DAC1164P");
1596       break;
1597     default:
1598       free_dma_loaf(Controller->PCIDevice, &local_dma);
1599       return DAC960_Failure(Controller, "MODEL VERIFICATION");
1600     }
1601   strcpy(Controller->FullModelName, "Mylex ");
1602   strcat(Controller->FullModelName, Controller->ModelName);
1603   /*
1604     Initialize the Controller Firmware Version field and verify that it
1605     is a supported firmware version.  The supported firmware versions are:
1606
1607     DAC1164P                5.06 and above
1608     DAC960PTL/PRL/PJ/PG     4.06 and above
1609     DAC960PU/PD/PL          3.51 and above
1610     DAC960PU/PD/PL/P        2.73 and above
1611   */
1612 #if defined(CONFIG_ALPHA)
1613   /*
1614     DEC Alpha machines were often equipped with DAC960 cards that were
1615     OEMed from Mylex, and had their own custom firmware. Version 2.70,
1616     the last custom FW revision to be released by DEC for these older
1617     controllers, appears to work quite well with this driver.
1618
1619     Cards tested successfully were several versions each of the PD and
1620     PU, called by DEC the KZPSC and KZPAC, respectively, and having
1621     the Manufacturer Numbers (from Mylex), usually on a sticker on the
1622     back of the board, of:
1623
1624     KZPSC:  D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1625     KZPAC:  D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1626   */
1627 # define FIRMWARE_27X   "2.70"
1628 #else
1629 # define FIRMWARE_27X   "2.73"
1630 #endif
1631
1632   if (Enquiry2->FirmwareID.MajorVersion == 0)
1633     {
1634       Enquiry2->FirmwareID.MajorVersion =
1635         Controller->V1.Enquiry.MajorFirmwareVersion;
1636       Enquiry2->FirmwareID.MinorVersion =
1637         Controller->V1.Enquiry.MinorFirmwareVersion;
1638       Enquiry2->FirmwareID.FirmwareType = '0';
1639       Enquiry2->FirmwareID.TurnID = 0;
1640     }
1641   sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1642           Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1643           Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1644   if (!((Controller->FirmwareVersion[0] == '5' &&
1645          strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1646         (Controller->FirmwareVersion[0] == '4' &&
1647          strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1648         (Controller->FirmwareVersion[0] == '3' &&
1649          strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1650         (Controller->FirmwareVersion[0] == '2' &&
1651          strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1652     {
1653       DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1654       DAC960_Error("Firmware Version = '%s'\n", Controller,
1655                    Controller->FirmwareVersion);
1656       free_dma_loaf(Controller->PCIDevice, &local_dma);
1657       return false;
1658     }
1659   /*
1660     Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1661     Enclosure Management Enabled fields.
1662   */
1663   Controller->Channels = Enquiry2->ActualChannels;
1664   Controller->Targets = Enquiry2->MaxTargets;
1665   Controller->MemorySize = Enquiry2->MemorySize >> 20;
1666   Controller->V1.SAFTE_EnclosureManagementEnabled =
1667     (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1668   /*
1669     Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1670     Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1671     Driver Scatter/Gather Limit.  The Driver Queue Depth must be at most one
1672     less than the Controller Queue Depth to allow for an automatic drive
1673     rebuild operation.
1674   */
1675   Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1676   Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1677   if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1678     Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1679   Controller->LogicalDriveCount =
1680     Controller->V1.Enquiry.NumberOfLogicalDrives;
1681   Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1682   Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1683   Controller->DriverScatterGatherLimit =
1684     Controller->ControllerScatterGatherLimit;
1685   if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1686     Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1687   /*
1688     Initialize the Stripe Size, Segment Size, and Geometry Translation.
1689   */
1690   Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1691                               >> (10 - DAC960_BlockSizeBits);
1692   Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1693                                >> (10 - DAC960_BlockSizeBits);
1694   switch (Config2->DriveGeometry)
1695     {
1696     case DAC960_V1_Geometry_128_32:
1697       Controller->V1.GeometryTranslationHeads = 128;
1698       Controller->V1.GeometryTranslationSectors = 32;
1699       break;
1700     case DAC960_V1_Geometry_255_63:
1701       Controller->V1.GeometryTranslationHeads = 255;
1702       Controller->V1.GeometryTranslationSectors = 63;
1703       break;
1704     default:
1705       free_dma_loaf(Controller->PCIDevice, &local_dma);
1706       return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1707     }
1708   /*
1709     Initialize the Background Initialization Status.
1710   */
1711   if ((Controller->FirmwareVersion[0] == '4' &&
1712       strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1713       (Controller->FirmwareVersion[0] == '5' &&
1714        strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1715     {
1716       Controller->V1.BackgroundInitializationStatusSupported = true;
1717       DAC960_V1_ExecuteType3B(Controller,
1718                               DAC960_V1_BackgroundInitializationControl, 0x20,
1719                               Controller->
1720                                V1.BackgroundInitializationStatusDMA);
1721       memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1722                 Controller->V1.BackgroundInitializationStatus,
1723                 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1724     }
1725   /*
1726     Initialize the Logical Drive Initially Accessible flag.
1727   */
1728   for (LogicalDriveNumber = 0;
1729        LogicalDriveNumber < Controller->LogicalDriveCount;
1730        LogicalDriveNumber++)
1731     if (Controller->V1.LogicalDriveInformation
1732                        [LogicalDriveNumber].LogicalDriveState !=
1733         DAC960_V1_LogicalDrive_Offline)
1734       Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1735   Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1736   free_dma_loaf(Controller->PCIDevice, &local_dma);
1737   return true;
1738 }
1739
1740
1741 /*
1742   DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1743   from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1744 */
1745
1746 static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1747                                                      *Controller)
1748 {
1749   DAC960_V2_ControllerInfo_T *ControllerInfo =
1750                 &Controller->V2.ControllerInformation;
1751   unsigned short LogicalDeviceNumber = 0;
1752   int ModelNameLength;
1753
1754   /* Get data into dma-able area, then copy into permanant location */
1755   if (!DAC960_V2_NewControllerInfo(Controller))
1756     return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1757   memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1758                         sizeof(DAC960_V2_ControllerInfo_T));
1759
1760
1761   if (!DAC960_V2_GeneralInfo(Controller))
1762     return DAC960_Failure(Controller, "GET HEALTH STATUS");
1763
1764   /*
1765     Initialize the Controller Model Name and Full Model Name fields.
1766   */
1767   ModelNameLength = sizeof(ControllerInfo->ControllerName);
1768   if (ModelNameLength > sizeof(Controller->ModelName)-1)
1769     ModelNameLength = sizeof(Controller->ModelName)-1;
1770   memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1771          ModelNameLength);
1772   ModelNameLength--;
1773   while (Controller->ModelName[ModelNameLength] == ' ' ||
1774          Controller->ModelName[ModelNameLength] == '\0')
1775     ModelNameLength--;
1776   Controller->ModelName[++ModelNameLength] = '\0';
1777   strcpy(Controller->FullModelName, "Mylex ");
1778   strcat(Controller->FullModelName, Controller->ModelName);
1779   /*
1780     Initialize the Controller Firmware Version field.
1781   */
1782   sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1783           ControllerInfo->FirmwareMajorVersion,
1784           ControllerInfo->FirmwareMinorVersion,
1785           ControllerInfo->FirmwareTurnNumber);
1786   if (ControllerInfo->FirmwareMajorVersion == 6 &&
1787       ControllerInfo->FirmwareMinorVersion == 0 &&
1788       ControllerInfo->FirmwareTurnNumber < 1)
1789     {
1790       DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1791                   Controller, Controller->FirmwareVersion);
1792       DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1793                   Controller);
1794       DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1795                   Controller);
1796     }
1797   /*
1798     Initialize the Controller Channels, Targets, and Memory Size.
1799   */
1800   Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1801   Controller->Targets =
1802     ControllerInfo->MaximumTargetsPerChannel
1803                     [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1804   Controller->MemorySize = ControllerInfo->MemorySizeMB;
1805   /*
1806     Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1807     Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1808     Driver Scatter/Gather Limit.  The Driver Queue Depth must be at most one
1809     less than the Controller Queue Depth to allow for an automatic drive
1810     rebuild operation.
1811   */
1812   Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1813   Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1814   if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1815     Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1816   Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1817   Controller->MaxBlocksPerCommand =
1818     ControllerInfo->MaximumDataTransferSizeInBlocks;
1819   Controller->ControllerScatterGatherLimit =
1820     ControllerInfo->MaximumScatterGatherEntries;
1821   Controller->DriverScatterGatherLimit =
1822     Controller->ControllerScatterGatherLimit;
1823   if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1824     Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1825   /*
1826     Initialize the Logical Device Information.
1827   */
1828   while (true)
1829     {
1830       DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1831         Controller->V2.NewLogicalDeviceInformation;
1832       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1833       DAC960_V2_PhysicalDevice_T PhysicalDevice;
1834
1835       if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1836         break;
1837       LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1838       if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1839         DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1840                        Controller, LogicalDeviceNumber);
1841                 break;
1842       }
1843       if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1844         DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1845               Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1846         LogicalDeviceNumber++;
1847         continue;
1848       }
1849       PhysicalDevice.Controller = 0;
1850       PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1851       PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1852       PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1853       Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1854         PhysicalDevice;
1855       if (NewLogicalDeviceInfo->LogicalDeviceState !=
1856           DAC960_V2_LogicalDevice_Offline)
1857         Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1858       LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
1859         kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
1860       if (LogicalDeviceInfo == NULL)
1861         return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1862       Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1863         LogicalDeviceInfo;
1864       memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1865              sizeof(DAC960_V2_LogicalDeviceInfo_T));
1866       LogicalDeviceNumber++;
1867     }
1868   return true;
1869 }
1870
1871
1872 /*
1873   DAC960_ReportControllerConfiguration reports the Configuration Information
1874   for Controller.
1875 */
1876
1877 static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
1878                                                     *Controller)
1879 {
1880   DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1881               Controller, Controller->ModelName);
1882   DAC960_Info("  Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1883               Controller, Controller->FirmwareVersion,
1884               Controller->Channels, Controller->MemorySize);
1885   DAC960_Info("  PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1886               Controller, Controller->Bus,
1887               Controller->Device, Controller->Function);
1888   if (Controller->IO_Address == 0)
1889     DAC960_Info("Unassigned\n", Controller);
1890   else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1891   DAC960_Info("  PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1892               Controller, Controller->PCI_Address,
1893               (unsigned long) Controller->BaseAddress,
1894               Controller->IRQ_Channel);
1895   DAC960_Info("  Controller Queue Depth: %d, "
1896               "Maximum Blocks per Command: %d\n",
1897               Controller, Controller->ControllerQueueDepth,
1898               Controller->MaxBlocksPerCommand);
1899   DAC960_Info("  Driver Queue Depth: %d, "
1900               "Scatter/Gather Limit: %d of %d Segments\n",
1901               Controller, Controller->DriverQueueDepth,
1902               Controller->DriverScatterGatherLimit,
1903               Controller->ControllerScatterGatherLimit);
1904   if (Controller->FirmwareType == DAC960_V1_Controller)
1905     {
1906       DAC960_Info("  Stripe Size: %dKB, Segment Size: %dKB, "
1907                   "BIOS Geometry: %d/%d\n", Controller,
1908                   Controller->V1.StripeSize,
1909                   Controller->V1.SegmentSize,
1910                   Controller->V1.GeometryTranslationHeads,
1911                   Controller->V1.GeometryTranslationSectors);
1912       if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1913         DAC960_Info("  SAF-TE Enclosure Management Enabled\n", Controller);
1914     }
1915   return true;
1916 }
1917
1918
1919 /*
1920   DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1921   for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1922   Inquiry Unit Serial Number information for each device connected to
1923   Controller.
1924 */
1925
1926 static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1927                                                  *Controller)
1928 {
1929   struct dma_loaf local_dma;
1930
1931   dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1932   DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1933
1934   dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1935   DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1936
1937   dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1938   DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1939
1940   struct completion Completions[DAC960_V1_MaxChannels];
1941   unsigned long flags;
1942   int Channel, TargetID;
1943
1944   if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1945                 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1946                         sizeof(DAC960_SCSI_Inquiry_T) +
1947                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1948      return DAC960_Failure(Controller,
1949                         "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1950
1951   for (Channel = 0; Channel < Controller->Channels; Channel++) {
1952         DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1953                         sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1954         SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1955                         sizeof(DAC960_SCSI_Inquiry_T),
1956                         SCSI_Inquiry_dma + Channel);
1957         SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1958                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1959                         SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1960   }
1961
1962   for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1963     {
1964       /*
1965        * For each channel, submit a probe for a device on that channel.
1966        * The timeout interval for a device that is present is 10 seconds.
1967        * With this approach, the timeout periods can elapse in parallel
1968        * on each channel.
1969        */
1970       for (Channel = 0; Channel < Controller->Channels; Channel++)
1971         {
1972           dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
1973           DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
1974           dma_addr_t DCDB_dma = DCDBs_dma[Channel];
1975           DAC960_Command_T *Command = Controller->Commands[Channel];
1976           struct completion *Completion = &Completions[Channel];
1977
1978           init_completion(Completion);
1979           DAC960_V1_ClearCommand(Command);
1980           Command->CommandType = DAC960_ImmediateCommand;
1981           Command->Completion = Completion;
1982           Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
1983           Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
1984           DCDB->Channel = Channel;
1985           DCDB->TargetID = TargetID;
1986           DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
1987           DCDB->EarlyStatus = false;
1988           DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
1989           DCDB->NoAutomaticRequestSense = false;
1990           DCDB->DisconnectPermitted = true;
1991           DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
1992           DCDB->BusAddress = NewInquiryStandardDataDMA;
1993           DCDB->CDBLength = 6;
1994           DCDB->TransferLengthHigh4 = 0;
1995           DCDB->SenseLength = sizeof(DCDB->SenseData);
1996           DCDB->CDB[0] = 0x12; /* INQUIRY */
1997           DCDB->CDB[1] = 0; /* EVPD = 0 */
1998           DCDB->CDB[2] = 0; /* Page Code */
1999           DCDB->CDB[3] = 0; /* Reserved */
2000           DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2001           DCDB->CDB[5] = 0; /* Control */
2002
2003           spin_lock_irqsave(&Controller->queue_lock, flags);
2004           DAC960_QueueCommand(Command);
2005           spin_unlock_irqrestore(&Controller->queue_lock, flags);
2006         }
2007       /*
2008        * Wait for the problems submitted in the previous loop
2009        * to complete.  On the probes that are successful,
2010        * get the serial number of the device that was found.
2011        */
2012       for (Channel = 0; Channel < Controller->Channels; Channel++)
2013         {
2014           DAC960_SCSI_Inquiry_T *InquiryStandardData =
2015             &Controller->V1.InquiryStandardData[Channel][TargetID];
2016           DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2017           dma_addr_t NewInquiryUnitSerialNumberDMA =
2018                         SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2019           DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2020                         SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2021           DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2022             &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2023           DAC960_Command_T *Command = Controller->Commands[Channel];
2024           DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2025           struct completion *Completion = &Completions[Channel];
2026
2027           wait_for_completion(Completion);
2028
2029           if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2030             memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2031             InquiryStandardData->PeripheralDeviceType = 0x1F;
2032             continue;
2033           } else
2034             memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2035
2036           /* Preserve Channel and TargetID values from the previous loop */
2037           Command->Completion = Completion;
2038           DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2039           DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2040           DCDB->SenseLength = sizeof(DCDB->SenseData);
2041           DCDB->CDB[0] = 0x12; /* INQUIRY */
2042           DCDB->CDB[1] = 1; /* EVPD = 1 */
2043           DCDB->CDB[2] = 0x80; /* Page Code */
2044           DCDB->CDB[3] = 0; /* Reserved */
2045           DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2046           DCDB->CDB[5] = 0; /* Control */
2047
2048           spin_lock_irqsave(&Controller->queue_lock, flags);
2049           DAC960_QueueCommand(Command);
2050           spin_unlock_irqrestore(&Controller->queue_lock, flags);
2051           wait_for_completion(Completion);
2052
2053           if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2054                 memset(InquiryUnitSerialNumber, 0,
2055                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2056                 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2057           } else
2058                 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2059                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2060         }
2061     }
2062     free_dma_loaf(Controller->PCIDevice, &local_dma);
2063   return true;
2064 }
2065
2066
2067 /*
2068   DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2069   for DAC960 V2 Firmware Controllers by requesting the Physical Device
2070   Information and SCSI Inquiry Unit Serial Number information for each
2071   device connected to Controller.
2072 */
2073
2074 static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2075                                                  *Controller)
2076 {
2077   unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2078   unsigned short PhysicalDeviceIndex = 0;
2079
2080   while (true)
2081     {
2082       DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2083                 Controller->V2.NewPhysicalDeviceInformation;
2084       DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2085       DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2086                 Controller->V2.NewInquiryUnitSerialNumber;
2087       DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2088
2089       if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2090           break;
2091
2092       PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
2093                 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
2094       if (PhysicalDeviceInfo == NULL)
2095                 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2096       Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2097                 PhysicalDeviceInfo;
2098       memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2099                 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2100
2101       InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
2102         kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2103       if (InquiryUnitSerialNumber == NULL) {
2104         kfree(PhysicalDeviceInfo);
2105         return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2106       }
2107       Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2108                 InquiryUnitSerialNumber;
2109
2110       Channel = NewPhysicalDeviceInfo->Channel;
2111       TargetID = NewPhysicalDeviceInfo->TargetID;
2112       LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2113
2114       /*
2115          Some devices do NOT have Unit Serial Numbers.
2116          This command fails for them.  But, we still want to
2117          remember those devices are there.  Construct a
2118          UnitSerialNumber structure for the failure case.
2119       */
2120       if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2121         memset(InquiryUnitSerialNumber, 0,
2122              sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2123         InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2124       } else
2125         memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2126                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2127
2128       PhysicalDeviceIndex++;
2129       LogicalUnit++;
2130     }
2131   return true;
2132 }
2133
2134
2135 /*
2136   DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2137   Product Serial Number fields of the Inquiry Standard Data and Inquiry
2138   Unit Serial Number structures.
2139 */
2140
2141 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2142                                          *InquiryStandardData,
2143                                        DAC960_SCSI_Inquiry_UnitSerialNumber_T
2144                                          *InquiryUnitSerialNumber,
2145                                        unsigned char *Vendor,
2146                                        unsigned char *Model,
2147                                        unsigned char *Revision,
2148                                        unsigned char *SerialNumber)
2149 {
2150   int SerialNumberLength, i;
2151   if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2152   for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2153     {
2154       unsigned char VendorCharacter =
2155         InquiryStandardData->VendorIdentification[i];
2156       Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2157                    ? VendorCharacter : ' ');
2158     }
2159   Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2160   for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2161     {
2162       unsigned char ModelCharacter =
2163         InquiryStandardData->ProductIdentification[i];
2164       Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2165                   ? ModelCharacter : ' ');
2166     }
2167   Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2168   for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2169     {
2170       unsigned char RevisionCharacter =
2171         InquiryStandardData->ProductRevisionLevel[i];
2172       Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2173                      ? RevisionCharacter : ' ');
2174     }
2175   Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2176   if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2177   SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2178   if (SerialNumberLength >
2179       sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2180     SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2181   for (i = 0; i < SerialNumberLength; i++)
2182     {
2183       unsigned char SerialNumberCharacter =
2184         InquiryUnitSerialNumber->ProductSerialNumber[i];
2185       SerialNumber[i] =
2186         (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2187          ? SerialNumberCharacter : ' ');
2188     }
2189   SerialNumber[SerialNumberLength] = '\0';
2190 }
2191
2192
2193 /*
2194   DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2195   Information for DAC960 V1 Firmware Controllers.
2196 */
2197
2198 static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2199                                                    *Controller)
2200 {
2201   int LogicalDriveNumber, Channel, TargetID;
2202   DAC960_Info("  Physical Devices:\n", Controller);
2203   for (Channel = 0; Channel < Controller->Channels; Channel++)
2204     for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2205       {
2206         DAC960_SCSI_Inquiry_T *InquiryStandardData =
2207           &Controller->V1.InquiryStandardData[Channel][TargetID];
2208         DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2209           &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2210         DAC960_V1_DeviceState_T *DeviceState =
2211           &Controller->V1.DeviceState[Channel][TargetID];
2212         DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2213           &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2214         char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2215         char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2216         char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2217         char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2218                                    ->ProductSerialNumber)];
2219         if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2220         DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2221                                    Vendor, Model, Revision, SerialNumber);
2222         DAC960_Info("    %d:%d%s Vendor: %s  Model: %s  Revision: %s\n",
2223                     Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2224                     Vendor, Model, Revision);
2225         if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2226           DAC960_Info("         Serial Number: %s\n", Controller, SerialNumber);
2227         if (DeviceState->Present &&
2228             DeviceState->DeviceType == DAC960_V1_DiskType)
2229           {
2230             if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2231               DAC960_Info("         Disk Status: %s, %u blocks, %d resets\n",
2232                           Controller,
2233                           (DeviceState->DeviceState == DAC960_V1_Device_Dead
2234                            ? "Dead"
2235                            : DeviceState->DeviceState
2236                              == DAC960_V1_Device_WriteOnly
2237                              ? "Write-Only"
2238                              : DeviceState->DeviceState
2239                                == DAC960_V1_Device_Online
2240                                ? "Online" : "Standby"),
2241                           DeviceState->DiskSize,
2242                           Controller->V1.DeviceResetCount[Channel][TargetID]);
2243             else
2244               DAC960_Info("         Disk Status: %s, %u blocks\n", Controller,
2245                           (DeviceState->DeviceState == DAC960_V1_Device_Dead
2246                            ? "Dead"
2247                            : DeviceState->DeviceState
2248                              == DAC960_V1_Device_WriteOnly
2249                              ? "Write-Only"
2250                              : DeviceState->DeviceState
2251                                == DAC960_V1_Device_Online
2252                                ? "Online" : "Standby"),
2253                           DeviceState->DiskSize);
2254           }
2255         if (ErrorEntry->ParityErrorCount > 0 ||
2256             ErrorEntry->SoftErrorCount > 0 ||
2257             ErrorEntry->HardErrorCount > 0 ||
2258             ErrorEntry->MiscErrorCount > 0)
2259           DAC960_Info("         Errors - Parity: %d, Soft: %d, "
2260                       "Hard: %d, Misc: %d\n", Controller,
2261                       ErrorEntry->ParityErrorCount,
2262                       ErrorEntry->SoftErrorCount,
2263                       ErrorEntry->HardErrorCount,
2264                       ErrorEntry->MiscErrorCount);
2265       }
2266   DAC960_Info("  Logical Drives:\n", Controller);
2267   for (LogicalDriveNumber = 0;
2268        LogicalDriveNumber < Controller->LogicalDriveCount;
2269        LogicalDriveNumber++)
2270     {
2271       DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2272         &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2273       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2274                   Controller, Controller->ControllerNumber, LogicalDriveNumber,
2275                   LogicalDriveInformation->RAIDLevel,
2276                   (LogicalDriveInformation->LogicalDriveState
2277                    == DAC960_V1_LogicalDrive_Online
2278                    ? "Online"
2279                    : LogicalDriveInformation->LogicalDriveState
2280                      == DAC960_V1_LogicalDrive_Critical
2281                      ? "Critical" : "Offline"),
2282                   LogicalDriveInformation->LogicalDriveSize,
2283                   (LogicalDriveInformation->WriteBack
2284                    ? "Write Back" : "Write Thru"));
2285     }
2286   return true;
2287 }
2288
2289
2290 /*
2291   DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2292   Information for DAC960 V2 Firmware Controllers.
2293 */
2294
2295 static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2296                                                    *Controller)
2297 {
2298   int PhysicalDeviceIndex, LogicalDriveNumber;
2299   DAC960_Info("  Physical Devices:\n", Controller);
2300   for (PhysicalDeviceIndex = 0;
2301        PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2302        PhysicalDeviceIndex++)
2303     {
2304       DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2305         Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2306       DAC960_SCSI_Inquiry_T *InquiryStandardData =
2307         (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2308       DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2309         Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2310       char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2311       char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2312       char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2313       char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2314       if (PhysicalDeviceInfo == NULL) break;
2315       DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2316                                  Vendor, Model, Revision, SerialNumber);
2317       DAC960_Info("    %d:%d%s Vendor: %s  Model: %s  Revision: %s\n",
2318                   Controller,
2319                   PhysicalDeviceInfo->Channel,
2320                   PhysicalDeviceInfo->TargetID,
2321                   (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2322                   Vendor, Model, Revision);
2323       if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2324         DAC960_Info("         %sAsynchronous\n", Controller,
2325                     (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2326                      ? "Wide " :""));
2327       else
2328         DAC960_Info("         %sSynchronous at %d MB/sec\n", Controller,
2329                     (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2330                      ? "Wide " :""),
2331                     (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2332                      * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2333       if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2334         DAC960_Info("         Serial Number: %s\n", Controller, SerialNumber);
2335       if (PhysicalDeviceInfo->PhysicalDeviceState ==
2336           DAC960_V2_Device_Unconfigured)
2337         continue;
2338       DAC960_Info("         Disk Status: %s, %u blocks\n", Controller,
2339                   (PhysicalDeviceInfo->PhysicalDeviceState
2340                    == DAC960_V2_Device_Online
2341                    ? "Online"
2342                    : PhysicalDeviceInfo->PhysicalDeviceState
2343                      == DAC960_V2_Device_Rebuild
2344                      ? "Rebuild"
2345                      : PhysicalDeviceInfo->PhysicalDeviceState
2346                        == DAC960_V2_Device_Missing
2347                        ? "Missing"
2348                        : PhysicalDeviceInfo->PhysicalDeviceState
2349                          == DAC960_V2_Device_Critical
2350                          ? "Critical"
2351                          : PhysicalDeviceInfo->PhysicalDeviceState
2352                            == DAC960_V2_Device_Dead
2353                            ? "Dead"
2354                            : PhysicalDeviceInfo->PhysicalDeviceState
2355                              == DAC960_V2_Device_SuspectedDead
2356                              ? "Suspected-Dead"
2357                              : PhysicalDeviceInfo->PhysicalDeviceState
2358                                == DAC960_V2_Device_CommandedOffline
2359                                ? "Commanded-Offline"
2360                                : PhysicalDeviceInfo->PhysicalDeviceState
2361                                  == DAC960_V2_Device_Standby
2362                                  ? "Standby" : "Unknown"),
2363                   PhysicalDeviceInfo->ConfigurableDeviceSize);
2364       if (PhysicalDeviceInfo->ParityErrors == 0 &&
2365           PhysicalDeviceInfo->SoftErrors == 0 &&
2366           PhysicalDeviceInfo->HardErrors == 0 &&
2367           PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2368           PhysicalDeviceInfo->CommandTimeouts == 0 &&
2369           PhysicalDeviceInfo->Retries == 0 &&
2370           PhysicalDeviceInfo->Aborts == 0 &&
2371           PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2372         continue;
2373       DAC960_Info("         Errors - Parity: %d, Soft: %d, "
2374                   "Hard: %d, Misc: %d\n", Controller,
2375                   PhysicalDeviceInfo->ParityErrors,
2376                   PhysicalDeviceInfo->SoftErrors,
2377                   PhysicalDeviceInfo->HardErrors,
2378                   PhysicalDeviceInfo->MiscellaneousErrors);
2379       DAC960_Info("                  Timeouts: %d, Retries: %d, "
2380                   "Aborts: %d, Predicted: %d\n", Controller,
2381                   PhysicalDeviceInfo->CommandTimeouts,
2382                   PhysicalDeviceInfo->Retries,
2383                   PhysicalDeviceInfo->Aborts,
2384                   PhysicalDeviceInfo->PredictedFailuresDetected);
2385     }
2386   DAC960_Info("  Logical Drives:\n", Controller);
2387   for (LogicalDriveNumber = 0;
2388        LogicalDriveNumber < DAC960_MaxLogicalDrives;
2389        LogicalDriveNumber++)
2390     {
2391       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2392         Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2393       unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2394                                            "Read Cache Enabled",
2395                                            "Read Ahead Enabled",
2396                                            "Intelligent Read Ahead Enabled",
2397                                            "-", "-", "-", "-" };
2398       unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2399                                             "Logical Device Read Only",
2400                                             "Write Cache Enabled",
2401                                             "Intelligent Write Cache Enabled",
2402                                             "-", "-", "-", "-" };
2403       unsigned char *GeometryTranslation;
2404       if (LogicalDeviceInfo == NULL) continue;
2405       switch (LogicalDeviceInfo->DriveGeometry)
2406         {
2407         case DAC960_V2_Geometry_128_32:
2408           GeometryTranslation = "128/32";
2409           break;
2410         case DAC960_V2_Geometry_255_63:
2411           GeometryTranslation = "255/63";
2412           break;
2413         default:
2414           GeometryTranslation = "Invalid";
2415           DAC960_Error("Illegal Logical Device Geometry %d\n",
2416                        Controller, LogicalDeviceInfo->DriveGeometry);
2417           break;
2418         }
2419       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2420                   Controller, Controller->ControllerNumber, LogicalDriveNumber,
2421                   LogicalDeviceInfo->RAIDLevel,
2422                   (LogicalDeviceInfo->LogicalDeviceState
2423                    == DAC960_V2_LogicalDevice_Online
2424                    ? "Online"
2425                    : LogicalDeviceInfo->LogicalDeviceState
2426                      == DAC960_V2_LogicalDevice_Critical
2427                      ? "Critical" : "Offline"),
2428                   LogicalDeviceInfo->ConfigurableDeviceSize);
2429       DAC960_Info("                  Logical Device %s, BIOS Geometry: %s\n",
2430                   Controller,
2431                   (LogicalDeviceInfo->LogicalDeviceControl
2432                                      .LogicalDeviceInitialized
2433                    ? "Initialized" : "Uninitialized"),
2434                   GeometryTranslation);
2435       if (LogicalDeviceInfo->StripeSize == 0)
2436         {
2437           if (LogicalDeviceInfo->CacheLineSize == 0)
2438             DAC960_Info("                  Stripe Size: N/A, "
2439                         "Segment Size: N/A\n", Controller);
2440           else
2441             DAC960_Info("                  Stripe Size: N/A, "
2442                         "Segment Size: %dKB\n", Controller,
2443                         1 << (LogicalDeviceInfo->CacheLineSize - 2));
2444         }
2445       else
2446         {
2447           if (LogicalDeviceInfo->CacheLineSize == 0)
2448             DAC960_Info("                  Stripe Size: %dKB, "
2449                         "Segment Size: N/A\n", Controller,
2450                         1 << (LogicalDeviceInfo->StripeSize - 2));
2451           else
2452             DAC960_Info("                  Stripe Size: %dKB, "
2453                         "Segment Size: %dKB\n", Controller,
2454                         1 << (LogicalDeviceInfo->StripeSize - 2),
2455                         1 << (LogicalDeviceInfo->CacheLineSize - 2));
2456         }
2457       DAC960_Info("                  %s, %s\n", Controller,
2458                   ReadCacheStatus[
2459                     LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2460                   WriteCacheStatus[
2461                     LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2462       if (LogicalDeviceInfo->SoftErrors > 0 ||
2463           LogicalDeviceInfo->CommandsFailed > 0 ||
2464           LogicalDeviceInfo->DeferredWriteErrors)
2465         DAC960_Info("                  Errors - Soft: %d, Failed: %d, "
2466                     "Deferred Write: %d\n", Controller,
2467                     LogicalDeviceInfo->SoftErrors,
2468                     LogicalDeviceInfo->CommandsFailed,
2469                     LogicalDeviceInfo->DeferredWriteErrors);
2470
2471     }
2472   return true;
2473 }
2474
2475 /*
2476   DAC960_RegisterBlockDevice registers the Block Device structures
2477   associated with Controller.
2478 */
2479
2480 static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2481 {
2482   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2483   int n;
2484
2485   /*
2486     Register the Block Device Major Number for this DAC960 Controller.
2487   */
2488   if (register_blkdev(MajorNumber, "dac960") < 0)
2489       return false;
2490
2491   for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2492         struct gendisk *disk = Controller->disks[n];
2493         struct request_queue *RequestQueue;
2494
2495         /* for now, let all request queues share controller's lock */
2496         RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2497         if (!RequestQueue) {
2498                 printk("DAC960: failure to allocate request queue\n");
2499                 continue;
2500         }
2501         Controller->RequestQueue[n] = RequestQueue;
2502         blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2503         RequestQueue->queuedata = Controller;
2504         blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2505         blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2506         blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2507         disk->queue = RequestQueue;
2508         sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2509         sprintf(disk->devfs_name, "rd/host%d/target%d", Controller->ControllerNumber, n);
2510         disk->major = MajorNumber;
2511         disk->first_minor = n << DAC960_MaxPartitionsBits;
2512         disk->fops = &DAC960_BlockDeviceOperations;
2513    }
2514   /*
2515     Indicate the Block Device Registration completed successfully,
2516   */
2517   return true;
2518 }
2519
2520
2521 /*
2522   DAC960_UnregisterBlockDevice unregisters the Block Device structures
2523   associated with Controller.
2524 */
2525
2526 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2527 {
2528   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2529   int disk;
2530
2531   /* does order matter when deleting gendisk and cleanup in request queue? */
2532   for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2533         del_gendisk(Controller->disks[disk]);
2534         blk_cleanup_queue(Controller->RequestQueue[disk]);
2535         Controller->RequestQueue[disk] = NULL;
2536   }
2537
2538   /*
2539     Unregister the Block Device Major Number for this DAC960 Controller.
2540   */
2541   unregister_blkdev(MajorNumber, "dac960");
2542 }
2543
2544 /*
2545   DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2546   Information Partition Sector Counts and Block Sizes.
2547 */
2548
2549 static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2550 {
2551         int disk;
2552         for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2553                 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2554 }
2555
2556 /*
2557   DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2558   the Error Status Register when the driver performs the BIOS handshaking.
2559   It returns true for fatal errors and false otherwise.
2560 */
2561
2562 static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2563                                         unsigned char ErrorStatus,
2564                                         unsigned char Parameter0,
2565                                         unsigned char Parameter1)
2566 {
2567   switch (ErrorStatus)
2568     {
2569     case 0x00:
2570       DAC960_Notice("Physical Device %d:%d Not Responding\n",
2571                     Controller, Parameter1, Parameter0);
2572       break;
2573     case 0x08:
2574       if (Controller->DriveSpinUpMessageDisplayed) break;
2575       DAC960_Notice("Spinning Up Drives\n", Controller);
2576       Controller->DriveSpinUpMessageDisplayed = true;
2577       break;
2578     case 0x30:
2579       DAC960_Notice("Configuration Checksum Error\n", Controller);
2580       break;
2581     case 0x60:
2582       DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2583       break;
2584     case 0x70:
2585       DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2586       break;
2587     case 0x90:
2588       DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2589                     Controller, Parameter1, Parameter0);
2590       break;
2591     case 0xA0:
2592       DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2593       break;
2594     case 0xB0:
2595       DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2596       break;
2597     case 0xD0:
2598       DAC960_Notice("New Controller Configuration Found\n", Controller);
2599       break;
2600     case 0xF0:
2601       DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2602       return true;
2603     default:
2604       DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2605                    Controller, ErrorStatus);
2606       return true;
2607     }
2608   return false;
2609 }
2610
2611
2612 /*
2613  * DAC960_DetectCleanup releases the resources that were allocated
2614  * during DAC960_DetectController().  DAC960_DetectController can
2615  * has several internal failure points, so not ALL resources may
2616  * have been allocated.  It's important to free only
2617  * resources that HAVE been allocated.  The code below always
2618  * tests that the resource has been allocated before attempting to
2619  * free it.
2620  */
2621 static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2622 {
2623   int i;
2624
2625   /* Free the memory mailbox, status, and related structures */
2626   free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2627   if (Controller->MemoryMappedAddress) {
2628         switch(Controller->HardwareType)
2629         {
2630                 case DAC960_BA_Controller:
2631                         DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2632                         break;
2633                 case DAC960_LP_Controller:
2634                         DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2635                         break;
2636                 case DAC960_LA_Controller:
2637                         DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2638                         break;
2639                 case DAC960_PG_Controller:
2640                         DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2641                         break;
2642                 case DAC960_PD_Controller:
2643                         DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2644                         break;
2645                 case DAC960_P_Controller:
2646                         DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2647                         break;
2648         }
2649         iounmap(Controller->MemoryMappedAddress);
2650   }
2651   if (Controller->IRQ_Channel)
2652         free_irq(Controller->IRQ_Channel, Controller);
2653   if (Controller->IO_Address)
2654         release_region(Controller->IO_Address, 0x80);
2655   pci_disable_device(Controller->PCIDevice);
2656   for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2657        put_disk(Controller->disks[i]);
2658   DAC960_Controllers[Controller->ControllerNumber] = NULL;
2659   kfree(Controller);
2660 }
2661
2662
2663 /*
2664   DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2665   PCI RAID Controllers by interrogating the PCI Configuration Space for
2666   Controller Type.
2667 */
2668
2669 static DAC960_Controller_T *
2670 DAC960_DetectController(struct pci_dev *PCI_Device,
2671                         const struct pci_device_id *entry)
2672 {
2673   struct DAC960_privdata *privdata =
2674                 (struct DAC960_privdata *)entry->driver_data;
2675   irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) =
2676                 privdata->InterruptHandler;
2677   unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2678   DAC960_Controller_T *Controller = NULL;
2679   unsigned char DeviceFunction = PCI_Device->devfn;
2680   unsigned char ErrorStatus, Parameter0, Parameter1;
2681   unsigned int IRQ_Channel;
2682   void __iomem *BaseAddress;
2683   int i;
2684
2685   Controller = (DAC960_Controller_T *)
2686         kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2687   if (Controller == NULL) {
2688         DAC960_Error("Unable to allocate Controller structure for "
2689                        "Controller at\n", NULL);
2690         return NULL;
2691   }
2692   memset(Controller, 0, sizeof(DAC960_Controller_T));
2693   Controller->ControllerNumber = DAC960_ControllerCount;
2694   DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2695   Controller->Bus = PCI_Device->bus->number;
2696   Controller->FirmwareType = privdata->FirmwareType;
2697   Controller->HardwareType = privdata->HardwareType;
2698   Controller->Device = DeviceFunction >> 3;
2699   Controller->Function = DeviceFunction & 0x7;
2700   Controller->PCIDevice = PCI_Device;
2701   strcpy(Controller->FullModelName, "DAC960");
2702
2703   if (pci_enable_device(PCI_Device))
2704         goto Failure;
2705
2706   switch (Controller->HardwareType)
2707   {
2708         case DAC960_BA_Controller:
2709           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2710           break;
2711         case DAC960_LP_Controller:
2712           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2713           break;
2714         case DAC960_LA_Controller:
2715           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2716           break;
2717         case DAC960_PG_Controller:
2718           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2719           break;
2720         case DAC960_PD_Controller:
2721           Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2722           Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2723           break;
2724         case DAC960_P_Controller:
2725           Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2726           Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2727           break;
2728   }
2729
2730   pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2731   for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2732         Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2733         if (!Controller->disks[i])
2734                 goto Failure;
2735         Controller->disks[i]->private_data = (void *)((long)i);
2736   }
2737   init_waitqueue_head(&Controller->CommandWaitQueue);
2738   init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2739   spin_lock_init(&Controller->queue_lock);
2740   DAC960_AnnounceDriver(Controller);
2741   /*
2742     Map the Controller Register Window.
2743   */
2744  if (MemoryWindowSize < PAGE_SIZE)
2745         MemoryWindowSize = PAGE_SIZE;
2746   Controller->MemoryMappedAddress =
2747         ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2748   Controller->BaseAddress =
2749         Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2750   if (Controller->MemoryMappedAddress == NULL)
2751   {
2752           DAC960_Error("Unable to map Controller Register Window for "
2753                        "Controller at\n", Controller);
2754           goto Failure;
2755   }
2756   BaseAddress = Controller->BaseAddress;
2757   switch (Controller->HardwareType)
2758   {
2759         case DAC960_BA_Controller:
2760           DAC960_BA_DisableInterrupts(BaseAddress);
2761           DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2762           udelay(1000);
2763           while (DAC960_BA_InitializationInProgressP(BaseAddress))
2764             {
2765               if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2766                                             &Parameter0, &Parameter1) &&
2767                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2768                                            Parameter0, Parameter1))
2769                 goto Failure;
2770               udelay(10);
2771             }
2772           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2773             {
2774               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2775                            "for Controller at\n", Controller);
2776               goto Failure;
2777             }
2778           DAC960_BA_EnableInterrupts(BaseAddress);
2779           Controller->QueueCommand = DAC960_BA_QueueCommand;
2780           Controller->ReadControllerConfiguration =
2781             DAC960_V2_ReadControllerConfiguration;
2782           Controller->ReadDeviceConfiguration =
2783             DAC960_V2_ReadDeviceConfiguration;
2784           Controller->ReportDeviceConfiguration =
2785             DAC960_V2_ReportDeviceConfiguration;
2786           Controller->QueueReadWriteCommand =
2787             DAC960_V2_QueueReadWriteCommand;
2788           break;
2789         case DAC960_LP_Controller:
2790           DAC960_LP_DisableInterrupts(BaseAddress);
2791           DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2792           udelay(1000);
2793           while (DAC960_LP_InitializationInProgressP(BaseAddress))
2794             {
2795               if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2796                                             &Parameter0, &Parameter1) &&
2797                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2798                                            Parameter0, Parameter1))
2799                 goto Failure;
2800               udelay(10);
2801             }
2802           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2803             {
2804               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2805                            "for Controller at\n", Controller);
2806               goto Failure;
2807             }
2808           DAC960_LP_EnableInterrupts(BaseAddress);
2809           Controller->QueueCommand = DAC960_LP_QueueCommand;
2810           Controller->ReadControllerConfiguration =
2811             DAC960_V2_ReadControllerConfiguration;
2812           Controller->ReadDeviceConfiguration =
2813             DAC960_V2_ReadDeviceConfiguration;
2814           Controller->ReportDeviceConfiguration =
2815             DAC960_V2_ReportDeviceConfiguration;
2816           Controller->QueueReadWriteCommand =
2817             DAC960_V2_QueueReadWriteCommand;
2818           break;
2819         case DAC960_LA_Controller:
2820           DAC960_LA_DisableInterrupts(BaseAddress);
2821           DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2822           udelay(1000);
2823           while (DAC960_LA_InitializationInProgressP(BaseAddress))
2824             {
2825               if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2826                                             &Parameter0, &Parameter1) &&
2827                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2828                                            Parameter0, Parameter1))
2829                 goto Failure;
2830               udelay(10);
2831             }
2832           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2833             {
2834               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2835                            "for Controller at\n", Controller);
2836               goto Failure;
2837             }
2838           DAC960_LA_EnableInterrupts(BaseAddress);
2839           if (Controller->V1.DualModeMemoryMailboxInterface)
2840             Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2841           else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2842           Controller->ReadControllerConfiguration =
2843             DAC960_V1_ReadControllerConfiguration;
2844           Controller->ReadDeviceConfiguration =
2845             DAC960_V1_ReadDeviceConfiguration;
2846           Controller->ReportDeviceConfiguration =
2847             DAC960_V1_ReportDeviceConfiguration;
2848           Controller->QueueReadWriteCommand =
2849             DAC960_V1_QueueReadWriteCommand;
2850           break;
2851         case DAC960_PG_Controller:
2852           DAC960_PG_DisableInterrupts(BaseAddress);
2853           DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2854           udelay(1000);
2855           while (DAC960_PG_InitializationInProgressP(BaseAddress))
2856             {
2857               if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2858                                             &Parameter0, &Parameter1) &&
2859                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2860                                            Parameter0, Parameter1))
2861                 goto Failure;
2862               udelay(10);
2863             }
2864           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2865             {
2866               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2867                            "for Controller at\n", Controller);
2868               goto Failure;
2869             }
2870           DAC960_PG_EnableInterrupts(BaseAddress);
2871           if (Controller->V1.DualModeMemoryMailboxInterface)
2872             Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2873           else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2874           Controller->ReadControllerConfiguration =
2875             DAC960_V1_ReadControllerConfiguration;
2876           Controller->ReadDeviceConfiguration =
2877             DAC960_V1_ReadDeviceConfiguration;
2878           Controller->ReportDeviceConfiguration =
2879             DAC960_V1_ReportDeviceConfiguration;
2880           Controller->QueueReadWriteCommand =
2881             DAC960_V1_QueueReadWriteCommand;
2882           break;
2883         case DAC960_PD_Controller:
2884           if (!request_region(Controller->IO_Address, 0x80,
2885                               Controller->FullModelName)) {
2886                 DAC960_Error("IO port 0x%d busy for Controller at\n",
2887                              Controller, Controller->IO_Address);
2888                 goto Failure;
2889           }
2890           DAC960_PD_DisableInterrupts(BaseAddress);
2891           DAC960_PD_AcknowledgeStatus(BaseAddress);
2892           udelay(1000);
2893           while (DAC960_PD_InitializationInProgressP(BaseAddress))
2894             {
2895               if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2896                                             &Parameter0, &Parameter1) &&
2897                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2898                                            Parameter0, Parameter1))
2899                 goto Failure;
2900               udelay(10);
2901             }
2902           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2903             {
2904               DAC960_Error("Unable to allocate DMA mapped memory "
2905                            "for Controller at\n", Controller);
2906               goto Failure;
2907             }
2908           DAC960_PD_EnableInterrupts(BaseAddress);
2909           Controller->QueueCommand = DAC960_PD_QueueCommand;
2910           Controller->ReadControllerConfiguration =
2911             DAC960_V1_ReadControllerConfiguration;
2912           Controller->ReadDeviceConfiguration =
2913             DAC960_V1_ReadDeviceConfiguration;
2914           Controller->ReportDeviceConfiguration =
2915             DAC960_V1_ReportDeviceConfiguration;
2916           Controller->QueueReadWriteCommand =
2917             DAC960_V1_QueueReadWriteCommand;
2918           break;
2919         case DAC960_P_Controller:
2920           if (!request_region(Controller->IO_Address, 0x80,
2921                               Controller->FullModelName)){
2922                 DAC960_Error("IO port 0x%d busy for Controller at\n",
2923                              Controller, Controller->IO_Address);
2924                 goto Failure;
2925           }
2926           DAC960_PD_DisableInterrupts(BaseAddress);
2927           DAC960_PD_AcknowledgeStatus(BaseAddress);
2928           udelay(1000);
2929           while (DAC960_PD_InitializationInProgressP(BaseAddress))
2930             {
2931               if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2932                                             &Parameter0, &Parameter1) &&
2933                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2934                                            Parameter0, Parameter1))
2935                 goto Failure;
2936               udelay(10);
2937             }
2938           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2939             {
2940               DAC960_Error("Unable to allocate DMA mapped memory"
2941                            "for Controller at\n", Controller);
2942               goto Failure;
2943             }
2944           DAC960_PD_EnableInterrupts(BaseAddress);
2945           Controller->QueueCommand = DAC960_P_QueueCommand;
2946           Controller->ReadControllerConfiguration =
2947             DAC960_V1_ReadControllerConfiguration;
2948           Controller->ReadDeviceConfiguration =
2949             DAC960_V1_ReadDeviceConfiguration;
2950           Controller->ReportDeviceConfiguration =
2951             DAC960_V1_ReportDeviceConfiguration;
2952           Controller->QueueReadWriteCommand =
2953             DAC960_V1_QueueReadWriteCommand;
2954           break;
2955   }
2956   /*
2957      Acquire shared access to the IRQ Channel.
2958   */
2959   IRQ_Channel = PCI_Device->irq;
2960   if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
2961                       Controller->FullModelName, Controller) < 0)
2962   {
2963         DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
2964                        Controller, Controller->IRQ_Channel);
2965         goto Failure;
2966   }
2967   Controller->IRQ_Channel = IRQ_Channel;
2968   Controller->InitialCommand.CommandIdentifier = 1;
2969   Controller->InitialCommand.Controller = Controller;
2970   Controller->Commands[0] = &Controller->InitialCommand;
2971   Controller->FreeCommands = &Controller->InitialCommand;
2972   return Controller;
2973
2974 Failure:
2975   if (Controller->IO_Address == 0)
2976         DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
2977                      "PCI Address 0x%X\n", Controller,
2978                      Controller->Bus, Controller->Device,
2979                      Controller->Function, Controller->PCI_Address);
2980   else
2981         DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
2982                         "0x%X PCI Address 0x%X\n", Controller,
2983                         Controller->Bus, Controller->Device,
2984                         Controller->Function, Controller->IO_Address,
2985                         Controller->PCI_Address);
2986   DAC960_DetectCleanup(Controller);
2987   DAC960_ControllerCount--;
2988   return NULL;
2989 }
2990
2991 /*
2992   DAC960_InitializeController initializes Controller.
2993 */
2994
2995 static boolean
2996 DAC960_InitializeController(DAC960_Controller_T *Controller)
2997 {
2998   if (DAC960_ReadControllerConfiguration(Controller) &&
2999       DAC960_ReportControllerConfiguration(Controller) &&
3000       DAC960_CreateAuxiliaryStructures(Controller) &&
3001       DAC960_ReadDeviceConfiguration(Controller) &&
3002       DAC960_ReportDeviceConfiguration(Controller) &&
3003       DAC960_RegisterBlockDevice(Controller))
3004     {
3005       /*
3006         Initialize the Monitoring Timer.
3007       */
3008       init_timer(&Controller->MonitoringTimer);
3009       Controller->MonitoringTimer.expires =
3010         jiffies + DAC960_MonitoringTimerInterval;
3011       Controller->MonitoringTimer.data = (unsigned long) Controller;
3012       Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3013       add_timer(&Controller->MonitoringTimer);
3014       Controller->ControllerInitialized = true;
3015       return true;
3016     }
3017   return false;
3018 }
3019
3020
3021 /*
3022   DAC960_FinalizeController finalizes Controller.
3023 */
3024
3025 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3026 {
3027   if (Controller->ControllerInitialized)
3028     {
3029       unsigned long flags;
3030
3031       /*
3032        * Acquiring and releasing lock here eliminates
3033        * a very low probability race.
3034        *
3035        * The code below allocates controller command structures
3036        * from the free list without holding the controller lock.
3037        * This is safe assuming there is no other activity on
3038        * the controller at the time.
3039        *
3040        * But, there might be a monitoring command still
3041        * in progress.  Setting the Shutdown flag while holding
3042        * the lock ensures that there is no monitoring command
3043        * in the interrupt handler currently, and any monitoring
3044        * commands that complete from this time on will NOT return
3045        * their command structure to the free list.
3046        */
3047
3048       spin_lock_irqsave(&Controller->queue_lock, flags);
3049       Controller->ShutdownMonitoringTimer = 1;
3050       spin_unlock_irqrestore(&Controller->queue_lock, flags);
3051
3052       del_timer_sync(&Controller->MonitoringTimer);
3053       if (Controller->FirmwareType == DAC960_V1_Controller)
3054         {
3055           DAC960_Notice("Flushing Cache...", Controller);
3056           DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3057           DAC960_Notice("done\n", Controller);
3058
3059           if (Controller->HardwareType == DAC960_PD_Controller)
3060               release_region(Controller->IO_Address, 0x80);
3061         }
3062       else
3063         {
3064           DAC960_Notice("Flushing Cache...", Controller);
3065           DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3066                                     DAC960_V2_RAID_Controller);
3067           DAC960_Notice("done\n", Controller);
3068         }
3069     }
3070   DAC960_UnregisterBlockDevice(Controller);
3071   DAC960_DestroyAuxiliaryStructures(Controller);
3072   DAC960_DestroyProcEntries(Controller);
3073   DAC960_DetectCleanup(Controller);
3074 }
3075
3076
3077 /*
3078   DAC960_Probe verifies controller's existence and
3079   initializes the DAC960 Driver for that controller.
3080 */
3081
3082 static int
3083 DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3084 {
3085   int disk;
3086   DAC960_Controller_T *Controller;
3087
3088   if (DAC960_ControllerCount == DAC960_MaxControllers)
3089   {
3090         DAC960_Error("More than %d DAC960 Controllers detected - "
3091                        "ignoring from Controller at\n",
3092                        NULL, DAC960_MaxControllers);
3093         return -ENODEV;
3094   }
3095
3096   Controller = DAC960_DetectController(dev, entry);
3097   if (!Controller)
3098         return -ENODEV;
3099
3100   if (!DAC960_InitializeController(Controller)) {
3101         DAC960_FinalizeController(Controller);
3102         return -ENODEV;
3103   }
3104
3105   for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3106         set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3107         add_disk(Controller->disks[disk]);
3108   }
3109   DAC960_CreateProcEntries(Controller);
3110   return 0;
3111 }
3112
3113
3114 /*
3115   DAC960_Finalize finalizes the DAC960 Driver.
3116 */
3117
3118 static void DAC960_Remove(struct pci_dev *PCI_Device)
3119 {
3120   int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3121   DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3122   if (Controller != NULL)
3123       DAC960_FinalizeController(Controller);
3124 }
3125
3126
3127 /*
3128   DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3129   DAC960 V1 Firmware Controllers.
3130 */
3131
3132 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3133 {
3134   DAC960_Controller_T *Controller = Command->Controller;
3135   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3136   DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3137                                         Command->V1.ScatterGatherList;
3138   struct scatterlist *ScatterList = Command->V1.ScatterList;
3139
3140   DAC960_V1_ClearCommand(Command);
3141
3142   if (Command->SegmentCount == 1)
3143     {
3144       if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3145         CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3146       else
3147         CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3148
3149       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3150       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3151       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3152       CommandMailbox->Type5.BusAddress =
3153                         (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3154     }
3155   else
3156     {
3157       int i;
3158
3159       if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3160         CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3161       else
3162         CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3163
3164       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3165       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3166       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3167       CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3168
3169       CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3170
3171       for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3172                 ScatterGatherList->SegmentDataPointer =
3173                         (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3174                 ScatterGatherList->SegmentByteCount =
3175                         (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3176       }
3177     }
3178   DAC960_QueueCommand(Command);
3179 }
3180
3181
3182 /*
3183   DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3184   DAC960 V2 Firmware Controllers.
3185 */
3186
3187 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3188 {
3189   DAC960_Controller_T *Controller = Command->Controller;
3190   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3191   struct scatterlist *ScatterList = Command->V2.ScatterList;
3192
3193   DAC960_V2_ClearCommand(Command);
3194
3195   CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3196   CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3197     (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3198   CommandMailbox->SCSI_10.DataTransferSize =
3199     Command->BlockCount << DAC960_BlockSizeBits;
3200   CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3201   CommandMailbox->SCSI_10.PhysicalDevice =
3202     Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3203   CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3204   CommandMailbox->SCSI_10.CDBLength = 10;
3205   CommandMailbox->SCSI_10.SCSI_CDB[0] =
3206     (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3207   CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3208   CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3209   CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3210   CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3211   CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3212   CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3213
3214   if (Command->SegmentCount == 1)
3215     {
3216       CommandMailbox->SCSI_10.DataTransferMemoryAddress
3217                              .ScatterGatherSegments[0]
3218                              .SegmentDataPointer =
3219         (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3220       CommandMailbox->SCSI_10.DataTransferMemoryAddress
3221                              .ScatterGatherSegments[0]
3222                              .SegmentByteCount =
3223         CommandMailbox->SCSI_10.DataTransferSize;
3224     }
3225   else
3226     {
3227       DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3228       int i;
3229
3230       if (Command->SegmentCount > 2)
3231         {
3232           ScatterGatherList = Command->V2.ScatterGatherList;
3233           CommandMailbox->SCSI_10.CommandControlBits
3234                          .AdditionalScatterGatherListMemory = true;
3235           CommandMailbox->SCSI_10.DataTransferMemoryAddress
3236                 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3237           CommandMailbox->SCSI_10.DataTransferMemoryAddress
3238                          .ExtendedScatterGather.ScatterGatherList0Address =
3239             Command->V2.ScatterGatherListDMA;
3240         }
3241       else
3242         ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3243                                  .ScatterGatherSegments;
3244
3245       for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3246                 ScatterGatherList->SegmentDataPointer =
3247                         (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3248                 ScatterGatherList->SegmentByteCount =
3249                         (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3250       }
3251     }
3252   DAC960_QueueCommand(Command);
3253 }
3254
3255
3256 static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3257 {
3258         struct request *Request;
3259         DAC960_Command_T *Command;
3260
3261    while(1) {
3262         Request = elv_next_request(req_q);
3263         if (!Request)
3264                 return 1;
3265
3266         Command = DAC960_AllocateCommand(Controller);
3267         if (Command == NULL)
3268                 return 0;
3269
3270         if (rq_data_dir(Request) == READ) {
3271                 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3272                 Command->CommandType = DAC960_ReadCommand;
3273         } else {
3274                 Command->DmaDirection = PCI_DMA_TODEVICE;
3275                 Command->CommandType = DAC960_WriteCommand;
3276         }
3277         Command->Completion = Request->waiting;
3278         Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3279         Command->BlockNumber = Request->sector;
3280         Command->BlockCount = Request->nr_sectors;
3281         Command->Request = Request;
3282         blkdev_dequeue_request(Request);
3283         Command->SegmentCount = blk_rq_map_sg(req_q,
3284                   Command->Request, Command->cmd_sglist);
3285         /* pci_map_sg MAY change the value of SegCount */
3286         Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3287                  Command->SegmentCount, Command->DmaDirection);
3288
3289         DAC960_QueueReadWriteCommand(Command);
3290   }
3291 }
3292
3293 /*
3294   DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3295   I/O Request Queue and queues it to the Controller.  WaitForCommand is true if
3296   this function should wait for a Command to become available if necessary.
3297   This function returns true if an I/O Request was queued and false otherwise.
3298 */
3299 static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3300 {
3301         int i;
3302
3303         if (!controller->ControllerInitialized)
3304                 return;
3305
3306         /* Do this better later! */
3307         for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3308                 struct request_queue *req_q = controller->RequestQueue[i];
3309
3310                 if (req_q == NULL)
3311                         continue;
3312
3313                 if (!DAC960_process_queue(controller, req_q)) {
3314                         controller->req_q_index = i;
3315                         return;
3316                 }
3317         }
3318
3319         if (controller->req_q_index == 0)
3320                 return;
3321
3322         for (i = 0; i < controller->req_q_index; i++) {
3323                 struct request_queue *req_q = controller->RequestQueue[i];
3324
3325                 if (req_q == NULL)
3326                         continue;
3327
3328                 if (!DAC960_process_queue(controller, req_q)) {
3329                         controller->req_q_index = i;
3330                         return;
3331                 }
3332         }
3333 }
3334
3335
3336 /*
3337   DAC960_queue_partial_rw extracts one bio from the request already
3338   associated with argument command, and construct a new command block to retry I/O
3339   only on that bio.  Queue that command to the controller.
3340
3341   This function re-uses a previously-allocated Command,
3342         there is no failure mode from trying to allocate a command.
3343 */
3344
3345 static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3346 {
3347   DAC960_Controller_T *Controller = Command->Controller;
3348   struct request *Request = Command->Request;
3349   struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3350
3351   if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3352     Command->CommandType = DAC960_ReadRetryCommand;
3353   else
3354     Command->CommandType = DAC960_WriteRetryCommand;
3355
3356   /*
3357    * We could be more efficient with these mapping requests
3358    * and map only the portions that we need.  But since this
3359    * code should almost never be called, just go with a
3360    * simple coding.
3361    */
3362   (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3363
3364   (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3365   /*
3366    * Resubmitting the request sector at a time is really tedious.
3367    * But, this should almost never happen.  So, we're willing to pay
3368    * this price so that in the end, as much of the transfer is completed
3369    * successfully as possible.
3370    */
3371   Command->SegmentCount = 1;
3372   Command->BlockNumber = Request->sector;
3373   Command->BlockCount = 1;
3374   DAC960_QueueReadWriteCommand(Command);
3375   return;
3376 }
3377
3378 /*
3379   DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3380 */
3381
3382 static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3383 {
3384         DAC960_ProcessRequest(RequestQueue->queuedata);
3385 }
3386
3387 /*
3388   DAC960_ProcessCompletedBuffer performs completion processing for an
3389   individual Buffer.
3390 */
3391
3392 static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3393                                                  boolean SuccessfulIO)
3394 {
3395         struct request *Request = Command->Request;
3396         int UpToDate;
3397
3398         UpToDate = 0;
3399         if (SuccessfulIO)
3400                 UpToDate = 1;
3401
3402         pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3403                 Command->SegmentCount, Command->DmaDirection);
3404
3405          if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
3406
3407                 end_that_request_last(Request);
3408
3409                 if (Command->Completion) {
3410                         complete(Command->Completion);
3411                         Command->Completion = NULL;
3412                 }
3413                 return true;
3414         }
3415         return false;
3416 }
3417
3418 /*
3419   DAC960_V1_ReadWriteError prints an appropriate error message for Command
3420   when an error occurs on a Read or Write operation.
3421 */
3422
3423 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3424 {
3425   DAC960_Controller_T *Controller = Command->Controller;
3426   unsigned char *CommandName = "UNKNOWN";
3427   switch (Command->CommandType)
3428     {
3429     case DAC960_ReadCommand:
3430     case DAC960_ReadRetryCommand:
3431       CommandName = "READ";
3432       break;
3433     case DAC960_WriteCommand:
3434     case DAC960_WriteRetryCommand:
3435       CommandName = "WRITE";
3436       break;
3437     case DAC960_MonitoringCommand:
3438     case DAC960_ImmediateCommand:
3439     case DAC960_QueuedCommand:
3440       break;
3441     }
3442   switch (Command->V1.CommandStatus)
3443     {
3444     case DAC960_V1_IrrecoverableDataError:
3445       DAC960_Error("Irrecoverable Data Error on %s:\n",
3446                    Controller, CommandName);
3447       break;
3448     case DAC960_V1_LogicalDriveNonexistentOrOffline:
3449       DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3450                    Controller, CommandName);
3451       break;
3452     case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3453       DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3454                    "on %s:\n", Controller, CommandName);
3455       break;
3456     case DAC960_V1_BadDataEncountered:
3457       DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3458       break;
3459     default:
3460       DAC960_Error("Unexpected Error Status %04X on %s:\n",
3461                    Controller, Command->V1.CommandStatus, CommandName);
3462       break;
3463     }
3464   DAC960_Error("  /dev/rd/c%dd%d:   absolute blocks %u..%u\n",
3465                Controller, Controller->ControllerNumber,
3466                Command->LogicalDriveNumber, Command->BlockNumber,
3467                Command->BlockNumber + Command->BlockCount - 1);
3468 }
3469
3470
3471 /*
3472   DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3473   for DAC960 V1 Firmware Controllers.
3474 */
3475
3476 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3477 {
3478   DAC960_Controller_T *Controller = Command->Controller;
3479   DAC960_CommandType_T CommandType = Command->CommandType;
3480   DAC960_V1_CommandOpcode_T CommandOpcode =
3481     Command->V1.CommandMailbox.Common.CommandOpcode;
3482   DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3483
3484   if (CommandType == DAC960_ReadCommand ||
3485       CommandType == DAC960_WriteCommand)
3486     {
3487
3488 #ifdef FORCE_RETRY_DEBUG
3489       CommandStatus = DAC960_V1_IrrecoverableDataError;
3490 #endif
3491
3492       if (CommandStatus == DAC960_V1_NormalCompletion) {
3493
3494                 if (!DAC960_ProcessCompletedRequest(Command, true))
3495                         BUG();
3496
3497       } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3498                 CommandStatus == DAC960_V1_BadDataEncountered)
3499         {
3500           /*
3501            * break the command down into pieces and resubmit each
3502            * piece, hoping that some of them will succeed.
3503            */
3504            DAC960_queue_partial_rw(Command);
3505            return;
3506         }
3507       else
3508         {
3509           if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3510             DAC960_V1_ReadWriteError(Command);
3511
3512          if (!DAC960_ProcessCompletedRequest(Command, false))
3513                 BUG();
3514         }
3515     }
3516   else if (CommandType == DAC960_ReadRetryCommand ||
3517            CommandType == DAC960_WriteRetryCommand)
3518     {
3519       boolean normal_completion;
3520 #ifdef FORCE_RETRY_FAILURE_DEBUG
3521       static int retry_count = 1;
3522 #endif
3523       /*
3524         Perform completion processing for the portion that was
3525         retried, and submit the next portion, if any.
3526       */
3527       normal_completion = true;
3528       if (CommandStatus != DAC960_V1_NormalCompletion) {
3529         normal_completion = false;
3530         if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3531             DAC960_V1_ReadWriteError(Command);
3532       }
3533
3534 #ifdef FORCE_RETRY_FAILURE_DEBUG
3535       if (!(++retry_count % 10000)) {
3536               printk("V1 error retry failure test\n");
3537               normal_completion = false;
3538               DAC960_V1_ReadWriteError(Command);
3539       }
3540 #endif
3541
3542       if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3543         DAC960_queue_partial_rw(Command);
3544         return;
3545       }
3546     }
3547
3548   else if (CommandType == DAC960_MonitoringCommand)
3549     {
3550       if (Controller->ShutdownMonitoringTimer)
3551               return;
3552       if (CommandOpcode == DAC960_V1_Enquiry)
3553         {
3554           DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3555           DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3556           unsigned int OldCriticalLogicalDriveCount =
3557             OldEnquiry->CriticalLogicalDriveCount;
3558           unsigned int NewCriticalLogicalDriveCount =
3559             NewEnquiry->CriticalLogicalDriveCount;
3560           if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3561             {
3562               int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3563               while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3564                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3565                                 "Now Exists\n", Controller,
3566                                 LogicalDriveNumber,
3567                                 Controller->ControllerNumber,
3568                                 LogicalDriveNumber);
3569               Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3570               DAC960_ComputeGenericDiskInfo(Controller);
3571             }
3572           if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3573             {
3574               int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3575               while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3576                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3577                                 "No Longer Exists\n", Controller,
3578                                 LogicalDriveNumber,
3579                                 Controller->ControllerNumber,
3580                                 LogicalDriveNumber);
3581               Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3582               DAC960_ComputeGenericDiskInfo(Controller);
3583             }
3584           if (NewEnquiry->StatusFlags.DeferredWriteError !=
3585               OldEnquiry->StatusFlags.DeferredWriteError)
3586             DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3587                             (NewEnquiry->StatusFlags.DeferredWriteError
3588                              ? "TRUE" : "FALSE"));
3589           if ((NewCriticalLogicalDriveCount > 0 ||
3590                NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3591               (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3592                NewEnquiry->OfflineLogicalDriveCount !=
3593                OldEnquiry->OfflineLogicalDriveCount) ||
3594               (NewEnquiry->DeadDriveCount > 0 ||
3595                NewEnquiry->DeadDriveCount !=
3596                OldEnquiry->DeadDriveCount) ||
3597               (NewEnquiry->EventLogSequenceNumber !=
3598                OldEnquiry->EventLogSequenceNumber) ||
3599               Controller->MonitoringTimerCount == 0 ||
3600               (jiffies - Controller->SecondaryMonitoringTime
3601                >= DAC960_SecondaryMonitoringInterval))
3602             {
3603               Controller->V1.NeedLogicalDriveInformation = true;
3604               Controller->V1.NewEventLogSequenceNumber =
3605                 NewEnquiry->EventLogSequenceNumber;
3606               Controller->V1.NeedErrorTableInformation = true;
3607               Controller->V1.NeedDeviceStateInformation = true;
3608               Controller->V1.StartDeviceStateScan = true;
3609               Controller->V1.NeedBackgroundInitializationStatus =
3610                 Controller->V1.BackgroundInitializationStatusSupported;
3611               Controller->SecondaryMonitoringTime = jiffies;
3612             }
3613           if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3614               NewEnquiry->RebuildFlag
3615               == DAC960_V1_BackgroundRebuildInProgress ||
3616               OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3617               OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3618             {
3619               Controller->V1.NeedRebuildProgress = true;
3620               Controller->V1.RebuildProgressFirst =
3621                 (NewEnquiry->CriticalLogicalDriveCount <
3622                  OldEnquiry->CriticalLogicalDriveCount);
3623             }
3624           if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3625             switch (NewEnquiry->RebuildFlag)
3626               {
3627               case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3628                 DAC960_Progress("Consistency Check Completed Successfully\n",
3629                                 Controller);
3630                 break;
3631               case DAC960_V1_StandbyRebuildInProgress:
3632               case DAC960_V1_BackgroundRebuildInProgress:
3633                 break;
3634               case DAC960_V1_BackgroundCheckInProgress:
3635                 Controller->V1.NeedConsistencyCheckProgress = true;
3636                 break;
3637               case DAC960_V1_StandbyRebuildCompletedWithError:
3638                 DAC960_Progress("Consistency Check Completed with Error\n",
3639                                 Controller);
3640                 break;
3641               case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3642                 DAC960_Progress("Consistency Check Failed - "
3643                                 "Physical Device Failed\n", Controller);
3644                 break;
3645               case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3646                 DAC960_Progress("Consistency Check Failed - "
3647                                 "Logical Drive Failed\n", Controller);
3648                 break;
3649               case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3650                 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3651                                 Controller);
3652                 break;
3653               case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3654                 DAC960_Progress("Consistency Check Successfully Terminated\n",
3655                                 Controller);
3656                 break;
3657               }
3658           else if (NewEnquiry->RebuildFlag
3659                    == DAC960_V1_BackgroundCheckInProgress)
3660             Controller->V1.NeedConsistencyCheckProgress = true;
3661           Controller->MonitoringAlertMode =
3662             (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3663              NewEnquiry->OfflineLogicalDriveCount > 0 ||
3664              NewEnquiry->DeadDriveCount > 0);
3665           if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3666             {
3667               Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3668               Controller->V1.RebuildFlagPending = true;
3669             }
3670           memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3671                  sizeof(DAC960_V1_Enquiry_T));
3672         }
3673       else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3674         {
3675           static char
3676             *DAC960_EventMessages[] =
3677                { "killed because write recovery failed",
3678                  "killed because of SCSI bus reset failure",
3679                  "killed because of double check condition",
3680                  "killed because it was removed",
3681                  "killed because of gross error on SCSI chip",
3682                  "killed because of bad tag returned from drive",
3683                  "killed because of timeout on SCSI command",
3684                  "killed because of reset SCSI command issued from system",
3685                  "killed because busy or parity error count exceeded limit",
3686                  "killed because of 'kill drive' command from system",
3687                  "killed because of selection timeout",
3688                  "killed due to SCSI phase sequence error",
3689                  "killed due to unknown status" };
3690           DAC960_V1_EventLogEntry_T *EventLogEntry =
3691                 Controller->V1.EventLogEntry;
3692           if (EventLogEntry->SequenceNumber ==
3693               Controller->V1.OldEventLogSequenceNumber)
3694             {
3695               unsigned char SenseKey = EventLogEntry->SenseKey;
3696               unsigned char AdditionalSenseCode =
3697                 EventLogEntry->AdditionalSenseCode;
3698               unsigned char AdditionalSenseCodeQualifier =
3699                 EventLogEntry->AdditionalSenseCodeQualifier;
3700               if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3701                   AdditionalSenseCode == 0x80 &&
3702                   AdditionalSenseCodeQualifier <
3703                   sizeof(DAC960_EventMessages) / sizeof(char *))
3704                 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3705                                 EventLogEntry->Channel,
3706                                 EventLogEntry->TargetID,
3707                                 DAC960_EventMessages[
3708                                   AdditionalSenseCodeQualifier]);
3709               else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3710                        AdditionalSenseCode == 0x29)
3711                 {
3712                   if (Controller->MonitoringTimerCount > 0)
3713                     Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3714                                                    [EventLogEntry->TargetID]++;
3715                 }
3716               else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3717                          (SenseKey == DAC960_SenseKey_NotReady &&
3718                           AdditionalSenseCode == 0x04 &&
3719                           (AdditionalSenseCodeQualifier == 0x01 ||
3720                            AdditionalSenseCodeQualifier == 0x02))))
3721                 {
3722                   DAC960_Critical("Physical Device %d:%d Error Log: "
3723                                   "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3724                                   Controller,
3725                                   EventLogEntry->Channel,
3726                                   EventLogEntry->TargetID,
3727                                   SenseKey,
3728                                   AdditionalSenseCode,
3729                                   AdditionalSenseCodeQualifier);
3730                   DAC960_Critical("Physical Device %d:%d Error Log: "
3731                                   "Information = %02X%02X%02X%02X "
3732                                   "%02X%02X%02X%02X\n",
3733                                   Controller,
3734                                   EventLogEntry->Channel,
3735                                   EventLogEntry->TargetID,
3736                                   EventLogEntry->Information[0],
3737                                   EventLogEntry->Information[1],
3738                                   EventLogEntry->Information[2],
3739                                   EventLogEntry->Information[3],
3740                                   EventLogEntry->CommandSpecificInformation[0],
3741                                   EventLogEntry->CommandSpecificInformation[1],
3742                                   EventLogEntry->CommandSpecificInformation[2],
3743                                   EventLogEntry->CommandSpecificInformation[3]);
3744                 }
3745             }
3746           Controller->V1.OldEventLogSequenceNumber++;
3747         }
3748       else if (CommandOpcode == DAC960_V1_GetErrorTable)
3749         {
3750           DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3751           DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3752           int Channel, TargetID;
3753           for (Channel = 0; Channel < Controller->Channels; Channel++)
3754             for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3755               {
3756                 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3757                   &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3758                 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3759                   &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3760                 if ((NewErrorEntry->ParityErrorCount !=
3761                      OldErrorEntry->ParityErrorCount) ||
3762                     (NewErrorEntry->SoftErrorCount !=
3763                      OldErrorEntry->SoftErrorCount) ||
3764                     (NewErrorEntry->HardErrorCount !=
3765                      OldErrorEntry->HardErrorCount) ||
3766                     (NewErrorEntry->MiscErrorCount !=
3767                      OldErrorEntry->MiscErrorCount))
3768                   DAC960_Critical("Physical Device %d:%d Errors: "
3769                                   "Parity = %d, Soft = %d, "
3770                                   "Hard = %d, Misc = %d\n",
3771                                   Controller, Channel, TargetID,
3772                                   NewErrorEntry->ParityErrorCount,
3773                                   NewErrorEntry->SoftErrorCount,
3774                                   NewErrorEntry->HardErrorCount,
3775                                   NewErrorEntry->MiscErrorCount);
3776               }
3777           memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3778                  sizeof(DAC960_V1_ErrorTable_T));
3779         }
3780       else if (CommandOpcode == DAC960_V1_GetDeviceState)
3781         {
3782           DAC960_V1_DeviceState_T *OldDeviceState =
3783             &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3784                                        [Controller->V1.DeviceStateTargetID];
3785           DAC960_V1_DeviceState_T *NewDeviceState =
3786             Controller->V1.NewDeviceState;
3787           if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3788             DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3789                             Controller->V1.DeviceStateChannel,
3790                             Controller->V1.DeviceStateTargetID,
3791                             (NewDeviceState->DeviceState
3792                              == DAC960_V1_Device_Dead
3793                              ? "DEAD"
3794                              : NewDeviceState->DeviceState
3795                                == DAC960_V1_Device_WriteOnly
3796                                ? "WRITE-ONLY"
3797                                : NewDeviceState->DeviceState
3798                                  == DAC960_V1_Device_Online
3799                                  ? "ONLINE" : "STANDBY"));
3800           if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3801               NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3802             {
3803               Controller->V1.NeedDeviceInquiryInformation = true;
3804               Controller->V1.NeedDeviceSerialNumberInformation = true;
3805               Controller->V1.DeviceResetCount
3806                              [Controller->V1.DeviceStateChannel]
3807                              [Controller->V1.DeviceStateTargetID] = 0;
3808             }
3809           memcpy(OldDeviceState, NewDeviceState,
3810                  sizeof(DAC960_V1_DeviceState_T));
3811         }
3812       else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3813         {
3814           int LogicalDriveNumber;
3815           for (LogicalDriveNumber = 0;
3816                LogicalDriveNumber < Controller->LogicalDriveCount;
3817                LogicalDriveNumber++)
3818             {
3819               DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3820                 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3821               DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3822                 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3823               if (NewLogicalDriveInformation->LogicalDriveState !=
3824                   OldLogicalDriveInformation->LogicalDriveState)
3825                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3826                                 "is now %s\n", Controller,
3827                                 LogicalDriveNumber,
3828                                 Controller->ControllerNumber,
3829                                 LogicalDriveNumber,
3830                                 (NewLogicalDriveInformation->LogicalDriveState
3831                                  == DAC960_V1_LogicalDrive_Online
3832                                  ? "ONLINE"
3833                                  : NewLogicalDriveInformation->LogicalDriveState
3834                                    == DAC960_V1_LogicalDrive_Critical
3835                                    ? "CRITICAL" : "OFFLINE"));
3836               if (NewLogicalDriveInformation->WriteBack !=
3837                   OldLogicalDriveInformation->WriteBack)
3838                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3839                                 "is now %s\n", Controller,
3840                                 LogicalDriveNumber,
3841                                 Controller->ControllerNumber,
3842                                 LogicalDriveNumber,
3843                                 (NewLogicalDriveInformation->WriteBack
3844                                  ? "WRITE BACK" : "WRITE THRU"));
3845             }
3846           memcpy(&Controller->V1.LogicalDriveInformation,
3847                  Controller->V1.NewLogicalDriveInformation,
3848                  sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3849         }
3850       else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3851         {
3852           unsigned int LogicalDriveNumber =
3853             Controller->V1.RebuildProgress->LogicalDriveNumber;
3854           unsigned int LogicalDriveSize =
3855             Controller->V1.RebuildProgress->LogicalDriveSize;
3856           unsigned int BlocksCompleted =
3857             LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3858           if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3859               Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3860             CommandStatus = DAC960_V1_RebuildSuccessful;
3861           switch (CommandStatus)
3862             {
3863             case DAC960_V1_NormalCompletion:
3864               Controller->EphemeralProgressMessage = true;
3865               DAC960_Progress("Rebuild in Progress: "
3866                               "Logical Drive %d (/dev/rd/c%dd%d) "
3867                               "%d%% completed\n",
3868                               Controller, LogicalDriveNumber,
3869                               Controller->ControllerNumber,
3870                               LogicalDriveNumber,
3871                               (100 * (BlocksCompleted >> 7))
3872                               / (LogicalDriveSize >> 7));
3873               Controller->EphemeralProgressMessage = false;
3874               break;
3875             case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3876               DAC960_Progress("Rebuild Failed due to "
3877                               "Logical Drive Failure\n", Controller);
3878               break;
3879             case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3880               DAC960_Progress("Rebuild Failed due to "
3881                               "Bad Blocks on Other Drives\n", Controller);
3882               break;
3883             case DAC960_V1_RebuildFailed_NewDriveFailed:
3884               DAC960_Progress("Rebuild Failed due to "
3885                               "Failure of Drive Being Rebuilt\n", Controller);
3886               break;
3887             case DAC960_V1_NoRebuildOrCheckInProgress:
3888               break;
3889             case DAC960_V1_RebuildSuccessful:
3890               DAC960_Progress("Rebuild Completed Successfully\n", Controller);