arch/x86: Add array variants for setting memory to wc caching.
[linux-2.6.git] / arch / x86 / mm / pageattr.c
1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
14 #include <linux/pfn.h>
15 #include <linux/percpu.h>
16
17 #include <asm/e820.h>
18 #include <asm/processor.h>
19 #include <asm/tlbflush.h>
20 #include <asm/sections.h>
21 #include <asm/setup.h>
22 #include <asm/uaccess.h>
23 #include <asm/pgalloc.h>
24 #include <asm/proto.h>
25 #include <asm/pat.h>
26
27 /*
28  * The current flushing context - we pass it instead of 5 arguments:
29  */
30 struct cpa_data {
31         unsigned long   *vaddr;
32         pgprot_t        mask_set;
33         pgprot_t        mask_clr;
34         int             numpages;
35         int             flags;
36         unsigned long   pfn;
37         unsigned        force_split : 1;
38         int             curpage;
39         struct page     **pages;
40 };
41
42 /*
43  * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
44  * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
45  * entries change the page attribute in parallel to some other cpu
46  * splitting a large page entry along with changing the attribute.
47  */
48 static DEFINE_SPINLOCK(cpa_lock);
49
50 #define CPA_FLUSHTLB 1
51 #define CPA_ARRAY 2
52 #define CPA_PAGES_ARRAY 4
53
54 #ifdef CONFIG_PROC_FS
55 static unsigned long direct_pages_count[PG_LEVEL_NUM];
56
57 void update_page_count(int level, unsigned long pages)
58 {
59         unsigned long flags;
60
61         /* Protect against CPA */
62         spin_lock_irqsave(&pgd_lock, flags);
63         direct_pages_count[level] += pages;
64         spin_unlock_irqrestore(&pgd_lock, flags);
65 }
66
67 static void split_page_count(int level)
68 {
69         direct_pages_count[level]--;
70         direct_pages_count[level - 1] += PTRS_PER_PTE;
71 }
72
73 void arch_report_meminfo(struct seq_file *m)
74 {
75         seq_printf(m, "DirectMap4k:    %8lu kB\n",
76                         direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78         seq_printf(m, "DirectMap2M:    %8lu kB\n",
79                         direct_pages_count[PG_LEVEL_2M] << 11);
80 #else
81         seq_printf(m, "DirectMap4M:    %8lu kB\n",
82                         direct_pages_count[PG_LEVEL_2M] << 12);
83 #endif
84 #ifdef CONFIG_X86_64
85         if (direct_gbpages)
86                 seq_printf(m, "DirectMap1G:    %8lu kB\n",
87                         direct_pages_count[PG_LEVEL_1G] << 20);
88 #endif
89 }
90 #else
91 static inline void split_page_count(int level) { }
92 #endif
93
94 #ifdef CONFIG_X86_64
95
96 static inline unsigned long highmap_start_pfn(void)
97 {
98         return __pa(_text) >> PAGE_SHIFT;
99 }
100
101 static inline unsigned long highmap_end_pfn(void)
102 {
103         return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
104 }
105
106 #endif
107
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
110 #else
111 # define debug_pagealloc 0
112 #endif
113
114 static inline int
115 within(unsigned long addr, unsigned long start, unsigned long end)
116 {
117         return addr >= start && addr < end;
118 }
119
120 /*
121  * Flushing functions
122  */
123
124 /**
125  * clflush_cache_range - flush a cache range with clflush
126  * @addr:       virtual start address
127  * @size:       number of bytes to flush
128  *
129  * clflush is an unordered instruction which needs fencing with mfence
130  * to avoid ordering issues.
131  */
132 void clflush_cache_range(void *vaddr, unsigned int size)
133 {
134         void *vend = vaddr + size - 1;
135
136         mb();
137
138         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
139                 clflush(vaddr);
140         /*
141          * Flush any possible final partial cacheline:
142          */
143         clflush(vend);
144
145         mb();
146 }
147 EXPORT_SYMBOL_GPL(clflush_cache_range);
148
149 static void __cpa_flush_all(void *arg)
150 {
151         unsigned long cache = (unsigned long)arg;
152
153         /*
154          * Flush all to work around Errata in early athlons regarding
155          * large page flushing.
156          */
157         __flush_tlb_all();
158
159         if (cache && boot_cpu_data.x86 >= 4)
160                 wbinvd();
161 }
162
163 static void cpa_flush_all(unsigned long cache)
164 {
165         BUG_ON(irqs_disabled());
166
167         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
168 }
169
170 static void __cpa_flush_range(void *arg)
171 {
172         /*
173          * We could optimize that further and do individual per page
174          * tlb invalidates for a low number of pages. Caveat: we must
175          * flush the high aliases on 64bit as well.
176          */
177         __flush_tlb_all();
178 }
179
180 static void cpa_flush_range(unsigned long start, int numpages, int cache)
181 {
182         unsigned int i, level;
183         unsigned long addr;
184
185         BUG_ON(irqs_disabled());
186         WARN_ON(PAGE_ALIGN(start) != start);
187
188         on_each_cpu(__cpa_flush_range, NULL, 1);
189
190         if (!cache)
191                 return;
192
193         /*
194          * We only need to flush on one CPU,
195          * clflush is a MESI-coherent instruction that
196          * will cause all other CPUs to flush the same
197          * cachelines:
198          */
199         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
200                 pte_t *pte = lookup_address(addr, &level);
201
202                 /*
203                  * Only flush present addresses:
204                  */
205                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
206                         clflush_cache_range((void *) addr, PAGE_SIZE);
207         }
208 }
209
210 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
211                             int in_flags, struct page **pages)
212 {
213         unsigned int i, level;
214         unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
215
216         BUG_ON(irqs_disabled());
217
218         on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
219
220         if (!cache || do_wbinvd)
221                 return;
222
223         /*
224          * We only need to flush on one CPU,
225          * clflush is a MESI-coherent instruction that
226          * will cause all other CPUs to flush the same
227          * cachelines:
228          */
229         for (i = 0; i < numpages; i++) {
230                 unsigned long addr;
231                 pte_t *pte;
232
233                 if (in_flags & CPA_PAGES_ARRAY)
234                         addr = (unsigned long)page_address(pages[i]);
235                 else
236                         addr = start[i];
237
238                 pte = lookup_address(addr, &level);
239
240                 /*
241                  * Only flush present addresses:
242                  */
243                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
244                         clflush_cache_range((void *)addr, PAGE_SIZE);
245         }
246 }
247
248 /*
249  * Certain areas of memory on x86 require very specific protection flags,
250  * for example the BIOS area or kernel text. Callers don't always get this
251  * right (again, ioremap() on BIOS memory is not uncommon) so this function
252  * checks and fixes these known static required protection bits.
253  */
254 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
255                                    unsigned long pfn)
256 {
257         pgprot_t forbidden = __pgprot(0);
258
259         /*
260          * The BIOS area between 640k and 1Mb needs to be executable for
261          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
262          */
263         if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
264                 pgprot_val(forbidden) |= _PAGE_NX;
265
266         /*
267          * The kernel text needs to be executable for obvious reasons
268          * Does not cover __inittext since that is gone later on. On
269          * 64bit we do not enforce !NX on the low mapping
270          */
271         if (within(address, (unsigned long)_text, (unsigned long)_etext))
272                 pgprot_val(forbidden) |= _PAGE_NX;
273
274         /*
275          * The .rodata section needs to be read-only. Using the pfn
276          * catches all aliases.
277          */
278         if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
279                    __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
280                 pgprot_val(forbidden) |= _PAGE_RW;
281
282 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
283         /*
284          * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
285          * kernel text mappings for the large page aligned text, rodata sections
286          * will be always read-only. For the kernel identity mappings covering
287          * the holes caused by this alignment can be anything that user asks.
288          *
289          * This will preserve the large page mappings for kernel text/data
290          * at no extra cost.
291          */
292         if (kernel_set_to_readonly &&
293             within(address, (unsigned long)_text,
294                    (unsigned long)__end_rodata_hpage_align)) {
295                 unsigned int level;
296
297                 /*
298                  * Don't enforce the !RW mapping for the kernel text mapping,
299                  * if the current mapping is already using small page mapping.
300                  * No need to work hard to preserve large page mappings in this
301                  * case.
302                  *
303                  * This also fixes the Linux Xen paravirt guest boot failure
304                  * (because of unexpected read-only mappings for kernel identity
305                  * mappings). In this paravirt guest case, the kernel text
306                  * mapping and the kernel identity mapping share the same
307                  * page-table pages. Thus we can't really use different
308                  * protections for the kernel text and identity mappings. Also,
309                  * these shared mappings are made of small page mappings.
310                  * Thus this don't enforce !RW mapping for small page kernel
311                  * text mapping logic will help Linux Xen parvirt guest boot
312                  * aswell.
313                  */
314                 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
315                         pgprot_val(forbidden) |= _PAGE_RW;
316         }
317 #endif
318
319         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
320
321         return prot;
322 }
323
324 /*
325  * Lookup the page table entry for a virtual address. Return a pointer
326  * to the entry and the level of the mapping.
327  *
328  * Note: We return pud and pmd either when the entry is marked large
329  * or when the present bit is not set. Otherwise we would return a
330  * pointer to a nonexisting mapping.
331  */
332 pte_t *lookup_address(unsigned long address, unsigned int *level)
333 {
334         pgd_t *pgd = pgd_offset_k(address);
335         pud_t *pud;
336         pmd_t *pmd;
337
338         *level = PG_LEVEL_NONE;
339
340         if (pgd_none(*pgd))
341                 return NULL;
342
343         pud = pud_offset(pgd, address);
344         if (pud_none(*pud))
345                 return NULL;
346
347         *level = PG_LEVEL_1G;
348         if (pud_large(*pud) || !pud_present(*pud))
349                 return (pte_t *)pud;
350
351         pmd = pmd_offset(pud, address);
352         if (pmd_none(*pmd))
353                 return NULL;
354
355         *level = PG_LEVEL_2M;
356         if (pmd_large(*pmd) || !pmd_present(*pmd))
357                 return (pte_t *)pmd;
358
359         *level = PG_LEVEL_4K;
360
361         return pte_offset_kernel(pmd, address);
362 }
363 EXPORT_SYMBOL_GPL(lookup_address);
364
365 /*
366  * Set the new pmd in all the pgds we know about:
367  */
368 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
369 {
370         /* change init_mm */
371         set_pte_atomic(kpte, pte);
372 #ifdef CONFIG_X86_32
373         if (!SHARED_KERNEL_PMD) {
374                 struct page *page;
375
376                 list_for_each_entry(page, &pgd_list, lru) {
377                         pgd_t *pgd;
378                         pud_t *pud;
379                         pmd_t *pmd;
380
381                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
382                         pud = pud_offset(pgd, address);
383                         pmd = pmd_offset(pud, address);
384                         set_pte_atomic((pte_t *)pmd, pte);
385                 }
386         }
387 #endif
388 }
389
390 static int
391 try_preserve_large_page(pte_t *kpte, unsigned long address,
392                         struct cpa_data *cpa)
393 {
394         unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
395         pte_t new_pte, old_pte, *tmp;
396         pgprot_t old_prot, new_prot;
397         int i, do_split = 1;
398         unsigned int level;
399
400         if (cpa->force_split)
401                 return 1;
402
403         spin_lock_irqsave(&pgd_lock, flags);
404         /*
405          * Check for races, another CPU might have split this page
406          * up already:
407          */
408         tmp = lookup_address(address, &level);
409         if (tmp != kpte)
410                 goto out_unlock;
411
412         switch (level) {
413         case PG_LEVEL_2M:
414                 psize = PMD_PAGE_SIZE;
415                 pmask = PMD_PAGE_MASK;
416                 break;
417 #ifdef CONFIG_X86_64
418         case PG_LEVEL_1G:
419                 psize = PUD_PAGE_SIZE;
420                 pmask = PUD_PAGE_MASK;
421                 break;
422 #endif
423         default:
424                 do_split = -EINVAL;
425                 goto out_unlock;
426         }
427
428         /*
429          * Calculate the number of pages, which fit into this large
430          * page starting at address:
431          */
432         nextpage_addr = (address + psize) & pmask;
433         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
434         if (numpages < cpa->numpages)
435                 cpa->numpages = numpages;
436
437         /*
438          * We are safe now. Check whether the new pgprot is the same:
439          */
440         old_pte = *kpte;
441         old_prot = new_prot = pte_pgprot(old_pte);
442
443         pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
444         pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
445
446         /*
447          * old_pte points to the large page base address. So we need
448          * to add the offset of the virtual address:
449          */
450         pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
451         cpa->pfn = pfn;
452
453         new_prot = static_protections(new_prot, address, pfn);
454
455         /*
456          * We need to check the full range, whether
457          * static_protection() requires a different pgprot for one of
458          * the pages in the range we try to preserve:
459          */
460         addr = address + PAGE_SIZE;
461         pfn++;
462         for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
463                 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
464
465                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
466                         goto out_unlock;
467         }
468
469         /*
470          * If there are no changes, return. maxpages has been updated
471          * above:
472          */
473         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
474                 do_split = 0;
475                 goto out_unlock;
476         }
477
478         /*
479          * We need to change the attributes. Check, whether we can
480          * change the large page in one go. We request a split, when
481          * the address is not aligned and the number of pages is
482          * smaller than the number of pages in the large page. Note
483          * that we limited the number of possible pages already to
484          * the number of pages in the large page.
485          */
486         if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
487                 /*
488                  * The address is aligned and the number of pages
489                  * covers the full page.
490                  */
491                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
492                 __set_pmd_pte(kpte, address, new_pte);
493                 cpa->flags |= CPA_FLUSHTLB;
494                 do_split = 0;
495         }
496
497 out_unlock:
498         spin_unlock_irqrestore(&pgd_lock, flags);
499
500         return do_split;
501 }
502
503 static int split_large_page(pte_t *kpte, unsigned long address)
504 {
505         unsigned long flags, pfn, pfninc = 1;
506         unsigned int i, level;
507         pte_t *pbase, *tmp;
508         pgprot_t ref_prot;
509         struct page *base;
510
511         if (!debug_pagealloc)
512                 spin_unlock(&cpa_lock);
513         base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
514         if (!debug_pagealloc)
515                 spin_lock(&cpa_lock);
516         if (!base)
517                 return -ENOMEM;
518
519         spin_lock_irqsave(&pgd_lock, flags);
520         /*
521          * Check for races, another CPU might have split this page
522          * up for us already:
523          */
524         tmp = lookup_address(address, &level);
525         if (tmp != kpte)
526                 goto out_unlock;
527
528         pbase = (pte_t *)page_address(base);
529         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
530         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
531         /*
532          * If we ever want to utilize the PAT bit, we need to
533          * update this function to make sure it's converted from
534          * bit 12 to bit 7 when we cross from the 2MB level to
535          * the 4K level:
536          */
537         WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
538
539 #ifdef CONFIG_X86_64
540         if (level == PG_LEVEL_1G) {
541                 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
542                 pgprot_val(ref_prot) |= _PAGE_PSE;
543         }
544 #endif
545
546         /*
547          * Get the target pfn from the original entry:
548          */
549         pfn = pte_pfn(*kpte);
550         for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
551                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
552
553         if (address >= (unsigned long)__va(0) &&
554                 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
555                 split_page_count(level);
556
557 #ifdef CONFIG_X86_64
558         if (address >= (unsigned long)__va(1UL<<32) &&
559                 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
560                 split_page_count(level);
561 #endif
562
563         /*
564          * Install the new, split up pagetable.
565          *
566          * We use the standard kernel pagetable protections for the new
567          * pagetable protections, the actual ptes set above control the
568          * primary protection behavior:
569          */
570         __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
571
572         /*
573          * Intel Atom errata AAH41 workaround.
574          *
575          * The real fix should be in hw or in a microcode update, but
576          * we also probabilistically try to reduce the window of having
577          * a large TLB mixed with 4K TLBs while instruction fetches are
578          * going on.
579          */
580         __flush_tlb_all();
581
582         base = NULL;
583
584 out_unlock:
585         /*
586          * If we dropped out via the lookup_address check under
587          * pgd_lock then stick the page back into the pool:
588          */
589         if (base)
590                 __free_page(base);
591         spin_unlock_irqrestore(&pgd_lock, flags);
592
593         return 0;
594 }
595
596 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
597                                int primary)
598 {
599         /*
600          * Ignore all non primary paths.
601          */
602         if (!primary)
603                 return 0;
604
605         /*
606          * Ignore the NULL PTE for kernel identity mapping, as it is expected
607          * to have holes.
608          * Also set numpages to '1' indicating that we processed cpa req for
609          * one virtual address page and its pfn. TBD: numpages can be set based
610          * on the initial value and the level returned by lookup_address().
611          */
612         if (within(vaddr, PAGE_OFFSET,
613                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
614                 cpa->numpages = 1;
615                 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
616                 return 0;
617         } else {
618                 WARN(1, KERN_WARNING "CPA: called for zero pte. "
619                         "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
620                         *cpa->vaddr);
621
622                 return -EFAULT;
623         }
624 }
625
626 static int __change_page_attr(struct cpa_data *cpa, int primary)
627 {
628         unsigned long address;
629         int do_split, err;
630         unsigned int level;
631         pte_t *kpte, old_pte;
632
633         if (cpa->flags & CPA_PAGES_ARRAY) {
634                 struct page *page = cpa->pages[cpa->curpage];
635                 if (unlikely(PageHighMem(page)))
636                         return 0;
637                 address = (unsigned long)page_address(page);
638         } else if (cpa->flags & CPA_ARRAY)
639                 address = cpa->vaddr[cpa->curpage];
640         else
641                 address = *cpa->vaddr;
642 repeat:
643         kpte = lookup_address(address, &level);
644         if (!kpte)
645                 return __cpa_process_fault(cpa, address, primary);
646
647         old_pte = *kpte;
648         if (!pte_val(old_pte))
649                 return __cpa_process_fault(cpa, address, primary);
650
651         if (level == PG_LEVEL_4K) {
652                 pte_t new_pte;
653                 pgprot_t new_prot = pte_pgprot(old_pte);
654                 unsigned long pfn = pte_pfn(old_pte);
655
656                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
657                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
658
659                 new_prot = static_protections(new_prot, address, pfn);
660
661                 /*
662                  * We need to keep the pfn from the existing PTE,
663                  * after all we're only going to change it's attributes
664                  * not the memory it points to
665                  */
666                 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
667                 cpa->pfn = pfn;
668                 /*
669                  * Do we really change anything ?
670                  */
671                 if (pte_val(old_pte) != pte_val(new_pte)) {
672                         set_pte_atomic(kpte, new_pte);
673                         cpa->flags |= CPA_FLUSHTLB;
674                 }
675                 cpa->numpages = 1;
676                 return 0;
677         }
678
679         /*
680          * Check, whether we can keep the large page intact
681          * and just change the pte:
682          */
683         do_split = try_preserve_large_page(kpte, address, cpa);
684         /*
685          * When the range fits into the existing large page,
686          * return. cp->numpages and cpa->tlbflush have been updated in
687          * try_large_page:
688          */
689         if (do_split <= 0)
690                 return do_split;
691
692         /*
693          * We have to split the large page:
694          */
695         err = split_large_page(kpte, address);
696         if (!err) {
697                 /*
698                  * Do a global flush tlb after splitting the large page
699                  * and before we do the actual change page attribute in the PTE.
700                  *
701                  * With out this, we violate the TLB application note, that says
702                  * "The TLBs may contain both ordinary and large-page
703                  *  translations for a 4-KByte range of linear addresses. This
704                  *  may occur if software modifies the paging structures so that
705                  *  the page size used for the address range changes. If the two
706                  *  translations differ with respect to page frame or attributes
707                  *  (e.g., permissions), processor behavior is undefined and may
708                  *  be implementation-specific."
709                  *
710                  * We do this global tlb flush inside the cpa_lock, so that we
711                  * don't allow any other cpu, with stale tlb entries change the
712                  * page attribute in parallel, that also falls into the
713                  * just split large page entry.
714                  */
715                 flush_tlb_all();
716                 goto repeat;
717         }
718
719         return err;
720 }
721
722 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
723
724 static int cpa_process_alias(struct cpa_data *cpa)
725 {
726         struct cpa_data alias_cpa;
727         unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
728         unsigned long vaddr;
729         int ret;
730
731         if (cpa->pfn >= max_pfn_mapped)
732                 return 0;
733
734 #ifdef CONFIG_X86_64
735         if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
736                 return 0;
737 #endif
738         /*
739          * No need to redo, when the primary call touched the direct
740          * mapping already:
741          */
742         if (cpa->flags & CPA_PAGES_ARRAY) {
743                 struct page *page = cpa->pages[cpa->curpage];
744                 if (unlikely(PageHighMem(page)))
745                         return 0;
746                 vaddr = (unsigned long)page_address(page);
747         } else if (cpa->flags & CPA_ARRAY)
748                 vaddr = cpa->vaddr[cpa->curpage];
749         else
750                 vaddr = *cpa->vaddr;
751
752         if (!(within(vaddr, PAGE_OFFSET,
753                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
754
755                 alias_cpa = *cpa;
756                 alias_cpa.vaddr = &laddr;
757                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
758
759                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
760                 if (ret)
761                         return ret;
762         }
763
764 #ifdef CONFIG_X86_64
765         /*
766          * If the primary call didn't touch the high mapping already
767          * and the physical address is inside the kernel map, we need
768          * to touch the high mapped kernel as well:
769          */
770         if (!within(vaddr, (unsigned long)_text, _brk_end) &&
771             within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
772                 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
773                                                __START_KERNEL_map - phys_base;
774                 alias_cpa = *cpa;
775                 alias_cpa.vaddr = &temp_cpa_vaddr;
776                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
777
778                 /*
779                  * The high mapping range is imprecise, so ignore the
780                  * return value.
781                  */
782                 __change_page_attr_set_clr(&alias_cpa, 0);
783         }
784 #endif
785
786         return 0;
787 }
788
789 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
790 {
791         int ret, numpages = cpa->numpages;
792
793         while (numpages) {
794                 /*
795                  * Store the remaining nr of pages for the large page
796                  * preservation check.
797                  */
798                 cpa->numpages = numpages;
799                 /* for array changes, we can't use large page */
800                 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
801                         cpa->numpages = 1;
802
803                 if (!debug_pagealloc)
804                         spin_lock(&cpa_lock);
805                 ret = __change_page_attr(cpa, checkalias);
806                 if (!debug_pagealloc)
807                         spin_unlock(&cpa_lock);
808                 if (ret)
809                         return ret;
810
811                 if (checkalias) {
812                         ret = cpa_process_alias(cpa);
813                         if (ret)
814                                 return ret;
815                 }
816
817                 /*
818                  * Adjust the number of pages with the result of the
819                  * CPA operation. Either a large page has been
820                  * preserved or a single page update happened.
821                  */
822                 BUG_ON(cpa->numpages > numpages);
823                 numpages -= cpa->numpages;
824                 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
825                         cpa->curpage++;
826                 else
827                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
828
829         }
830         return 0;
831 }
832
833 static inline int cache_attr(pgprot_t attr)
834 {
835         return pgprot_val(attr) &
836                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
837 }
838
839 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
840                                     pgprot_t mask_set, pgprot_t mask_clr,
841                                     int force_split, int in_flag,
842                                     struct page **pages)
843 {
844         struct cpa_data cpa;
845         int ret, cache, checkalias;
846         unsigned long baddr = 0;
847
848         /*
849          * Check, if we are requested to change a not supported
850          * feature:
851          */
852         mask_set = canon_pgprot(mask_set);
853         mask_clr = canon_pgprot(mask_clr);
854         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
855                 return 0;
856
857         /* Ensure we are PAGE_SIZE aligned */
858         if (in_flag & CPA_ARRAY) {
859                 int i;
860                 for (i = 0; i < numpages; i++) {
861                         if (addr[i] & ~PAGE_MASK) {
862                                 addr[i] &= PAGE_MASK;
863                                 WARN_ON_ONCE(1);
864                         }
865                 }
866         } else if (!(in_flag & CPA_PAGES_ARRAY)) {
867                 /*
868                  * in_flag of CPA_PAGES_ARRAY implies it is aligned.
869                  * No need to cehck in that case
870                  */
871                 if (*addr & ~PAGE_MASK) {
872                         *addr &= PAGE_MASK;
873                         /*
874                          * People should not be passing in unaligned addresses:
875                          */
876                         WARN_ON_ONCE(1);
877                 }
878                 /*
879                  * Save address for cache flush. *addr is modified in the call
880                  * to __change_page_attr_set_clr() below.
881                  */
882                 baddr = *addr;
883         }
884
885         /* Must avoid aliasing mappings in the highmem code */
886         kmap_flush_unused();
887
888         vm_unmap_aliases();
889
890         cpa.vaddr = addr;
891         cpa.pages = pages;
892         cpa.numpages = numpages;
893         cpa.mask_set = mask_set;
894         cpa.mask_clr = mask_clr;
895         cpa.flags = 0;
896         cpa.curpage = 0;
897         cpa.force_split = force_split;
898
899         if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
900                 cpa.flags |= in_flag;
901
902         /* No alias checking for _NX bit modifications */
903         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
904
905         ret = __change_page_attr_set_clr(&cpa, checkalias);
906
907         /*
908          * Check whether we really changed something:
909          */
910         if (!(cpa.flags & CPA_FLUSHTLB))
911                 goto out;
912
913         /*
914          * No need to flush, when we did not set any of the caching
915          * attributes:
916          */
917         cache = cache_attr(mask_set);
918
919         /*
920          * On success we use clflush, when the CPU supports it to
921          * avoid the wbindv. If the CPU does not support it and in the
922          * error case we fall back to cpa_flush_all (which uses
923          * wbindv):
924          */
925         if (!ret && cpu_has_clflush) {
926                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
927                         cpa_flush_array(addr, numpages, cache,
928                                         cpa.flags, pages);
929                 } else
930                         cpa_flush_range(baddr, numpages, cache);
931         } else
932                 cpa_flush_all(cache);
933
934 out:
935         return ret;
936 }
937
938 static inline int change_page_attr_set(unsigned long *addr, int numpages,
939                                        pgprot_t mask, int array)
940 {
941         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
942                 (array ? CPA_ARRAY : 0), NULL);
943 }
944
945 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
946                                          pgprot_t mask, int array)
947 {
948         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
949                 (array ? CPA_ARRAY : 0), NULL);
950 }
951
952 static inline int cpa_set_pages_array(struct page **pages, int numpages,
953                                        pgprot_t mask)
954 {
955         return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
956                 CPA_PAGES_ARRAY, pages);
957 }
958
959 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
960                                          pgprot_t mask)
961 {
962         return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
963                 CPA_PAGES_ARRAY, pages);
964 }
965
966 int _set_memory_uc(unsigned long addr, int numpages)
967 {
968         /*
969          * for now UC MINUS. see comments in ioremap_nocache()
970          */
971         return change_page_attr_set(&addr, numpages,
972                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
973 }
974
975 int set_memory_uc(unsigned long addr, int numpages)
976 {
977         int ret;
978
979         /*
980          * for now UC MINUS. see comments in ioremap_nocache()
981          */
982         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
983                             _PAGE_CACHE_UC_MINUS, NULL);
984         if (ret)
985                 goto out_err;
986
987         ret = _set_memory_uc(addr, numpages);
988         if (ret)
989                 goto out_free;
990
991         return 0;
992
993 out_free:
994         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
995 out_err:
996         return ret;
997 }
998 EXPORT_SYMBOL(set_memory_uc);
999
1000 int _set_memory_array(unsigned long *addr, int addrinarray,
1001                 unsigned long new_type)
1002 {
1003         int i, j;
1004         int ret;
1005
1006         /*
1007          * for now UC MINUS. see comments in ioremap_nocache()
1008          */
1009         for (i = 0; i < addrinarray; i++) {
1010                 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1011                                         new_type, NULL);
1012                 if (ret)
1013                         goto out_free;
1014         }
1015
1016         ret = change_page_attr_set(addr, addrinarray,
1017                                     __pgprot(_PAGE_CACHE_UC_MINUS), 1);
1018
1019         if (!ret && new_type == _PAGE_CACHE_WC)
1020                 ret = change_page_attr_set_clr(addr, addrinarray,
1021                                                __pgprot(_PAGE_CACHE_WC),
1022                                                __pgprot(_PAGE_CACHE_MASK),
1023                                                0, CPA_ARRAY, NULL);
1024         if (ret)
1025                 goto out_free;
1026
1027         return 0;
1028
1029 out_free:
1030         for (j = 0; j < i; j++)
1031                 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1032
1033         return ret;
1034 }
1035
1036 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1037 {
1038         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
1039 }
1040 EXPORT_SYMBOL(set_memory_array_uc);
1041
1042 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1043 {
1044         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
1045 }
1046 EXPORT_SYMBOL(set_memory_array_wc);
1047
1048 int _set_memory_wc(unsigned long addr, int numpages)
1049 {
1050         int ret;
1051         unsigned long addr_copy = addr;
1052
1053         ret = change_page_attr_set(&addr, numpages,
1054                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1055         if (!ret) {
1056                 ret = change_page_attr_set_clr(&addr_copy, numpages,
1057                                                __pgprot(_PAGE_CACHE_WC),
1058                                                __pgprot(_PAGE_CACHE_MASK),
1059                                                0, 0, NULL);
1060         }
1061         return ret;
1062 }
1063
1064 int set_memory_wc(unsigned long addr, int numpages)
1065 {
1066         int ret;
1067
1068         if (!pat_enabled)
1069                 return set_memory_uc(addr, numpages);
1070
1071         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1072                 _PAGE_CACHE_WC, NULL);
1073         if (ret)
1074                 goto out_err;
1075
1076         ret = _set_memory_wc(addr, numpages);
1077         if (ret)
1078                 goto out_free;
1079
1080         return 0;
1081
1082 out_free:
1083         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1084 out_err:
1085         return ret;
1086 }
1087 EXPORT_SYMBOL(set_memory_wc);
1088
1089 int _set_memory_wb(unsigned long addr, int numpages)
1090 {
1091         return change_page_attr_clear(&addr, numpages,
1092                                       __pgprot(_PAGE_CACHE_MASK), 0);
1093 }
1094
1095 int set_memory_wb(unsigned long addr, int numpages)
1096 {
1097         int ret;
1098
1099         ret = _set_memory_wb(addr, numpages);
1100         if (ret)
1101                 return ret;
1102
1103         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1104         return 0;
1105 }
1106 EXPORT_SYMBOL(set_memory_wb);
1107
1108 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1109 {
1110         int i;
1111         int ret;
1112
1113         ret = change_page_attr_clear(addr, addrinarray,
1114                                       __pgprot(_PAGE_CACHE_MASK), 1);
1115         if (ret)
1116                 return ret;
1117
1118         for (i = 0; i < addrinarray; i++)
1119                 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1120
1121         return 0;
1122 }
1123 EXPORT_SYMBOL(set_memory_array_wb);
1124
1125 int set_memory_x(unsigned long addr, int numpages)
1126 {
1127         if (!(__supported_pte_mask & _PAGE_NX))
1128                 return 0;
1129
1130         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1131 }
1132 EXPORT_SYMBOL(set_memory_x);
1133
1134 int set_memory_nx(unsigned long addr, int numpages)
1135 {
1136         if (!(__supported_pte_mask & _PAGE_NX))
1137                 return 0;
1138
1139         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1140 }
1141 EXPORT_SYMBOL(set_memory_nx);
1142
1143 int set_memory_ro(unsigned long addr, int numpages)
1144 {
1145         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1146 }
1147 EXPORT_SYMBOL_GPL(set_memory_ro);
1148
1149 int set_memory_rw(unsigned long addr, int numpages)
1150 {
1151         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1152 }
1153 EXPORT_SYMBOL_GPL(set_memory_rw);
1154
1155 int set_memory_np(unsigned long addr, int numpages)
1156 {
1157         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1158 }
1159
1160 int set_memory_4k(unsigned long addr, int numpages)
1161 {
1162         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1163                                         __pgprot(0), 1, 0, NULL);
1164 }
1165
1166 int set_pages_uc(struct page *page, int numpages)
1167 {
1168         unsigned long addr = (unsigned long)page_address(page);
1169
1170         return set_memory_uc(addr, numpages);
1171 }
1172 EXPORT_SYMBOL(set_pages_uc);
1173
1174 static int _set_pages_array(struct page **pages, int addrinarray,
1175                 unsigned long new_type)
1176 {
1177         unsigned long start;
1178         unsigned long end;
1179         int i;
1180         int free_idx;
1181         int ret;
1182
1183         for (i = 0; i < addrinarray; i++) {
1184                 if (PageHighMem(pages[i]))
1185                         continue;
1186                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1187                 end = start + PAGE_SIZE;
1188                 if (reserve_memtype(start, end, new_type, NULL))
1189                         goto err_out;
1190         }
1191
1192         ret = cpa_set_pages_array(pages, addrinarray,
1193                         __pgprot(_PAGE_CACHE_UC_MINUS));
1194         if (!ret && new_type == _PAGE_CACHE_WC)
1195                 ret = change_page_attr_set_clr(NULL, addrinarray,
1196                                                __pgprot(_PAGE_CACHE_WC),
1197                                                __pgprot(_PAGE_CACHE_MASK),
1198                                                0, CPA_PAGES_ARRAY, pages);
1199         if (ret)
1200                 goto err_out;
1201         return 0; /* Success */
1202 err_out:
1203         free_idx = i;
1204         for (i = 0; i < free_idx; i++) {
1205                 if (PageHighMem(pages[i]))
1206                         continue;
1207                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1208                 end = start + PAGE_SIZE;
1209                 free_memtype(start, end);
1210         }
1211         return -EINVAL;
1212 }
1213
1214 int set_pages_array_uc(struct page **pages, int addrinarray)
1215 {
1216         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
1217 }
1218 EXPORT_SYMBOL(set_pages_array_uc);
1219
1220 int set_pages_array_wc(struct page **pages, int addrinarray)
1221 {
1222         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
1223 }
1224 EXPORT_SYMBOL(set_pages_array_wc);
1225
1226 int set_pages_wb(struct page *page, int numpages)
1227 {
1228         unsigned long addr = (unsigned long)page_address(page);
1229
1230         return set_memory_wb(addr, numpages);
1231 }
1232 EXPORT_SYMBOL(set_pages_wb);
1233
1234 int set_pages_array_wb(struct page **pages, int addrinarray)
1235 {
1236         int retval;
1237         unsigned long start;
1238         unsigned long end;
1239         int i;
1240
1241         retval = cpa_clear_pages_array(pages, addrinarray,
1242                         __pgprot(_PAGE_CACHE_MASK));
1243         if (retval)
1244                 return retval;
1245
1246         for (i = 0; i < addrinarray; i++) {
1247                 if (PageHighMem(pages[i]))
1248                         continue;
1249                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1250                 end = start + PAGE_SIZE;
1251                 free_memtype(start, end);
1252         }
1253
1254         return 0;
1255 }
1256 EXPORT_SYMBOL(set_pages_array_wb);
1257
1258 int set_pages_x(struct page *page, int numpages)
1259 {
1260         unsigned long addr = (unsigned long)page_address(page);
1261
1262         return set_memory_x(addr, numpages);
1263 }
1264 EXPORT_SYMBOL(set_pages_x);
1265
1266 int set_pages_nx(struct page *page, int numpages)
1267 {
1268         unsigned long addr = (unsigned long)page_address(page);
1269
1270         return set_memory_nx(addr, numpages);
1271 }
1272 EXPORT_SYMBOL(set_pages_nx);
1273
1274 int set_pages_ro(struct page *page, int numpages)
1275 {
1276         unsigned long addr = (unsigned long)page_address(page);
1277
1278         return set_memory_ro(addr, numpages);
1279 }
1280
1281 int set_pages_rw(struct page *page, int numpages)
1282 {
1283         unsigned long addr = (unsigned long)page_address(page);
1284
1285         return set_memory_rw(addr, numpages);
1286 }
1287
1288 #ifdef CONFIG_DEBUG_PAGEALLOC
1289
1290 static int __set_pages_p(struct page *page, int numpages)
1291 {
1292         unsigned long tempaddr = (unsigned long) page_address(page);
1293         struct cpa_data cpa = { .vaddr = &tempaddr,
1294                                 .numpages = numpages,
1295                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1296                                 .mask_clr = __pgprot(0),
1297                                 .flags = 0};
1298
1299         /*
1300          * No alias checking needed for setting present flag. otherwise,
1301          * we may need to break large pages for 64-bit kernel text
1302          * mappings (this adds to complexity if we want to do this from
1303          * atomic context especially). Let's keep it simple!
1304          */
1305         return __change_page_attr_set_clr(&cpa, 0);
1306 }
1307
1308 static int __set_pages_np(struct page *page, int numpages)
1309 {
1310         unsigned long tempaddr = (unsigned long) page_address(page);
1311         struct cpa_data cpa = { .vaddr = &tempaddr,
1312                                 .numpages = numpages,
1313                                 .mask_set = __pgprot(0),
1314                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1315                                 .flags = 0};
1316
1317         /*
1318          * No alias checking needed for setting not present flag. otherwise,
1319          * we may need to break large pages for 64-bit kernel text
1320          * mappings (this adds to complexity if we want to do this from
1321          * atomic context especially). Let's keep it simple!
1322          */
1323         return __change_page_attr_set_clr(&cpa, 0);
1324 }
1325
1326 void kernel_map_pages(struct page *page, int numpages, int enable)
1327 {
1328         if (PageHighMem(page))
1329                 return;
1330         if (!enable) {
1331                 debug_check_no_locks_freed(page_address(page),
1332                                            numpages * PAGE_SIZE);
1333         }
1334
1335         /*
1336          * If page allocator is not up yet then do not call c_p_a():
1337          */
1338         if (!debug_pagealloc_enabled)
1339                 return;
1340
1341         /*
1342          * The return value is ignored as the calls cannot fail.
1343          * Large pages for identity mappings are not used at boot time
1344          * and hence no memory allocations during large page split.
1345          */
1346         if (enable)
1347                 __set_pages_p(page, numpages);
1348         else
1349                 __set_pages_np(page, numpages);
1350
1351         /*
1352          * We should perform an IPI and flush all tlbs,
1353          * but that can deadlock->flush only current cpu:
1354          */
1355         __flush_tlb_all();
1356 }
1357
1358 #ifdef CONFIG_HIBERNATION
1359
1360 bool kernel_page_present(struct page *page)
1361 {
1362         unsigned int level;
1363         pte_t *pte;
1364
1365         if (PageHighMem(page))
1366                 return false;
1367
1368         pte = lookup_address((unsigned long)page_address(page), &level);
1369         return (pte_val(*pte) & _PAGE_PRESENT);
1370 }
1371
1372 #endif /* CONFIG_HIBERNATION */
1373
1374 #endif /* CONFIG_DEBUG_PAGEALLOC */
1375
1376 /*
1377  * The testcases use internal knowledge of the implementation that shouldn't
1378  * be exposed to the rest of the kernel. Include these directly here.
1379  */
1380 #ifdef CONFIG_CPA_DEBUG
1381 #include "pageattr-test.c"
1382 #endif