bc9f59c246fd99890da74eec868d92cc3f8f7f2b
[linux-2.6.git] / arch / x86 / kernel / suspend_64.c
1 /*
2  * Suspend support specific for i386.
3  *
4  * Distribute under GPLv2
5  *
6  * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
7  * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
8  */
9
10 #include <linux/smp.h>
11 #include <linux/suspend.h>
12 #include <asm/proto.h>
13 #include <asm/page.h>
14 #include <asm/pgtable.h>
15 #include <asm/mtrr.h>
16
17 /* References to section boundaries */
18 extern const void __nosave_begin, __nosave_end;
19
20 struct saved_context saved_context;
21
22 unsigned long saved_context_eax, saved_context_ebx, saved_context_ecx, saved_context_edx;
23 unsigned long saved_context_esp, saved_context_ebp, saved_context_esi, saved_context_edi;
24 unsigned long saved_context_r08, saved_context_r09, saved_context_r10, saved_context_r11;
25 unsigned long saved_context_r12, saved_context_r13, saved_context_r14, saved_context_r15;
26 unsigned long saved_context_eflags;
27
28 void __save_processor_state(struct saved_context *ctxt)
29 {
30         kernel_fpu_begin();
31
32         /*
33          * descriptor tables
34          */
35         store_gdt((struct desc_ptr *)&ctxt->gdt_limit);
36         store_idt((struct desc_ptr *)&ctxt->idt_limit);
37         store_tr(ctxt->tr);
38
39         /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
40         /*
41          * segment registers
42          */
43         asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds));
44         asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
45         asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
46         asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));
47         asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));
48
49         rdmsrl(MSR_FS_BASE, ctxt->fs_base);
50         rdmsrl(MSR_GS_BASE, ctxt->gs_base);
51         rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
52         mtrr_save_fixed_ranges(NULL);
53
54         /*
55          * control registers 
56          */
57         rdmsrl(MSR_EFER, ctxt->efer);
58         ctxt->cr0 = read_cr0();
59         ctxt->cr2 = read_cr2();
60         ctxt->cr3 = read_cr3();
61         ctxt->cr4 = read_cr4();
62         ctxt->cr8 = read_cr8();
63 }
64
65 void save_processor_state(void)
66 {
67         __save_processor_state(&saved_context);
68 }
69
70 static void do_fpu_end(void)
71 {
72         /*
73          * Restore FPU regs if necessary
74          */
75         kernel_fpu_end();
76 }
77
78 void __restore_processor_state(struct saved_context *ctxt)
79 {
80         /*
81          * control registers
82          */
83         wrmsrl(MSR_EFER, ctxt->efer);
84         write_cr8(ctxt->cr8);
85         write_cr4(ctxt->cr4);
86         write_cr3(ctxt->cr3);
87         write_cr2(ctxt->cr2);
88         write_cr0(ctxt->cr0);
89
90         /*
91          * now restore the descriptor tables to their proper values
92          * ltr is done i fix_processor_context().
93          */
94         load_gdt((const struct desc_ptr *)&ctxt->gdt_limit);
95         load_idt((const struct desc_ptr *)&ctxt->idt_limit);
96
97
98         /*
99          * segment registers
100          */
101         asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds));
102         asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
103         asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));
104         load_gs_index(ctxt->gs);
105         asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
106
107         wrmsrl(MSR_FS_BASE, ctxt->fs_base);
108         wrmsrl(MSR_GS_BASE, ctxt->gs_base);
109         wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
110
111         fix_processor_context();
112
113         do_fpu_end();
114         mtrr_ap_init();
115 }
116
117 void restore_processor_state(void)
118 {
119         __restore_processor_state(&saved_context);
120 }
121
122 void fix_processor_context(void)
123 {
124         int cpu = smp_processor_id();
125         struct tss_struct *t = &per_cpu(init_tss, cpu);
126
127         set_tss_desc(cpu,t);    /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
128
129         cpu_gdt(cpu)[GDT_ENTRY_TSS].type = 9;
130
131         syscall_init();                         /* This sets MSR_*STAR and related */
132         load_TR_desc();                         /* This does ltr */
133         load_LDT(&current->active_mm->context); /* This does lldt */
134
135         /*
136          * Now maybe reload the debug registers
137          */
138         if (current->thread.debugreg7){
139                 loaddebug(&current->thread, 0);
140                 loaddebug(&current->thread, 1);
141                 loaddebug(&current->thread, 2);
142                 loaddebug(&current->thread, 3);
143                 /* no 4 and 5 */
144                 loaddebug(&current->thread, 6);
145                 loaddebug(&current->thread, 7);
146         }
147
148 }
149
150 #ifdef CONFIG_HIBERNATION
151 /* Defined in arch/x86_64/kernel/suspend_asm.S */
152 extern int restore_image(void);
153
154 /*
155  * Address to jump to in the last phase of restore in order to get to the image
156  * kernel's text (this value is passed in the image header).
157  */
158 unsigned long restore_jump_address;
159
160 /*
161  * Value of the cr3 register from before the hibernation (this value is passed
162  * in the image header).
163  */
164 unsigned long restore_cr3;
165
166 pgd_t *temp_level4_pgt;
167
168 void *relocated_restore_code;
169
170 static int res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
171 {
172         long i, j;
173
174         i = pud_index(address);
175         pud = pud + i;
176         for (; i < PTRS_PER_PUD; pud++, i++) {
177                 unsigned long paddr;
178                 pmd_t *pmd;
179
180                 paddr = address + i*PUD_SIZE;
181                 if (paddr >= end)
182                         break;
183
184                 pmd = (pmd_t *)get_safe_page(GFP_ATOMIC);
185                 if (!pmd)
186                         return -ENOMEM;
187                 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
188                 for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) {
189                         unsigned long pe;
190
191                         if (paddr >= end)
192                                 break;
193                         pe = __PAGE_KERNEL_LARGE_EXEC | paddr;
194                         pe &= __supported_pte_mask;
195                         set_pmd(pmd, __pmd(pe));
196                 }
197         }
198         return 0;
199 }
200
201 static int res_kernel_text_pud_init(pud_t *pud, unsigned long start)
202 {
203         pmd_t *pmd;
204         unsigned long paddr;
205
206         pmd = (pmd_t *)get_safe_page(GFP_ATOMIC);
207         if (!pmd)
208                 return -ENOMEM;
209         set_pud(pud + pud_index(start), __pud(__pa(pmd) | _KERNPG_TABLE));
210         for (paddr = 0; paddr < KERNEL_TEXT_SIZE; pmd++, paddr += PMD_SIZE) {
211                 unsigned long pe;
212
213                 pe = __PAGE_KERNEL_LARGE_EXEC | _PAGE_GLOBAL | paddr;
214                 pe &= __supported_pte_mask;
215                 set_pmd(pmd, __pmd(pe));
216         }
217
218         return 0;
219 }
220
221 static int set_up_temporary_mappings(void)
222 {
223         unsigned long start, end, next;
224         pud_t *pud;
225         int error;
226
227         temp_level4_pgt = (pgd_t *)get_safe_page(GFP_ATOMIC);
228         if (!temp_level4_pgt)
229                 return -ENOMEM;
230
231         /* Set up the direct mapping from scratch */
232         start = (unsigned long)pfn_to_kaddr(0);
233         end = (unsigned long)pfn_to_kaddr(end_pfn);
234
235         for (; start < end; start = next) {
236                 pud = (pud_t *)get_safe_page(GFP_ATOMIC);
237                 if (!pud)
238                         return -ENOMEM;
239                 next = start + PGDIR_SIZE;
240                 if (next > end)
241                         next = end;
242                 if ((error = res_phys_pud_init(pud, __pa(start), __pa(next))))
243                         return error;
244                 set_pgd(temp_level4_pgt + pgd_index(start),
245                         mk_kernel_pgd(__pa(pud)));
246         }
247
248         /* Set up the kernel text mapping from scratch */
249         pud = (pud_t *)get_safe_page(GFP_ATOMIC);
250         if (!pud)
251                 return -ENOMEM;
252         error = res_kernel_text_pud_init(pud, __START_KERNEL_map);
253         if (!error)
254                 set_pgd(temp_level4_pgt + pgd_index(__START_KERNEL_map),
255                         __pgd(__pa(pud) | _PAGE_TABLE));
256
257         return error;
258 }
259
260 int swsusp_arch_resume(void)
261 {
262         int error;
263
264         /* We have got enough memory and from now on we cannot recover */
265         if ((error = set_up_temporary_mappings()))
266                 return error;
267
268         relocated_restore_code = (void *)get_safe_page(GFP_ATOMIC);
269         if (!relocated_restore_code)
270                 return -ENOMEM;
271         memcpy(relocated_restore_code, &core_restore_code,
272                &restore_registers - &core_restore_code);
273
274         restore_image();
275         return 0;
276 }
277
278 /*
279  *      pfn_is_nosave - check if given pfn is in the 'nosave' section
280  */
281
282 int pfn_is_nosave(unsigned long pfn)
283 {
284         unsigned long nosave_begin_pfn = __pa_symbol(&__nosave_begin) >> PAGE_SHIFT;
285         unsigned long nosave_end_pfn = PAGE_ALIGN(__pa_symbol(&__nosave_end)) >> PAGE_SHIFT;
286         return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
287 }
288
289 struct restore_data_record {
290         unsigned long jump_address;
291         unsigned long cr3;
292         unsigned long magic;
293 };
294
295 #define RESTORE_MAGIC   0x0123456789ABCDEFUL
296
297 /**
298  *      arch_hibernation_header_save - populate the architecture specific part
299  *              of a hibernation image header
300  *      @addr: address to save the data at
301  */
302 int arch_hibernation_header_save(void *addr, unsigned int max_size)
303 {
304         struct restore_data_record *rdr = addr;
305
306         if (max_size < sizeof(struct restore_data_record))
307                 return -EOVERFLOW;
308         rdr->jump_address = restore_jump_address;
309         rdr->cr3 = restore_cr3;
310         rdr->magic = RESTORE_MAGIC;
311         return 0;
312 }
313
314 /**
315  *      arch_hibernation_header_restore - read the architecture specific data
316  *              from the hibernation image header
317  *      @addr: address to read the data from
318  */
319 int arch_hibernation_header_restore(void *addr)
320 {
321         struct restore_data_record *rdr = addr;
322
323         restore_jump_address = rdr->jump_address;
324         restore_cr3 = rdr->cr3;
325         return (rdr->magic == RESTORE_MAGIC) ? 0 : -EINVAL;
326 }
327 #endif /* CONFIG_HIBERNATION */