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[linux-2.6.git] / arch / sparc64 / kernel / prom.c
1 /*
2  * Procedures for creating, accessing and interpreting the device tree.
3  *
4  * Paul Mackerras       August 1996.
5  * Copyright (C) 1996-2005 Paul Mackerras.
6  * 
7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8  *    {engebret|bergner}@us.ibm.com 
9  *
10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
11  *
12  *      This program is free software; you can redistribute it and/or
13  *      modify it under the terms of the GNU General Public License
14  *      as published by the Free Software Foundation; either version
15  *      2 of the License, or (at your option) any later version.
16  */
17
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/mm.h>
23 #include <linux/bootmem.h>
24 #include <linux/module.h>
25
26 #include <asm/prom.h>
27 #include <asm/of_device.h>
28 #include <asm/oplib.h>
29 #include <asm/irq.h>
30 #include <asm/asi.h>
31 #include <asm/upa.h>
32
33 static struct device_node *allnodes;
34
35 /* use when traversing tree through the allnext, child, sibling,
36  * or parent members of struct device_node.
37  */
38 static DEFINE_RWLOCK(devtree_lock);
39
40 int of_device_is_compatible(struct device_node *device, const char *compat)
41 {
42         const char* cp;
43         int cplen, l;
44
45         cp = (char *) of_get_property(device, "compatible", &cplen);
46         if (cp == NULL)
47                 return 0;
48         while (cplen > 0) {
49                 if (strncmp(cp, compat, strlen(compat)) == 0)
50                         return 1;
51                 l = strlen(cp) + 1;
52                 cp += l;
53                 cplen -= l;
54         }
55
56         return 0;
57 }
58 EXPORT_SYMBOL(of_device_is_compatible);
59
60 struct device_node *of_get_parent(const struct device_node *node)
61 {
62         struct device_node *np;
63
64         if (!node)
65                 return NULL;
66
67         np = node->parent;
68
69         return np;
70 }
71 EXPORT_SYMBOL(of_get_parent);
72
73 struct device_node *of_get_next_child(const struct device_node *node,
74         struct device_node *prev)
75 {
76         struct device_node *next;
77
78         next = prev ? prev->sibling : node->child;
79         for (; next != 0; next = next->sibling) {
80                 break;
81         }
82
83         return next;
84 }
85 EXPORT_SYMBOL(of_get_next_child);
86
87 struct device_node *of_find_node_by_path(const char *path)
88 {
89         struct device_node *np = allnodes;
90
91         for (; np != 0; np = np->allnext) {
92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
93                         break;
94         }
95
96         return np;
97 }
98 EXPORT_SYMBOL(of_find_node_by_path);
99
100 struct device_node *of_find_node_by_phandle(phandle handle)
101 {
102         struct device_node *np;
103
104         for (np = allnodes; np != 0; np = np->allnext)
105                 if (np->node == handle)
106                         break;
107
108         return np;
109 }
110 EXPORT_SYMBOL(of_find_node_by_phandle);
111
112 struct device_node *of_find_node_by_name(struct device_node *from,
113         const char *name)
114 {
115         struct device_node *np;
116
117         np = from ? from->allnext : allnodes;
118         for (; np != NULL; np = np->allnext)
119                 if (np->name != NULL && strcmp(np->name, name) == 0)
120                         break;
121
122         return np;
123 }
124 EXPORT_SYMBOL(of_find_node_by_name);
125
126 struct device_node *of_find_node_by_type(struct device_node *from,
127         const char *type)
128 {
129         struct device_node *np;
130
131         np = from ? from->allnext : allnodes;
132         for (; np != 0; np = np->allnext)
133                 if (np->type != 0 && strcmp(np->type, type) == 0)
134                         break;
135
136         return np;
137 }
138 EXPORT_SYMBOL(of_find_node_by_type);
139
140 struct device_node *of_find_compatible_node(struct device_node *from,
141         const char *type, const char *compatible)
142 {
143         struct device_node *np;
144
145         np = from ? from->allnext : allnodes;
146         for (; np != 0; np = np->allnext) {
147                 if (type != NULL
148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
149                         continue;
150                 if (of_device_is_compatible(np, compatible))
151                         break;
152         }
153
154         return np;
155 }
156 EXPORT_SYMBOL(of_find_compatible_node);
157
158 struct property *of_find_property(struct device_node *np, const char *name,
159                                   int *lenp)
160 {
161         struct property *pp;
162
163         for (pp = np->properties; pp != 0; pp = pp->next) {
164                 if (strcmp(pp->name, name) == 0) {
165                         if (lenp != 0)
166                                 *lenp = pp->length;
167                         break;
168                 }
169         }
170         return pp;
171 }
172 EXPORT_SYMBOL(of_find_property);
173
174 /*
175  * Find a property with a given name for a given node
176  * and return the value.
177  */
178 void *of_get_property(struct device_node *np, const char *name, int *lenp)
179 {
180         struct property *pp = of_find_property(np,name,lenp);
181         return pp ? pp->value : NULL;
182 }
183 EXPORT_SYMBOL(of_get_property);
184
185 int of_getintprop_default(struct device_node *np, const char *name, int def)
186 {
187         struct property *prop;
188         int len;
189
190         prop = of_find_property(np, name, &len);
191         if (!prop || len != 4)
192                 return def;
193
194         return *(int *) prop->value;
195 }
196 EXPORT_SYMBOL(of_getintprop_default);
197
198 int of_n_addr_cells(struct device_node *np)
199 {
200         int* ip;
201         do {
202                 if (np->parent)
203                         np = np->parent;
204                 ip = of_get_property(np, "#address-cells", NULL);
205                 if (ip != NULL)
206                         return *ip;
207         } while (np->parent);
208         /* No #address-cells property for the root node, default to 2 */
209         return 2;
210 }
211 EXPORT_SYMBOL(of_n_addr_cells);
212
213 int of_n_size_cells(struct device_node *np)
214 {
215         int* ip;
216         do {
217                 if (np->parent)
218                         np = np->parent;
219                 ip = of_get_property(np, "#size-cells", NULL);
220                 if (ip != NULL)
221                         return *ip;
222         } while (np->parent);
223         /* No #size-cells property for the root node, default to 1 */
224         return 1;
225 }
226 EXPORT_SYMBOL(of_n_size_cells);
227
228 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
229 {
230         struct property **prevp;
231         void *new_val;
232         int err;
233
234         new_val = kmalloc(len, GFP_KERNEL);
235         if (!new_val)
236                 return -ENOMEM;
237
238         memcpy(new_val, val, len);
239
240         err = -ENODEV;
241
242         write_lock(&devtree_lock);
243         prevp = &dp->properties;
244         while (*prevp) {
245                 struct property *prop = *prevp;
246
247                 if (!strcmp(prop->name, name)) {
248                         void *old_val = prop->value;
249                         int ret;
250
251                         ret = prom_setprop(dp->node, name, val, len);
252                         err = -EINVAL;
253                         if (ret >= 0) {
254                                 prop->value = new_val;
255                                 prop->length = len;
256
257                                 if (OF_IS_DYNAMIC(prop))
258                                         kfree(old_val);
259
260                                 OF_MARK_DYNAMIC(prop);
261
262                                 err = 0;
263                         }
264                         break;
265                 }
266                 prevp = &(*prevp)->next;
267         }
268         write_unlock(&devtree_lock);
269
270         /* XXX Upate procfs if necessary... */
271
272         return err;
273 }
274 EXPORT_SYMBOL(of_set_property);
275
276 static unsigned int prom_early_allocated;
277
278 static void * __init prom_early_alloc(unsigned long size)
279 {
280         void *ret;
281
282         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
283         if (ret != NULL)
284                 memset(ret, 0, size);
285
286         prom_early_allocated += size;
287
288         return ret;
289 }
290
291 #ifdef CONFIG_PCI
292 /* PSYCHO interrupt mapping support. */
293 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
294 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
295 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
296 {
297         unsigned int bus =  (ino & 0x10) >> 4;
298         unsigned int slot = (ino & 0x0c) >> 2;
299
300         if (bus == 0)
301                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
302         else
303                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
304 }
305
306 #define PSYCHO_IMAP_SCSI        0x1000UL
307 #define PSYCHO_IMAP_ETH         0x1008UL
308 #define PSYCHO_IMAP_BPP         0x1010UL
309 #define PSYCHO_IMAP_AU_REC      0x1018UL
310 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
311 #define PSYCHO_IMAP_PFAIL       0x1028UL
312 #define PSYCHO_IMAP_KMS         0x1030UL
313 #define PSYCHO_IMAP_FLPY        0x1038UL
314 #define PSYCHO_IMAP_SHW         0x1040UL
315 #define PSYCHO_IMAP_KBD         0x1048UL
316 #define PSYCHO_IMAP_MS          0x1050UL
317 #define PSYCHO_IMAP_SER         0x1058UL
318 #define PSYCHO_IMAP_TIM0        0x1060UL
319 #define PSYCHO_IMAP_TIM1        0x1068UL
320 #define PSYCHO_IMAP_UE          0x1070UL
321 #define PSYCHO_IMAP_CE          0x1078UL
322 #define PSYCHO_IMAP_A_ERR       0x1080UL
323 #define PSYCHO_IMAP_B_ERR       0x1088UL
324 #define PSYCHO_IMAP_PMGMT       0x1090UL
325 #define PSYCHO_IMAP_GFX         0x1098UL
326 #define PSYCHO_IMAP_EUPA        0x10a0UL
327
328 static unsigned long __psycho_onboard_imap_off[] = {
329 /*0x20*/        PSYCHO_IMAP_SCSI,
330 /*0x21*/        PSYCHO_IMAP_ETH,
331 /*0x22*/        PSYCHO_IMAP_BPP,
332 /*0x23*/        PSYCHO_IMAP_AU_REC,
333 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
334 /*0x25*/        PSYCHO_IMAP_PFAIL,
335 /*0x26*/        PSYCHO_IMAP_KMS,
336 /*0x27*/        PSYCHO_IMAP_FLPY,
337 /*0x28*/        PSYCHO_IMAP_SHW,
338 /*0x29*/        PSYCHO_IMAP_KBD,
339 /*0x2a*/        PSYCHO_IMAP_MS,
340 /*0x2b*/        PSYCHO_IMAP_SER,
341 /*0x2c*/        PSYCHO_IMAP_TIM0,
342 /*0x2d*/        PSYCHO_IMAP_TIM1,
343 /*0x2e*/        PSYCHO_IMAP_UE,
344 /*0x2f*/        PSYCHO_IMAP_CE,
345 /*0x30*/        PSYCHO_IMAP_A_ERR,
346 /*0x31*/        PSYCHO_IMAP_B_ERR,
347 /*0x32*/        PSYCHO_IMAP_PMGMT,
348 /*0x33*/        PSYCHO_IMAP_GFX,
349 /*0x34*/        PSYCHO_IMAP_EUPA,
350 };
351 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
352 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
353 #define psycho_onboard_imap_offset(__ino) \
354         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
355
356 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
357 #define PSYCHO_ICLR_SCSI        0x1800UL
358
359 #define psycho_iclr_offset(ino)                                       \
360         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
361                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
362
363 static unsigned int psycho_irq_build(struct device_node *dp,
364                                      unsigned int ino,
365                                      void *_data)
366 {
367         unsigned long controller_regs = (unsigned long) _data;
368         unsigned long imap, iclr;
369         unsigned long imap_off, iclr_off;
370         int inofixup = 0;
371
372         ino &= 0x3f;
373         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
374                 /* PCI slot */
375                 imap_off = psycho_pcislot_imap_offset(ino);
376         } else {
377                 /* Onboard device */
378                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
379                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
380                         prom_halt();
381                 }
382                 imap_off = psycho_onboard_imap_offset(ino);
383         }
384
385         /* Now build the IRQ bucket. */
386         imap = controller_regs + imap_off;
387         imap += 4;
388
389         iclr_off = psycho_iclr_offset(ino);
390         iclr = controller_regs + iclr_off;
391         iclr += 4;
392
393         if ((ino & 0x20) == 0)
394                 inofixup = ino & 0x03;
395
396         return build_irq(inofixup, iclr, imap);
397 }
398
399 static void psycho_irq_trans_init(struct device_node *dp)
400 {
401         struct linux_prom64_registers *regs;
402
403         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
404         dp->irq_trans->irq_build = psycho_irq_build;
405
406         regs = of_get_property(dp, "reg", NULL);
407         dp->irq_trans->data = (void *) regs[2].phys_addr;
408 }
409
410 #define sabre_read(__reg) \
411 ({      u64 __ret; \
412         __asm__ __volatile__("ldxa [%1] %2, %0" \
413                              : "=r" (__ret) \
414                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
415                              : "memory"); \
416         __ret; \
417 })
418
419 struct sabre_irq_data {
420         unsigned long controller_regs;
421         unsigned int pci_first_busno;
422 };
423 #define SABRE_CONFIGSPACE       0x001000000UL
424 #define SABRE_WRSYNC            0x1c20UL
425
426 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
427         (CONFIG_SPACE | (1UL << 24))
428 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
429         (((unsigned long)(BUS)   << 16) |       \
430          ((unsigned long)(DEVFN) << 8)  |       \
431          ((unsigned long)(REG)))
432
433 /* When a device lives behind a bridge deeper in the PCI bus topology
434  * than APB, a special sequence must run to make sure all pending DMA
435  * transfers at the time of IRQ delivery are visible in the coherency
436  * domain by the cpu.  This sequence is to perform a read on the far
437  * side of the non-APB bridge, then perform a read of Sabre's DMA
438  * write-sync register.
439  */
440 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
441 {
442         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
443         struct sabre_irq_data *irq_data = _arg2;
444         unsigned long controller_regs = irq_data->controller_regs;
445         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
446         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
447         unsigned int bus, devfn;
448         u16 _unused;
449
450         config_space = SABRE_CONFIG_BASE(config_space);
451
452         bus = (phys_hi >> 16) & 0xff;
453         devfn = (phys_hi >> 8) & 0xff;
454
455         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
456
457         __asm__ __volatile__("membar #Sync\n\t"
458                              "lduha [%1] %2, %0\n\t"
459                              "membar #Sync"
460                              : "=r" (_unused)
461                              : "r" ((u16 *) config_space),
462                                "i" (ASI_PHYS_BYPASS_EC_E_L)
463                              : "memory");
464
465         sabre_read(sync_reg);
466 }
467
468 #define SABRE_IMAP_A_SLOT0      0x0c00UL
469 #define SABRE_IMAP_B_SLOT0      0x0c20UL
470 #define SABRE_IMAP_SCSI         0x1000UL
471 #define SABRE_IMAP_ETH          0x1008UL
472 #define SABRE_IMAP_BPP          0x1010UL
473 #define SABRE_IMAP_AU_REC       0x1018UL
474 #define SABRE_IMAP_AU_PLAY      0x1020UL
475 #define SABRE_IMAP_PFAIL        0x1028UL
476 #define SABRE_IMAP_KMS          0x1030UL
477 #define SABRE_IMAP_FLPY         0x1038UL
478 #define SABRE_IMAP_SHW          0x1040UL
479 #define SABRE_IMAP_KBD          0x1048UL
480 #define SABRE_IMAP_MS           0x1050UL
481 #define SABRE_IMAP_SER          0x1058UL
482 #define SABRE_IMAP_UE           0x1070UL
483 #define SABRE_IMAP_CE           0x1078UL
484 #define SABRE_IMAP_PCIERR       0x1080UL
485 #define SABRE_IMAP_GFX          0x1098UL
486 #define SABRE_IMAP_EUPA         0x10a0UL
487 #define SABRE_ICLR_A_SLOT0      0x1400UL
488 #define SABRE_ICLR_B_SLOT0      0x1480UL
489 #define SABRE_ICLR_SCSI         0x1800UL
490 #define SABRE_ICLR_ETH          0x1808UL
491 #define SABRE_ICLR_BPP          0x1810UL
492 #define SABRE_ICLR_AU_REC       0x1818UL
493 #define SABRE_ICLR_AU_PLAY      0x1820UL
494 #define SABRE_ICLR_PFAIL        0x1828UL
495 #define SABRE_ICLR_KMS          0x1830UL
496 #define SABRE_ICLR_FLPY         0x1838UL
497 #define SABRE_ICLR_SHW          0x1840UL
498 #define SABRE_ICLR_KBD          0x1848UL
499 #define SABRE_ICLR_MS           0x1850UL
500 #define SABRE_ICLR_SER          0x1858UL
501 #define SABRE_ICLR_UE           0x1870UL
502 #define SABRE_ICLR_CE           0x1878UL
503 #define SABRE_ICLR_PCIERR       0x1880UL
504
505 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
506 {
507         unsigned int bus =  (ino & 0x10) >> 4;
508         unsigned int slot = (ino & 0x0c) >> 2;
509
510         if (bus == 0)
511                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
512         else
513                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
514 }
515
516 static unsigned long __sabre_onboard_imap_off[] = {
517 /*0x20*/        SABRE_IMAP_SCSI,
518 /*0x21*/        SABRE_IMAP_ETH,
519 /*0x22*/        SABRE_IMAP_BPP,
520 /*0x23*/        SABRE_IMAP_AU_REC,
521 /*0x24*/        SABRE_IMAP_AU_PLAY,
522 /*0x25*/        SABRE_IMAP_PFAIL,
523 /*0x26*/        SABRE_IMAP_KMS,
524 /*0x27*/        SABRE_IMAP_FLPY,
525 /*0x28*/        SABRE_IMAP_SHW,
526 /*0x29*/        SABRE_IMAP_KBD,
527 /*0x2a*/        SABRE_IMAP_MS,
528 /*0x2b*/        SABRE_IMAP_SER,
529 /*0x2c*/        0 /* reserved */,
530 /*0x2d*/        0 /* reserved */,
531 /*0x2e*/        SABRE_IMAP_UE,
532 /*0x2f*/        SABRE_IMAP_CE,
533 /*0x30*/        SABRE_IMAP_PCIERR,
534 /*0x31*/        0 /* reserved */,
535 /*0x32*/        0 /* reserved */,
536 /*0x33*/        SABRE_IMAP_GFX,
537 /*0x34*/        SABRE_IMAP_EUPA,
538 };
539 #define SABRE_ONBOARD_IRQ_BASE          0x20
540 #define SABRE_ONBOARD_IRQ_LAST          0x30
541 #define sabre_onboard_imap_offset(__ino) \
542         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
543
544 #define sabre_iclr_offset(ino)                                        \
545         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
546                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
547
548 static int sabre_device_needs_wsync(struct device_node *dp)
549 {
550         struct device_node *parent = dp->parent;
551         char *parent_model, *parent_compat;
552
553         /* This traversal up towards the root is meant to
554          * handle two cases:
555          *
556          * 1) non-PCI bus sitting under PCI, such as 'ebus'
557          * 2) the PCI controller interrupts themselves, which
558          *    will use the sabre_irq_build but do not need
559          *    the DMA synchronization handling
560          */
561         while (parent) {
562                 if (!strcmp(parent->type, "pci"))
563                         break;
564                 parent = parent->parent;
565         }
566
567         if (!parent)
568                 return 0;
569
570         parent_model = of_get_property(parent,
571                                        "model", NULL);
572         if (parent_model &&
573             (!strcmp(parent_model, "SUNW,sabre") ||
574              !strcmp(parent_model, "SUNW,simba")))
575                 return 0;
576
577         parent_compat = of_get_property(parent,
578                                         "compatible", NULL);
579         if (parent_compat &&
580             (!strcmp(parent_compat, "pci108e,a000") ||
581              !strcmp(parent_compat, "pci108e,a001")))
582                 return 0;
583
584         return 1;
585 }
586
587 static unsigned int sabre_irq_build(struct device_node *dp,
588                                     unsigned int ino,
589                                     void *_data)
590 {
591         struct sabre_irq_data *irq_data = _data;
592         unsigned long controller_regs = irq_data->controller_regs;
593         struct linux_prom_pci_registers *regs;
594         unsigned long imap, iclr;
595         unsigned long imap_off, iclr_off;
596         int inofixup = 0;
597         int virt_irq;
598
599         ino &= 0x3f;
600         if (ino < SABRE_ONBOARD_IRQ_BASE) {
601                 /* PCI slot */
602                 imap_off = sabre_pcislot_imap_offset(ino);
603         } else {
604                 /* onboard device */
605                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
606                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
607                         prom_halt();
608                 }
609                 imap_off = sabre_onboard_imap_offset(ino);
610         }
611
612         /* Now build the IRQ bucket. */
613         imap = controller_regs + imap_off;
614         imap += 4;
615
616         iclr_off = sabre_iclr_offset(ino);
617         iclr = controller_regs + iclr_off;
618         iclr += 4;
619
620         if ((ino & 0x20) == 0)
621                 inofixup = ino & 0x03;
622
623         virt_irq = build_irq(inofixup, iclr, imap);
624
625         /* If the parent device is a PCI<->PCI bridge other than
626          * APB, we have to install a pre-handler to ensure that
627          * all pending DMA is drained before the interrupt handler
628          * is run.
629          */
630         regs = of_get_property(dp, "reg", NULL);
631         if (regs && sabre_device_needs_wsync(dp)) {
632                 irq_install_pre_handler(virt_irq,
633                                         sabre_wsync_handler,
634                                         (void *) (long) regs->phys_hi,
635                                         (void *) irq_data);
636         }
637
638         return virt_irq;
639 }
640
641 static void sabre_irq_trans_init(struct device_node *dp)
642 {
643         struct linux_prom64_registers *regs;
644         struct sabre_irq_data *irq_data;
645         u32 *busrange;
646
647         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
648         dp->irq_trans->irq_build = sabre_irq_build;
649
650         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
651
652         regs = of_get_property(dp, "reg", NULL);
653         irq_data->controller_regs = regs[0].phys_addr;
654
655         busrange = of_get_property(dp, "bus-range", NULL);
656         irq_data->pci_first_busno = busrange[0];
657
658         dp->irq_trans->data = irq_data;
659 }
660
661 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
662  * imap/iclr registers are per-PBM.
663  */
664 #define SCHIZO_IMAP_BASE        0x1000UL
665 #define SCHIZO_ICLR_BASE        0x1400UL
666
667 static unsigned long schizo_imap_offset(unsigned long ino)
668 {
669         return SCHIZO_IMAP_BASE + (ino * 8UL);
670 }
671
672 static unsigned long schizo_iclr_offset(unsigned long ino)
673 {
674         return SCHIZO_ICLR_BASE + (ino * 8UL);
675 }
676
677 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
678                                         unsigned int ino)
679 {
680         return pbm_regs + schizo_iclr_offset(ino) + 4;
681 }
682
683 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
684                                         unsigned int ino)
685 {
686         return pbm_regs + schizo_imap_offset(ino) + 4;
687 }
688
689 #define schizo_read(__reg) \
690 ({      u64 __ret; \
691         __asm__ __volatile__("ldxa [%1] %2, %0" \
692                              : "=r" (__ret) \
693                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
694                              : "memory"); \
695         __ret; \
696 })
697 #define schizo_write(__reg, __val) \
698         __asm__ __volatile__("stxa %0, [%1] %2" \
699                              : /* no outputs */ \
700                              : "r" (__val), "r" (__reg), \
701                                "i" (ASI_PHYS_BYPASS_EC_E) \
702                              : "memory")
703
704 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
705 {
706         unsigned long sync_reg = (unsigned long) _arg2;
707         u64 mask = 1UL << (ino & IMAP_INO);
708         u64 val;
709         int limit;
710
711         schizo_write(sync_reg, mask);
712
713         limit = 100000;
714         val = 0;
715         while (--limit) {
716                 val = schizo_read(sync_reg);
717                 if (!(val & mask))
718                         break;
719         }
720         if (limit <= 0) {
721                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
722                        val, mask);
723         }
724
725         if (_arg1) {
726                 static unsigned char cacheline[64]
727                         __attribute__ ((aligned (64)));
728
729                 __asm__ __volatile__("rd %%fprs, %0\n\t"
730                                      "or %0, %4, %1\n\t"
731                                      "wr %1, 0x0, %%fprs\n\t"
732                                      "stda %%f0, [%5] %6\n\t"
733                                      "wr %0, 0x0, %%fprs\n\t"
734                                      "membar #Sync"
735                                      : "=&r" (mask), "=&r" (val)
736                                      : "0" (mask), "1" (val),
737                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
738                                      "i" (ASI_BLK_COMMIT_P));
739         }
740 }
741
742 struct schizo_irq_data {
743         unsigned long pbm_regs;
744         unsigned long sync_reg;
745         u32 portid;
746         int chip_version;
747 };
748
749 static unsigned int schizo_irq_build(struct device_node *dp,
750                                      unsigned int ino,
751                                      void *_data)
752 {
753         struct schizo_irq_data *irq_data = _data;
754         unsigned long pbm_regs = irq_data->pbm_regs;
755         unsigned long imap, iclr;
756         int ign_fixup;
757         int virt_irq;
758         int is_tomatillo;
759
760         ino &= 0x3f;
761
762         /* Now build the IRQ bucket. */
763         imap = schizo_ino_to_imap(pbm_regs, ino);
764         iclr = schizo_ino_to_iclr(pbm_regs, ino);
765
766         /* On Schizo, no inofixup occurs.  This is because each
767          * INO has it's own IMAP register.  On Psycho and Sabre
768          * there is only one IMAP register for each PCI slot even
769          * though four different INOs can be generated by each
770          * PCI slot.
771          *
772          * But, for JBUS variants (essentially, Tomatillo), we have
773          * to fixup the lowest bit of the interrupt group number.
774          */
775         ign_fixup = 0;
776
777         is_tomatillo = (irq_data->sync_reg != 0UL);
778
779         if (is_tomatillo) {
780                 if (irq_data->portid & 1)
781                         ign_fixup = (1 << 6);
782         }
783
784         virt_irq = build_irq(ign_fixup, iclr, imap);
785
786         if (is_tomatillo) {
787                 irq_install_pre_handler(virt_irq,
788                                         tomatillo_wsync_handler,
789                                         ((irq_data->chip_version <= 4) ?
790                                          (void *) 1 : (void *) 0),
791                                         (void *) irq_data->sync_reg);
792         }
793
794         return virt_irq;
795 }
796
797 static void schizo_irq_trans_init(struct device_node *dp)
798 {
799         struct linux_prom64_registers *regs;
800         struct schizo_irq_data *irq_data;
801
802         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
803         dp->irq_trans->irq_build = schizo_irq_build;
804
805         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
806
807         regs = of_get_property(dp, "reg", NULL);
808         dp->irq_trans->data = irq_data;
809
810         irq_data->pbm_regs = regs[0].phys_addr;
811         irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
812         irq_data->portid = of_getintprop_default(dp, "portid", 0);
813         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
814 }
815
816 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
817                                         unsigned int devino,
818                                         void *_data)
819 {
820         u32 devhandle = (u32) (unsigned long) _data;
821
822         return sun4v_build_irq(devhandle, devino);
823 }
824
825 static void pci_sun4v_irq_trans_init(struct device_node *dp)
826 {
827         struct linux_prom64_registers *regs;
828
829         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
830         dp->irq_trans->irq_build = pci_sun4v_irq_build;
831
832         regs = of_get_property(dp, "reg", NULL);
833         dp->irq_trans->data = (void *) (unsigned long)
834                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
835 }
836 #endif /* CONFIG_PCI */
837
838 #ifdef CONFIG_SBUS
839 /* INO number to IMAP register offset for SYSIO external IRQ's.
840  * This should conform to both Sunfire/Wildfire server and Fusion
841  * desktop designs.
842  */
843 #define SYSIO_IMAP_SLOT0        0x2c04UL
844 #define SYSIO_IMAP_SLOT1        0x2c0cUL
845 #define SYSIO_IMAP_SLOT2        0x2c14UL
846 #define SYSIO_IMAP_SLOT3        0x2c1cUL
847 #define SYSIO_IMAP_SCSI         0x3004UL
848 #define SYSIO_IMAP_ETH          0x300cUL
849 #define SYSIO_IMAP_BPP          0x3014UL
850 #define SYSIO_IMAP_AUDIO        0x301cUL
851 #define SYSIO_IMAP_PFAIL        0x3024UL
852 #define SYSIO_IMAP_KMS          0x302cUL
853 #define SYSIO_IMAP_FLPY         0x3034UL
854 #define SYSIO_IMAP_SHW          0x303cUL
855 #define SYSIO_IMAP_KBD          0x3044UL
856 #define SYSIO_IMAP_MS           0x304cUL
857 #define SYSIO_IMAP_SER          0x3054UL
858 #define SYSIO_IMAP_TIM0         0x3064UL
859 #define SYSIO_IMAP_TIM1         0x306cUL
860 #define SYSIO_IMAP_UE           0x3074UL
861 #define SYSIO_IMAP_CE           0x307cUL
862 #define SYSIO_IMAP_SBERR        0x3084UL
863 #define SYSIO_IMAP_PMGMT        0x308cUL
864 #define SYSIO_IMAP_GFX          0x3094UL
865 #define SYSIO_IMAP_EUPA         0x309cUL
866
867 #define bogon     ((unsigned long) -1)
868 static unsigned long sysio_irq_offsets[] = {
869         /* SBUS Slot 0 --> 3, level 1 --> 7 */
870         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
871         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
872         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
873         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
874         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
875         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
876         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
877         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
878
879         /* Onboard devices (not relevant/used on SunFire). */
880         SYSIO_IMAP_SCSI,
881         SYSIO_IMAP_ETH,
882         SYSIO_IMAP_BPP,
883         bogon,
884         SYSIO_IMAP_AUDIO,
885         SYSIO_IMAP_PFAIL,
886         bogon,
887         bogon,
888         SYSIO_IMAP_KMS,
889         SYSIO_IMAP_FLPY,
890         SYSIO_IMAP_SHW,
891         SYSIO_IMAP_KBD,
892         SYSIO_IMAP_MS,
893         SYSIO_IMAP_SER,
894         bogon,
895         bogon,
896         SYSIO_IMAP_TIM0,
897         SYSIO_IMAP_TIM1,
898         bogon,
899         bogon,
900         SYSIO_IMAP_UE,
901         SYSIO_IMAP_CE,
902         SYSIO_IMAP_SBERR,
903         SYSIO_IMAP_PMGMT,
904         SYSIO_IMAP_GFX,
905         SYSIO_IMAP_EUPA,
906 };
907
908 #undef bogon
909
910 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
911
912 /* Convert Interrupt Mapping register pointer to associated
913  * Interrupt Clear register pointer, SYSIO specific version.
914  */
915 #define SYSIO_ICLR_UNUSED0      0x3400UL
916 #define SYSIO_ICLR_SLOT0        0x340cUL
917 #define SYSIO_ICLR_SLOT1        0x344cUL
918 #define SYSIO_ICLR_SLOT2        0x348cUL
919 #define SYSIO_ICLR_SLOT3        0x34ccUL
920 static unsigned long sysio_imap_to_iclr(unsigned long imap)
921 {
922         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
923         return imap + diff;
924 }
925
926 static unsigned int sbus_of_build_irq(struct device_node *dp,
927                                       unsigned int ino,
928                                       void *_data)
929 {
930         unsigned long reg_base = (unsigned long) _data;
931         struct linux_prom_registers *regs;
932         unsigned long imap, iclr;
933         int sbus_slot = 0;
934         int sbus_level = 0;
935
936         ino &= 0x3f;
937
938         regs = of_get_property(dp, "reg", NULL);
939         if (regs)
940                 sbus_slot = regs->which_io;
941
942         if (ino < 0x20)
943                 ino += (sbus_slot * 8);
944
945         imap = sysio_irq_offsets[ino];
946         if (imap == ((unsigned long)-1)) {
947                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
948                             ino);
949                 prom_halt();
950         }
951         imap += reg_base;
952
953         /* SYSIO inconsistency.  For external SLOTS, we have to select
954          * the right ICLR register based upon the lower SBUS irq level
955          * bits.
956          */
957         if (ino >= 0x20) {
958                 iclr = sysio_imap_to_iclr(imap);
959         } else {
960                 sbus_level = ino & 0x7;
961
962                 switch(sbus_slot) {
963                 case 0:
964                         iclr = reg_base + SYSIO_ICLR_SLOT0;
965                         break;
966                 case 1:
967                         iclr = reg_base + SYSIO_ICLR_SLOT1;
968                         break;
969                 case 2:
970                         iclr = reg_base + SYSIO_ICLR_SLOT2;
971                         break;
972                 default:
973                 case 3:
974                         iclr = reg_base + SYSIO_ICLR_SLOT3;
975                         break;
976                 };
977
978                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
979         }
980         return build_irq(sbus_level, iclr, imap);
981 }
982
983 static void sbus_irq_trans_init(struct device_node *dp)
984 {
985         struct linux_prom64_registers *regs;
986
987         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
988         dp->irq_trans->irq_build = sbus_of_build_irq;
989
990         regs = of_get_property(dp, "reg", NULL);
991         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
992 }
993 #endif /* CONFIG_SBUS */
994
995
996 static unsigned int central_build_irq(struct device_node *dp,
997                                       unsigned int ino,
998                                       void *_data)
999 {
1000         struct device_node *central_dp = _data;
1001         struct of_device *central_op = of_find_device_by_node(central_dp);
1002         struct resource *res;
1003         unsigned long imap, iclr;
1004         u32 tmp;
1005
1006         if (!strcmp(dp->name, "eeprom")) {
1007                 res = &central_op->resource[5];
1008         } else if (!strcmp(dp->name, "zs")) {
1009                 res = &central_op->resource[4];
1010         } else if (!strcmp(dp->name, "clock-board")) {
1011                 res = &central_op->resource[3];
1012         } else {
1013                 return ino;
1014         }
1015
1016         imap = res->start + 0x00UL;
1017         iclr = res->start + 0x10UL;
1018
1019         /* Set the INO state to idle, and disable.  */
1020         upa_writel(0, iclr);
1021         upa_readl(iclr);
1022
1023         tmp = upa_readl(imap);
1024         tmp &= ~0x80000000;
1025         upa_writel(tmp, imap);
1026
1027         return build_irq(0, iclr, imap);
1028 }
1029
1030 static void central_irq_trans_init(struct device_node *dp)
1031 {
1032         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1033         dp->irq_trans->irq_build = central_build_irq;
1034
1035         dp->irq_trans->data = dp;
1036 }
1037
1038 struct irq_trans {
1039         const char *name;
1040         void (*init)(struct device_node *);
1041 };
1042
1043 #ifdef CONFIG_PCI
1044 static struct irq_trans pci_irq_trans_table[] = {
1045         { "SUNW,sabre", sabre_irq_trans_init },
1046         { "pci108e,a000", sabre_irq_trans_init },
1047         { "pci108e,a001", sabre_irq_trans_init },
1048         { "SUNW,psycho", psycho_irq_trans_init },
1049         { "pci108e,8000", psycho_irq_trans_init },
1050         { "SUNW,schizo", schizo_irq_trans_init },
1051         { "pci108e,8001", schizo_irq_trans_init },
1052         { "SUNW,schizo+", schizo_irq_trans_init },
1053         { "pci108e,8002", schizo_irq_trans_init },
1054         { "SUNW,tomatillo", schizo_irq_trans_init },
1055         { "pci108e,a801", schizo_irq_trans_init },
1056         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1057 };
1058 #endif
1059
1060 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1061                                          unsigned int devino,
1062                                          void *_data)
1063 {
1064         u32 devhandle = (u32) (unsigned long) _data;
1065
1066         return sun4v_build_irq(devhandle, devino);
1067 }
1068
1069 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1070 {
1071         struct linux_prom64_registers *regs;
1072
1073         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1074         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1075
1076         regs = of_get_property(dp, "reg", NULL);
1077         dp->irq_trans->data = (void *) (unsigned long)
1078                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1079 }
1080
1081 static void irq_trans_init(struct device_node *dp)
1082 {
1083         const char *model;
1084 #ifdef CONFIG_PCI
1085         int i;
1086 #endif
1087
1088         model = of_get_property(dp, "model", NULL);
1089         if (!model)
1090                 model = of_get_property(dp, "compatible", NULL);
1091         if (!model)
1092                 return;
1093
1094 #ifdef CONFIG_PCI
1095         for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1096                 struct irq_trans *t = &pci_irq_trans_table[i];
1097
1098                 if (!strcmp(model, t->name))
1099                         return t->init(dp);
1100         }
1101 #endif
1102 #ifdef CONFIG_SBUS
1103         if (!strcmp(dp->name, "sbus") ||
1104             !strcmp(dp->name, "sbi"))
1105                 return sbus_irq_trans_init(dp);
1106 #endif
1107         if (!strcmp(dp->name, "central"))
1108                 return central_irq_trans_init(dp->child);
1109         if (!strcmp(dp->name, "virtual-devices"))
1110                 return sun4v_vdev_irq_trans_init(dp);
1111 }
1112
1113 static int is_root_node(const struct device_node *dp)
1114 {
1115         if (!dp)
1116                 return 0;
1117
1118         return (dp->parent == NULL);
1119 }
1120
1121 /* The following routines deal with the black magic of fully naming a
1122  * node.
1123  *
1124  * Certain well known named nodes are just the simple name string.
1125  *
1126  * Actual devices have an address specifier appended to the base name
1127  * string, like this "foo@addr".  The "addr" can be in any number of
1128  * formats, and the platform plus the type of the node determine the
1129  * format and how it is constructed.
1130  *
1131  * For children of the ROOT node, the naming convention is fixed and
1132  * determined by whether this is a sun4u or sun4v system.
1133  *
1134  * For children of other nodes, it is bus type specific.  So
1135  * we walk up the tree until we discover a "device_type" property
1136  * we recognize and we go from there.
1137  *
1138  * As an example, the boot device on my workstation has a full path:
1139  *
1140  *      /pci@1e,600000/ide@d/disk@0,0:c
1141  */
1142 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1143 {
1144         struct linux_prom64_registers *regs;
1145         struct property *rprop;
1146         u32 high_bits, low_bits, type;
1147
1148         rprop = of_find_property(dp, "reg", NULL);
1149         if (!rprop)
1150                 return;
1151
1152         regs = rprop->value;
1153         if (!is_root_node(dp->parent)) {
1154                 sprintf(tmp_buf, "%s@%x,%x",
1155                         dp->name,
1156                         (unsigned int) (regs->phys_addr >> 32UL),
1157                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1158                 return;
1159         }
1160
1161         type = regs->phys_addr >> 60UL;
1162         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1163         low_bits = (regs->phys_addr & 0xffffffffUL);
1164
1165         if (type == 0 || type == 8) {
1166                 const char *prefix = (type == 0) ? "m" : "i";
1167
1168                 if (low_bits)
1169                         sprintf(tmp_buf, "%s@%s%x,%x",
1170                                 dp->name, prefix,
1171                                 high_bits, low_bits);
1172                 else
1173                         sprintf(tmp_buf, "%s@%s%x",
1174                                 dp->name,
1175                                 prefix,
1176                                 high_bits);
1177         } else if (type == 12) {
1178                 sprintf(tmp_buf, "%s@%x",
1179                         dp->name, high_bits);
1180         }
1181 }
1182
1183 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1184 {
1185         struct linux_prom64_registers *regs;
1186         struct property *prop;
1187
1188         prop = of_find_property(dp, "reg", NULL);
1189         if (!prop)
1190                 return;
1191
1192         regs = prop->value;
1193         if (!is_root_node(dp->parent)) {
1194                 sprintf(tmp_buf, "%s@%x,%x",
1195                         dp->name,
1196                         (unsigned int) (regs->phys_addr >> 32UL),
1197                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1198                 return;
1199         }
1200
1201         prop = of_find_property(dp, "upa-portid", NULL);
1202         if (!prop)
1203                 prop = of_find_property(dp, "portid", NULL);
1204         if (prop) {
1205                 unsigned long mask = 0xffffffffUL;
1206
1207                 if (tlb_type >= cheetah)
1208                         mask = 0x7fffff;
1209
1210                 sprintf(tmp_buf, "%s@%x,%x",
1211                         dp->name,
1212                         *(u32 *)prop->value,
1213                         (unsigned int) (regs->phys_addr & mask));
1214         }
1215 }
1216
1217 /* "name@slot,offset"  */
1218 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1219 {
1220         struct linux_prom_registers *regs;
1221         struct property *prop;
1222
1223         prop = of_find_property(dp, "reg", NULL);
1224         if (!prop)
1225                 return;
1226
1227         regs = prop->value;
1228         sprintf(tmp_buf, "%s@%x,%x",
1229                 dp->name,
1230                 regs->which_io,
1231                 regs->phys_addr);
1232 }
1233
1234 /* "name@devnum[,func]" */
1235 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1236 {
1237         struct linux_prom_pci_registers *regs;
1238         struct property *prop;
1239         unsigned int devfn;
1240
1241         prop = of_find_property(dp, "reg", NULL);
1242         if (!prop)
1243                 return;
1244
1245         regs = prop->value;
1246         devfn = (regs->phys_hi >> 8) & 0xff;
1247         if (devfn & 0x07) {
1248                 sprintf(tmp_buf, "%s@%x,%x",
1249                         dp->name,
1250                         devfn >> 3,
1251                         devfn & 0x07);
1252         } else {
1253                 sprintf(tmp_buf, "%s@%x",
1254                         dp->name,
1255                         devfn >> 3);
1256         }
1257 }
1258
1259 /* "name@UPA_PORTID,offset" */
1260 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1261 {
1262         struct linux_prom64_registers *regs;
1263         struct property *prop;
1264
1265         prop = of_find_property(dp, "reg", NULL);
1266         if (!prop)
1267                 return;
1268
1269         regs = prop->value;
1270
1271         prop = of_find_property(dp, "upa-portid", NULL);
1272         if (!prop)
1273                 return;
1274
1275         sprintf(tmp_buf, "%s@%x,%x",
1276                 dp->name,
1277                 *(u32 *) prop->value,
1278                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1279 }
1280
1281 /* "name@reg" */
1282 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1283 {
1284         struct property *prop;
1285         u32 *regs;
1286
1287         prop = of_find_property(dp, "reg", NULL);
1288         if (!prop)
1289                 return;
1290
1291         regs = prop->value;
1292
1293         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1294 }
1295
1296 /* "name@addrhi,addrlo" */
1297 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1298 {
1299         struct linux_prom64_registers *regs;
1300         struct property *prop;
1301
1302         prop = of_find_property(dp, "reg", NULL);
1303         if (!prop)
1304                 return;
1305
1306         regs = prop->value;
1307
1308         sprintf(tmp_buf, "%s@%x,%x",
1309                 dp->name,
1310                 (unsigned int) (regs->phys_addr >> 32UL),
1311                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1312 }
1313
1314 /* "name@bus,addr" */
1315 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1316 {
1317         struct property *prop;
1318         u32 *regs;
1319
1320         prop = of_find_property(dp, "reg", NULL);
1321         if (!prop)
1322                 return;
1323
1324         regs = prop->value;
1325
1326         /* This actually isn't right... should look at the #address-cells
1327          * property of the i2c bus node etc. etc.
1328          */
1329         sprintf(tmp_buf, "%s@%x,%x",
1330                 dp->name, regs[0], regs[1]);
1331 }
1332
1333 /* "name@reg0[,reg1]" */
1334 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1335 {
1336         struct property *prop;
1337         u32 *regs;
1338
1339         prop = of_find_property(dp, "reg", NULL);
1340         if (!prop)
1341                 return;
1342
1343         regs = prop->value;
1344
1345         if (prop->length == sizeof(u32) || regs[1] == 1) {
1346                 sprintf(tmp_buf, "%s@%x",
1347                         dp->name, regs[0]);
1348         } else {
1349                 sprintf(tmp_buf, "%s@%x,%x",
1350                         dp->name, regs[0], regs[1]);
1351         }
1352 }
1353
1354 /* "name@reg0reg1[,reg2reg3]" */
1355 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1356 {
1357         struct property *prop;
1358         u32 *regs;
1359
1360         prop = of_find_property(dp, "reg", NULL);
1361         if (!prop)
1362                 return;
1363
1364         regs = prop->value;
1365
1366         if (regs[2] || regs[3]) {
1367                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1368                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1369         } else {
1370                 sprintf(tmp_buf, "%s@%08x%08x",
1371                         dp->name, regs[0], regs[1]);
1372         }
1373 }
1374
1375 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1376 {
1377         struct device_node *parent = dp->parent;
1378
1379         if (parent != NULL) {
1380                 if (!strcmp(parent->type, "pci") ||
1381                     !strcmp(parent->type, "pciex"))
1382                         return pci_path_component(dp, tmp_buf);
1383                 if (!strcmp(parent->type, "sbus"))
1384                         return sbus_path_component(dp, tmp_buf);
1385                 if (!strcmp(parent->type, "upa"))
1386                         return upa_path_component(dp, tmp_buf);
1387                 if (!strcmp(parent->type, "ebus"))
1388                         return ebus_path_component(dp, tmp_buf);
1389                 if (!strcmp(parent->name, "usb") ||
1390                     !strcmp(parent->name, "hub"))
1391                         return usb_path_component(dp, tmp_buf);
1392                 if (!strcmp(parent->type, "i2c"))
1393                         return i2c_path_component(dp, tmp_buf);
1394                 if (!strcmp(parent->type, "firewire"))
1395                         return ieee1394_path_component(dp, tmp_buf);
1396                 if (!strcmp(parent->type, "virtual-devices"))
1397                         return vdev_path_component(dp, tmp_buf);
1398
1399                 /* "isa" is handled with platform naming */
1400         }
1401
1402         /* Use platform naming convention.  */
1403         if (tlb_type == hypervisor)
1404                 return sun4v_path_component(dp, tmp_buf);
1405         else
1406                 return sun4u_path_component(dp, tmp_buf);
1407 }
1408
1409 static char * __init build_path_component(struct device_node *dp)
1410 {
1411         char tmp_buf[64], *n;
1412
1413         tmp_buf[0] = '\0';
1414         __build_path_component(dp, tmp_buf);
1415         if (tmp_buf[0] == '\0')
1416                 strcpy(tmp_buf, dp->name);
1417
1418         n = prom_early_alloc(strlen(tmp_buf) + 1);
1419         strcpy(n, tmp_buf);
1420
1421         return n;
1422 }
1423
1424 static char * __init build_full_name(struct device_node *dp)
1425 {
1426         int len, ourlen, plen;
1427         char *n;
1428
1429         plen = strlen(dp->parent->full_name);
1430         ourlen = strlen(dp->path_component_name);
1431         len = ourlen + plen + 2;
1432
1433         n = prom_early_alloc(len);
1434         strcpy(n, dp->parent->full_name);
1435         if (!is_root_node(dp->parent)) {
1436                 strcpy(n + plen, "/");
1437                 plen++;
1438         }
1439         strcpy(n + plen, dp->path_component_name);
1440
1441         return n;
1442 }
1443
1444 static unsigned int unique_id;
1445
1446 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1447 {
1448         static struct property *tmp = NULL;
1449         struct property *p;
1450
1451         if (tmp) {
1452                 p = tmp;
1453                 memset(p, 0, sizeof(*p) + 32);
1454                 tmp = NULL;
1455         } else {
1456                 p = prom_early_alloc(sizeof(struct property) + 32);
1457                 p->unique_id = unique_id++;
1458         }
1459
1460         p->name = (char *) (p + 1);
1461         if (special_name) {
1462                 strcpy(p->name, special_name);
1463                 p->length = special_len;
1464                 p->value = prom_early_alloc(special_len);
1465                 memcpy(p->value, special_val, special_len);
1466         } else {
1467                 if (prev == NULL) {
1468                         prom_firstprop(node, p->name);
1469                 } else {
1470                         prom_nextprop(node, prev, p->name);
1471                 }
1472                 if (strlen(p->name) == 0) {
1473                         tmp = p;
1474                         return NULL;
1475                 }
1476                 p->length = prom_getproplen(node, p->name);
1477                 if (p->length <= 0) {
1478                         p->length = 0;
1479                 } else {
1480                         p->value = prom_early_alloc(p->length + 1);
1481                         prom_getproperty(node, p->name, p->value, p->length);
1482                         ((unsigned char *)p->value)[p->length] = '\0';
1483                 }
1484         }
1485         return p;
1486 }
1487
1488 static struct property * __init build_prop_list(phandle node)
1489 {
1490         struct property *head, *tail;
1491
1492         head = tail = build_one_prop(node, NULL,
1493                                      ".node", &node, sizeof(node));
1494
1495         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1496         tail = tail->next;
1497         while(tail) {
1498                 tail->next = build_one_prop(node, tail->name,
1499                                             NULL, NULL, 0);
1500                 tail = tail->next;
1501         }
1502
1503         return head;
1504 }
1505
1506 static char * __init get_one_property(phandle node, const char *name)
1507 {
1508         char *buf = "<NULL>";
1509         int len;
1510
1511         len = prom_getproplen(node, name);
1512         if (len > 0) {
1513                 buf = prom_early_alloc(len);
1514                 prom_getproperty(node, name, buf, len);
1515         }
1516
1517         return buf;
1518 }
1519
1520 static struct device_node * __init create_node(phandle node)
1521 {
1522         struct device_node *dp;
1523
1524         if (!node)
1525                 return NULL;
1526
1527         dp = prom_early_alloc(sizeof(*dp));
1528         dp->unique_id = unique_id++;
1529
1530         kref_init(&dp->kref);
1531
1532         dp->name = get_one_property(node, "name");
1533         dp->type = get_one_property(node, "device_type");
1534         dp->node = node;
1535
1536         dp->properties = build_prop_list(node);
1537
1538         irq_trans_init(dp);
1539
1540         return dp;
1541 }
1542
1543 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1544 {
1545         struct device_node *dp;
1546
1547         dp = create_node(node);
1548         if (dp) {
1549                 *(*nextp) = dp;
1550                 *nextp = &dp->allnext;
1551
1552                 dp->parent = parent;
1553                 dp->path_component_name = build_path_component(dp);
1554                 dp->full_name = build_full_name(dp);
1555
1556                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1557
1558                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1559         }
1560
1561         return dp;
1562 }
1563
1564 void __init prom_build_devicetree(void)
1565 {
1566         struct device_node **nextp;
1567
1568         allnodes = create_node(prom_root_node);
1569         allnodes->path_component_name = "";
1570         allnodes->full_name = "/";
1571
1572         nextp = &allnodes->allnext;
1573         allnodes->child = build_tree(allnodes,
1574                                      prom_getchild(allnodes->node),
1575                                      &nextp);
1576         printk("PROM: Built device tree with %u bytes of memory.\n",
1577                prom_early_allocated);
1578 }