2 * linux/arch/sh/boards/se/7722/setup.c
4 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 * Hitachi UL SolutionEngine 7722 Support.
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pata_platform.h>
16 #include <asm/machvec.h>
17 #include <asm/se7722.h>
21 static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
23 static struct resource heartbeat_resources[] = {
26 .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
27 .flags = IORESOURCE_MEM,
31 static struct platform_device heartbeat_device = {
35 .platform_data = heartbeat_bit_pos,
37 .num_resources = ARRAY_SIZE(heartbeat_resources),
38 .resource = heartbeat_resources,
42 static struct resource smc91x_eth_resources[] = {
44 .name = "smc91x-regs" ,
45 .start = PA_LAN + 0x300,
46 .end = PA_LAN + 0x300 + 0x10 ,
47 .flags = IORESOURCE_MEM,
52 .flags = IORESOURCE_IRQ,
56 static struct platform_device smc91x_eth_device = {
60 .dma_mask = NULL, /* don't use dma */
61 .coherent_dma_mask = 0xffffffff,
63 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
64 .resource = smc91x_eth_resources,
67 static struct resource cf_ide_resources[] = {
69 .start = PA_MRSHPC_IO + 0x1f0,
70 .end = PA_MRSHPC_IO + 0x1f0 + 8 ,
71 .flags = IORESOURCE_IO,
74 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
75 .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
76 .flags = IORESOURCE_IO,
81 .flags = IORESOURCE_IRQ,
85 static struct platform_device cf_ide_device = {
86 .name = "pata_platform",
88 .num_resources = ARRAY_SIZE(cf_ide_resources),
89 .resource = cf_ide_resources,
92 static struct platform_device *se7722_devices[] __initdata = {
98 static int __init se7722_devices_setup(void)
100 return platform_add_devices(se7722_devices,
101 ARRAY_SIZE(se7722_devices));
103 device_initcall(se7722_devices_setup);
105 static void __init se7722_setup(char **cmdline_p)
107 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */
109 ctrl_outl(0x00051001, MSTPCR0);
110 ctrl_outl(0x00000000, MSTPCR1);
111 /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */
112 ctrl_outl(0xffffbfC0, MSTPCR2);
114 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
115 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
118 ctrl_outw(0x0020, PORT_PSELD);
121 ctrl_outw(0x0003, PORT_PSELB);
122 ctrl_outw(0xe000, PORT_PSELC);
123 ctrl_outw(0x0000, PORT_PKCR);
126 ctrl_outw(0x4020, PORT_PHCR);
127 ctrl_outw(0x0000, PORT_PLCR);
128 ctrl_outw(0x0000, PORT_PMCR);
129 ctrl_outw(0x0002, PORT_PRCR);
130 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */
133 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
134 ctrl_outw(0x0000, PORT_PYCR);
135 ctrl_outw(0x0000, PORT_PZCR);
141 static struct sh_machine_vector mv_se7722 __initmv = {
142 .mv_name = "Solution Engine 7722" ,
143 .mv_setup = se7722_setup ,
144 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR,
145 .mv_init_irq = init_se7722_IRQ,