KVM: ppc: Handle guest idle by emulating MSR[WE] writes
[linux-2.6.git] / arch / powerpc / kvm / booke_guest.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  *
17  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
19  */
20
21 #include <linux/errno.h>
22 #include <linux/err.h>
23 #include <linux/kvm_host.h>
24 #include <linux/module.h>
25 #include <linux/vmalloc.h>
26 #include <linux/fs.h>
27 #include <asm/cputable.h>
28 #include <asm/uaccess.h>
29 #include <asm/kvm_ppc.h>
30
31 #include "44x_tlb.h"
32
33 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
34 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35
36 struct kvm_stats_debugfs_item debugfs_entries[] = {
37         { "exits",      VCPU_STAT(sum_exits) },
38         { "mmio",       VCPU_STAT(mmio_exits) },
39         { "dcr",        VCPU_STAT(dcr_exits) },
40         { "sig",        VCPU_STAT(signal_exits) },
41         { "light",      VCPU_STAT(light_exits) },
42         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
43         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
44         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
45         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
46         { "sysc",       VCPU_STAT(syscall_exits) },
47         { "isi",        VCPU_STAT(isi_exits) },
48         { "dsi",        VCPU_STAT(dsi_exits) },
49         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
50         { "dec",        VCPU_STAT(dec_exits) },
51         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
52         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
53         { NULL }
54 };
55
56 static const u32 interrupt_msr_mask[16] = {
57         [BOOKE_INTERRUPT_CRITICAL]      = MSR_ME,
58         [BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
59         [BOOKE_INTERRUPT_DATA_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
60         [BOOKE_INTERRUPT_INST_STORAGE]  = MSR_CE|MSR_ME|MSR_DE,
61         [BOOKE_INTERRUPT_EXTERNAL]      = MSR_CE|MSR_ME|MSR_DE,
62         [BOOKE_INTERRUPT_ALIGNMENT]     = MSR_CE|MSR_ME|MSR_DE,
63         [BOOKE_INTERRUPT_PROGRAM]       = MSR_CE|MSR_ME|MSR_DE,
64         [BOOKE_INTERRUPT_FP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
65         [BOOKE_INTERRUPT_SYSCALL]       = MSR_CE|MSR_ME|MSR_DE,
66         [BOOKE_INTERRUPT_AP_UNAVAIL]    = MSR_CE|MSR_ME|MSR_DE,
67         [BOOKE_INTERRUPT_DECREMENTER]   = MSR_CE|MSR_ME|MSR_DE,
68         [BOOKE_INTERRUPT_FIT]           = MSR_CE|MSR_ME|MSR_DE,
69         [BOOKE_INTERRUPT_WATCHDOG]      = MSR_ME,
70         [BOOKE_INTERRUPT_DTLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
71         [BOOKE_INTERRUPT_ITLB_MISS]     = MSR_CE|MSR_ME|MSR_DE,
72         [BOOKE_INTERRUPT_DEBUG]         = MSR_ME,
73 };
74
75 const unsigned char exception_priority[] = {
76         [BOOKE_INTERRUPT_DATA_STORAGE] = 0,
77         [BOOKE_INTERRUPT_INST_STORAGE] = 1,
78         [BOOKE_INTERRUPT_ALIGNMENT] = 2,
79         [BOOKE_INTERRUPT_PROGRAM] = 3,
80         [BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
81         [BOOKE_INTERRUPT_SYSCALL] = 5,
82         [BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
83         [BOOKE_INTERRUPT_DTLB_MISS] = 7,
84         [BOOKE_INTERRUPT_ITLB_MISS] = 8,
85         [BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
86         [BOOKE_INTERRUPT_DEBUG] = 10,
87         [BOOKE_INTERRUPT_CRITICAL] = 11,
88         [BOOKE_INTERRUPT_WATCHDOG] = 12,
89         [BOOKE_INTERRUPT_EXTERNAL] = 13,
90         [BOOKE_INTERRUPT_FIT] = 14,
91         [BOOKE_INTERRUPT_DECREMENTER] = 15,
92 };
93
94 const unsigned char priority_exception[] = {
95         BOOKE_INTERRUPT_DATA_STORAGE,
96         BOOKE_INTERRUPT_INST_STORAGE,
97         BOOKE_INTERRUPT_ALIGNMENT,
98         BOOKE_INTERRUPT_PROGRAM,
99         BOOKE_INTERRUPT_FP_UNAVAIL,
100         BOOKE_INTERRUPT_SYSCALL,
101         BOOKE_INTERRUPT_AP_UNAVAIL,
102         BOOKE_INTERRUPT_DTLB_MISS,
103         BOOKE_INTERRUPT_ITLB_MISS,
104         BOOKE_INTERRUPT_MACHINE_CHECK,
105         BOOKE_INTERRUPT_DEBUG,
106         BOOKE_INTERRUPT_CRITICAL,
107         BOOKE_INTERRUPT_WATCHDOG,
108         BOOKE_INTERRUPT_EXTERNAL,
109         BOOKE_INTERRUPT_FIT,
110         BOOKE_INTERRUPT_DECREMENTER,
111 };
112
113
114 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
115 {
116         struct tlbe *tlbe;
117         int i;
118
119         printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
120         printk("| %2s | %3s | %8s | %8s | %8s |\n",
121                         "nr", "tid", "word0", "word1", "word2");
122
123         for (i = 0; i < PPC44x_TLB_SIZE; i++) {
124                 tlbe = &vcpu->arch.guest_tlb[i];
125                 if (tlbe->word0 & PPC44x_TLB_VALID)
126                         printk(" G%2d |  %02X | %08X | %08X | %08X |\n",
127                                i, tlbe->tid, tlbe->word0, tlbe->word1,
128                                tlbe->word2);
129         }
130
131         for (i = 0; i < PPC44x_TLB_SIZE; i++) {
132                 tlbe = &vcpu->arch.shadow_tlb[i];
133                 if (tlbe->word0 & PPC44x_TLB_VALID)
134                         printk(" S%2d | %02X | %08X | %08X | %08X |\n",
135                                i, tlbe->tid, tlbe->word0, tlbe->word1,
136                                tlbe->word2);
137         }
138 }
139
140 /* TODO: use vcpu_printf() */
141 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
142 {
143         int i;
144
145         printk("pc:   %08x msr:  %08x\n", vcpu->arch.pc, vcpu->arch.msr);
146         printk("lr:   %08x ctr:  %08x\n", vcpu->arch.lr, vcpu->arch.ctr);
147         printk("srr0: %08x srr1: %08x\n", vcpu->arch.srr0, vcpu->arch.srr1);
148
149         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
150
151         for (i = 0; i < 32; i += 4) {
152                 printk("gpr%02d: %08x %08x %08x %08x\n", i,
153                        vcpu->arch.gpr[i],
154                        vcpu->arch.gpr[i+1],
155                        vcpu->arch.gpr[i+2],
156                        vcpu->arch.gpr[i+3]);
157         }
158 }
159
160 /* Check if we are ready to deliver the interrupt */
161 static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
162 {
163         int r;
164
165         switch (interrupt) {
166         case BOOKE_INTERRUPT_CRITICAL:
167                 r = vcpu->arch.msr & MSR_CE;
168                 break;
169         case BOOKE_INTERRUPT_MACHINE_CHECK:
170                 r = vcpu->arch.msr & MSR_ME;
171                 break;
172         case BOOKE_INTERRUPT_EXTERNAL:
173                 r = vcpu->arch.msr & MSR_EE;
174                 break;
175         case BOOKE_INTERRUPT_DECREMENTER:
176                 r = vcpu->arch.msr & MSR_EE;
177                 break;
178         case BOOKE_INTERRUPT_FIT:
179                 r = vcpu->arch.msr & MSR_EE;
180                 break;
181         case BOOKE_INTERRUPT_WATCHDOG:
182                 r = vcpu->arch.msr & MSR_CE;
183                 break;
184         case BOOKE_INTERRUPT_DEBUG:
185                 r = vcpu->arch.msr & MSR_DE;
186                 break;
187         default:
188                 r = 1;
189         }
190
191         return r;
192 }
193
194 static void kvmppc_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
195 {
196         switch (interrupt) {
197         case BOOKE_INTERRUPT_DECREMENTER:
198                 vcpu->arch.tsr |= TSR_DIS;
199                 break;
200         }
201
202         vcpu->arch.srr0 = vcpu->arch.pc;
203         vcpu->arch.srr1 = vcpu->arch.msr;
204         vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
205         kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
206 }
207
208 /* Check pending exceptions and deliver one, if possible. */
209 void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu)
210 {
211         unsigned long *pending = &vcpu->arch.pending_exceptions;
212         unsigned int exception;
213         unsigned int priority;
214
215         priority = find_first_bit(pending, BITS_PER_BYTE * sizeof(*pending));
216         while (priority <= BOOKE_MAX_INTERRUPT) {
217                 exception = priority_exception[priority];
218                 if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
219                         kvmppc_clear_exception(vcpu, exception);
220                         kvmppc_deliver_interrupt(vcpu, exception);
221                         break;
222                 }
223
224                 priority = find_next_bit(pending,
225                                          BITS_PER_BYTE * sizeof(*pending),
226                                          priority + 1);
227         }
228 }
229
230 static int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
231 {
232         enum emulation_result er;
233         int r;
234
235         er = kvmppc_emulate_instruction(run, vcpu);
236         switch (er) {
237         case EMULATE_DONE:
238                 /* Future optimization: only reload non-volatiles if they were
239                  * actually modified. */
240                 r = RESUME_GUEST_NV;
241                 break;
242         case EMULATE_DO_MMIO:
243                 run->exit_reason = KVM_EXIT_MMIO;
244                 /* We must reload nonvolatiles because "update" load/store
245                  * instructions modify register state. */
246                 /* Future optimization: only reload non-volatiles if they were
247                  * actually modified. */
248                 r = RESUME_HOST_NV;
249                 break;
250         case EMULATE_FAIL:
251                 /* XXX Deliver Program interrupt to guest. */
252                 printk(KERN_EMERG "%s: emulation failed (%08x)\n", __func__,
253                        vcpu->arch.last_inst);
254                 r = RESUME_HOST;
255                 break;
256         default:
257                 BUG();
258         }
259
260         return r;
261 }
262
263 /**
264  * kvmppc_handle_exit
265  *
266  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
267  */
268 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
269                        unsigned int exit_nr)
270 {
271         enum emulation_result er;
272         int r = RESUME_HOST;
273
274         local_irq_enable();
275
276         run->exit_reason = KVM_EXIT_UNKNOWN;
277         run->ready_for_interrupt_injection = 1;
278
279         switch (exit_nr) {
280         case BOOKE_INTERRUPT_MACHINE_CHECK:
281                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
282                 kvmppc_dump_vcpu(vcpu);
283                 r = RESUME_HOST;
284                 break;
285
286         case BOOKE_INTERRUPT_EXTERNAL:
287         case BOOKE_INTERRUPT_DECREMENTER:
288                 /* Since we switched IVPR back to the host's value, the host
289                  * handled this interrupt the moment we enabled interrupts.
290                  * Now we just offer it a chance to reschedule the guest. */
291
292                 /* XXX At this point the TLB still holds our shadow TLB, so if
293                  * we do reschedule the host will fault over it. Perhaps we
294                  * should politely restore the host's entries to minimize
295                  * misses before ceding control. */
296                 if (need_resched())
297                         cond_resched();
298                 if (exit_nr == BOOKE_INTERRUPT_DECREMENTER)
299                         vcpu->stat.dec_exits++;
300                 else
301                         vcpu->stat.ext_intr_exits++;
302                 r = RESUME_GUEST;
303                 break;
304
305         case BOOKE_INTERRUPT_PROGRAM:
306                 if (vcpu->arch.msr & MSR_PR) {
307                         /* Program traps generated by user-level software must be handled
308                          * by the guest kernel. */
309                         vcpu->arch.esr = vcpu->arch.fault_esr;
310                         kvmppc_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
311                         r = RESUME_GUEST;
312                         break;
313                 }
314
315                 er = kvmppc_emulate_instruction(run, vcpu);
316                 switch (er) {
317                 case EMULATE_DONE:
318                         /* Future optimization: only reload non-volatiles if
319                          * they were actually modified by emulation. */
320                         vcpu->stat.emulated_inst_exits++;
321                         r = RESUME_GUEST_NV;
322                         break;
323                 case EMULATE_DO_DCR:
324                         run->exit_reason = KVM_EXIT_DCR;
325                         r = RESUME_HOST;
326                         break;
327                 case EMULATE_FAIL:
328                         /* XXX Deliver Program interrupt to guest. */
329                         printk(KERN_CRIT "%s: emulation at %x failed (%08x)\n",
330                                __func__, vcpu->arch.pc, vcpu->arch.last_inst);
331                         /* For debugging, encode the failing instruction and
332                          * report it to userspace. */
333                         run->hw.hardware_exit_reason = ~0ULL << 32;
334                         run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
335                         r = RESUME_HOST;
336                         break;
337                 default:
338                         BUG();
339                 }
340                 break;
341
342         case BOOKE_INTERRUPT_DATA_STORAGE:
343                 vcpu->arch.dear = vcpu->arch.fault_dear;
344                 vcpu->arch.esr = vcpu->arch.fault_esr;
345                 kvmppc_queue_exception(vcpu, exit_nr);
346                 vcpu->stat.dsi_exits++;
347                 r = RESUME_GUEST;
348                 break;
349
350         case BOOKE_INTERRUPT_INST_STORAGE:
351                 vcpu->arch.esr = vcpu->arch.fault_esr;
352                 kvmppc_queue_exception(vcpu, exit_nr);
353                 vcpu->stat.isi_exits++;
354                 r = RESUME_GUEST;
355                 break;
356
357         case BOOKE_INTERRUPT_SYSCALL:
358                 kvmppc_queue_exception(vcpu, exit_nr);
359                 vcpu->stat.syscall_exits++;
360                 r = RESUME_GUEST;
361                 break;
362
363         case BOOKE_INTERRUPT_DTLB_MISS: {
364                 struct tlbe *gtlbe;
365                 unsigned long eaddr = vcpu->arch.fault_dear;
366                 gfn_t gfn;
367
368                 /* Check the guest TLB. */
369                 gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
370                 if (!gtlbe) {
371                         /* The guest didn't have a mapping for it. */
372                         kvmppc_queue_exception(vcpu, exit_nr);
373                         vcpu->arch.dear = vcpu->arch.fault_dear;
374                         vcpu->arch.esr = vcpu->arch.fault_esr;
375                         vcpu->stat.dtlb_real_miss_exits++;
376                         r = RESUME_GUEST;
377                         break;
378                 }
379
380                 vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
381                 gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
382
383                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
384                         /* The guest TLB had a mapping, but the shadow TLB
385                          * didn't, and it is RAM. This could be because:
386                          * a) the entry is mapping the host kernel, or
387                          * b) the guest used a large mapping which we're faking
388                          * Either way, we need to satisfy the fault without
389                          * invoking the guest. */
390                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
391                                        gtlbe->word2);
392                         vcpu->stat.dtlb_virt_miss_exits++;
393                         r = RESUME_GUEST;
394                 } else {
395                         /* Guest has mapped and accessed a page which is not
396                          * actually RAM. */
397                         r = kvmppc_emulate_mmio(run, vcpu);
398                 }
399
400                 break;
401         }
402
403         case BOOKE_INTERRUPT_ITLB_MISS: {
404                 struct tlbe *gtlbe;
405                 unsigned long eaddr = vcpu->arch.pc;
406                 gfn_t gfn;
407
408                 r = RESUME_GUEST;
409
410                 /* Check the guest TLB. */
411                 gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
412                 if (!gtlbe) {
413                         /* The guest didn't have a mapping for it. */
414                         kvmppc_queue_exception(vcpu, exit_nr);
415                         vcpu->stat.itlb_real_miss_exits++;
416                         break;
417                 }
418
419                 vcpu->stat.itlb_virt_miss_exits++;
420
421                 gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT;
422
423                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
424                         /* The guest TLB had a mapping, but the shadow TLB
425                          * didn't. This could be because:
426                          * a) the entry is mapping the host kernel, or
427                          * b) the guest used a large mapping which we're faking
428                          * Either way, we need to satisfy the fault without
429                          * invoking the guest. */
430                         kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid,
431                                        gtlbe->word2);
432                 } else {
433                         /* Guest mapped and leaped at non-RAM! */
434                         kvmppc_queue_exception(vcpu,
435                                                BOOKE_INTERRUPT_MACHINE_CHECK);
436                 }
437
438                 break;
439         }
440
441         default:
442                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
443                 BUG();
444         }
445
446         local_irq_disable();
447
448         kvmppc_check_and_deliver_interrupts(vcpu);
449
450         /* Do some exit accounting. */
451         vcpu->stat.sum_exits++;
452         if (!(r & RESUME_HOST)) {
453                 /* To avoid clobbering exit_reason, only check for signals if
454                  * we aren't already exiting to userspace for some other
455                  * reason. */
456                 if (signal_pending(current)) {
457                         run->exit_reason = KVM_EXIT_INTR;
458                         r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
459
460                         vcpu->stat.signal_exits++;
461                 } else {
462                         vcpu->stat.light_exits++;
463                 }
464         } else {
465                 switch (run->exit_reason) {
466                 case KVM_EXIT_MMIO:
467                         vcpu->stat.mmio_exits++;
468                         break;
469                 case KVM_EXIT_DCR:
470                         vcpu->stat.dcr_exits++;
471                         break;
472                 case KVM_EXIT_INTR:
473                         vcpu->stat.signal_exits++;
474                         break;
475                 }
476         }
477
478         return r;
479 }
480
481 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
482 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
483 {
484         struct tlbe *tlbe = &vcpu->arch.guest_tlb[0];
485
486         tlbe->tid = 0;
487         tlbe->word0 = PPC44x_TLB_16M | PPC44x_TLB_VALID;
488         tlbe->word1 = 0;
489         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR;
490
491         tlbe++;
492         tlbe->tid = 0;
493         tlbe->word0 = 0xef600000 | PPC44x_TLB_4K | PPC44x_TLB_VALID;
494         tlbe->word1 = 0xef600000;
495         tlbe->word2 = PPC44x_TLB_SX | PPC44x_TLB_SW | PPC44x_TLB_SR
496                       | PPC44x_TLB_I | PPC44x_TLB_G;
497
498         vcpu->arch.pc = 0;
499         vcpu->arch.msr = 0;
500         vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
501
502         /* Eye-catching number so we know if the guest takes an interrupt
503          * before it's programmed its own IVPR. */
504         vcpu->arch.ivpr = 0x55550000;
505
506         /* Since the guest can directly access the timebase, it must know the
507          * real timebase frequency. Accordingly, it must see the state of
508          * CCR1[TCS]. */
509         vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
510
511         return 0;
512 }
513
514 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
515 {
516         int i;
517
518         regs->pc = vcpu->arch.pc;
519         regs->cr = vcpu->arch.cr;
520         regs->ctr = vcpu->arch.ctr;
521         regs->lr = vcpu->arch.lr;
522         regs->xer = vcpu->arch.xer;
523         regs->msr = vcpu->arch.msr;
524         regs->srr0 = vcpu->arch.srr0;
525         regs->srr1 = vcpu->arch.srr1;
526         regs->pid = vcpu->arch.pid;
527         regs->sprg0 = vcpu->arch.sprg0;
528         regs->sprg1 = vcpu->arch.sprg1;
529         regs->sprg2 = vcpu->arch.sprg2;
530         regs->sprg3 = vcpu->arch.sprg3;
531         regs->sprg5 = vcpu->arch.sprg4;
532         regs->sprg6 = vcpu->arch.sprg5;
533         regs->sprg7 = vcpu->arch.sprg6;
534
535         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
536                 regs->gpr[i] = vcpu->arch.gpr[i];
537
538         return 0;
539 }
540
541 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
542 {
543         int i;
544
545         vcpu->arch.pc = regs->pc;
546         vcpu->arch.cr = regs->cr;
547         vcpu->arch.ctr = regs->ctr;
548         vcpu->arch.lr = regs->lr;
549         vcpu->arch.xer = regs->xer;
550         vcpu->arch.msr = regs->msr;
551         vcpu->arch.srr0 = regs->srr0;
552         vcpu->arch.srr1 = regs->srr1;
553         vcpu->arch.sprg0 = regs->sprg0;
554         vcpu->arch.sprg1 = regs->sprg1;
555         vcpu->arch.sprg2 = regs->sprg2;
556         vcpu->arch.sprg3 = regs->sprg3;
557         vcpu->arch.sprg5 = regs->sprg4;
558         vcpu->arch.sprg6 = regs->sprg5;
559         vcpu->arch.sprg7 = regs->sprg6;
560
561         for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++)
562                 vcpu->arch.gpr[i] = regs->gpr[i];
563
564         return 0;
565 }
566
567 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
568                                   struct kvm_sregs *sregs)
569 {
570         return -ENOTSUPP;
571 }
572
573 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
574                                   struct kvm_sregs *sregs)
575 {
576         return -ENOTSUPP;
577 }
578
579 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
580 {
581         return -ENOTSUPP;
582 }
583
584 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
585 {
586         return -ENOTSUPP;
587 }
588
589 /* 'linear_address' is actually an encoding of AS|PID|EADDR . */
590 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
591                                   struct kvm_translation *tr)
592 {
593         struct tlbe *gtlbe;
594         int index;
595         gva_t eaddr;
596         u8 pid;
597         u8 as;
598
599         eaddr = tr->linear_address;
600         pid = (tr->linear_address >> 32) & 0xff;
601         as = (tr->linear_address >> 40) & 0x1;
602
603         index = kvmppc_44x_tlb_index(vcpu, eaddr, pid, as);
604         if (index == -1) {
605                 tr->valid = 0;
606                 return 0;
607         }
608
609         gtlbe = &vcpu->arch.guest_tlb[index];
610
611         tr->physical_address = tlb_xlate(gtlbe, eaddr);
612         /* XXX what does "writeable" and "usermode" even mean? */
613         tr->valid = 1;
614
615         return 0;
616 }