[POWERPC] Add MPC8641 HPCN Device Tree Source file.
[linux-2.6.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2  * MPC8641 HPCN Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12
13 / {
14         model = "MPC8641HPCN";
15         compatible = "mpc86xx";
16         #address-cells = <1>;
17         #size-cells = <1>;
18
19         cpus {
20                 #cpus = <2>;
21                 #address-cells = <1>;
22                 #size-cells = <0>;
23
24                 PowerPC,8641@0 {
25                         device_type = "cpu";
26                         reg = <0>;
27                         d-cache-line-size = <20>;       // 32 bytes
28                         i-cache-line-size = <20>;       // 32 bytes
29                         d-cache-size = <8000>;          // L1, 32K
30                         i-cache-size = <8000>;          // L1, 32K
31                         timebase-frequency = <0>;       // 33 MHz, from uboot
32                         bus-frequency = <0>;            // From uboot
33                         clock-frequency = <0>;          // From uboot
34                         32-bit;
35                         linux,boot-cpu;
36                 };
37                 PowerPC,8641@1 {
38                         device_type = "cpu";
39                         reg = <1>;
40                         d-cache-line-size = <20>;       // 32 bytes
41                         i-cache-line-size = <20>;       // 32 bytes
42                         d-cache-size = <8000>;          // L1, 32K
43                         i-cache-size = <8000>;          // L1, 32K
44                         timebase-frequency = <0>;       // 33 MHz, from uboot
45                         bus-frequency = <0>;            // From uboot
46                         clock-frequency = <0>;          // From uboot
47                         32-bit;
48                 };
49         };
50
51         memory {
52                 device_type = "memory";
53                 reg = <00000000 40000000>;      // 1G at 0x0
54         };
55
56         soc8641@f8000000 {
57                 #address-cells = <1>;
58                 #size-cells = <1>;
59                 #interrupt-cells = <2>;
60                 device_type = "soc";
61                 ranges = <0 f8000000 00100000>;
62                 reg = <f8000000 00100000>;      // CCSRBAR 1M
63                 bus-frequency = <0>;
64
65                 i2c@3000 {
66                         device_type = "i2c";
67                         compatible = "fsl-i2c";
68                         reg = <3000 100>;
69                         interrupts = <2b 2>;
70                         interrupt-parent = <40000>;
71                         dfsrr;
72                 };
73
74                 i2c@3100 {
75                         device_type = "i2c";
76                         compatible = "fsl-i2c";
77                         reg = <3100 100>;
78                         interrupts = <2b 2>;
79                         interrupt-parent = <40000>;
80                         dfsrr;
81                 };
82
83                 mdio@24520 {
84                         #address-cells = <1>;
85                         #size-cells = <0>;
86                         device_type = "mdio";
87                         compatible = "gianfar";
88                         reg = <24520 20>;
89                         linux,phandle = <24520>;
90                         ethernet-phy@0 {
91                                 linux,phandle = <2452000>;
92                                 interrupt-parent = <40000>;
93                                 interrupts = <4a 1>;
94                                 reg = <0>;
95                                 device_type = "ethernet-phy";
96                         };
97                         ethernet-phy@1 {
98                                 linux,phandle = <2452001>;
99                                 interrupt-parent = <40000>;
100                                 interrupts = <4a 1>;
101                                 reg = <1>;
102                                 device_type = "ethernet-phy";
103                         };
104                         ethernet-phy@2 {
105                                 linux,phandle = <2452002>;
106                                 interrupt-parent = <40000>;
107                                 interrupts = <4a 1>;
108                                 reg = <2>;
109                                 device_type = "ethernet-phy";
110                         };
111                         ethernet-phy@3 {
112                                 linux,phandle = <2452003>;
113                                 interrupt-parent = <40000>;
114                                 interrupts = <4a 1>;
115                                 reg = <3>;
116                                 device_type = "ethernet-phy";
117                         };
118                 };
119
120                 ethernet@24000 {
121                         #address-cells = <1>;
122                         #size-cells = <0>;
123                         device_type = "network";
124                         model = "TSEC";
125                         compatible = "gianfar";
126                         reg = <24000 1000>;
127                         mac-address = [ 00 E0 0C 00 73 00 ];
128                         interrupts = <1d 2 1e 2 22 2>;
129                         interrupt-parent = <40000>;
130                         phy-handle = <2452000>;
131                 };
132
133                 ethernet@25000 {
134                         #address-cells = <1>;
135                         #size-cells = <0>;
136                         device_type = "network";
137                         model = "TSEC";
138                         compatible = "gianfar";
139                         reg = <25000 1000>;
140                         mac-address = [ 00 E0 0C 00 73 01 ];
141                         interrupts = <23 2 24 2 28 2>;
142                         interrupt-parent = <40000>;
143                         phy-handle = <2452001>;
144                 };
145                 
146                 ethernet@26000 {
147                         #address-cells = <1>;
148                         #size-cells = <0>;
149                         device_type = "network";
150                         model = "TSEC";
151                         compatible = "gianfar";
152                         reg = <26000 1000>;
153                         mac-address = [ 00 E0 0C 00 02 FD ];
154                         interrupts = <1F 2 20 2 21 2>;
155                         interrupt-parent = <40000>;
156                         phy-handle = <2452002>;
157                 };
158
159                 ethernet@27000 {
160                         #address-cells = <1>;
161                         #size-cells = <0>;
162                         device_type = "network";
163                         model = "TSEC";
164                         compatible = "gianfar";
165                         reg = <27000 1000>;
166                         mac-address = [ 00 E0 0C 00 03 FD ];
167                         interrupts = <25 2 26 2 27 2>;
168                         interrupt-parent = <40000>;
169                         phy-handle = <2452003>;
170                 };
171                 serial@4500 {
172                         device_type = "serial";
173                         compatible = "ns16550";
174                         reg = <4500 100>;
175                         clock-frequency = <0>;
176                         interrupts = <2a 2>;
177                         interrupt-parent = <40000>;
178                 };
179
180                 serial@4600 {
181                         device_type = "serial";
182                         compatible = "ns16550";
183                         reg = <4600 100>;
184                         clock-frequency = <0>;
185                         interrupts = <1c 2>;
186                         interrupt-parent = <40000>;
187                 };
188
189                 pci@8000 {
190                         compatible = "86xx";
191                         device_type = "pci";
192                         #interrupt-cells = <1>;
193                         #size-cells = <2>;
194                         #address-cells = <3>;
195                         reg = <8000 1000>;
196                         bus-range = <0 fe>;
197                         ranges = <02000000 0 80000000 80000000 0 20000000
198                                   01000000 0 00000000 e2000000 0 00100000>;
199                         clock-frequency = <1fca055>;
200                         interrupt-parent = <40000>;
201                         interrupts = <18 2>;
202                         interrupt-map-mask = <f800 0 0 7>;
203                         interrupt-map = <
204                                 /* IDSEL 0x11 */
205                                 8800 0 0 1 4d0 3 2
206                                 8800 0 0 2 4d0 4 2
207                                 8800 0 0 3 4d0 5 2
208                                 8800 0 0 4 4d0 6 2
209
210                                 /* IDSEL 0x12 */
211                                 9000 0 0 1 4d0 4 2
212                                 9000 0 0 2 4d0 5 2
213                                 9000 0 0 3 4d0 6 2
214                                 9000 0 0 4 4d0 3 2
215
216                                 /* IDSEL 0x13 */
217                                 9800 0 0 1 4d0 0 0
218                                 9800 0 0 2 4d0 0 0
219                                 9800 0 0 3 4d0 0 0
220                                 9800 0 0 4 4d0 0 0
221
222                                 /* IDSEL 0x14 */
223                                 a000 0 0 1 4d0 0 0
224                                 a000 0 0 2 4d0 0 0
225                                 a000 0 0 3 4d0 0 0
226                                 a000 0 0 4 4d0 0 0
227
228                                 /* IDSEL 0x15 */
229                                 a800 0 0 1 4d0 0 0
230                                 a800 0 0 2 4d0 0 0
231                                 a800 0 0 3 4d0 0 0
232                                 a800 0 0 4 4d0 0 0
233
234                                 /* IDSEL 0x16 */
235                                 b000 0 0 1 4d0 0 0
236                                 b000 0 0 2 4d0 0 0
237                                 b000 0 0 3 4d0 0 0
238                                 b000 0 0 4 4d0 0 0
239
240                                 /* IDSEL 0x17 */
241                                 b800 0 0 1 4d0 0 0
242                                 b800 0 0 2 4d0 0 0
243                                 b800 0 0 3 4d0 0 0
244                                 b800 0 0 4 4d0 0 0
245
246                                 /* IDSEL 0x18 */
247                                 c000 0 0 1 4d0 0 0
248                                 c000 0 0 2 4d0 0 0
249                                 c000 0 0 3 4d0 0 0
250                                 c000 0 0 4 4d0 0 0
251
252                                 /* IDSEL 0x19 */
253                                 c800 0 0 1 4d0 0 0
254                                 c800 0 0 2 4d0 0 0
255                                 c800 0 0 3 4d0 0 0
256                                 c800 0 0 4 4d0 0 0
257
258                                 /* IDSEL 0x1a */
259                                 d000 0 0 1 4d0 6 2
260                                 d000 0 0 2 4d0 3 2
261                                 d000 0 0 3 4d0 4 2
262                                 d000 0 0 4 4d0 5 2
263
264
265                                 /* IDSEL 0x1b */
266                                 d800 0 0 1 4d0 5 2
267                                 d800 0 0 2 4d0 0 0
268                                 d800 0 0 3 4d0 0 0
269                                 d800 0 0 4 4d0 0 0
270
271                                 /* IDSEL 0x1c */
272                                 e000 0 0 1 4d0 9 2
273                                 e000 0 0 2 4d0 a 2
274                                 e000 0 0 3 4d0 c 2
275                                 e000 0 0 4 4d0 7 2
276
277                                 /* IDSEL 0x1d */
278                                 e800 0 0 1 4d0 9 2
279                                 e800 0 0 2 4d0 a 2
280                                 e800 0 0 3 4d0 b 2
281                                 e800 0 0 4 4d0 0 0
282
283                                 /* IDSEL 0x1e */
284                                 f000 0 0 1 4d0 c 2
285                                 f000 0 0 2 4d0 0 0
286                                 f000 0 0 3 4d0 0 0
287                                 f000 0 0 4 4d0 0 0
288
289                                 /* IDSEL 0x1f */
290                                 f800 0 0 1 4d0 6 2
291                                 f800 0 0 2 4d0 0 0
292                                 f800 0 0 3 4d0 0 0
293                                 f800 0 0 4 4d0 0 0
294                                 >;
295                         i8259@4d0 {
296                                 clock-frequency = <0>;
297                                 interrupt-controller;
298                                 device_type = "interrupt-controller";
299                                 #address-cells = <0>;
300                                 #interrupt-cells = <2>;
301                                 built-in;
302                                 compatible = "chrp,iic";
303                                 big-endian;
304                                 interrupts = <49 2>;
305                                 interrupt-parent = <40000>;
306                         };
307
308                 };
309                 pic@40000 {
310                         linux,phandle = <40000>;
311                         clock-frequency = <0>;
312                         interrupt-controller;
313                         #address-cells = <0>;
314                         #interrupt-cells = <2>;
315                         reg = <40000 40000>;
316                         built-in;
317                         compatible = "chrp,open-pic";
318                         device_type = "open-pic";
319                         big-endian;
320                         interrupts = <
321                                 10 2 11 2 12 2 13 2
322                                 14 2 15 2 16 2 17 2
323                                 18 2 19 2 1a 2 1b 2
324                                 1c 2 1d 2 1e 2 1f 2
325                                 20 2 21 2 22 2 23 2
326                                 24 2 25 2 26 2 27 2
327                                 28 2 29 2 2a 2 2b 2
328                                 2c 2 2d 2 2e 2 2f 2
329                                 30 2 31 2 32 2 33 2
330                                 34 2 35 2 36 2 37 2
331                                 38 2 39 2 2a 2 3b 2
332                                 3c 2 3d 2 3e 2 3f 2
333                                 48 1 49 2 4a 1
334                                 >;
335                         interrupt-parent = <40000>;
336                 };
337         };
338 };