4c5b9e4e98bc4b78ff7630f3eb92b2e36320f7de
[linux-2.6.git] / arch / m68k / q40 / config.c
1 /*
2  *  arch/m68k/q40/config.c
3  *
4  *  Copyright (C) 1999 Richard Zidlicky
5  *
6  * originally based on:
7  *
8  *  linux/bvme/config.c
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file README.legal in the main directory of this archive
12  * for more details.
13  */
14
15 #include <linux/types.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/tty.h>
19 #include <linux/console.h>
20 #include <linux/linkage.h>
21 #include <linux/init.h>
22 #include <linux/major.h>
23 #include <linux/serial_reg.h>
24 #include <linux/rtc.h>
25 #include <linux/vt_kern.h>
26
27 #include <asm/io.h>
28 #include <asm/rtc.h>
29 #include <asm/bootinfo.h>
30 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/setup.h>
33 #include <asm/irq.h>
34 #include <asm/traps.h>
35 #include <asm/machdep.h>
36 #include <asm/q40_master.h>
37
38 extern irqreturn_t q40_process_int(int level, struct pt_regs *regs);
39 extern void q40_init_IRQ(void);
40 static void q40_get_model(char *model);
41 static int  q40_get_hardware_list(char *buffer);
42 extern void q40_sched_init(irq_handler_t handler);
43
44 extern unsigned long q40_gettimeoffset(void);
45 extern int q40_hwclk(int, struct rtc_time *);
46 extern unsigned int q40_get_ss(void);
47 extern int q40_set_clock_mmss(unsigned long);
48 static int q40_get_rtc_pll(struct rtc_pll_info *pll);
49 static int q40_set_rtc_pll(struct rtc_pll_info *pll);
50 extern void q40_reset(void);
51 void q40_halt(void);
52 extern void q40_waitbut(void);
53 void q40_set_vectors(void);
54
55 extern void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/);
56
57 extern char m68k_debug_device[];
58 static void q40_mem_console_write(struct console *co, const char *b,
59                                   unsigned int count);
60
61 extern int ql_ticks;
62
63 static struct console q40_console_driver = {
64         .name   = "debug",
65         .flags  = CON_PRINTBUFFER,
66         .index  = -1,
67 };
68
69
70 /* early debugging function:*/
71 extern char *q40_mem_cptr; /*=(char *)0xff020000;*/
72 static int _cpleft;
73
74 static void q40_mem_console_write(struct console *co, const char *s,
75                                   unsigned int count)
76 {
77         const char *p = s;
78
79         if (count < _cpleft) {
80                 while (count-- > 0) {
81                         *q40_mem_cptr = *p++;
82                         q40_mem_cptr += 4;
83                         _cpleft--;
84                 }
85         }
86 }
87
88 #if 0
89 void printq40(char *str)
90 {
91         int l = strlen(str);
92         char *p = q40_mem_cptr;
93
94         while (l-- > 0 && _cpleft-- > 0) {
95                 *p = *str++;
96                 p += 4;
97         }
98         q40_mem_cptr = p;
99 }
100 #endif
101
102 static int halted;
103
104 #ifdef CONFIG_HEARTBEAT
105 static void q40_heartbeat(int on)
106 {
107         if (halted)
108                 return;
109
110         if (on)
111                 Q40_LED_ON();
112         else
113                 Q40_LED_OFF();
114 }
115 #endif
116
117 void q40_reset(void)
118 {
119         halted = 1;
120         printk("\n\n*******************************************\n"
121                 "Called q40_reset : press the RESET button!! \n"
122                 "*******************************************\n");
123         Q40_LED_ON();
124         while (1)
125                 ;
126 }
127 void q40_halt(void)
128 {
129         halted = 1;
130         printk("\n\n*******************\n"
131                    "  Called q40_halt\n"
132                    "*******************\n");
133         Q40_LED_ON();
134         while (1)
135                 ;
136 }
137
138 static void q40_get_model(char *model)
139 {
140         sprintf(model, "Q40");
141 }
142
143 /* No hardware options on Q40? */
144
145 static int q40_get_hardware_list(char *buffer)
146 {
147         *buffer = '\0';
148         return 0;
149 }
150
151 static unsigned int serports[] =
152 {
153         0x3f8,0x2f8,0x3e8,0x2e8,0
154 };
155 void q40_disable_irqs(void)
156 {
157         unsigned i, j;
158
159         j = 0;
160         while ((i = serports[j++]))
161                 outb(0, i + UART_IER);
162         master_outb(0, EXT_ENABLE_REG);
163         master_outb(0, KEY_IRQ_ENABLE_REG);
164 }
165
166 void __init config_q40(void)
167 {
168         mach_sched_init = q40_sched_init;
169
170         mach_init_IRQ = q40_init_IRQ;
171         mach_gettimeoffset = q40_gettimeoffset;
172         mach_hwclk = q40_hwclk;
173         mach_get_ss = q40_get_ss;
174         mach_get_rtc_pll = q40_get_rtc_pll;
175         mach_set_rtc_pll = q40_set_rtc_pll;
176         mach_set_clock_mmss = q40_set_clock_mmss;
177
178         mach_reset = q40_reset;
179         mach_get_model = q40_get_model;
180         mach_get_hardware_list = q40_get_hardware_list;
181
182 #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
183         mach_beep = q40_mksound;
184 #endif
185 #ifdef CONFIG_HEARTBEAT
186         mach_heartbeat = q40_heartbeat;
187 #endif
188         mach_halt = q40_halt;
189
190         /* disable a few things that SMSQ might have left enabled */
191         q40_disable_irqs();
192
193         /* no DMA at all, but ide-scsi requires it.. make sure
194          * all physical RAM fits into the boundary - otherwise
195          * allocator may play costly and useless tricks */
196         mach_max_dma_address = 1024*1024*1024;
197
198         /* useful for early debugging stages - writes kernel messages into SRAM */
199         if (!strncmp( m68k_debug_device,"mem", 3)) {
200                 /*printk("using NVRAM debug, q40_mem_cptr=%p\n",q40_mem_cptr);*/
201                 _cpleft = 2000 - ((long)q40_mem_cptr-0xff020000) / 4;
202                 q40_console_driver.write = q40_mem_console_write;
203                 register_console(&q40_console_driver);
204         }
205 }
206
207
208 int q40_parse_bootinfo(const struct bi_record *rec)
209 {
210         return 1;
211 }
212
213
214 static inline unsigned char bcd2bin(unsigned char b)
215 {
216         return (b >> 4) * 10 + (b & 15);
217 }
218
219 static inline unsigned char bin2bcd(unsigned char b)
220 {
221         return (b / 10) * 16 + (b % 10);
222 }
223
224
225 unsigned long q40_gettimeoffset(void)
226 {
227         return 5000 * (ql_ticks != 0);
228 }
229
230
231 /*
232  * Looks like op is non-zero for setting the clock, and zero for
233  * reading the clock.
234  *
235  *  struct hwclk_time {
236  *         unsigned        sec;       0..59
237  *         unsigned        min;       0..59
238  *         unsigned        hour;      0..23
239  *         unsigned        day;       1..31
240  *         unsigned        mon;       0..11
241  *         unsigned        year;      00...
242  *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
243  * };
244  */
245
246 int q40_hwclk(int op, struct rtc_time *t)
247 {
248         if (op) {
249                 /* Write.... */
250                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
251
252                 Q40_RTC_SECS = bin2bcd(t->tm_sec);
253                 Q40_RTC_MINS = bin2bcd(t->tm_min);
254                 Q40_RTC_HOUR = bin2bcd(t->tm_hour);
255                 Q40_RTC_DATE = bin2bcd(t->tm_mday);
256                 Q40_RTC_MNTH = bin2bcd(t->tm_mon + 1);
257                 Q40_RTC_YEAR = bin2bcd(t->tm_year%100);
258                 if (t->tm_wday >= 0)
259                         Q40_RTC_DOW = bin2bcd(t->tm_wday+1);
260
261                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
262         } else {
263                 /* Read....  */
264                 Q40_RTC_CTRL |= Q40_RTC_READ;
265
266                 t->tm_year = bcd2bin (Q40_RTC_YEAR);
267                 t->tm_mon  = bcd2bin (Q40_RTC_MNTH)-1;
268                 t->tm_mday = bcd2bin (Q40_RTC_DATE);
269                 t->tm_hour = bcd2bin (Q40_RTC_HOUR);
270                 t->tm_min  = bcd2bin (Q40_RTC_MINS);
271                 t->tm_sec  = bcd2bin (Q40_RTC_SECS);
272
273                 Q40_RTC_CTRL &= ~(Q40_RTC_READ);
274
275                 if (t->tm_year < 70)
276                         t->tm_year += 100;
277                 t->tm_wday = bcd2bin(Q40_RTC_DOW)-1;
278         }
279
280         return 0;
281 }
282
283 unsigned int q40_get_ss(void)
284 {
285         return bcd2bin(Q40_RTC_SECS);
286 }
287
288 /*
289  * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
290  * clock is out by > 30 minutes.  Logic lifted from atari code.
291  */
292
293 int q40_set_clock_mmss(unsigned long nowtime)
294 {
295         int retval = 0;
296         short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
297
298         int rtc_minutes;
299
300         rtc_minutes = bcd2bin(Q40_RTC_MINS);
301
302         if ((rtc_minutes < real_minutes ?
303              real_minutes - rtc_minutes :
304              rtc_minutes - real_minutes) < 30) {
305                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
306                 Q40_RTC_MINS = bin2bcd(real_minutes);
307                 Q40_RTC_SECS = bin2bcd(real_seconds);
308                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
309         } else
310                 retval = -1;
311
312         return retval;
313 }
314
315
316 /* get and set PLL calibration of RTC clock */
317 #define Q40_RTC_PLL_MASK ((1<<5)-1)
318 #define Q40_RTC_PLL_SIGN (1<<5)
319
320 static int q40_get_rtc_pll(struct rtc_pll_info *pll)
321 {
322         int tmp = Q40_RTC_CTRL;
323
324         pll->pll_value = tmp & Q40_RTC_PLL_MASK;
325         if (tmp & Q40_RTC_PLL_SIGN)
326                 pll->pll_value = -pll->pll_value;
327         pll->pll_max = 31;
328         pll->pll_min = -31;
329         pll->pll_posmult = 512;
330         pll->pll_negmult = 256;
331         pll->pll_clock = 125829120;
332
333         return 0;
334 }
335
336 static int q40_set_rtc_pll(struct rtc_pll_info *pll)
337 {
338         if (!pll->pll_ctrl) {
339                 /* the docs are a bit unclear so I am doublesetting */
340                 /* RTC_WRITE here ... */
341                 int tmp = (pll->pll_value & 31) | (pll->pll_value<0 ? 32 : 0) |
342                           Q40_RTC_WRITE;
343                 Q40_RTC_CTRL |= Q40_RTC_WRITE;
344                 Q40_RTC_CTRL = tmp;
345                 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE);
346                 return 0;
347         } else
348                 return -EINVAL;
349 }