Kprobes: The ON/OFF knob thru debugfs
[linux-2.6.git] / arch / i386 / oprofile / nmi_int.c
1 /**
2  * @file nmi_int.c
3  *
4  * @remark Copyright 2002 OProfile authors
5  * @remark Read the file COPYING
6  *
7  * @author John Levon <levon@movementarian.org>
8  */
9
10 #include <linux/init.h>
11 #include <linux/notifier.h>
12 #include <linux/smp.h>
13 #include <linux/oprofile.h>
14 #include <linux/sysdev.h>
15 #include <linux/slab.h>
16 #include <linux/moduleparam.h>
17 #include <linux/kdebug.h>
18 #include <asm/nmi.h>
19 #include <asm/msr.h>
20 #include <asm/apic.h>
21  
22 #include "op_counter.h"
23 #include "op_x86_model.h"
24
25 static struct op_x86_model_spec const * model;
26 static struct op_msrs cpu_msrs[NR_CPUS];
27 static unsigned long saved_lvtpc[NR_CPUS];
28
29 static int nmi_start(void);
30 static void nmi_stop(void);
31
32 /* 0 == registered but off, 1 == registered and on */
33 static int nmi_enabled = 0;
34
35 #ifdef CONFIG_PM
36
37 static int nmi_suspend(struct sys_device *dev, pm_message_t state)
38 {
39         if (nmi_enabled == 1)
40                 nmi_stop();
41         return 0;
42 }
43
44
45 static int nmi_resume(struct sys_device *dev)
46 {
47         if (nmi_enabled == 1)
48                 nmi_start();
49         return 0;
50 }
51
52
53 static struct sysdev_class oprofile_sysclass = {
54         set_kset_name("oprofile"),
55         .resume         = nmi_resume,
56         .suspend        = nmi_suspend,
57 };
58
59
60 static struct sys_device device_oprofile = {
61         .id     = 0,
62         .cls    = &oprofile_sysclass,
63 };
64
65
66 static int __init init_sysfs(void)
67 {
68         int error;
69         if (!(error = sysdev_class_register(&oprofile_sysclass)))
70                 error = sysdev_register(&device_oprofile);
71         return error;
72 }
73
74
75 static void exit_sysfs(void)
76 {
77         sysdev_unregister(&device_oprofile);
78         sysdev_class_unregister(&oprofile_sysclass);
79 }
80
81 #else
82 #define init_sysfs() do { } while (0)
83 #define exit_sysfs() do { } while (0)
84 #endif /* CONFIG_PM */
85
86 static int profile_exceptions_notify(struct notifier_block *self,
87                                      unsigned long val, void *data)
88 {
89         struct die_args *args = (struct die_args *)data;
90         int ret = NOTIFY_DONE;
91         int cpu = smp_processor_id();
92
93         switch(val) {
94         case DIE_NMI:
95                 if (model->check_ctrs(args->regs, &cpu_msrs[cpu]))
96                         ret = NOTIFY_STOP;
97                 break;
98         default:
99                 break;
100         }
101         return ret;
102 }
103
104 static void nmi_cpu_save_registers(struct op_msrs * msrs)
105 {
106         unsigned int const nr_ctrs = model->num_counters;
107         unsigned int const nr_ctrls = model->num_controls; 
108         struct op_msr * counters = msrs->counters;
109         struct op_msr * controls = msrs->controls;
110         unsigned int i;
111
112         for (i = 0; i < nr_ctrs; ++i) {
113                 if (counters[i].addr){
114                         rdmsr(counters[i].addr,
115                                 counters[i].saved.low,
116                                 counters[i].saved.high);
117                 }
118         }
119  
120         for (i = 0; i < nr_ctrls; ++i) {
121                 if (controls[i].addr){
122                         rdmsr(controls[i].addr,
123                                 controls[i].saved.low,
124                                 controls[i].saved.high);
125                 }
126         }
127 }
128
129
130 static void nmi_save_registers(void * dummy)
131 {
132         int cpu = smp_processor_id();
133         struct op_msrs * msrs = &cpu_msrs[cpu];
134         model->fill_in_addresses(msrs);
135         nmi_cpu_save_registers(msrs);
136 }
137
138
139 static void free_msrs(void)
140 {
141         int i;
142         for_each_possible_cpu(i) {
143                 kfree(cpu_msrs[i].counters);
144                 cpu_msrs[i].counters = NULL;
145                 kfree(cpu_msrs[i].controls);
146                 cpu_msrs[i].controls = NULL;
147         }
148 }
149
150
151 static int allocate_msrs(void)
152 {
153         int success = 1;
154         size_t controls_size = sizeof(struct op_msr) * model->num_controls;
155         size_t counters_size = sizeof(struct op_msr) * model->num_counters;
156
157         int i;
158         for_each_online_cpu(i) {
159                 cpu_msrs[i].counters = kmalloc(counters_size, GFP_KERNEL);
160                 if (!cpu_msrs[i].counters) {
161                         success = 0;
162                         break;
163                 }
164                 cpu_msrs[i].controls = kmalloc(controls_size, GFP_KERNEL);
165                 if (!cpu_msrs[i].controls) {
166                         success = 0;
167                         break;
168                 }
169         }
170
171         if (!success)
172                 free_msrs();
173
174         return success;
175 }
176
177
178 static void nmi_cpu_setup(void * dummy)
179 {
180         int cpu = smp_processor_id();
181         struct op_msrs * msrs = &cpu_msrs[cpu];
182         spin_lock(&oprofilefs_lock);
183         model->setup_ctrs(msrs);
184         spin_unlock(&oprofilefs_lock);
185         saved_lvtpc[cpu] = apic_read(APIC_LVTPC);
186         apic_write(APIC_LVTPC, APIC_DM_NMI);
187 }
188
189 static struct notifier_block profile_exceptions_nb = {
190         .notifier_call = profile_exceptions_notify,
191         .next = NULL,
192         .priority = 0
193 };
194
195 static int nmi_setup(void)
196 {
197         int err=0;
198
199         if (!allocate_msrs())
200                 return -ENOMEM;
201
202         if ((err = register_die_notifier(&profile_exceptions_nb))){
203                 free_msrs();
204                 return err;
205         }
206
207         /* We need to serialize save and setup for HT because the subset
208          * of msrs are distinct for save and setup operations
209          */
210         on_each_cpu(nmi_save_registers, NULL, 0, 1);
211         on_each_cpu(nmi_cpu_setup, NULL, 0, 1);
212         nmi_enabled = 1;
213         return 0;
214 }
215
216
217 static void nmi_restore_registers(struct op_msrs * msrs)
218 {
219         unsigned int const nr_ctrs = model->num_counters;
220         unsigned int const nr_ctrls = model->num_controls; 
221         struct op_msr * counters = msrs->counters;
222         struct op_msr * controls = msrs->controls;
223         unsigned int i;
224
225         for (i = 0; i < nr_ctrls; ++i) {
226                 if (controls[i].addr){
227                         wrmsr(controls[i].addr,
228                                 controls[i].saved.low,
229                                 controls[i].saved.high);
230                 }
231         }
232  
233         for (i = 0; i < nr_ctrs; ++i) {
234                 if (counters[i].addr){
235                         wrmsr(counters[i].addr,
236                                 counters[i].saved.low,
237                                 counters[i].saved.high);
238                 }
239         }
240 }
241  
242
243 static void nmi_cpu_shutdown(void * dummy)
244 {
245         unsigned int v;
246         int cpu = smp_processor_id();
247         struct op_msrs * msrs = &cpu_msrs[cpu];
248  
249         /* restoring APIC_LVTPC can trigger an apic error because the delivery
250          * mode and vector nr combination can be illegal. That's by design: on
251          * power on apic lvt contain a zero vector nr which are legal only for
252          * NMI delivery mode. So inhibit apic err before restoring lvtpc
253          */
254         v = apic_read(APIC_LVTERR);
255         apic_write(APIC_LVTERR, v | APIC_LVT_MASKED);
256         apic_write(APIC_LVTPC, saved_lvtpc[cpu]);
257         apic_write(APIC_LVTERR, v);
258         nmi_restore_registers(msrs);
259         model->shutdown(msrs);
260 }
261
262  
263 static void nmi_shutdown(void)
264 {
265         nmi_enabled = 0;
266         on_each_cpu(nmi_cpu_shutdown, NULL, 0, 1);
267         unregister_die_notifier(&profile_exceptions_nb);
268         free_msrs();
269 }
270
271  
272 static void nmi_cpu_start(void * dummy)
273 {
274         struct op_msrs const * msrs = &cpu_msrs[smp_processor_id()];
275         model->start(msrs);
276 }
277  
278
279 static int nmi_start(void)
280 {
281         on_each_cpu(nmi_cpu_start, NULL, 0, 1);
282         return 0;
283 }
284  
285  
286 static void nmi_cpu_stop(void * dummy)
287 {
288         struct op_msrs const * msrs = &cpu_msrs[smp_processor_id()];
289         model->stop(msrs);
290 }
291  
292  
293 static void nmi_stop(void)
294 {
295         on_each_cpu(nmi_cpu_stop, NULL, 0, 1);
296 }
297
298
299 struct op_counter_config counter_config[OP_MAX_COUNTER];
300
301 static int nmi_create_files(struct super_block * sb, struct dentry * root)
302 {
303         unsigned int i;
304
305         for (i = 0; i < model->num_counters; ++i) {
306                 struct dentry * dir;
307                 char buf[4];
308  
309                 /* quick little hack to _not_ expose a counter if it is not
310                  * available for use.  This should protect userspace app.
311                  * NOTE:  assumes 1:1 mapping here (that counters are organized
312                  *        sequentially in their struct assignment).
313                  */
314                 if (unlikely(!avail_to_resrv_perfctr_nmi_bit(i)))
315                         continue;
316
317                 snprintf(buf,  sizeof(buf), "%d", i);
318                 dir = oprofilefs_mkdir(sb, root, buf);
319                 oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled); 
320                 oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event); 
321                 oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count); 
322                 oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask); 
323                 oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel); 
324                 oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user); 
325         }
326
327         return 0;
328 }
329  
330 static int p4force;
331 module_param(p4force, int, 0);
332  
333 static int __init p4_init(char ** cpu_type)
334 {
335         __u8 cpu_model = boot_cpu_data.x86_model;
336
337         if (!p4force && (cpu_model > 6 || cpu_model == 5))
338                 return 0;
339
340 #ifndef CONFIG_SMP
341         *cpu_type = "i386/p4";
342         model = &op_p4_spec;
343         return 1;
344 #else
345         switch (smp_num_siblings) {
346                 case 1:
347                         *cpu_type = "i386/p4";
348                         model = &op_p4_spec;
349                         return 1;
350
351                 case 2:
352                         *cpu_type = "i386/p4-ht";
353                         model = &op_p4_ht2_spec;
354                         return 1;
355         }
356 #endif
357
358         printk(KERN_INFO "oprofile: P4 HyperThreading detected with > 2 threads\n");
359         printk(KERN_INFO "oprofile: Reverting to timer mode.\n");
360         return 0;
361 }
362
363
364 static int __init ppro_init(char ** cpu_type)
365 {
366         __u8 cpu_model = boot_cpu_data.x86_model;
367
368         if (cpu_model == 14)
369                 *cpu_type = "i386/core";
370         else if (cpu_model == 15)
371                 *cpu_type = "i386/core_2";
372         else if (cpu_model > 0xd)
373                 return 0;
374         else if (cpu_model == 9) {
375                 *cpu_type = "i386/p6_mobile";
376         } else if (cpu_model > 5) {
377                 *cpu_type = "i386/piii";
378         } else if (cpu_model > 2) {
379                 *cpu_type = "i386/pii";
380         } else {
381                 *cpu_type = "i386/ppro";
382         }
383
384         model = &op_ppro_spec;
385         return 1;
386 }
387
388 /* in order to get sysfs right */
389 static int using_nmi;
390
391 int __init op_nmi_init(struct oprofile_operations *ops)
392 {
393         __u8 vendor = boot_cpu_data.x86_vendor;
394         __u8 family = boot_cpu_data.x86;
395         char *cpu_type;
396
397         if (!cpu_has_apic)
398                 return -ENODEV;
399  
400         switch (vendor) {
401                 case X86_VENDOR_AMD:
402                         /* Needs to be at least an Athlon (or hammer in 32bit mode) */
403
404                         switch (family) {
405                         default:
406                                 return -ENODEV;
407                         case 6:
408                                 model = &op_athlon_spec;
409                                 cpu_type = "i386/athlon";
410                                 break;
411                         case 0xf:
412                                 model = &op_athlon_spec;
413                                 /* Actually it could be i386/hammer too, but give
414                                    user space an consistent name. */
415                                 cpu_type = "x86-64/hammer";
416                                 break;
417                         case 0x10:
418                                 model = &op_athlon_spec;
419                                 cpu_type = "x86-64/family10";
420                                 break;
421                         }
422                         break;
423  
424                 case X86_VENDOR_INTEL:
425                         switch (family) {
426                                 /* Pentium IV */
427                                 case 0xf:
428                                         if (!p4_init(&cpu_type))
429                                                 return -ENODEV;
430                                         break;
431
432                                 /* A P6-class processor */
433                                 case 6:
434                                         if (!ppro_init(&cpu_type))
435                                                 return -ENODEV;
436                                         break;
437
438                                 default:
439                                         return -ENODEV;
440                         }
441                         break;
442
443                 default:
444                         return -ENODEV;
445         }
446
447         init_sysfs();
448         using_nmi = 1;
449         ops->create_files = nmi_create_files;
450         ops->setup = nmi_setup;
451         ops->shutdown = nmi_shutdown;
452         ops->start = nmi_start;
453         ops->stop = nmi_stop;
454         ops->cpu_type = cpu_type;
455         printk(KERN_INFO "oprofile: using NMI interrupt.\n");
456         return 0;
457 }
458
459
460 void op_nmi_exit(void)
461 {
462         if (using_nmi)
463                 exit_sysfs();
464 }