Blackfin: drop unused MMR defines that only cause bad code to be written
[linux-2.6.git] / arch / blackfin / mach-bf518 / include / mach / blackfin.h
1 /*
2  * File:         include/asm-blackfin/mach-bf518/blackfin.h
3  * Based on:
4  * Author:
5  *
6  * Created:
7  * Description:
8  *
9  * Rev:
10  *
11  * Modified:
12  *
13  *
14  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License as published by
18  * the Free Software Foundation; either version 2, or (at your option)
19  * any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; see the file COPYING.
28  * If not, write to the Free Software Foundation,
29  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30  */
31
32 #ifndef _MACH_BLACKFIN_H_
33 #define _MACH_BLACKFIN_H_
34
35 #include "bf518.h"
36 #include "defBF512.h"
37 #include "anomaly.h"
38
39 #if defined(CONFIG_BF518)
40 #include "defBF518.h"
41 #endif
42
43 #if defined(CONFIG_BF516)
44 #include "defBF516.h"
45 #endif
46
47 #if defined(CONFIG_BF514)
48 #include "defBF514.h"
49 #endif
50
51 #if defined(CONFIG_BF512)
52 #include "defBF512.h"
53 #endif
54
55 #if !defined(__ASSEMBLY__)
56 #include "cdefBF512.h"
57
58 #if defined(CONFIG_BF518)
59 #include "cdefBF518.h"
60 #endif
61
62 #if defined(CONFIG_BF516)
63 #include "cdefBF516.h"
64 #endif
65
66 #if defined(CONFIG_BF514)
67 #include "cdefBF514.h"
68 #endif
69 #endif
70
71 #define BFIN_UART_NR_PORTS      2
72
73 #define OFFSET_THR              0x00    /* Transmit Holding register            */
74 #define OFFSET_RBR              0x00    /* Receive Buffer register              */
75 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
76 #define OFFSET_IER              0x04    /* Interrupt Enable Register            */
77 #define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
78 #define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
79 #define OFFSET_LCR              0x0C    /* Line Control Register                */
80 #define OFFSET_MCR              0x10    /* Modem Control Register               */
81 #define OFFSET_LSR              0x14    /* Line Status Register                 */
82 #define OFFSET_MSR              0x18    /* Modem Status Register                */
83 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
84 #define OFFSET_GCTL             0x24    /* Global Control Register              */
85
86 /* PLL_DIV Masks                                                                                                        */
87 #define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
88 #define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
89 #define CCLK_DIV4 CSEL_DIV4     /*          CCLK = VCO / 4                                  */
90 #define CCLK_DIV8 CSEL_DIV8     /*          CCLK = VCO / 8                                  */
91
92 #endif