Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[linux-2.6.git] / arch / blackfin / mach-bf518 / boards / tcm-bf518.c
1 /*
2  * Copyright 2004-2009 Analog Devices Inc.
3  *                2005 National ICT Australia (NICTA)
4  *                      Aidan Williams <aidan@nicta.com.au>
5  *
6  * Licensed under the GPL-2 or later.
7  */
8
9 #include <linux/device.h>
10 #include <linux/etherdevice.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17
18 #include <linux/i2c.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
21 #include <asm/dma.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
24 #include <asm/portmux.h>
25 #include <asm/dpmc.h>
26 #include <asm/bfin_sdh.h>
27 #include <linux/spi/ad7877.h>
28 #include <net/dsa.h>
29
30 /*
31  * Name the Board for the /proc/cpuinfo
32  */
33 const char bfin_board_name[] = "Bluetechnix TCM-BF518";
34
35 /*
36  *  Driver needs to know address, irq and flag pin.
37  */
38
39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
40 static struct mtd_partition tcm_partitions[] = {
41         {
42                 .name       = "bootloader(nor)",
43                 .size       = 0x40000,
44                 .offset     = 0,
45         },
46         {
47                 .name       = "linux(nor)",
48                 .size       = 0x1C0000,
49                 .offset     = MTDPART_OFS_APPEND,
50         }
51 };
52
53 static struct physmap_flash_data tcm_flash_data = {
54         .width      = 2,
55         .parts      = tcm_partitions,
56         .nr_parts   = ARRAY_SIZE(tcm_partitions),
57 };
58
59 static struct resource tcm_flash_resource = {
60         .start = 0x20000000,
61         .end   = 0x201fffff,
62         .flags = IORESOURCE_MEM,
63 };
64
65 static struct platform_device tcm_flash_device = {
66         .name          = "physmap-flash",
67         .id            = 0,
68         .dev = {
69                 .platform_data = &tcm_flash_data,
70         },
71         .num_resources = 1,
72         .resource      = &tcm_flash_resource,
73 };
74 #endif
75
76 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
77 static struct platform_device rtc_device = {
78         .name = "rtc-bfin",
79         .id   = -1,
80 };
81 #endif
82
83 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
84 static struct platform_device bfin_mii_bus = {
85         .name = "bfin_mii_bus",
86 };
87
88 static struct platform_device bfin_mac_device = {
89         .name = "bfin_mac",
90         .dev.platform_data = &bfin_mii_bus,
91 };
92 #endif
93
94 #if defined(CONFIG_MTD_M25P80) \
95         || defined(CONFIG_MTD_M25P80_MODULE)
96 static struct mtd_partition bfin_spi_flash_partitions[] = {
97         {
98                 .name = "bootloader(spi)",
99                 .size = 0x00040000,
100                 .offset = 0,
101                 .mask_flags = MTD_CAP_ROM
102         }, {
103                 .name = "linux kernel(spi)",
104                 .size = MTDPART_SIZ_FULL,
105                 .offset = MTDPART_OFS_APPEND,
106         }
107 };
108
109 static struct flash_platform_data bfin_spi_flash_data = {
110         .name = "m25p80",
111         .parts = bfin_spi_flash_partitions,
112         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
113         .type = "m25p16",
114 };
115
116 /* SPI flash chip (m25p64) */
117 static struct bfin5xx_spi_chip spi_flash_chip_info = {
118         .enable_dma = 0,         /* use dma transfer with this chip*/
119         .bits_per_word = 8,
120 };
121 #endif
122
123 #if defined(CONFIG_BFIN_SPI_ADC) \
124         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
125 /* SPI ADC chip */
126 static struct bfin5xx_spi_chip spi_adc_chip_info = {
127         .enable_dma = 1,         /* use dma transfer with this chip*/
128         .bits_per_word = 16,
129 };
130 #endif
131
132 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
133 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
134         .enable_dma = 0,
135         .bits_per_word = 8,
136 };
137 #endif
138
139 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
140 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
141         .enable_dma = 0,
142         .bits_per_word = 16,
143 };
144
145 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
146         .model                  = 7877,
147         .vref_delay_usecs       = 50,   /* internal, no capacitor */
148         .x_plate_ohms           = 419,
149         .y_plate_ohms           = 486,
150         .pressure_max           = 1000,
151         .pressure_min           = 0,
152         .stopacq_polarity       = 1,
153         .first_conversion_delay = 3,
154         .acquisition_time       = 1,
155         .averaging              = 1,
156         .pen_down_acc_interval  = 1,
157 };
158 #endif
159
160 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
161          && defined(CONFIG_SND_SOC_WM8731_SPI)
162 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
163         .enable_dma = 0,
164         .bits_per_word = 16,
165 };
166 #endif
167
168 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
169 static struct bfin5xx_spi_chip spidev_chip_info = {
170         .enable_dma = 0,
171         .bits_per_word = 8,
172 };
173 #endif
174
175 static struct spi_board_info bfin_spi_board_info[] __initdata = {
176 #if defined(CONFIG_MTD_M25P80) \
177         || defined(CONFIG_MTD_M25P80_MODULE)
178         {
179                 /* the modalias must be the same as spi device driver name */
180                 .modalias = "m25p80", /* Name of spi_driver for this device */
181                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
182                 .bus_num = 0, /* Framework bus number */
183                 .chip_select = 2, /* SPI0_SSEL2 */
184                 .platform_data = &bfin_spi_flash_data,
185                 .controller_data = &spi_flash_chip_info,
186                 .mode = SPI_MODE_3,
187         },
188 #endif
189
190 #if defined(CONFIG_BFIN_SPI_ADC) \
191         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
192         {
193                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
194                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
195                 .bus_num = 0, /* Framework bus number */
196                 .chip_select = 1, /* Framework chip select. */
197                 .platform_data = NULL, /* No spi_driver specific config */
198                 .controller_data = &spi_adc_chip_info,
199         },
200 #endif
201
202 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
203         {
204                 .modalias = "mmc_spi",
205                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
206                 .bus_num = 0,
207                 .chip_select = 5,
208                 .controller_data = &mmc_spi_chip_info,
209                 .mode = SPI_MODE_3,
210         },
211 #endif
212 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
213         {
214                 .modalias               = "ad7877",
215                 .platform_data          = &bfin_ad7877_ts_info,
216                 .irq                    = IRQ_PF8,
217                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
218                 .bus_num        = 0,
219                 .chip_select  = 2,
220                 .controller_data = &spi_ad7877_chip_info,
221         },
222 #endif
223 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
224          && defined(CONFIG_SND_SOC_WM8731_SPI)
225         {
226                 .modalias       = "wm8731",
227                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
228                 .bus_num        = 0,
229                 .chip_select    = 5,
230                 .controller_data = &spi_wm8731_chip_info,
231                 .mode = SPI_MODE_0,
232         },
233 #endif
234 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
235         {
236                 .modalias = "spidev",
237                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
238                 .bus_num = 0,
239                 .chip_select = 1,
240                 .controller_data = &spidev_chip_info,
241         },
242 #endif
243 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
244         {
245                 .modalias = "bfin-lq035q1-spi",
246                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
247                 .bus_num = 0,
248                 .chip_select = 1,
249                 .controller_data = &lq035q1_spi_chip_info,
250                 .mode = SPI_CPHA | SPI_CPOL,
251         },
252 #endif
253 };
254
255 /* SPI controller data */
256 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
257 /* SPI (0) */
258 static struct bfin5xx_spi_master bfin_spi0_info = {
259         .num_chipselect = 6,
260         .enable_dma = 1,  /* master has the ability to do dma transfer */
261         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
262 };
263
264 static struct resource bfin_spi0_resource[] = {
265         [0] = {
266                 .start = SPI0_REGBASE,
267                 .end   = SPI0_REGBASE + 0xFF,
268                 .flags = IORESOURCE_MEM,
269                 },
270         [1] = {
271                 .start = CH_SPI0,
272                 .end   = CH_SPI0,
273                 .flags = IORESOURCE_DMA,
274         },
275         [2] = {
276                 .start = IRQ_SPI0,
277                 .end   = IRQ_SPI0,
278                 .flags = IORESOURCE_IRQ,
279         },
280 };
281
282 static struct platform_device bfin_spi0_device = {
283         .name = "bfin-spi",
284         .id = 0, /* Bus number */
285         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
286         .resource = bfin_spi0_resource,
287         .dev = {
288                 .platform_data = &bfin_spi0_info, /* Passed to driver */
289         },
290 };
291
292 /* SPI (1) */
293 static struct bfin5xx_spi_master bfin_spi1_info = {
294         .num_chipselect = 5,
295         .enable_dma = 1,  /* master has the ability to do dma transfer */
296         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
297 };
298
299 static struct resource bfin_spi1_resource[] = {
300         [0] = {
301                 .start = SPI1_REGBASE,
302                 .end   = SPI1_REGBASE + 0xFF,
303                 .flags = IORESOURCE_MEM,
304                 },
305         [1] = {
306                 .start = CH_SPI1,
307                 .end   = CH_SPI1,
308                 .flags = IORESOURCE_DMA,
309         },
310         [2] = {
311                 .start = IRQ_SPI1,
312                 .end   = IRQ_SPI1,
313                 .flags = IORESOURCE_IRQ,
314         },
315 };
316
317 static struct platform_device bfin_spi1_device = {
318         .name = "bfin-spi",
319         .id = 1, /* Bus number */
320         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
321         .resource = bfin_spi1_resource,
322         .dev = {
323                 .platform_data = &bfin_spi1_info, /* Passed to driver */
324         },
325 };
326 #endif  /* spi master and devices */
327
328 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
329 #ifdef CONFIG_SERIAL_BFIN_UART0
330 static struct resource bfin_uart0_resources[] = {
331         {
332                 .start = UART0_THR,
333                 .end = UART0_GCTL+2,
334                 .flags = IORESOURCE_MEM,
335         },
336         {
337                 .start = IRQ_UART0_RX,
338                 .end = IRQ_UART0_RX+1,
339                 .flags = IORESOURCE_IRQ,
340         },
341         {
342                 .start = IRQ_UART0_ERROR,
343                 .end = IRQ_UART0_ERROR,
344                 .flags = IORESOURCE_IRQ,
345         },
346         {
347                 .start = CH_UART0_TX,
348                 .end = CH_UART0_TX,
349                 .flags = IORESOURCE_DMA,
350         },
351         {
352                 .start = CH_UART0_RX,
353                 .end = CH_UART0_RX,
354                 .flags = IORESOURCE_DMA,
355         },
356 };
357
358 unsigned short bfin_uart0_peripherals[] = {
359         P_UART0_TX, P_UART0_RX, 0
360 };
361
362 static struct platform_device bfin_uart0_device = {
363         .name = "bfin-uart",
364         .id = 0,
365         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
366         .resource = bfin_uart0_resources,
367         .dev = {
368                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
369         },
370 };
371 #endif
372 #ifdef CONFIG_SERIAL_BFIN_UART1
373 static struct resource bfin_uart1_resources[] = {
374         {
375                 .start = UART1_THR,
376                 .end = UART1_GCTL+2,
377                 .flags = IORESOURCE_MEM,
378         },
379         {
380                 .start = IRQ_UART1_RX,
381                 .end = IRQ_UART1_RX+1,
382                 .flags = IORESOURCE_IRQ,
383         },
384         {
385                 .start = IRQ_UART1_ERROR,
386                 .end = IRQ_UART1_ERROR,
387                 .flags = IORESOURCE_IRQ,
388         },
389         {
390                 .start = CH_UART1_TX,
391                 .end = CH_UART1_TX,
392                 .flags = IORESOURCE_DMA,
393         },
394         {
395                 .start = CH_UART1_RX,
396                 .end = CH_UART1_RX,
397                 .flags = IORESOURCE_DMA,
398         },
399 };
400
401 unsigned short bfin_uart1_peripherals[] = {
402         P_UART1_TX, P_UART1_RX, 0
403 };
404
405 static struct platform_device bfin_uart1_device = {
406         .name = "bfin-uart",
407         .id = 1,
408         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
409         .resource = bfin_uart1_resources,
410         .dev = {
411                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
412         },
413 };
414 #endif
415 #endif
416
417 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
418 #ifdef CONFIG_BFIN_SIR0
419 static struct resource bfin_sir0_resources[] = {
420         {
421                 .start = 0xFFC00400,
422                 .end = 0xFFC004FF,
423                 .flags = IORESOURCE_MEM,
424         },
425         {
426                 .start = IRQ_UART0_RX,
427                 .end = IRQ_UART0_RX+1,
428                 .flags = IORESOURCE_IRQ,
429         },
430         {
431                 .start = CH_UART0_RX,
432                 .end = CH_UART0_RX+1,
433                 .flags = IORESOURCE_DMA,
434         },
435 };
436
437 static struct platform_device bfin_sir0_device = {
438         .name = "bfin_sir",
439         .id = 0,
440         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
441         .resource = bfin_sir0_resources,
442 };
443 #endif
444 #ifdef CONFIG_BFIN_SIR1
445 static struct resource bfin_sir1_resources[] = {
446         {
447                 .start = 0xFFC02000,
448                 .end = 0xFFC020FF,
449                 .flags = IORESOURCE_MEM,
450         },
451         {
452                 .start = IRQ_UART1_RX,
453                 .end = IRQ_UART1_RX+1,
454                 .flags = IORESOURCE_IRQ,
455         },
456         {
457                 .start = CH_UART1_RX,
458                 .end = CH_UART1_RX+1,
459                 .flags = IORESOURCE_DMA,
460         },
461 };
462
463 static struct platform_device bfin_sir1_device = {
464         .name = "bfin_sir",
465         .id = 1,
466         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
467         .resource = bfin_sir1_resources,
468 };
469 #endif
470 #endif
471
472 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
473 static struct resource bfin_twi0_resource[] = {
474         [0] = {
475                 .start = TWI0_REGBASE,
476                 .end   = TWI0_REGBASE,
477                 .flags = IORESOURCE_MEM,
478         },
479         [1] = {
480                 .start = IRQ_TWI,
481                 .end   = IRQ_TWI,
482                 .flags = IORESOURCE_IRQ,
483         },
484 };
485
486 static struct platform_device i2c_bfin_twi_device = {
487         .name = "i2c-bfin-twi",
488         .id = 0,
489         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
490         .resource = bfin_twi0_resource,
491 };
492 #endif
493
494 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
495 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
496         {
497                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
498         },
499 #endif
500 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
501         {
502                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
503                 .irq = IRQ_PF8,
504         },
505 #endif
506 };
507
508 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
509 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
510 static struct resource bfin_sport0_uart_resources[] = {
511         {
512                 .start = SPORT0_TCR1,
513                 .end = SPORT0_MRCS3+4,
514                 .flags = IORESOURCE_MEM,
515         },
516         {
517                 .start = IRQ_SPORT0_RX,
518                 .end = IRQ_SPORT0_RX+1,
519                 .flags = IORESOURCE_IRQ,
520         },
521         {
522                 .start = IRQ_SPORT0_ERROR,
523                 .end = IRQ_SPORT0_ERROR,
524                 .flags = IORESOURCE_IRQ,
525         },
526 };
527
528 unsigned short bfin_sport0_peripherals[] = {
529         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
530         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
531 };
532
533 static struct platform_device bfin_sport0_uart_device = {
534         .name = "bfin-sport-uart",
535         .id = 0,
536         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
537         .resource = bfin_sport0_uart_resources,
538         .dev = {
539                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
540         },
541 };
542 #endif
543 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
544 static struct resource bfin_sport1_uart_resources[] = {
545         {
546                 .start = SPORT1_TCR1,
547                 .end = SPORT1_MRCS3+4,
548                 .flags = IORESOURCE_MEM,
549         },
550         {
551                 .start = IRQ_SPORT1_RX,
552                 .end = IRQ_SPORT1_RX+1,
553                 .flags = IORESOURCE_IRQ,
554         },
555         {
556                 .start = IRQ_SPORT1_ERROR,
557                 .end = IRQ_SPORT1_ERROR,
558                 .flags = IORESOURCE_IRQ,
559         },
560 };
561
562 unsigned short bfin_sport1_peripherals[] = {
563         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
564         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
565 };
566
567 static struct platform_device bfin_sport1_uart_device = {
568         .name = "bfin-sport-uart",
569         .id = 1,
570         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
571         .resource = bfin_sport1_uart_resources,
572         .dev = {
573                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
574         },
575 };
576 #endif
577 #endif
578
579 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
580 #include <linux/input.h>
581 #include <linux/gpio_keys.h>
582
583 static struct gpio_keys_button bfin_gpio_keys_table[] = {
584         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
585         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
586 };
587
588 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
589         .buttons        = bfin_gpio_keys_table,
590         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
591 };
592
593 static struct platform_device bfin_device_gpiokeys = {
594         .name      = "gpio-keys",
595         .dev = {
596                 .platform_data = &bfin_gpio_keys_data,
597         },
598 };
599 #endif
600
601 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
602
603 static struct bfin_sd_host bfin_sdh_data = {
604         .dma_chan = CH_RSI,
605         .irq_int0 = IRQ_RSI_INT0,
606         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
607 };
608
609 static struct platform_device bf51x_sdh_device = {
610         .name = "bfin-sdh",
611         .id = 0,
612         .dev = {
613                 .platform_data = &bfin_sdh_data,
614         },
615 };
616 #endif
617
618 static const unsigned int cclk_vlev_datasheet[] =
619 {
620         VRPAIR(VLEV_100, 400000000),
621         VRPAIR(VLEV_105, 426000000),
622         VRPAIR(VLEV_110, 500000000),
623         VRPAIR(VLEV_115, 533000000),
624         VRPAIR(VLEV_120, 600000000),
625 };
626
627 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
628         .tuple_tab = cclk_vlev_datasheet,
629         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
630         .vr_settling_time = 25 /* us */,
631 };
632
633 static struct platform_device bfin_dpmc = {
634         .name = "bfin dpmc",
635         .dev = {
636                 .platform_data = &bfin_dmpc_vreg_data,
637         },
638 };
639
640 static struct platform_device *tcm_devices[] __initdata = {
641
642         &bfin_dpmc,
643
644 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
645         &rtc_device,
646 #endif
647
648 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
649         &bfin_mii_bus,
650         &bfin_mac_device,
651 #endif
652
653 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
654         &bfin_spi0_device,
655         &bfin_spi1_device,
656 #endif
657
658 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
659 #ifdef CONFIG_SERIAL_BFIN_UART0
660         &bfin_uart0_device,
661 #endif
662 #ifdef CONFIG_SERIAL_BFIN_UART1
663         &bfin_uart1_device,
664 #endif
665 #endif
666
667 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
668 #ifdef CONFIG_BFIN_SIR0
669         &bfin_sir0_device,
670 #endif
671 #ifdef CONFIG_BFIN_SIR1
672         &bfin_sir1_device,
673 #endif
674 #endif
675
676 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
677         &i2c_bfin_twi_device,
678 #endif
679
680 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
681 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
682         &bfin_sport0_uart_device,
683 #endif
684 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
685         &bfin_sport1_uart_device,
686 #endif
687 #endif
688
689 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
690         &bfin_device_gpiokeys,
691 #endif
692
693 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
694         &bf51x_sdh_device,
695 #endif
696
697 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
698         &tcm_flash_device,
699 #endif
700 };
701
702 static int __init tcm_init(void)
703 {
704         printk(KERN_INFO "%s(): registering device resources\n", __func__);
705         i2c_register_board_info(0, bfin_i2c_board_info,
706                                 ARRAY_SIZE(bfin_i2c_board_info));
707         platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
708         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
709         return 0;
710 }
711
712 arch_initcall(tcm_init);
713
714 static struct platform_device *tcm_early_devices[] __initdata = {
715 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
716 #ifdef CONFIG_SERIAL_BFIN_UART0
717         &bfin_uart0_device,
718 #endif
719 #ifdef CONFIG_SERIAL_BFIN_UART1
720         &bfin_uart1_device,
721 #endif
722 #endif
723
724 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
725 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
726         &bfin_sport0_uart_device,
727 #endif
728 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
729         &bfin_sport1_uart_device,
730 #endif
731 #endif
732 };
733
734 void __init native_machine_early_platform_add_devices(void)
735 {
736         printk(KERN_INFO "register early platform devices\n");
737         early_platform_add_devices(tcm_early_devices,
738                 ARRAY_SIZE(tcm_early_devices));
739 }
740
741 void native_machine_restart(char *cmd)
742 {
743         /* workaround reboot hang when booting from SPI */
744         if ((bfin_read_SYSCR() & 0x7) == 0x3)
745                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
746 }
747
748 void bfin_get_ether_addr(char *addr)
749 {
750         random_ether_addr(addr);
751         printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
752 }
753 EXPORT_SYMBOL(bfin_get_ether_addr);