]> nv-tegra.nvidia Code Review - linux-2.6.git/blob - arch/arm/mach-ns9xxx/irq.c
Merge branch 'irq-fix' of git://www.modarm9.com/gitsrc/pub/people/ukleinek/linux...
[linux-2.6.git] / arch / arm / mach-ns9xxx / irq.c
1 /*
2  * arch/arm/mach-ns9xxx/irq.c
3  *
4  * Copyright (C) 2006,2007 by Digi International Inc.
5  * All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  */
11 #include <linux/interrupt.h>
12 #include <linux/kernel_stat.h>
13 #include <asm/io.h>
14 #include <asm/mach/irq.h>
15 #include <asm/mach-types.h>
16 #include <asm/arch-ns9xxx/regs-sys-common.h>
17 #include <asm/arch-ns9xxx/irqs.h>
18 #include <asm/arch-ns9xxx/board.h>
19
20 #include "generic.h"
21
22 /* simple interrupt prio table: prio(x) < prio(y) <=> x < y */
23 #define irq2prio(i) (i)
24 #define prio2irq(p) (p)
25
26 static void ns9xxx_mask_irq(unsigned int irq)
27 {
28         /* XXX: better use cpp symbols */
29         int prio = irq2prio(irq);
30         u32 ic = __raw_readl(SYS_IC(prio / 4));
31         ic &= ~(1 << (7 + 8 * (3 - (prio & 3))));
32         __raw_writel(ic, SYS_IC(prio / 4));
33 }
34
35 static void ns9xxx_ack_irq(unsigned int irq)
36 {
37         __raw_writel(0, SYS_ISRADDR);
38 }
39
40 static void ns9xxx_maskack_irq(unsigned int irq)
41 {
42         ns9xxx_mask_irq(irq);
43         ns9xxx_ack_irq(irq);
44 }
45
46 static void ns9xxx_unmask_irq(unsigned int irq)
47 {
48         /* XXX: better use cpp symbols */
49         int prio = irq2prio(irq);
50         u32 ic = __raw_readl(SYS_IC(prio / 4));
51         ic |= 1 << (7 + 8 * (3 - (prio & 3)));
52         __raw_writel(ic, SYS_IC(prio / 4));
53 }
54
55 static struct irq_chip ns9xxx_chip = {
56         .ack            = ns9xxx_ack_irq,
57         .mask           = ns9xxx_mask_irq,
58         .mask_ack       = ns9xxx_maskack_irq,
59         .unmask         = ns9xxx_unmask_irq,
60 };
61
62 #if 0
63 #define handle_irq handle_level_irq
64 #else
65 static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
66 {
67         unsigned int cpu = smp_processor_id();
68         struct irqaction *action;
69         irqreturn_t action_ret;
70
71         spin_lock(&desc->lock);
72
73         BUG_ON(desc->status & IRQ_INPROGRESS);
74
75         desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
76         kstat_cpu(cpu).irqs[irq]++;
77
78         action = desc->action;
79         if (unlikely(!action || (desc->status & IRQ_DISABLED)))
80                 goto out_mask;
81
82         desc->status |= IRQ_INPROGRESS;
83         spin_unlock(&desc->lock);
84
85         action_ret = handle_IRQ_event(irq, action);
86
87         /* XXX: There is no direct way to access noirqdebug, so check
88          * unconditionally for spurious irqs...
89          * Maybe this function should go to kernel/irq/chip.c? */
90         note_interrupt(irq, desc, action_ret);
91
92         spin_lock(&desc->lock);
93         desc->status &= ~IRQ_INPROGRESS;
94
95         if (desc->status & IRQ_DISABLED)
96 out_mask:
97                 desc->chip->mask(irq);
98
99         /* ack unconditionally to unmask lower prio irqs */
100         desc->chip->ack(irq);
101
102         spin_unlock(&desc->lock);
103 }
104 #define handle_irq handle_prio_irq
105 #endif
106
107 void __init ns9xxx_init_irq(void)
108 {
109         int i;
110
111         /* disable all IRQs */
112         for (i = 0; i < 8; ++i)
113                 __raw_writel(prio2irq(4 * i) << 24 |
114                                 prio2irq(4 * i + 1) << 16 |
115                                 prio2irq(4 * i + 2) << 8 |
116                                 prio2irq(4 * i + 3),
117                                 SYS_IC(i));
118
119         for (i = 0; i < 32; ++i)
120                 __raw_writel(prio2irq(i), SYS_IVA(i));
121
122         for (i = 0; i <= 31; ++i) {
123                 set_irq_chip(i, &ns9xxx_chip);
124                 set_irq_handler(i, handle_irq);
125                 set_irq_flags(i, IRQF_VALID);
126         }
127 }