arch/arm/mach-at91/at91sam9260_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9260_devices.c
   3  *
   4  *  Copyright (C) 2006 Atmel
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/i2c-gpio.h>
  18
  19 #include <mach/board.h>
  20 #include <mach/gpio.h>
  21 #include <mach/cpu.h>
  22 #include <mach/at91sam9260.h>
  23 #include <mach/at91sam9260_matrix.h>
  24 #include <mach/at91sam9_smc.h>
  25
  26 #include "generic.h"
  27
  28
  29 /* --------------------------------------------------------------------
  30  *  USB Host
  31  * -------------------------------------------------------------------- */
  32
  33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  34 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  35 static struct at91_usbh_data usbh_data;
  36
  37 static struct resource usbh_resources[] = {
  38         [0] = {
  39                 .start  = AT91SAM9260_UHP_BASE,
  40                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
  41                 .flags  = IORESOURCE_MEM,
  42         },
  43         [1] = {
  44                 .start  = AT91SAM9260_ID_UHP,
  45                 .end    = AT91SAM9260_ID_UHP,
  46                 .flags  = IORESOURCE_IRQ,
  47         },
  48 };
  49
  50 static struct platform_device at91_usbh_device = {
  51         .name           = "at91_ohci",
  52         .id             = -1,
  53         .dev            = {
  54                                 .dma_mask               = &ohci_dmamask,
  55                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  56                                 .platform_data          = &usbh_data,
  57         },
  58         .resource       = usbh_resources,
  59         .num_resources  = ARRAY_SIZE(usbh_resources),
  60 };
  61
  62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  63 {
  64         if (!data)
  65                 return;
  66
  67         usbh_data = *data;
  68         platform_device_register(&at91_usbh_device);
  69 }
  70 #else
  71 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  72 #endif
  73
  74
  75 /* --------------------------------------------------------------------
  76  *  USB Device (Gadget)
  77  * -------------------------------------------------------------------- */
  78
  79 #ifdef CONFIG_USB_GADGET_AT91
  80 static struct at91_udc_data udc_data;
  81
  82 static struct resource udc_resources[] = {
  83         [0] = {
  84                 .start  = AT91SAM9260_BASE_UDP,
  85                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
  86                 .flags  = IORESOURCE_MEM,
  87         },
  88         [1] = {
  89                 .start  = AT91SAM9260_ID_UDP,
  90                 .end    = AT91SAM9260_ID_UDP,
  91                 .flags  = IORESOURCE_IRQ,
  92         },
  93 };
  94
  95 static struct platform_device at91_udc_device = {
  96         .name           = "at91_udc",
  97         .id             = -1,
  98         .dev            = {
  99                                 .platform_data          = &udc_data,
 100         },
 101         .resource       = udc_resources,
 102         .num_resources  = ARRAY_SIZE(udc_resources),
 103 };
 104
 105 void __init at91_add_device_udc(struct at91_udc_data *data)
 106 {
 107         if (!data)
 108                 return;
 109
 110         if (data->vbus_pin) {
 111                 at91_set_gpio_input(data->vbus_pin, 0);
 112                 at91_set_deglitch(data->vbus_pin, 1);
 113         }
 114
 115         /* Pullup pin is handled internally by USB device peripheral */
 116
 117         udc_data = *data;
 118         platform_device_register(&at91_udc_device);
 119 }
 120 #else
 121 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 122 #endif
 123
 124
 125 /* --------------------------------------------------------------------
 126  *  Ethernet
 127  * -------------------------------------------------------------------- */
 128
 129 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 130 static u64 eth_dmamask = DMA_BIT_MASK(32);
 131 static struct at91_eth_data eth_data;
 132
 133 static struct resource eth_resources[] = {
 134         [0] = {
 135                 .start  = AT91SAM9260_BASE_EMAC,
 136                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
 137                 .flags  = IORESOURCE_MEM,
 138         },
 139         [1] = {
 140                 .start  = AT91SAM9260_ID_EMAC,
 141                 .end    = AT91SAM9260_ID_EMAC,
 142                 .flags  = IORESOURCE_IRQ,
 143         },
 144 };
 145
 146 static struct platform_device at91sam9260_eth_device = {
 147         .name           = "macb",
 148         .id             = -1,
 149         .dev            = {
 150                                 .dma_mask               = &eth_dmamask,
 151                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 152                                 .platform_data          = &eth_data,
 153         },
 154         .resource       = eth_resources,
 155         .num_resources  = ARRAY_SIZE(eth_resources),
 156 };
 157
 158 void __init at91_add_device_eth(struct at91_eth_data *data)
 159 {
 160         if (!data)
 161                 return;
 162
 163         if (data->phy_irq_pin) {
 164                 at91_set_gpio_input(data->phy_irq_pin, 0);
 165                 at91_set_deglitch(data->phy_irq_pin, 1);
 166         }
 167
 168         /* Pins used for MII and RMII */
 169         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
 170         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
 171         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
 172         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
 173         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
 174         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
 175         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
 176         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
 177         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
 178         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
 179
 180         if (!data->is_rmii) {
 181                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
 182                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
 183                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
 184                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
 185                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
 186                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
 187                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
 188                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
 189         }
 190
 191         eth_data = *data;
 192         platform_device_register(&at91sam9260_eth_device);
 193 }
 194 #else
 195 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 196 #endif
 197
 198
 199 /* --------------------------------------------------------------------
 200  *  MMC / SD
 201  * -------------------------------------------------------------------- */
 202
 203 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 204 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 205 static struct at91_mmc_data mmc_data;
 206
 207 static struct resource mmc_resources[] = {
 208         [0] = {
 209                 .start  = AT91SAM9260_BASE_MCI,
 210                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
 211                 .flags  = IORESOURCE_MEM,
 212         },
 213         [1] = {
 214                 .start  = AT91SAM9260_ID_MCI,
 215                 .end    = AT91SAM9260_ID_MCI,
 216                 .flags  = IORESOURCE_IRQ,
 217         },
 218 };
 219
 220 static struct platform_device at91sam9260_mmc_device = {
 221         .name           = "at91_mci",
 222         .id             = -1,
 223         .dev            = {
 224                                 .dma_mask               = &mmc_dmamask,
 225                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 226                                 .platform_data          = &mmc_data,
 227         },
 228         .resource       = mmc_resources,
 229         .num_resources  = ARRAY_SIZE(mmc_resources),
 230 };
 231
 232 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 233 {
 234         if (!data)
 235                 return;
 236
 237         /* input/irq */
 238         if (data->det_pin) {
 239                 at91_set_gpio_input(data->det_pin, 1);
 240                 at91_set_deglitch(data->det_pin, 1);
 241         }
 242         if (data->wp_pin)
 243                 at91_set_gpio_input(data->wp_pin, 1);
 244         if (data->vcc_pin)
 245                 at91_set_gpio_output(data->vcc_pin, 0);
 246
 247         /* CLK */
 248         at91_set_A_periph(AT91_PIN_PA8, 0);
 249
 250         if (data->slot_b) {
 251                 /* CMD */
 252                 at91_set_B_periph(AT91_PIN_PA1, 1);
 253
 254                 /* DAT0, maybe DAT1..DAT3 */
 255                 at91_set_B_periph(AT91_PIN_PA0, 1);
 256                 if (data->wire4) {
 257                         at91_set_B_periph(AT91_PIN_PA5, 1);
 258                         at91_set_B_periph(AT91_PIN_PA4, 1);
 259                         at91_set_B_periph(AT91_PIN_PA3, 1);
 260                 }
 261         } else {
 262                 /* CMD */
 263                 at91_set_A_periph(AT91_PIN_PA7, 1);
 264
 265                 /* DAT0, maybe DAT1..DAT3 */
 266                 at91_set_A_periph(AT91_PIN_PA6, 1);
 267                 if (data->wire4) {
 268                         at91_set_A_periph(AT91_PIN_PA9, 1);
 269                         at91_set_A_periph(AT91_PIN_PA10, 1);
 270                         at91_set_A_periph(AT91_PIN_PA11, 1);
 271                 }
 272         }
 273
 274         mmc_data = *data;
 275         platform_device_register(&at91sam9260_mmc_device);
 276 }
 277 #else
 278 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 279 #endif
 280
 281 /* --------------------------------------------------------------------
 282  *  MMC / SD Slot for Atmel MCI Driver
 283  * -------------------------------------------------------------------- */
 284
 285 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
 286 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 287 static struct mci_platform_data mmc_data;
 288
 289 static struct resource mmc_resources[] = {
 290         [0] = {
 291                 .start  = AT91SAM9260_BASE_MCI,
 292                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
 293                 .flags  = IORESOURCE_MEM,
 294         },
 295         [1] = {
 296                 .start  = AT91SAM9260_ID_MCI,
 297                 .end    = AT91SAM9260_ID_MCI,
 298                 .flags  = IORESOURCE_IRQ,
 299         },
 300 };
 301
 302 static struct platform_device at91sam9260_mmc_device = {
 303         .name           = "atmel_mci",
 304         .id             = -1,
 305         .dev            = {
 306                                 .dma_mask               = &mmc_dmamask,
 307                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 308                                 .platform_data          = &mmc_data,
 309         },
 310         .resource       = mmc_resources,
 311         .num_resources  = ARRAY_SIZE(mmc_resources),
 312 };
 313
 314 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 315 {
 316         unsigned int i;
 317         unsigned int slot_count = 0;
 318
 319         if (!data)
 320                 return;
 321
 322         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
 323                 if (data->slot[i].bus_width) {
 324                         /* input/irq */
 325                         if (data->slot[i].detect_pin) {
 326                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
 327                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
 328                         }
 329                         if (data->slot[i].wp_pin)
 330                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
 331
 332                         switch (i) {
 333                         case 0:
 334                                 /* CMD */
 335                                 at91_set_A_periph(AT91_PIN_PA7, 1);
 336                                 /* DAT0, maybe DAT1..DAT3 */
 337                                 at91_set_A_periph(AT91_PIN_PA6, 1);
 338                                 if (data->slot[i].bus_width == 4) {
 339                                         at91_set_A_periph(AT91_PIN_PA9, 1);
 340                                         at91_set_A_periph(AT91_PIN_PA10, 1);
 341                                         at91_set_A_periph(AT91_PIN_PA11, 1);
 342                                 }
 343                                 slot_count++;
 344                                 break;
 345                         case 1:
 346                                 /* CMD */
 347                                 at91_set_B_periph(AT91_PIN_PA1, 1);
 348                                 /* DAT0, maybe DAT1..DAT3 */
 349                                 at91_set_B_periph(AT91_PIN_PA0, 1);
 350                                 if (data->slot[i].bus_width == 4) {
 351                                         at91_set_B_periph(AT91_PIN_PA5, 1);
 352                                         at91_set_B_periph(AT91_PIN_PA4, 1);
 353                                         at91_set_B_periph(AT91_PIN_PA3, 1);
 354                                 }
 355                                 slot_count++;
 356                                 break;
 357                         default:
 358                                 printk(KERN_ERR
 359                                         "AT91: SD/MMC slot %d not available\n", i);
 360                                 break;
 361                         }
 362                 }
 363         }
 364
 365         if (slot_count) {
 366                 /* CLK */
 367                 at91_set_A_periph(AT91_PIN_PA8, 0);
 368
 369                 mmc_data = *data;
 370                 platform_device_register(&at91sam9260_mmc_device);
 371         }
 372 }
 373 #else
 374 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
 375 #endif
 376
 377
 378 /* --------------------------------------------------------------------
 379  *  NAND / SmartMedia
 380  * -------------------------------------------------------------------- */
 381
 382 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 383 static struct atmel_nand_data nand_data;
 384
 385 #define NAND_BASE       AT91_CHIPSELECT_3
 386
 387 static struct resource nand_resources[] = {
 388         [0] = {
 389                 .start  = NAND_BASE,
 390                 .end    = NAND_BASE + SZ_256M - 1,
 391                 .flags  = IORESOURCE_MEM,
 392         },
 393         [1] = {
 394                 .start  = AT91_BASE_SYS + AT91_ECC,
 395                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
 396                 .flags  = IORESOURCE_MEM,
 397         }
 398 };
 399
 400 static struct platform_device at91sam9260_nand_device = {
 401         .name           = "atmel_nand",
 402         .id             = -1,
 403         .dev            = {
 404                                 .platform_data  = &nand_data,
 405         },
 406         .resource       = nand_resources,
 407         .num_resources  = ARRAY_SIZE(nand_resources),
 408 };
 409
 410 void __init at91_add_device_nand(struct atmel_nand_data *data)
 411 {
 412         unsigned long csa;
 413
 414         if (!data)
 415                 return;
 416
 417         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 418         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 419
 420         /* enable pin */
 421         if (data->enable_pin)
 422                 at91_set_gpio_output(data->enable_pin, 1);
 423
 424         /* ready/busy pin */
 425         if (data->rdy_pin)
 426                 at91_set_gpio_input(data->rdy_pin, 1);
 427
 428         /* card detect pin */
 429         if (data->det_pin)
 430                 at91_set_gpio_input(data->det_pin, 1);
 431
 432         nand_data = *data;
 433         platform_device_register(&at91sam9260_nand_device);
 434 }
 435 #else
 436 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 437 #endif
 438
 439
 440 /* --------------------------------------------------------------------
 441  *  TWI (i2c)
 442  * -------------------------------------------------------------------- */
 443
 444 /*
 445  * Prefer the GPIO code since the TWI controller isn't robust
 446  * (gets overruns and underruns under load) and can only issue
 447  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 448  */
 449
 450 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 451
 452 static struct i2c_gpio_platform_data pdata = {
 453         .sda_pin                = AT91_PIN_PA23,
 454         .sda_is_open_drain      = 1,
 455         .scl_pin                = AT91_PIN_PA24,
 456         .scl_is_open_drain      = 1,
 457         .udelay                 = 2,            /* ~100 kHz */
 458 };
 459
 460 static struct platform_device at91sam9260_twi_device = {
 461         .name                   = "i2c-gpio",
 462         .id                     = -1,
 463         .dev.platform_data      = &pdata,
 464 };
 465
 466 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 467 {
 468         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 469         at91_set_multi_drive(AT91_PIN_PA23, 1);
 470
 471         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 472         at91_set_multi_drive(AT91_PIN_PA24, 1);
 473
 474         i2c_register_board_info(0, devices, nr_devices);
 475         platform_device_register(&at91sam9260_twi_device);
 476 }
 477
 478 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 479
 480 static struct resource twi_resources[] = {
 481         [0] = {
 482                 .start  = AT91SAM9260_BASE_TWI,
 483                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
 484                 .flags  = IORESOURCE_MEM,
 485         },
 486         [1] = {
 487                 .start  = AT91SAM9260_ID_TWI,
 488                 .end    = AT91SAM9260_ID_TWI,
 489                 .flags  = IORESOURCE_IRQ,
 490         },
 491 };
 492
 493 static struct platform_device at91sam9260_twi_device = {
 494         .name           = "at91_i2c",
 495         .id             = -1,
 496         .resource       = twi_resources,
 497         .num_resources  = ARRAY_SIZE(twi_resources),
 498 };
 499
 500 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 501 {
 502         /* pins used for TWI interface */
 503         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 504         at91_set_multi_drive(AT91_PIN_PA23, 1);
 505
 506         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 507         at91_set_multi_drive(AT91_PIN_PA24, 1);
 508
 509         i2c_register_board_info(0, devices, nr_devices);
 510         platform_device_register(&at91sam9260_twi_device);
 511 }
 512 #else
 513 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 514 #endif
 515
 516
 517 /* --------------------------------------------------------------------
 518  *  SPI
 519  * -------------------------------------------------------------------- */
 520
 521 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 522 static u64 spi_dmamask = DMA_BIT_MASK(32);
 523
 524 static struct resource spi0_resources[] = {
 525         [0] = {
 526                 .start  = AT91SAM9260_BASE_SPI0,
 527                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
 528                 .flags  = IORESOURCE_MEM,
 529         },
 530         [1] = {
 531                 .start  = AT91SAM9260_ID_SPI0,
 532                 .end    = AT91SAM9260_ID_SPI0,
 533                 .flags  = IORESOURCE_IRQ,
 534         },
 535 };
 536
 537 static struct platform_device at91sam9260_spi0_device = {
 538         .name           = "atmel_spi",
 539         .id             = 0,
 540         .dev            = {
 541                                 .dma_mask               = &spi_dmamask,
 542                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 543         },
 544         .resource       = spi0_resources,
 545         .num_resources  = ARRAY_SIZE(spi0_resources),
 546 };
 547
 548 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
 549
 550 static struct resource spi1_resources[] = {
 551         [0] = {
 552                 .start  = AT91SAM9260_BASE_SPI1,
 553                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
 554                 .flags  = IORESOURCE_MEM,
 555         },
 556         [1] = {
 557                 .start  = AT91SAM9260_ID_SPI1,
 558                 .end    = AT91SAM9260_ID_SPI1,
 559                 .flags  = IORESOURCE_IRQ,
 560         },
 561 };
 562
 563 static struct platform_device at91sam9260_spi1_device = {
 564         .name           = "atmel_spi",
 565         .id             = 1,
 566         .dev            = {
 567                                 .dma_mask               = &spi_dmamask,
 568                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 569         },
 570         .resource       = spi1_resources,
 571         .num_resources  = ARRAY_SIZE(spi1_resources),
 572 };
 573
 574 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
 575
 576 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 577 {
 578         int i;
 579         unsigned long cs_pin;
 580         short enable_spi0 = 0;
 581         short enable_spi1 = 0;
 582
 583         /* Choose SPI chip-selects */
 584         for (i = 0; i < nr_devices; i++) {
 585                 if (devices[i].controller_data)
 586                         cs_pin = (unsigned long) devices[i].controller_data;
 587                 else if (devices[i].bus_num == 0)
 588                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 589                 else
 590                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 591
 592                 if (devices[i].bus_num == 0)
 593                         enable_spi0 = 1;
 594                 else
 595                         enable_spi1 = 1;
 596
 597                 /* enable chip-select pin */
 598                 at91_set_gpio_output(cs_pin, 1);
 599
 600                 /* pass chip-select pin to driver */
 601                 devices[i].controller_data = (void *) cs_pin;
 602         }
 603
 604         spi_register_board_info(devices, nr_devices);
 605
 606         /* Configure SPI bus(es) */
 607         if (enable_spi0) {
 608                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 609                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 610                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
 611
 612                 platform_device_register(&at91sam9260_spi0_device);
 613         }
 614         if (enable_spi1) {
 615                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
 616                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
 617                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
 618
 619                 platform_device_register(&at91sam9260_spi1_device);
 620         }
 621 }
 622 #else
 623 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 624 #endif
 625
 626
 627 /* --------------------------------------------------------------------
 628  *  Timer/Counter blocks
 629  * -------------------------------------------------------------------- */
 630
 631 #ifdef CONFIG_ATMEL_TCLIB
 632
 633 static struct resource tcb0_resources[] = {
 634         [0] = {
 635                 .start  = AT91SAM9260_BASE_TCB0,
 636                 .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
 637                 .flags  = IORESOURCE_MEM,
 638         },
 639         [1] = {
 640                 .start  = AT91SAM9260_ID_TC0,
 641                 .end    = AT91SAM9260_ID_TC0,
 642                 .flags  = IORESOURCE_IRQ,
 643         },
 644         [2] = {
 645                 .start  = AT91SAM9260_ID_TC1,
 646                 .end    = AT91SAM9260_ID_TC1,
 647                 .flags  = IORESOURCE_IRQ,
 648         },
 649         [3] = {
 650                 .start  = AT91SAM9260_ID_TC2,
 651                 .end    = AT91SAM9260_ID_TC2,
 652                 .flags  = IORESOURCE_IRQ,
 653         },
 654 };
 655
 656 static struct platform_device at91sam9260_tcb0_device = {
 657         .name           = "atmel_tcb",
 658         .id             = 0,
 659         .resource       = tcb0_resources,
 660         .num_resources  = ARRAY_SIZE(tcb0_resources),
 661 };
 662
 663 static struct resource tcb1_resources[] = {
 664         [0] = {
 665                 .start  = AT91SAM9260_BASE_TCB1,
 666                 .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
 667                 .flags  = IORESOURCE_MEM,
 668         },
 669         [1] = {
 670                 .start  = AT91SAM9260_ID_TC3,
 671                 .end    = AT91SAM9260_ID_TC3,
 672                 .flags  = IORESOURCE_IRQ,
 673         },
 674         [2] = {
 675                 .start  = AT91SAM9260_ID_TC4,
 676                 .end    = AT91SAM9260_ID_TC4,
 677                 .flags  = IORESOURCE_IRQ,
 678         },
 679         [3] = {
 680                 .start  = AT91SAM9260_ID_TC5,
 681                 .end    = AT91SAM9260_ID_TC5,
 682                 .flags  = IORESOURCE_IRQ,
 683         },
 684 };
 685
 686 static struct platform_device at91sam9260_tcb1_device = {
 687         .name           = "atmel_tcb",
 688         .id             = 1,
 689         .resource       = tcb1_resources,
 690         .num_resources  = ARRAY_SIZE(tcb1_resources),
 691 };
 692
 693 static void __init at91_add_device_tc(void)
 694 {
 695         platform_device_register(&at91sam9260_tcb0_device);
 696         platform_device_register(&at91sam9260_tcb1_device);
 697 }
 698 #else
 699 static void __init at91_add_device_tc(void) { }
 700 #endif
 701
 702
 703 /* --------------------------------------------------------------------
 704  *  RTT
 705  * -------------------------------------------------------------------- */
 706
 707 static struct resource rtt_resources[] = {
 708         {
 709                 .start  = AT91_BASE_SYS + AT91_RTT,
 710                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
 711                 .flags  = IORESOURCE_MEM,
 712         }
 713 };
 714
 715 static struct platform_device at91sam9260_rtt_device = {
 716         .name           = "at91_rtt",
 717         .id             = 0,
 718         .resource       = rtt_resources,
 719         .num_resources  = ARRAY_SIZE(rtt_resources),
 720 };
 721
 722 static void __init at91_add_device_rtt(void)
 723 {
 724         platform_device_register(&at91sam9260_rtt_device);
 725 }
 726
 727
 728 /* --------------------------------------------------------------------
 729  *  Watchdog
 730  * -------------------------------------------------------------------- */
 731
 732 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 733 static struct platform_device at91sam9260_wdt_device = {
 734         .name           = "at91_wdt",
 735         .id             = -1,
 736         .num_resources  = 0,
 737 };
 738
 739 static void __init at91_add_device_watchdog(void)
 740 {
 741         platform_device_register(&at91sam9260_wdt_device);
 742 }
 743 #else
 744 static void __init at91_add_device_watchdog(void) {}
 745 #endif
 746
 747
 748 /* --------------------------------------------------------------------
 749  *  SSC -- Synchronous Serial Controller
 750  * -------------------------------------------------------------------- */
 751
 752 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 753 static u64 ssc_dmamask = DMA_BIT_MASK(32);
 754
 755 static struct resource ssc_resources[] = {
 756         [0] = {
 757                 .start  = AT91SAM9260_BASE_SSC,
 758                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
 759                 .flags  = IORESOURCE_MEM,
 760         },
 761         [1] = {
 762                 .start  = AT91SAM9260_ID_SSC,
 763                 .end    = AT91SAM9260_ID_SSC,
 764                 .flags  = IORESOURCE_IRQ,
 765         },
 766 };
 767
 768 static struct platform_device at91sam9260_ssc_device = {
 769         .name   = "ssc",
 770         .id     = 0,
 771         .dev    = {
 772                 .dma_mask               = &ssc_dmamask,
 773                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 774         },
 775         .resource       = ssc_resources,
 776         .num_resources  = ARRAY_SIZE(ssc_resources),
 777 };
 778
 779 static inline void configure_ssc_pins(unsigned pins)
 780 {
 781         if (pins & ATMEL_SSC_TF)
 782                 at91_set_A_periph(AT91_PIN_PB17, 1);
 783         if (pins & ATMEL_SSC_TK)
 784                 at91_set_A_periph(AT91_PIN_PB16, 1);
 785         if (pins & ATMEL_SSC_TD)
 786                 at91_set_A_periph(AT91_PIN_PB18, 1);
 787         if (pins & ATMEL_SSC_RD)
 788                 at91_set_A_periph(AT91_PIN_PB19, 1);
 789         if (pins & ATMEL_SSC_RK)
 790                 at91_set_A_periph(AT91_PIN_PB20, 1);
 791         if (pins & ATMEL_SSC_RF)
 792                 at91_set_A_periph(AT91_PIN_PB21, 1);
 793 }
 794
 795 /*
 796  * SSC controllers are accessed through library code, instead of any
 797  * kind of all-singing/all-dancing driver.  For example one could be
 798  * used by a particular I2S audio codec's driver, while another one
 799  * on the same system might be used by a custom data capture driver.
 800  */
 801 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 802 {
 803         struct platform_device *pdev;
 804
 805         /*
 806          * NOTE: caller is responsible for passing information matching
 807          * "pins" to whatever will be using each particular controller.
 808          */
 809         switch (id) {
 810         case AT91SAM9260_ID_SSC:
 811                 pdev = &at91sam9260_ssc_device;
 812                 configure_ssc_pins(pins);
 813                 break;
 814         default:
 815                 return;
 816         }
 817
 818         platform_device_register(pdev);
 819 }
 820
 821 #else
 822 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 823 #endif
 824
 825
 826 /* --------------------------------------------------------------------
 827  *  UART
 828  * -------------------------------------------------------------------- */
 829 #if defined(CONFIG_SERIAL_ATMEL)
 830 static struct resource dbgu_resources[] = {
 831         [0] = {
 832                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 833                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 834                 .flags  = IORESOURCE_MEM,
 835         },
 836         [1] = {
 837                 .start  = AT91_ID_SYS,
 838                 .end    = AT91_ID_SYS,
 839                 .flags  = IORESOURCE_IRQ,
 840         },
 841 };
 842
 843 static struct atmel_uart_data dbgu_data = {
 844         .use_dma_tx     = 0,
 845         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 846         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 847 };
 848
 849 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 850
 851 static struct platform_device at91sam9260_dbgu_device = {
 852         .name           = "atmel_usart",
 853         .id             = 0,
 854         .dev            = {
 855                                 .dma_mask               = &dbgu_dmamask,
 856                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 857                                 .platform_data          = &dbgu_data,
 858         },
 859         .resource       = dbgu_resources,
 860         .num_resources  = ARRAY_SIZE(dbgu_resources),
 861 };
 862
 863 static inline void configure_dbgu_pins(void)
 864 {
 865         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
 866         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
 867 }
 868
 869 static struct resource uart0_resources[] = {
 870         [0] = {
 871                 .start  = AT91SAM9260_BASE_US0,
 872                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
 873                 .flags  = IORESOURCE_MEM,
 874         },
 875         [1] = {
 876                 .start  = AT91SAM9260_ID_US0,
 877                 .end    = AT91SAM9260_ID_US0,
 878                 .flags  = IORESOURCE_IRQ,
 879         },
 880 };
 881
 882 static struct atmel_uart_data uart0_data = {
 883         .use_dma_tx     = 1,
 884         .use_dma_rx     = 1,
 885 };
 886
 887 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 888
 889 static struct platform_device at91sam9260_uart0_device = {
 890         .name           = "atmel_usart",
 891         .id             = 1,
 892         .dev            = {
 893                                 .dma_mask               = &uart0_dmamask,
 894                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 895                                 .platform_data          = &uart0_data,
 896         },
 897         .resource       = uart0_resources,
 898         .num_resources  = ARRAY_SIZE(uart0_resources),
 899 };
 900
 901 static inline void configure_usart0_pins(unsigned pins)
 902 {
 903         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
 904         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
 905
 906         if (pins & ATMEL_UART_RTS)
 907                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
 908         if (pins & ATMEL_UART_CTS)
 909                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
 910         if (pins & ATMEL_UART_DTR)
 911                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
 912         if (pins & ATMEL_UART_DSR)
 913                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
 914         if (pins & ATMEL_UART_DCD)
 915                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
 916         if (pins & ATMEL_UART_RI)
 917                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
 918 }
 919
 920 static struct resource uart1_resources[] = {
 921         [0] = {
 922                 .start  = AT91SAM9260_BASE_US1,
 923                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
 924                 .flags  = IORESOURCE_MEM,
 925         },
 926         [1] = {
 927                 .start  = AT91SAM9260_ID_US1,
 928                 .end    = AT91SAM9260_ID_US1,
 929                 .flags  = IORESOURCE_IRQ,
 930         },
 931 };
 932
 933 static struct atmel_uart_data uart1_data = {
 934         .use_dma_tx     = 1,
 935         .use_dma_rx     = 1,
 936 };
 937
 938 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 939
 940 static struct platform_device at91sam9260_uart1_device = {
 941         .name           = "atmel_usart",
 942         .id             = 2,
 943         .dev            = {
 944                                 .dma_mask               = &uart1_dmamask,
 945                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 946                                 .platform_data          = &uart1_data,
 947         },
 948         .resource       = uart1_resources,
 949         .num_resources  = ARRAY_SIZE(uart1_resources),
 950 };
 951
 952 static inline void configure_usart1_pins(unsigned pins)
 953 {
 954         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
 955         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
 956
 957         if (pins & ATMEL_UART_RTS)
 958                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
 959         if (pins & ATMEL_UART_CTS)
 960                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
 961 }
 962
 963 static struct resource uart2_resources[] = {
 964         [0] = {
 965                 .start  = AT91SAM9260_BASE_US2,
 966                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
 967                 .flags  = IORESOURCE_MEM,
 968         },
 969         [1] = {
 970                 .start  = AT91SAM9260_ID_US2,
 971                 .end    = AT91SAM9260_ID_US2,
 972                 .flags  = IORESOURCE_IRQ,
 973         },
 974 };
 975
 976 static struct atmel_uart_data uart2_data = {
 977         .use_dma_tx     = 1,
 978         .use_dma_rx     = 1,
 979 };
 980
 981 static u64 uart2_dmamask = DMA_BIT_MASK(32);
 982
 983 static struct platform_device at91sam9260_uart2_device = {
 984         .name           = "atmel_usart",
 985         .id             = 3,
 986         .dev            = {
 987                                 .dma_mask               = &uart2_dmamask,
 988                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 989                                 .platform_data          = &uart2_data,
 990         },
 991         .resource       = uart2_resources,
 992         .num_resources  = ARRAY_SIZE(uart2_resources),
 993 };
 994
 995 static inline void configure_usart2_pins(unsigned pins)
 996 {
 997         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
 998         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
 999
1000         if (pins & ATMEL_UART_RTS)
1001                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
1002         if (pins & ATMEL_UART_CTS)
1003                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
1004 }
1005
1006 static struct resource uart3_resources[] = {
1007         [0] = {
1008                 .start  = AT91SAM9260_BASE_US3,
1009                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1010                 .flags  = IORESOURCE_MEM,
1011         },
1012         [1] = {
1013                 .start  = AT91SAM9260_ID_US3,
1014                 .end    = AT91SAM9260_ID_US3,
1015                 .flags  = IORESOURCE_IRQ,
1016         },
1017 };
1018
1019 static struct atmel_uart_data uart3_data = {
1020         .use_dma_tx     = 1,
1021         .use_dma_rx     = 1,
1022 };
1023
1024 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1025
1026 static struct platform_device at91sam9260_uart3_device = {
1027         .name           = "atmel_usart",
1028         .id             = 4,
1029         .dev            = {
1030                                 .dma_mask               = &uart3_dmamask,
1031                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1032                                 .platform_data          = &uart3_data,
1033         },
1034         .resource       = uart3_resources,
1035         .num_resources  = ARRAY_SIZE(uart3_resources),
1036 };
1037
1038 static inline void configure_usart3_pins(unsigned pins)
1039 {
1040         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1041         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1042
1043         if (pins & ATMEL_UART_RTS)
1044                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1045         if (pins & ATMEL_UART_CTS)
1046                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1047 }
1048
1049 static struct resource uart4_resources[] = {
1050         [0] = {
1051                 .start  = AT91SAM9260_BASE_US4,
1052                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1053                 .flags  = IORESOURCE_MEM,
1054         },
1055         [1] = {
1056                 .start  = AT91SAM9260_ID_US4,
1057                 .end    = AT91SAM9260_ID_US4,
1058                 .flags  = IORESOURCE_IRQ,
1059         },
1060 };
1061
1062 static struct atmel_uart_data uart4_data = {
1063         .use_dma_tx     = 1,
1064         .use_dma_rx     = 1,
1065 };
1066
1067 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1068
1069 static struct platform_device at91sam9260_uart4_device = {
1070         .name           = "atmel_usart",
1071         .id             = 5,
1072         .dev            = {
1073                                 .dma_mask               = &uart4_dmamask,
1074                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1075                                 .platform_data          = &uart4_data,
1076         },
1077         .resource       = uart4_resources,
1078         .num_resources  = ARRAY_SIZE(uart4_resources),
1079 };
1080
1081 static inline void configure_usart4_pins(void)
1082 {
1083         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1084         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1085 }
1086
1087 static struct resource uart5_resources[] = {
1088         [0] = {
1089                 .start  = AT91SAM9260_BASE_US5,
1090                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1091                 .flags  = IORESOURCE_MEM,
1092         },
1093         [1] = {
1094                 .start  = AT91SAM9260_ID_US5,
1095                 .end    = AT91SAM9260_ID_US5,
1096                 .flags  = IORESOURCE_IRQ,
1097         },
1098 };
1099
1100 static struct atmel_uart_data uart5_data = {
1101         .use_dma_tx     = 1,
1102         .use_dma_rx     = 1,
1103 };
1104
1105 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1106
1107 static struct platform_device at91sam9260_uart5_device = {
1108         .name           = "atmel_usart",
1109         .id             = 6,
1110         .dev            = {
1111                                 .dma_mask               = &uart5_dmamask,
1112                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1113                                 .platform_data          = &uart5_data,
1114         },
1115         .resource       = uart5_resources,
1116         .num_resources  = ARRAY_SIZE(uart5_resources),
1117 };
1118
1119 static inline void configure_usart5_pins(void)
1120 {
1121         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1122         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1123 }
1124
1125 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1126 struct platform_device *atmel_default_console_device;   /* the serial console device */
1127
1128 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1129 {
1130         struct platform_device *pdev;
1131         struct atmel_uart_data *pdata;
1132
1133         switch (id) {
1134                 case 0:         /* DBGU */
1135                         pdev = &at91sam9260_dbgu_device;
1136                         configure_dbgu_pins();
1137                         break;
1138                 case AT91SAM9260_ID_US0:
1139                         pdev = &at91sam9260_uart0_device;
1140                         configure_usart0_pins(pins);
1141                         break;
1142                 case AT91SAM9260_ID_US1:
1143                         pdev = &at91sam9260_uart1_device;
1144                         configure_usart1_pins(pins);
1145                         break;
1146                 case AT91SAM9260_ID_US2:
1147                         pdev = &at91sam9260_uart2_device;
1148                         configure_usart2_pins(pins);
1149                         break;
1150                 case AT91SAM9260_ID_US3:
1151                         pdev = &at91sam9260_uart3_device;
1152                         configure_usart3_pins(pins);
1153                         break;
1154                 case AT91SAM9260_ID_US4:
1155                         pdev = &at91sam9260_uart4_device;
1156                         configure_usart4_pins();
1157                         break;
1158                 case AT91SAM9260_ID_US5:
1159                         pdev = &at91sam9260_uart5_device;
1160                         configure_usart5_pins();
1161                         break;
1162                 default:
1163                         return;
1164         }
1165         pdata = pdev->dev.platform_data;
1166         pdata->num = portnr;            /* update to mapped ID */
1167
1168         if (portnr < ATMEL_MAX_UART)
1169                 at91_uarts[portnr] = pdev;
1170 }
1171
1172 void __init at91_set_serial_console(unsigned portnr)
1173 {
1174         if (portnr < ATMEL_MAX_UART) {
1175                 atmel_default_console_device = at91_uarts[portnr];
1176                 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1177         }
1178 }
1179
1180 void __init at91_add_device_serial(void)
1181 {
1182         int i;
1183
1184         for (i = 0; i < ATMEL_MAX_UART; i++) {
1185                 if (at91_uarts[i])
1186                         platform_device_register(at91_uarts[i]);
1187         }
1188
1189         if (!atmel_default_console_device)
1190                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1191 }
1192 #else
1193 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1194 void __init at91_set_serial_console(unsigned portnr) {}
1195 void __init at91_add_device_serial(void) {}
1196 #endif
1197
1198 /* --------------------------------------------------------------------
1199  *  CF/IDE
1200  * -------------------------------------------------------------------- */
1201
1202 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1203         defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1204         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1205
1206 static struct at91_cf_data cf0_data;
1207
1208 static struct resource cf0_resources[] = {
1209         [0] = {
1210                 .start  = AT91_CHIPSELECT_4,
1211                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1212                 .flags  = IORESOURCE_MEM,
1213         }
1214 };
1215
1216 static struct platform_device cf0_device = {
1217         .id             = 0,
1218         .dev            = {
1219                                 .platform_data  = &cf0_data,
1220         },
1221         .resource       = cf0_resources,
1222         .num_resources  = ARRAY_SIZE(cf0_resources),
1223 };
1224
1225 static struct at91_cf_data cf1_data;
1226
1227 static struct resource cf1_resources[] = {
1228         [0] = {
1229                 .start  = AT91_CHIPSELECT_5,
1230                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1231                 .flags  = IORESOURCE_MEM,
1232         }
1233 };
1234
1235 static struct platform_device cf1_device = {
1236         .id             = 1,
1237         .dev            = {
1238                                 .platform_data  = &cf1_data,
1239         },
1240         .resource       = cf1_resources,
1241         .num_resources  = ARRAY_SIZE(cf1_resources),
1242 };
1243
1244 void __init at91_add_device_cf(struct at91_cf_data *data)
1245 {
1246         struct platform_device *pdev;
1247         unsigned long csa;
1248
1249         if (!data)
1250                 return;
1251
1252         csa = at91_sys_read(AT91_MATRIX_EBICSA);
1253
1254         switch (data->chipselect) {
1255         case 4:
1256                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1257                 at91_set_A_periph(AT91_PIN_PC8, 0);
1258                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1259                 cf0_data = *data;
1260                 pdev = &cf0_device;
1261                 break;
1262         case 5:
1263                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1264                 at91_set_A_periph(AT91_PIN_PC9, 0);
1265                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1266                 cf1_data = *data;
1267                 pdev = &cf1_device;
1268                 break;
1269         default:
1270                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1271                        data->chipselect);
1272                 return;
1273         }
1274
1275         at91_sys_write(AT91_MATRIX_EBICSA, csa);
1276
1277         if (data->rst_pin) {
1278                 at91_set_multi_drive(data->rst_pin, 0);
1279                 at91_set_gpio_output(data->rst_pin, 1);
1280         }
1281
1282         if (data->irq_pin) {
1283                 at91_set_gpio_input(data->irq_pin, 0);
1284                 at91_set_deglitch(data->irq_pin, 1);
1285         }
1286
1287         if (data->det_pin) {
1288                 at91_set_gpio_input(data->det_pin, 0);
1289                 at91_set_deglitch(data->det_pin, 1);
1290         }
1291
1292         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1293         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1294         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1295         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1296
1297         if (data->flags & AT91_CF_TRUE_IDE)
1298 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1299                 pdev->name = "pata_at91";
1300 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1301                 pdev->name = "at91_ide";
1302 #else
1303 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1304 #endif
1305         else
1306                 pdev->name = "at91_cf";
1307
1308         platform_device_register(pdev);
1309 }
1310
1311 #else
1312 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1313 #endif
1314
1315 /* -------------------------------------------------------------------- */
1316 /*
1317  * These devices are always present and don't need any board-specific
1318  * setup.
1319  */
1320 static int __init at91_add_standard_devices(void)
1321 {
1322         at91_add_device_rtt();
1323         at91_add_device_watchdog();
1324         at91_add_device_tc();
1325         return 0;
1326 }
1327
1328 arch_initcall(at91_add_standard_devices);