[ARM] Add support for ARM RealView board
Catalin Marinas [Mon, 31 Oct 2005 14:25:02 +0000 (14:25 +0000)]
Support for RealView EB.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

25 files changed:
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/mach-realview/Kconfig [new file with mode: 0644]
arch/arm/mach-realview/Makefile [new file with mode: 0644]
arch/arm/mach-realview/Makefile.boot [new file with mode: 0644]
arch/arm/mach-realview/clock.c [new file with mode: 0644]
arch/arm/mach-realview/clock.h [new file with mode: 0644]
arch/arm/mach-realview/core.c [new file with mode: 0644]
arch/arm/mach-realview/core.h [new file with mode: 0644]
arch/arm/mach-realview/realview_eb.c [new file with mode: 0644]
arch/arm/mm/Kconfig
include/asm-arm/arch-realview/debug-macro.S [new file with mode: 0644]
include/asm-arm/arch-realview/dma.h [new file with mode: 0644]
include/asm-arm/arch-realview/entry-macro.S [new file with mode: 0644]
include/asm-arm/arch-realview/hardware.h [new file with mode: 0644]
include/asm-arm/arch-realview/io.h [new file with mode: 0644]
include/asm-arm/arch-realview/irqs.h [new file with mode: 0644]
include/asm-arm/arch-realview/memory.h [new file with mode: 0644]
include/asm-arm/arch-realview/param.h [new file with mode: 0644]
include/asm-arm/arch-realview/platform.h [new file with mode: 0644]
include/asm-arm/arch-realview/system.h [new file with mode: 0644]
include/asm-arm/arch-realview/timex.h [new file with mode: 0644]
include/asm-arm/arch-realview/uncompress.h [new file with mode: 0644]
include/asm-arm/arch-realview/vmalloc.h [new file with mode: 0644]
include/asm-arm/hardware/amba_clcd.h

index 682367b..dc6d834 100644 (file)
@@ -194,6 +194,13 @@ config ARCH_VERSATILE
        help
          This enables support for ARM Ltd Versatile board.
 
+config ARCH_REALVIEW
+       bool "RealView"
+       select ARM_AMBA
+       select ICST307
+       help
+         This enables support for ARM Ltd RealView boards.
+
 config ARCH_IMX
        bool "IMX"
 
@@ -244,6 +251,8 @@ source "arch/arm/mach-versatile/Kconfig"
 
 source "arch/arm/mach-aaec2000/Kconfig"
 
+source "arch/arm/mach-realview/Kconfig"
+
 # Definitions to make life easier
 config ARCH_ACORN
        bool
index 64cf480..d80749a 100644 (file)
@@ -99,6 +99,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET)   := 0xc0008000
  machine-$(CONFIG_ARCH_IMX)       := imx
  machine-$(CONFIG_ARCH_H720X)     := h720x
  machine-$(CONFIG_ARCH_AAEC2000)   := aaec2000
+ machine-$(CONFIG_ARCH_REALVIEW)   := realview
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
new file mode 100644 (file)
index 0000000..4b63dc9
--- /dev/null
@@ -0,0 +1,11 @@
+menu "RealView platform type"
+       depends on ARCH_REALVIEW
+
+config MACH_REALVIEW_EB
+       bool "Support RealView/EB platform"
+       default n
+       select ARM_GIC
+       help
+         Include support for the ARM(R) RealView Emulation Baseboard platform.
+
+endmenu
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
new file mode 100644 (file)
index 0000000..8d37ea1
--- /dev/null
@@ -0,0 +1,6 @@
+#
+# Makefile for the linux kernel.
+#
+
+obj-y                                  := core.o clock.o
+obj-$(CONFIG_MACH_REALVIEW_EB)         += realview_eb.o
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
new file mode 100644 (file)
index 0000000..c7e75ac
--- /dev/null
@@ -0,0 +1,4 @@
+   zreladdr-y  := 0x00008000
+params_phys-y  := 0x00000100
+initrd_phys-y  := 0x00800000
+
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
new file mode 100644 (file)
index 0000000..002635c
--- /dev/null
@@ -0,0 +1,145 @@
+/*
+ *  linux/arch/arm/mach-realview/clock.c
+ *
+ *  Copyright (C) 2004 ARM Limited.
+ *  Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+
+#include <asm/semaphore.h>
+#include <asm/hardware/clock.h>
+#include <asm/hardware/icst307.h>
+
+#include "clock.h"
+
+static LIST_HEAD(clocks);
+static DECLARE_MUTEX(clocks_sem);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+       struct clk *p, *clk = ERR_PTR(-ENOENT);
+
+       down(&clocks_sem);
+       list_for_each_entry(p, &clocks, node) {
+               if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
+                       clk = p;
+                       break;
+               }
+       }
+       up(&clocks_sem);
+
+       return clk;
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+       module_put(clk->owner);
+}
+EXPORT_SYMBOL(clk_put);
+
+int clk_enable(struct clk *clk)
+{
+       return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+int clk_use(struct clk *clk)
+{
+       return 0;
+}
+EXPORT_SYMBOL(clk_use);
+
+void clk_unuse(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_unuse);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+       return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+       return rate;
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+       int ret = -EIO;
+
+       if (clk->setvco) {
+               struct icst307_vco vco;
+
+               vco = icst307_khz_to_vco(clk->params, rate / 1000);
+               clk->rate = icst307_khz(clk->params, vco) * 1000;
+
+               printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
+                       clk->name, vco.s, vco.r, vco.v);
+
+               clk->setvco(clk, vco);
+               ret = 0;
+       }
+       return ret;
+}
+EXPORT_SYMBOL(clk_set_rate);
+
+/*
+ * These are fixed clocks.
+ */
+static struct clk kmi_clk = {
+       .name   = "KMIREFCLK",
+       .rate   = 24000000,
+};
+
+static struct clk uart_clk = {
+       .name   = "UARTCLK",
+       .rate   = 24000000,
+};
+
+static struct clk mmci_clk = {
+       .name   = "MCLK",
+       .rate   = 33000000,
+};
+
+int clk_register(struct clk *clk)
+{
+       down(&clocks_sem);
+       list_add(&clk->node, &clocks);
+       up(&clocks_sem);
+       return 0;
+}
+EXPORT_SYMBOL(clk_register);
+
+void clk_unregister(struct clk *clk)
+{
+       down(&clocks_sem);
+       list_del(&clk->node);
+       up(&clocks_sem);
+}
+EXPORT_SYMBOL(clk_unregister);
+
+static int __init clk_init(void)
+{
+       clk_register(&kmi_clk);
+       clk_register(&uart_clk);
+       clk_register(&mmci_clk);
+       return 0;
+}
+arch_initcall(clk_init);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
new file mode 100644 (file)
index 0000000..dadba69
--- /dev/null
@@ -0,0 +1,25 @@
+/*
+ *  linux/arch/arm/mach-realview/clock.h
+ *
+ *  Copyright (C) 2004 ARM Limited.
+ *  Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+struct module;
+struct icst307_params;
+
+struct clk {
+       struct list_head        node;
+       unsigned long           rate;
+       struct module           *owner;
+       const char              *name;
+       const struct icst307_params *params;
+       void                    *data;
+       void                    (*setvco)(struct clk *, struct icst307_vco vco);
+};
+
+int clk_register(struct clk *clk);
+void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
new file mode 100644 (file)
index 0000000..4f98f13
--- /dev/null
@@ -0,0 +1,605 @@
+/*
+ *  linux/arch/arm/mach-realview/core.c
+ *
+ *  Copyright (C) 1999 - 2003 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+
+#include <asm/system.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/amba.h>
+#include <asm/hardware/amba_clcd.h>
+#include <asm/hardware/arm_timer.h>
+#include <asm/hardware/icst307.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+
+#include <asm/hardware/gic.h>
+
+#include "core.h"
+#include "clock.h"
+
+#define REALVIEW_REFCOUNTER    (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
+
+/*
+ * This is the RealView sched_clock implementation.  This has
+ * a resolution of 41.7ns, and a maximum value of about 179s.
+ */
+unsigned long long sched_clock(void)
+{
+       unsigned long long v;
+
+       v = (unsigned long long)readl(REALVIEW_REFCOUNTER) * 125;
+       do_div(v, 3);
+
+       return v;
+}
+
+
+#define REALVIEW_FLASHCTRL    (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
+
+static int realview_flash_init(void)
+{
+       u32 val;
+
+       val = __raw_readl(REALVIEW_FLASHCTRL);
+       val &= ~REALVIEW_FLASHPROG_FLVPPEN;
+       __raw_writel(val, REALVIEW_FLASHCTRL);
+
+       return 0;
+}
+
+static void realview_flash_exit(void)
+{
+       u32 val;
+
+       val = __raw_readl(REALVIEW_FLASHCTRL);
+       val &= ~REALVIEW_FLASHPROG_FLVPPEN;
+       __raw_writel(val, REALVIEW_FLASHCTRL);
+}
+
+static void realview_flash_set_vpp(int on)
+{
+       u32 val;
+
+       val = __raw_readl(REALVIEW_FLASHCTRL);
+       if (on)
+               val |= REALVIEW_FLASHPROG_FLVPPEN;
+       else
+               val &= ~REALVIEW_FLASHPROG_FLVPPEN;
+       __raw_writel(val, REALVIEW_FLASHCTRL);
+}
+
+static struct flash_platform_data realview_flash_data = {
+       .map_name               = "cfi_probe",
+       .width                  = 4,
+       .init                   = realview_flash_init,
+       .exit                   = realview_flash_exit,
+       .set_vpp                = realview_flash_set_vpp,
+};
+
+static struct resource realview_flash_resource = {
+       .start                  = REALVIEW_FLASH_BASE,
+       .end                    = REALVIEW_FLASH_BASE + REALVIEW_FLASH_SIZE,
+       .flags                  = IORESOURCE_MEM,
+};
+
+struct platform_device realview_flash_device = {
+       .name                   = "armflash",
+       .id                     = 0,
+       .dev                    = {
+               .platform_data  = &realview_flash_data,
+       },
+       .num_resources          = 1,
+       .resource               = &realview_flash_resource,
+};
+
+static struct resource realview_smc91x_resources[] = {
+       [0] = {
+               .start          = REALVIEW_ETH_BASE,
+               .end            = REALVIEW_ETH_BASE + SZ_64K - 1,
+               .flags          = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start          = IRQ_ETH,
+               .end            = IRQ_ETH,
+               .flags          = IORESOURCE_IRQ,
+       },
+};
+
+struct platform_device realview_smc91x_device = {
+       .name           = "smc91x",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(realview_smc91x_resources),
+       .resource       = realview_smc91x_resources,
+};
+
+#define REALVIEW_SYSMCI        (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
+
+static unsigned int realview_mmc_status(struct device *dev)
+{
+       struct amba_device *adev = container_of(dev, struct amba_device, dev);
+       u32 mask;
+
+       if (adev->res.start == REALVIEW_MMCI0_BASE)
+               mask = 1;
+       else
+               mask = 2;
+
+       return readl(REALVIEW_SYSMCI) & mask;
+}
+
+struct mmc_platform_data realview_mmc0_plat_data = {
+       .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+       .status         = realview_mmc_status,
+};
+
+struct mmc_platform_data realview_mmc1_plat_data = {
+       .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+       .status         = realview_mmc_status,
+};
+
+/*
+ * Clock handling
+ */
+static const struct icst307_params realview_oscvco_params = {
+       .ref            = 24000,
+       .vco_max        = 200000,
+       .vd_min         = 4 + 8,
+       .vd_max         = 511 + 8,
+       .rd_min         = 1 + 2,
+       .rd_max         = 127 + 2,
+};
+
+static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
+{
+       void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
+       void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC1_OFFSET;
+       u32 val;
+
+       val = readl(sys_osc) & ~0x7ffff;
+       val |= vco.v | (vco.r << 9) | (vco.s << 16);
+
+       writel(0xa05f, sys_lock);
+       writel(val, sys_osc);
+       writel(0, sys_lock);
+}
+
+struct clk realview_clcd_clk = {
+       .name   = "CLCDCLK",
+       .params = &realview_oscvco_params,
+       .setvco = realview_oscvco_set,
+};
+
+/*
+ * CLCD support.
+ */
+#define SYS_CLCD_MODE_MASK     (3 << 0)
+#define SYS_CLCD_MODE_888      (0 << 0)
+#define SYS_CLCD_MODE_5551     (1 << 0)
+#define SYS_CLCD_MODE_565_RLSB (2 << 0)
+#define SYS_CLCD_MODE_565_BLSB (3 << 0)
+#define SYS_CLCD_NLCDIOON      (1 << 2)
+#define SYS_CLCD_VDDPOSSWITCH  (1 << 3)
+#define SYS_CLCD_PWR3V5SWITCH  (1 << 4)
+#define SYS_CLCD_ID_MASK       (0x1f << 8)
+#define SYS_CLCD_ID_SANYO_3_8  (0x00 << 8)
+#define SYS_CLCD_ID_UNKNOWN_8_4        (0x01 << 8)
+#define SYS_CLCD_ID_EPSON_2_2  (0x02 << 8)
+#define SYS_CLCD_ID_SANYO_2_5  (0x07 << 8)
+#define SYS_CLCD_ID_VGA                (0x1f << 8)
+
+static struct clcd_panel vga = {
+       .mode           = {
+               .name           = "VGA",
+               .refresh        = 60,
+               .xres           = 640,
+               .yres           = 480,
+               .pixclock       = 39721,
+               .left_margin    = 40,
+               .right_margin   = 24,
+               .upper_margin   = 32,
+               .lower_margin   = 11,
+               .hsync_len      = 96,
+               .vsync_len      = 2,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED,
+       },
+       .width          = -1,
+       .height         = -1,
+       .tim2           = TIM2_BCD | TIM2_IPC,
+       .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+       .bpp            = 16,
+};
+
+static struct clcd_panel sanyo_3_8_in = {
+       .mode           = {
+               .name           = "Sanyo QVGA",
+               .refresh        = 116,
+               .xres           = 320,
+               .yres           = 240,
+               .pixclock       = 100000,
+               .left_margin    = 6,
+               .right_margin   = 6,
+               .upper_margin   = 5,
+               .lower_margin   = 5,
+               .hsync_len      = 6,
+               .vsync_len      = 6,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED,
+       },
+       .width          = -1,
+       .height         = -1,
+       .tim2           = TIM2_BCD,
+       .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+       .bpp            = 16,
+};
+
+static struct clcd_panel sanyo_2_5_in = {
+       .mode           = {
+               .name           = "Sanyo QVGA Portrait",
+               .refresh        = 116,
+               .xres           = 240,
+               .yres           = 320,
+               .pixclock       = 100000,
+               .left_margin    = 20,
+               .right_margin   = 10,
+               .upper_margin   = 2,
+               .lower_margin   = 2,
+               .hsync_len      = 10,
+               .vsync_len      = 2,
+               .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+               .vmode          = FB_VMODE_NONINTERLACED,
+       },
+       .width          = -1,
+       .height         = -1,
+       .tim2           = TIM2_IVS | TIM2_IHS | TIM2_IPC,
+       .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+       .bpp            = 16,
+};
+
+static struct clcd_panel epson_2_2_in = {
+       .mode           = {
+               .name           = "Epson QCIF",
+               .refresh        = 390,
+               .xres           = 176,
+               .yres           = 220,
+               .pixclock       = 62500,
+               .left_margin    = 3,
+               .right_margin   = 2,
+               .upper_margin   = 1,
+               .lower_margin   = 0,
+               .hsync_len      = 3,
+               .vsync_len      = 2,
+               .sync           = 0,
+               .vmode          = FB_VMODE_NONINTERLACED,
+       },
+       .width          = -1,
+       .height         = -1,
+       .tim2           = TIM2_BCD | TIM2_IPC,
+       .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+       .bpp            = 16,
+};
+
+/*
+ * Detect which LCD panel is connected, and return the appropriate
+ * clcd_panel structure.  Note: we do not have any information on
+ * the required timings for the 8.4in panel, so we presently assume
+ * VGA timings.
+ */
+static struct clcd_panel *realview_clcd_panel(void)
+{
+       void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
+       struct clcd_panel *panel = &vga;
+       u32 val;
+
+       val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
+       if (val == SYS_CLCD_ID_SANYO_3_8)
+               panel = &sanyo_3_8_in;
+       else if (val == SYS_CLCD_ID_SANYO_2_5)
+               panel = &sanyo_2_5_in;
+       else if (val == SYS_CLCD_ID_EPSON_2_2)
+               panel = &epson_2_2_in;
+       else if (val == SYS_CLCD_ID_VGA)
+               panel = &vga;
+       else {
+               printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
+                       val);
+               panel = &vga;
+       }
+
+       return panel;
+}
+
+/*
+ * Disable all display connectors on the interface module.
+ */
+static void realview_clcd_disable(struct clcd_fb *fb)
+{
+       void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
+       u32 val;
+
+       val = readl(sys_clcd);
+       val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
+       writel(val, sys_clcd);
+}
+
+/*
+ * Enable the relevant connector on the interface module.
+ */
+static void realview_clcd_enable(struct clcd_fb *fb)
+{
+       void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
+       u32 val;
+
+       val = readl(sys_clcd);
+       val &= ~SYS_CLCD_MODE_MASK;
+
+       switch (fb->fb.var.green.length) {
+       case 5:
+               val |= SYS_CLCD_MODE_5551;
+               break;
+       case 6:
+               val |= SYS_CLCD_MODE_565_RLSB;
+               break;
+       case 8:
+               val |= SYS_CLCD_MODE_888;
+               break;
+       }
+
+       /*
+        * Set the MUX
+        */
+       writel(val, sys_clcd);
+
+       /*
+        * And now enable the PSUs
+        */
+       val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
+       writel(val, sys_clcd);
+}
+
+static unsigned long framesize = SZ_1M;
+
+static int realview_clcd_setup(struct clcd_fb *fb)
+{
+       dma_addr_t dma;
+
+       fb->panel               = realview_clcd_panel();
+
+       fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
+                                                   &dma, GFP_KERNEL);
+       if (!fb->fb.screen_base) {
+               printk(KERN_ERR "CLCD: unable to map framebuffer\n");
+               return -ENOMEM;
+       }
+
+       fb->fb.fix.smem_start   = dma;
+       fb->fb.fix.smem_len     = framesize;
+
+       return 0;
+}
+
+static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+       return dma_mmap_writecombine(&fb->dev->dev, vma,
+                                    fb->fb.screen_base,
+                                    fb->fb.fix.smem_start,
+                                    fb->fb.fix.smem_len);
+}
+
+static void realview_clcd_remove(struct clcd_fb *fb)
+{
+       dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
+                             fb->fb.screen_base, fb->fb.fix.smem_start);
+}
+
+struct clcd_board clcd_plat_data = {
+       .name           = "RealView",
+       .check          = clcdfb_check,
+       .decode         = clcdfb_decode,
+       .disable        = realview_clcd_disable,
+       .enable         = realview_clcd_enable,
+       .setup          = realview_clcd_setup,
+       .mmap           = realview_clcd_mmap,
+       .remove         = realview_clcd_remove,
+};
+
+#ifdef CONFIG_LEDS
+#define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
+
+void realview_leds_event(led_event_t ledevt)
+{
+       unsigned long flags;
+       u32 val;
+
+       local_irq_save(flags);
+       val = readl(VA_LEDS_BASE);
+
+       switch (ledevt) {
+       case led_idle_start:
+               val = val & ~REALVIEW_SYS_LED0;
+               break;
+
+       case led_idle_end:
+               val = val | REALVIEW_SYS_LED0;
+               break;
+
+       case led_timer:
+               val = val ^ REALVIEW_SYS_LED1;
+               break;
+
+       case led_halted:
+               val = 0;
+               break;
+
+       default:
+               break;
+       }
+
+       writel(val, VA_LEDS_BASE);
+       local_irq_restore(flags);
+}
+#endif /* CONFIG_LEDS */
+
+/*
+ * Where is the timer (VA)?
+ */
+#define TIMER0_VA_BASE          __io_address(REALVIEW_TIMER0_1_BASE)
+#define TIMER1_VA_BASE         (__io_address(REALVIEW_TIMER0_1_BASE) + 0x20)
+#define TIMER2_VA_BASE          __io_address(REALVIEW_TIMER2_3_BASE)
+#define TIMER3_VA_BASE         (__io_address(REALVIEW_TIMER2_3_BASE) + 0x20)
+
+/*
+ * How long is the timer interval?
+ */
+#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
+#if TIMER_INTERVAL >= 0x100000
+#define TIMER_RELOAD   (TIMER_INTERVAL >> 8)
+#define TIMER_DIVISOR  (TIMER_CTRL_DIV256)
+#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
+#elif TIMER_INTERVAL >= 0x10000
+#define TIMER_RELOAD   (TIMER_INTERVAL >> 4)           /* Divide by 16 */
+#define TIMER_DIVISOR  (TIMER_CTRL_DIV16)
+#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
+#else
+#define TIMER_RELOAD   (TIMER_INTERVAL)
+#define TIMER_DIVISOR  (TIMER_CTRL_DIV1)
+#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
+#endif
+
+/*
+ * Returns number of ms since last clock interrupt.  Note that interrupts
+ * will have been disabled by do_gettimeoffset()
+ */
+static unsigned long realview_gettimeoffset(void)
+{
+       unsigned long ticks1, ticks2, status;
+
+       /*
+        * Get the current number of ticks.  Note that there is a race
+        * condition between us reading the timer and checking for
+        * an interrupt.  We get around this by ensuring that the
+        * counter has not reloaded between our two reads.
+        */
+       ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
+       do {
+               ticks1 = ticks2;
+               status = __raw_readl(__io_address(REALVIEW_GIC_DIST_BASE + GIC_DIST_PENDING_SET)
+                                    + ((IRQ_TIMERINT0_1 >> 5) << 2));
+               ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
+       } while (ticks2 > ticks1);
+
+       /*
+        * Number of ticks since last interrupt.
+        */
+       ticks1 = TIMER_RELOAD - ticks2;
+
+       /*
+        * Interrupt pending?  If so, we've reloaded once already.
+        *
+        * FIXME: Need to check this is effectively timer 0 that expires
+        */
+       if (status & IRQMASK_TIMERINT0_1)
+               ticks1 += TIMER_RELOAD;
+
+       /*
+        * Convert the ticks to usecs
+        */
+       return TICKS2USECS(ticks1);
+}
+
+/*
+ * IRQ handler for the timer
+ */
+static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+       write_seqlock(&xtime_lock);
+
+       // ...clear the interrupt
+       writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
+
+       timer_tick(regs);
+
+       write_sequnlock(&xtime_lock);
+
+       return IRQ_HANDLED;
+}
+
+static struct irqaction realview_timer_irq = {
+       .name           = "RealView Timer Tick",
+       .flags          = SA_INTERRUPT | SA_TIMER,
+       .handler        = realview_timer_interrupt,
+};
+
+/*
+ * Set up timer interrupt, and return the current time in seconds.
+ */
+static void __init realview_timer_init(void)
+{
+       u32 val;
+
+       /* 
+        * set clock frequency: 
+        *      REALVIEW_REFCLK is 32KHz
+        *      REALVIEW_TIMCLK is 1MHz
+        */
+       val = readl(__io_address(REALVIEW_SCTL_BASE));
+       writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
+              (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) | 
+              (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
+              (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
+              __io_address(REALVIEW_SCTL_BASE));
+
+       /*
+        * Initialise to a known state (all timers off)
+        */
+       writel(0, TIMER0_VA_BASE + TIMER_CTRL);
+       writel(0, TIMER1_VA_BASE + TIMER_CTRL);
+       writel(0, TIMER2_VA_BASE + TIMER_CTRL);
+       writel(0, TIMER3_VA_BASE + TIMER_CTRL);
+
+       writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
+       writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_VALUE);
+       writel(TIMER_DIVISOR | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC |
+              TIMER_CTRL_IE, TIMER0_VA_BASE + TIMER_CTRL);
+
+       /* 
+        * Make irqs happen for the system timer
+        */
+       setup_irq(IRQ_TIMERINT0_1, &realview_timer_irq);
+}
+
+struct sys_timer realview_timer = {
+       .init           = realview_timer_init,
+       .offset         = realview_gettimeoffset,
+};
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
new file mode 100644 (file)
index 0000000..575599d
--- /dev/null
@@ -0,0 +1,118 @@
+/*
+ *  linux/arch/arm/mach-realview/core.h
+ *
+ *  Copyright (C) 2004 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_REALVIEW_H
+#define __ASM_ARCH_REALVIEW_H
+
+#include <asm/hardware/amba.h>
+#include <asm/io.h>
+
+#define __io_address(n)                __io(IO_ADDRESS(n))
+
+extern struct sys_timer realview_timer;
+
+#define AMBA_DEVICE(name,busid,base,plat)                      \
+static struct amba_device name##_device = {                    \
+       .dev            = {                                     \
+               .coherent_dma_mask = ~0,                        \
+               .bus_id = busid,                                \
+               .platform_data = plat,                          \
+       },                                                      \
+       .res            = {                                     \
+               .start  = REALVIEW_##base##_BASE,               \
+               .end    = (REALVIEW_##base##_BASE) + SZ_4K - 1,\
+               .flags  = IORESOURCE_MEM,                       \
+       },                                                      \
+       .dma_mask       = ~0,                                   \
+       .irq            = base##_IRQ,                           \
+       /* .dma         = base##_DMA,*/                         \
+}
+
+/*
+ * These devices are connected via the core APB bridge
+ */
+#define GPIO2_IRQ      { IRQ_GPIOINT2, NO_IRQ }
+#define GPIO2_DMA      { 0, 0 }
+#define GPIO3_IRQ      { IRQ_GPIOINT3, NO_IRQ }
+#define GPIO3_DMA      { 0, 0 }
+
+#define AACI_IRQ       { IRQ_AACI, NO_IRQ }
+#define AACI_DMA       { 0x80, 0x81 }
+#define MMCI0_IRQ      { IRQ_MMCI0A,IRQ_MMCI0B }
+#define MMCI0_DMA      { 0x84, 0 }
+#define KMI0_IRQ       { IRQ_KMI0, NO_IRQ }
+#define KMI0_DMA       { 0, 0 }
+#define KMI1_IRQ       { IRQ_KMI1, NO_IRQ }
+#define KMI1_DMA       { 0, 0 }
+
+/*
+ * These devices are connected directly to the multi-layer AHB switch
+ */
+#define SMC_IRQ                { NO_IRQ, NO_IRQ }
+#define SMC_DMA                { 0, 0 }
+#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
+#define MPMC_DMA       { 0, 0 }
+#define CLCD_IRQ       { IRQ_CLCDINT, NO_IRQ }
+#define CLCD_DMA       { 0, 0 }
+#define DMAC_IRQ       { IRQ_DMAINT, NO_IRQ }
+#define DMAC_DMA       { 0, 0 }
+
+/*
+ * These devices are connected via the core APB bridge
+ */
+#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
+#define SCTL_DMA       { 0, 0 }
+#define WATCHDOG_IRQ   { IRQ_WDOGINT, NO_IRQ }
+#define WATCHDOG_DMA   { 0, 0 }
+#define GPIO0_IRQ      { IRQ_GPIOINT0, NO_IRQ }
+#define GPIO0_DMA      { 0, 0 }
+#define GPIO1_IRQ      { IRQ_GPIOINT1, NO_IRQ }
+#define GPIO1_DMA      { 0, 0 }
+#define RTC_IRQ                { IRQ_RTCINT, NO_IRQ }
+#define RTC_DMA                { 0, 0 }
+
+/*
+ * These devices are connected via the DMA APB bridge
+ */
+#define SCI_IRQ                { IRQ_SCIINT, NO_IRQ }
+#define SCI_DMA                { 7, 6 }
+#define UART0_IRQ      { IRQ_UARTINT0, NO_IRQ }
+#define UART0_DMA      { 15, 14 }
+#define UART1_IRQ      { IRQ_UARTINT1, NO_IRQ }
+#define UART1_DMA      { 13, 12 }
+#define UART2_IRQ      { IRQ_UARTINT2, NO_IRQ }
+#define UART2_DMA      { 11, 10 }
+#define UART3_IRQ      { IRQ_UART3, NO_IRQ }
+#define UART3_DMA      { 0x86, 0x87 }
+#define SSP_IRQ                { IRQ_SSPINT, NO_IRQ }
+#define SSP_DMA                { 9, 8 }
+
+
+extern struct platform_device realview_flash_device;
+extern struct platform_device realview_smc91x_device;
+extern struct mmc_platform_data realview_mmc0_plat_data;
+extern struct mmc_platform_data realview_mmc1_plat_data;
+extern struct clk realview_clcd_clk;
+extern struct clcd_board clcd_plat_data;
+
+extern void realview_leds_event(led_event_t ledevt);
+
+#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
new file mode 100644 (file)
index 0000000..1279fee
--- /dev/null
@@ -0,0 +1,142 @@
+/*
+ *  linux/arch/arm/mach-realview/realview_eb.c
+ *
+ *  Copyright (C) 2004 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/sysdev.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware/amba.h>
+#include <asm/hardware/icst307.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+
+#include <asm/arch/irqs.h>
+
+#include "core.h"
+#include "clock.h"
+
+static struct map_desc realview_eb_io_desc[] __initdata = {
+ { IO_ADDRESS(REALVIEW_SYS_BASE),      REALVIEW_SYS_BASE,      SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(REALVIEW_GIC_CPU_BASE),  REALVIEW_GIC_CPU_BASE,  SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(REALVIEW_GIC_DIST_BASE), REALVIEW_GIC_DIST_BASE, SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(REALVIEW_SCTL_BASE),     REALVIEW_SCTL_BASE,     SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(REALVIEW_TIMER0_1_BASE), REALVIEW_TIMER0_1_BASE, SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(REALVIEW_TIMER2_3_BASE), REALVIEW_TIMER2_3_BASE, SZ_4K,  MT_DEVICE },
+#ifdef CONFIG_DEBUG_LL
+ { IO_ADDRESS(REALVIEW_UART0_BASE),    REALVIEW_UART0_BASE,    SZ_4K,  MT_DEVICE },
+#endif
+};
+
+static void __init realview_eb_map_io(void)
+{
+       iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
+}
+
+/* FPGA Primecells */
+AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
+AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
+AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
+AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);
+
+/* DevChip Primecells */
+AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
+AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
+AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
+AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
+AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
+AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    NULL);
+AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    NULL);
+AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    NULL);
+AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
+AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
+AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
+AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
+AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
+AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      NULL);
+
+static struct amba_device *amba_devs[] __initdata = {
+       &dmac_device,
+       &uart0_device,
+       &uart1_device,
+       &uart2_device,
+       &uart3_device,
+       &smc_device,
+       &clcd_device,
+       &sctl_device,
+       &wdog_device,
+       &gpio0_device,
+       &gpio1_device,
+       &gpio2_device,
+       &rtc_device,
+       &sci0_device,
+       &ssp0_device,
+       &aaci_device,
+       &mmc0_device,
+       &kmi0_device,
+       &kmi1_device,
+};
+
+static void __init gic_init_irq(void)
+{
+       gic_dist_init(__io_address(REALVIEW_GIC_DIST_BASE));
+       gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE));
+}
+
+static void __init realview_eb_init(void)
+{
+       int i;
+
+       clk_register(&realview_clcd_clk);
+
+       platform_device_register(&realview_flash_device);
+       platform_device_register(&realview_smc91x_device);
+
+       for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+               struct amba_device *d = amba_devs[i];
+               amba_device_register(d, &iomem_resource);
+       }
+
+#ifdef CONFIG_LEDS
+       leds_event = realview_leds_event;
+#endif
+}
+
+MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
+       /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+       .phys_ram       = 0x00000000,
+       .phys_io        = REALVIEW_UART0_BASE,
+       .io_pg_offst    = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
+       .boot_params    = 0x00000100,
+       .map_io         = realview_eb_map_io,
+       .init_irq       = gic_init_irq,
+       .timer          = &realview_timer,
+       .init_machine   = realview_eb_init,
+MACHINE_END
index c54e04c..5568403 100644 (file)
@@ -120,8 +120,8 @@ config CPU_ARM925T
 
 # ARM926T
 config CPU_ARM926T
-       bool "Support ARM926T processor" if ARCH_INTEGRATOR
-       depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX
+       bool "Support ARM926T processor"
+       depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB
        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX
        select CPU_32v5
        select CPU_ABRT_EV5TJ
@@ -242,7 +242,7 @@ config CPU_XSCALE
 # ARMv6
 config CPU_V6
        bool "Support ARM V6 processor"
-       depends on ARCH_INTEGRATOR
+       depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB
        select CPU_32v6
        select CPU_ABRT_EV6
        select CPU_CACHE_V6
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
new file mode 100644 (file)
index 0000000..ed28bd0
--- /dev/null
@@ -0,0 +1,38 @@
+/* linux/include/asm-arm/arch-realview/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <asm/hardware/amba_serial.h>
+
+               .macro  addruart,rx
+               mrc     p15, 0, \rx, c1, c0
+               tst     \rx, #1                 @ MMU enabled?
+               moveq   \rx,      #0x10000000
+               movne   \rx,      #0xf1000000   @ virtual base
+               orr     \rx, \rx, #0x00009000
+               .endm
+
+               .macro  senduart,rd,rx
+               strb    \rd, [\rx, #UART01x_DR]
+               .endm
+
+               .macro  waituart,rd,rx
+1001:          ldr     \rd, [\rx, #0x18]       @ UARTFLG
+               tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
+               bne     1001b
+               .endm
+
+               .macro  busyuart,rd,rx
+1001:          ldr     \rd, [\rx, #0x18]       @ UARTFLG
+               tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
+               bne     1001b
+               .endm
diff --git a/include/asm-arm/arch-realview/dma.h b/include/asm-arm/arch-realview/dma.h
new file mode 100644 (file)
index 0000000..744491a
--- /dev/null
@@ -0,0 +1,27 @@
+/*
+ *  linux/include/asm-arm/arch-realview/dma.h
+ *
+ *  Copyright (C) 2003 ARM Limited.
+ *  Copyright (C) 1997,1998 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+#define MAX_DMA_ADDRESS                0xffffffff
+#define MAX_DMA_CHANNELS       0
+
+#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
new file mode 100644 (file)
index 0000000..2712ba7
--- /dev/null
@@ -0,0 +1,49 @@
+/*
+ * include/asm-arm/arch-realview/entry-macro.S
+ *
+ * Low-level IRQ helper macros for RealView platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <asm/hardware/gic.h>
+
+               .macro  disable_fiq
+               .endm
+
+               /*
+                * The interrupt numbering scheme is defined in the
+                * interrupt controller spec.  To wit:
+                *
+                * Interrupts 0-15 are IPI
+                * 16-28 are reserved
+                * 29-31 are local.  We allow 30 to be used for the watchdog.
+                * 32-1020 are global
+                * 1021-1022 are reserved
+                * 1023 is "spurious" (no interrupt)
+                *
+                * For now, we ignore all local interrupts so only return an interrupt if it's
+                * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
+                *
+                * A simple read from the controller will tell us the number of the highest
+                 * priority enabled interrupt.  We then just need to check whether it is in the
+                * valid range for an IRQ (30-1020 inclusive).
+                */
+
+               .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+               ldr     \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
+               ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
+
+               ldr     \tmp, =1021
+
+               bic     \irqnr, \irqstat, #0x1c00
+
+               cmp     \irqnr, #29
+               cmpcc   \irqnr, \irqnr
+               cmpne   \irqnr, \tmp
+               cmpcs   \irqnr, \irqnr
+
+               .endm
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
new file mode 100644 (file)
index 0000000..67879cd
--- /dev/null
@@ -0,0 +1,31 @@
+/*
+ *  linux/include/asm-arm/arch-realview/hardware.h
+ *
+ *  This file contains the hardware definitions of the RealView boards.
+ *
+ *  Copyright (C) 2003 ARM Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <asm/sizes.h>
+#include <asm/arch/platform.h>
+
+/* macro to get at IO space when running virtually */
+#define IO_ADDRESS(x)          (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
+
+#endif
diff --git a/include/asm-arm/arch-realview/io.h b/include/asm-arm/arch-realview/io.h
new file mode 100644 (file)
index 0000000..d444a68
--- /dev/null
@@ -0,0 +1,34 @@
+/*
+ *  linux/include/asm-arm/arch-realview/io.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+static inline void __iomem *__io(unsigned long addr)
+{
+       return (void __iomem *)addr;
+}
+
+#define __io(a)                        __io(a)
+#define __mem_pci(a)           (a)
+#define __mem_isa(a)           (a)
+
+#endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
new file mode 100644 (file)
index 0000000..ff37649
--- /dev/null
@@ -0,0 +1,103 @@
+/*
+ *  linux/include/asm-arm/arch-realview/irqs.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <asm/arch/platform.h>
+
+/* 
+ *  IRQ interrupts definitions are the same the INT definitions
+ *  held within platform.h
+ */
+#define IRQ_GIC_START          32
+#define IRQ_WDOGINT            (IRQ_GIC_START + INT_WDOGINT)
+#define IRQ_SOFTINT            (IRQ_GIC_START + INT_SOFTINT)
+#define IRQ_COMMRx             (IRQ_GIC_START + INT_COMMRx)
+#define IRQ_COMMTx             (IRQ_GIC_START + INT_COMMTx)
+#define IRQ_TIMERINT0_1                (IRQ_GIC_START + INT_TIMERINT0_1)
+#define IRQ_TIMERINT2_3                (IRQ_GIC_START + INT_TIMERINT2_3)
+#define IRQ_GPIOINT0           (IRQ_GIC_START + INT_GPIOINT0)
+#define IRQ_GPIOINT1           (IRQ_GIC_START + INT_GPIOINT1)
+#define IRQ_GPIOINT2           (IRQ_GIC_START + INT_GPIOINT2)
+#define IRQ_GPIOINT3           (IRQ_GIC_START + INT_GPIOINT3)
+#define IRQ_RTCINT             (IRQ_GIC_START + INT_RTCINT)
+#define IRQ_SSPINT             (IRQ_GIC_START + INT_SSPINT)
+#define IRQ_UARTINT0           (IRQ_GIC_START + INT_UARTINT0)
+#define IRQ_UARTINT1           (IRQ_GIC_START + INT_UARTINT1)
+#define IRQ_UARTINT2           (IRQ_GIC_START + INT_UARTINT2)
+#define IRQ_UART3              (IRQ_GIC_START + INT_UARTINT3)
+#define IRQ_SCIINT             (IRQ_GIC_START + INT_SCIINT)
+#define IRQ_CLCDINT            (IRQ_GIC_START + INT_CLCDINT)
+#define IRQ_DMAINT             (IRQ_GIC_START + INT_DMAINT)
+#define IRQ_PWRFAILINT                 (IRQ_GIC_START + INT_PWRFAILINT)
+#define IRQ_MBXINT             (IRQ_GIC_START + INT_MBXINT)
+#define IRQ_GNDINT             (IRQ_GIC_START + INT_GNDINT)
+#define IRQ_MMCI0B             (IRQ_GIC_START + INT_MMCI0B)
+#define IRQ_MMCI1B             (IRQ_GIC_START + INT_MMCI1B)
+#define IRQ_KMI0               (IRQ_GIC_START + INT_KMI0)
+#define IRQ_KMI1               (IRQ_GIC_START + INT_KMI1)
+#define IRQ_SCI3               (IRQ_GIC_START + INT_SCI3)
+#define IRQ_CLCD               (IRQ_GIC_START + INT_CLCD)
+#define IRQ_TOUCH              (IRQ_GIC_START + INT_TOUCH)
+#define IRQ_KEYPAD             (IRQ_GIC_START + INT_KEYPAD)
+#define IRQ_DoC                        (IRQ_GIC_START + INT_DoC)
+#define IRQ_MMCI0A             (IRQ_GIC_START + INT_MMCI0A)
+#define IRQ_MMCI1A             (IRQ_GIC_START + INT_MMCI1A)
+#define IRQ_AACI               (IRQ_GIC_START + INT_AACI)
+#define IRQ_ETH                        (IRQ_GIC_START + INT_ETH)
+#define IRQ_USB                        (IRQ_GIC_START + INT_USB)
+
+#define IRQMASK_WDOGINT                INTMASK_WDOGINT
+#define IRQMASK_SOFTINT                INTMASK_SOFTINT
+#define IRQMASK_COMMRx                 INTMASK_COMMRx
+#define IRQMASK_COMMTx                 INTMASK_COMMTx
+#define IRQMASK_TIMERINT0_1    INTMASK_TIMERINT0_1
+#define IRQMASK_TIMERINT2_3    INTMASK_TIMERINT2_3
+#define IRQMASK_GPIOINT0       INTMASK_GPIOINT0
+#define IRQMASK_GPIOINT1       INTMASK_GPIOINT1
+#define IRQMASK_GPIOINT2       INTMASK_GPIOINT2
+#define IRQMASK_GPIOINT3       INTMASK_GPIOINT3
+#define IRQMASK_RTCINT                 INTMASK_RTCINT
+#define IRQMASK_SSPINT                 INTMASK_SSPINT
+#define IRQMASK_UARTINT0       INTMASK_UARTINT0
+#define IRQMASK_UARTINT1       INTMASK_UARTINT1
+#define IRQMASK_UARTINT2       INTMASK_UARTINT2
+#define IRQMASK_SCIINT                 INTMASK_SCIINT
+#define IRQMASK_CLCDINT                INTMASK_CLCDINT
+#define IRQMASK_DMAINT                 INTMASK_DMAINT
+#define IRQMASK_PWRFAILINT     INTMASK_PWRFAILINT
+#define IRQMASK_MBXINT                 INTMASK_MBXINT
+#define IRQMASK_GNDINT                 INTMASK_GNDINT
+#define IRQMASK_MMCI0B         INTMASK_MMCI0B
+#define IRQMASK_MMCI1B         INTMASK_MMCI1B
+#define IRQMASK_KMI0           INTMASK_KMI0
+#define IRQMASK_KMI1           INTMASK_KMI1
+#define IRQMASK_SCI3           INTMASK_SCI3
+#define IRQMASK_UART3          INTMASK_UART3
+#define IRQMASK_CLCD           INTMASK_CLCD
+#define IRQMASK_TOUCH          INTMASK_TOUCH
+#define IRQMASK_KEYPAD         INTMASK_KEYPAD
+#define IRQMASK_DoC            INTMASK_DoC
+#define IRQMASK_MMCI0A         INTMASK_MMCI0A
+#define IRQMASK_MMCI1A         INTMASK_MMCI1A
+#define IRQMASK_AACI           INTMASK_AACI
+#define IRQMASK_ETH            INTMASK_ETH
+#define IRQMASK_USB            INTMASK_USB
+
+#define NR_IRQS                        (IRQ_GIC_START + 64)
diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h
new file mode 100644 (file)
index 0000000..99667d5
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ *  linux/include/asm-arm/arch-realview/memory.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+/*
+ * Physical DRAM offset.
+ */
+#define PHYS_OFFSET            (0x00000000UL)
+
+/*
+ * Virtual view <-> DMA view memory address translations
+ * virt_to_bus: Used to translate the virtual address to an
+ *              address suitable to be passed to set_dma_addr
+ * bus_to_virt: Used to convert an address for DMA operations
+ *              to an address that the kernel can use.
+ */
+#define __virt_to_bus(x)       ((x) - PAGE_OFFSET)
+#define __bus_to_virt(x)       ((x) + PAGE_OFFSET)
+
+#endif
diff --git a/include/asm-arm/arch-realview/param.h b/include/asm-arm/arch-realview/param.h
new file mode 100644 (file)
index 0000000..89b1235
--- /dev/null
@@ -0,0 +1,19 @@
+/*
+ *  linux/include/asm-arm/arch-realview/param.h
+ *
+ *  Copyright (C) 2002 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
new file mode 100644 (file)
index 0000000..4b6de13
--- /dev/null
@@ -0,0 +1,395 @@
+/*
+ * linux/include/asm-arm/arch-realview/platform.h
+ *
+ * Copyright (c) ARM Limited 2003.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __address_h
+#define __address_h                     1
+
+/*
+ * Memory definitions
+ */
+#define REALVIEW_BOOT_ROM_LO          0x30000000               /* DoC Base (64Mb)...*/
+#define REALVIEW_BOOT_ROM_HI          0x30000000
+#define REALVIEW_BOOT_ROM_BASE        REALVIEW_BOOT_ROM_HI      /*  Normal position */
+#define REALVIEW_BOOT_ROM_SIZE        SZ_64M
+
+#define REALVIEW_SSRAM_BASE           /* REALVIEW_SSMC_BASE ? */
+#define REALVIEW_SSRAM_SIZE           SZ_2M
+
+#define REALVIEW_FLASH_BASE           0x40000000
+#define REALVIEW_FLASH_SIZE           SZ_64M
+
+/* 
+ *  SDRAM
+ */
+#define REALVIEW_SDRAM_BASE           0x00000000
+
+/* 
+ *  Logic expansion modules
+ * 
+ */
+
+
+/* ------------------------------------------------------------------------
+ *  RealView Registers
+ * ------------------------------------------------------------------------
+ * 
+ */
+#define REALVIEW_SYS_ID_OFFSET               0x00
+#define REALVIEW_SYS_SW_OFFSET               0x04
+#define REALVIEW_SYS_LED_OFFSET              0x08
+#define REALVIEW_SYS_OSC0_OFFSET             0x0C
+
+#define REALVIEW_SYS_OSC1_OFFSET             0x10
+#define REALVIEW_SYS_OSC2_OFFSET             0x14
+#define REALVIEW_SYS_OSC3_OFFSET             0x18
+#define REALVIEW_SYS_OSC4_OFFSET             0x1C      /* OSC1 for RealView/AB */
+
+#define REALVIEW_SYS_LOCK_OFFSET             0x20
+#define REALVIEW_SYS_100HZ_OFFSET            0x24
+#define REALVIEW_SYS_CFGDATA1_OFFSET         0x28
+#define REALVIEW_SYS_CFGDATA2_OFFSET         0x2C
+#define REALVIEW_SYS_FLAGS_OFFSET            0x30
+#define REALVIEW_SYS_FLAGSSET_OFFSET         0x30
+#define REALVIEW_SYS_FLAGSCLR_OFFSET         0x34
+#define REALVIEW_SYS_NVFLAGS_OFFSET          0x38
+#define REALVIEW_SYS_NVFLAGSSET_OFFSET       0x38
+#define REALVIEW_SYS_NVFLAGSCLR_OFFSET       0x3C
+#define REALVIEW_SYS_RESETCTL_OFFSET         0x40
+#define REALVIEW_SYS_PCICTL_OFFSET           0x44
+#define REALVIEW_SYS_MCI_OFFSET              0x48
+#define REALVIEW_SYS_FLASH_OFFSET            0x4C
+#define REALVIEW_SYS_CLCD_OFFSET             0x50
+#define REALVIEW_SYS_CLCDSER_OFFSET          0x54
+#define REALVIEW_SYS_BOOTCS_OFFSET           0x58
+#define REALVIEW_SYS_24MHz_OFFSET            0x5C
+#define REALVIEW_SYS_MISC_OFFSET             0x60
+#define REALVIEW_SYS_IOSEL_OFFSET            0x70
+#define REALVIEW_SYS_TEST_OSC0_OFFSET        0x80
+#define REALVIEW_SYS_TEST_OSC1_OFFSET        0x84
+#define REALVIEW_SYS_TEST_OSC2_OFFSET        0x88
+#define REALVIEW_SYS_TEST_OSC3_OFFSET        0x8C
+#define REALVIEW_SYS_TEST_OSC4_OFFSET        0x90
+
+#define REALVIEW_SYS_BASE                    0x10000000
+#define REALVIEW_SYS_ID                      (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
+#define REALVIEW_SYS_SW                      (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
+#define REALVIEW_SYS_LED                     (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
+#define REALVIEW_SYS_OSC0                    (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
+#define REALVIEW_SYS_OSC1                    (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
+
+#define REALVIEW_SYS_LOCK                    (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
+#define REALVIEW_SYS_100HZ                   (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
+#define REALVIEW_SYS_CFGDATA1                (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
+#define REALVIEW_SYS_CFGDATA2                (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
+#define REALVIEW_SYS_FLAGS                   (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
+#define REALVIEW_SYS_FLAGSSET                (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
+#define REALVIEW_SYS_FLAGSCLR                (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
+#define REALVIEW_SYS_NVFLAGS                 (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
+#define REALVIEW_SYS_NVFLAGSSET              (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
+#define REALVIEW_SYS_NVFLAGSCLR              (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
+#define REALVIEW_SYS_RESETCTL                (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
+#define REALVIEW_SYS_PCICTL                  (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
+#define REALVIEW_SYS_MCI                     (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
+#define REALVIEW_SYS_FLASH                   (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
+#define REALVIEW_SYS_CLCD                    (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
+#define REALVIEW_SYS_CLCDSER                 (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
+#define REALVIEW_SYS_BOOTCS                  (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
+#define REALVIEW_SYS_24MHz                   (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
+#define REALVIEW_SYS_MISC                    (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
+#define REALVIEW_SYS_IOSEL                   (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
+#define REALVIEW_SYS_TEST_OSC0               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
+#define REALVIEW_SYS_TEST_OSC1               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
+#define REALVIEW_SYS_TEST_OSC2               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
+#define REALVIEW_SYS_TEST_OSC3               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
+#define REALVIEW_SYS_TEST_OSC4               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
+
+/* 
+ * Values for REALVIEW_SYS_RESET_CTRL
+ */
+#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR    0x01
+#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT   0x02
+#define REALVIEW_SYS_CTRL_RESET_DLLRESET     0x03
+#define REALVIEW_SYS_CTRL_RESET_PLLRESET     0x04
+#define REALVIEW_SYS_CTRL_RESET_POR          0x05
+#define REALVIEW_SYS_CTRL_RESET_DoC          0x06
+
+#define REALVIEW_SYS_CTRL_LED         (1 << 0)
+
+
+/* ------------------------------------------------------------------------
+ *  RealView control registers
+ * ------------------------------------------------------------------------
+ */
+
+/* 
+ * REALVIEW_IDFIELD
+ *
+ * 31:24 = manufacturer (0x41 = ARM)
+ * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
+ * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
+ * 11:4  = build value
+ * 3:0   = revision number (0x1 = rev B (AHB))
+ */
+
+/*
+ * REALVIEW_SYS_LOCK
+ *     control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL, 
+ *     SYS_CLD, SYS_BOOTCS
+ */
+#define REALVIEW_SYS_LOCK_LOCKED    (1 << 16)
+#define REALVIEW_SYS_LOCKVAL_MASK      0xFFFF          /* write 0xA05F to enable write access */
+
+/*
+ * REALVIEW_SYS_FLASH
+ */
+#define REALVIEW_FLASHPROG_FLVPPEN     (1 << 0)        /* Enable writing to flash */
+
+/*
+ * REALVIEW_INTREG
+ *     - used to acknowledge and control MMCI and UART interrupts 
+ */
+#define REALVIEW_INTREG_WPROT        0x00    /* MMC protection status (no interrupt generated) */
+#define REALVIEW_INTREG_RI0          0x01    /* Ring indicator UART0 is asserted,              */
+#define REALVIEW_INTREG_CARDIN       0x08    /* MMCI card in detect                            */
+                                                /* write 1 to acknowledge and clear               */
+#define REALVIEW_INTREG_RI1          0x02    /* Ring indicator UART1 is asserted,              */
+#define REALVIEW_INTREG_CARDINSERT   0x03    /* Signal insertion of MMC card                   */
+
+/*
+ * REALVIEW peripheral addresses
+ */
+#define REALVIEW_SCTL_BASE            0x10001000       /* System controller */
+#define REALVIEW_I2C_BASE             0x10002000       /* I2C control */
+       /* Reserved 0x10003000 */
+#define REALVIEW_AACI_BASE            0x10004000       /* Audio */
+#define REALVIEW_MMCI0_BASE           0x10005000       /* MMC interface */
+#define REALVIEW_KMI0_BASE            0x10006000       /* KMI interface */
+#define REALVIEW_KMI1_BASE            0x10007000       /* KMI 2nd interface */
+#define REALVIEW_CHAR_LCD_BASE        0x10008000       /* Character LCD */
+#define REALVIEW_UART0_BASE           0x10009000       /* UART 0 */
+#define REALVIEW_UART1_BASE           0x1000A000       /* UART 1 */
+#define REALVIEW_UART2_BASE           0x1000B000       /* UART 2 */
+#define REALVIEW_UART3_BASE           0x1000C000       /* UART 3 */
+#define REALVIEW_SSP_BASE             0x1000D000       /* Synchronous Serial Port */
+#define REALVIEW_SCI_BASE             0x1000E000       /* Smart card controller */
+       /* Reserved 0x1000F000 */
+#define REALVIEW_WATCHDOG_BASE        0x10010000       /* watchdog interface */
+#define REALVIEW_TIMER0_1_BASE        0x10011000       /* Timer 0 and 1 */
+#define REALVIEW_TIMER2_3_BASE        0x10012000       /* Timer 2 and 3 */
+#define REALVIEW_GPIO0_BASE           0x10013000       /* GPIO port 0 */
+#define REALVIEW_GPIO1_BASE           0x10014000       /* GPIO port 1 */
+#define REALVIEW_GPIO2_BASE           0x10015000       /* GPIO port 2 */
+       /* Reserved 0x10016000 */
+#define REALVIEW_RTC_BASE             0x10017000       /* Real Time Clock */
+#define REALVIEW_DMC_BASE             0x10018000       /* DMC configuration */
+#define REALVIEW_PCI_CORE_BASE        0x10019000       /* PCI configuration */
+       /* Reserved 0x1001A000 - 0x1001FFFF */
+#define REALVIEW_CLCD_BASE            0x10020000       /* CLCD */
+#define REALVIEW_DMAC_BASE            0x10030000       /* DMA controller */
+#define REALVIEW_GIC_CPU_BASE         0x10040000       /* Generic interrupt controller CPU interface */
+#define REALVIEW_GIC_DIST_BASE        0x10041000       /* Generic interrupt controller distributor */
+#define REALVIEW_SMC_BASE             0x10080000       /* SMC */
+       /* Reserved 0x10090000 - 0x100EFFFF */
+
+#define REALVIEW_ETH_BASE             0x4E000000       /* Ethernet */
+
+/* PCI space */
+#define REALVIEW_PCI_BASE             0x41000000       /* PCI Interface */
+#define REALVIEW_PCI_CFG_BASE        0x42000000
+#define REALVIEW_PCI_MEM_BASE0        0x44000000
+#define REALVIEW_PCI_MEM_BASE1        0x50000000
+#define REALVIEW_PCI_MEM_BASE2        0x60000000
+/* Sizes of above maps */
+#define REALVIEW_PCI_BASE_SIZE        0x01000000
+#define REALVIEW_PCI_CFG_BASE_SIZE    0x02000000
+#define REALVIEW_PCI_MEM_BASE0_SIZE   0x0c000000       /* 32Mb */
+#define REALVIEW_PCI_MEM_BASE1_SIZE   0x10000000       /* 256Mb */
+#define REALVIEW_PCI_MEM_BASE2_SIZE   0x10000000       /* 256Mb */
+
+#define REALVIEW_SDRAM67_BASE         0x70000000       /* SDRAM banks 6 and 7 */
+#define REALVIEW_LT_BASE              0x80000000       /* Logic Tile expansion */
+
+/*
+ * Disk on Chip
+ */
+#define REALVIEW_DOC_BASE             0x2C000000
+#define REALVIEW_DOC_SIZE             (16 << 20)
+#define REALVIEW_DOC_PAGE_SIZE        512
+#define REALVIEW_DOC_TOTAL_PAGES     (DOC_SIZE / PAGE_SIZE)
+
+#define ERASE_UNIT_PAGES    32
+#define START_PAGE          0x80
+
+/* 
+ *  LED settings, bits [7:0]
+ */
+#define REALVIEW_SYS_LED0             (1 << 0)
+#define REALVIEW_SYS_LED1             (1 << 1)
+#define REALVIEW_SYS_LED2             (1 << 2)
+#define REALVIEW_SYS_LED3             (1 << 3)
+#define REALVIEW_SYS_LED4             (1 << 4)
+#define REALVIEW_SYS_LED5             (1 << 5)
+#define REALVIEW_SYS_LED6             (1 << 6)
+#define REALVIEW_SYS_LED7             (1 << 7)
+
+#define ALL_LEDS                  0xFF
+
+#define LED_BANK                  REALVIEW_SYS_LED
+
+/* 
+ * Control registers
+ */
+#define REALVIEW_IDFIELD_OFFSET        0x0     /* RealView build information */
+#define REALVIEW_FLASHPROG_OFFSET      0x4     /* Flash devices */
+#define REALVIEW_INTREG_OFFSET         0x8     /* Interrupt control */
+#define REALVIEW_DECODE_OFFSET         0xC     /* Fitted logic modules */
+
+/* ------------------------------------------------------------------------
+ *  Interrupts - bit assignment (primary)
+ * ------------------------------------------------------------------------
+ */
+#define INT_WDOGINT                    0       /* Watchdog timer */
+#define INT_SOFTINT                    1       /* Software interrupt */
+#define INT_COMMRx                     2       /* Debug Comm Rx interrupt */
+#define INT_COMMTx                     3       /* Debug Comm Tx interrupt */
+#define INT_TIMERINT0_1                        4       /* Timer 0 and 1 */
+#define INT_TIMERINT2_3                        5       /* Timer 2 and 3 */
+#define INT_GPIOINT0                   6       /* GPIO 0 */
+#define INT_GPIOINT1                   7       /* GPIO 1 */
+#define INT_GPIOINT2                   8       /* GPIO 2 */
+/* 9 reserved */
+#define INT_RTCINT                     10      /* Real Time Clock */
+#define INT_SSPINT                     11      /* Synchronous Serial Port */
+#define INT_UARTINT0                   12      /* UART 0 on development chip */
+#define INT_UARTINT1                   13      /* UART 1 on development chip */
+#define INT_UARTINT2                   14      /* UART 2 on development chip */
+#define INT_UARTINT3                   15      /* UART 3 on development chip */
+#define INT_SCIINT                     16      /* Smart Card Interface */
+#define INT_MMCI0A                     17      /* Multimedia Card 0A */
+#define INT_MMCI0B                     18      /* Multimedia Card 0B */
+#define INT_AACI                       19      /* Audio Codec */
+#define INT_KMI0                       20      /* Keyboard/Mouse port 0 */
+#define INT_KMI1                       21      /* Keyboard/Mouse port 1 */
+#define INT_CHARLCD                    22      /* Character LCD */
+#define INT_CLCDINT                    23      /* CLCD controller */
+#define INT_DMAINT                     24      /* DMA controller */
+#define INT_PWRFAILINT                 25      /* Power failure */
+#define INT_PISMO                      26
+#define INT_DoC                                27      /* Disk on Chip memory controller */
+#define INT_ETH                                28      /* Ethernet controller */
+#define INT_USB                                29      /* USB controller */
+#define INT_TSPENINT                   30      /* Touchscreen pen */
+#define INT_TSKPADINT                  31      /* Touchscreen keypad */
+
+/* 
+ *  Interrupt bit positions
+ * 
+ */
+#define INTMASK_WDOGINT                        (1 << INT_WDOGINT)
+#define INTMASK_SOFTINT                        (1 << INT_SOFTINT)
+#define INTMASK_COMMRx                 (1 << INT_COMMRx)
+#define INTMASK_COMMTx                 (1 << INT_COMMTx)
+#define INTMASK_TIMERINT0_1            (1 << INT_TIMERINT0_1)
+#define INTMASK_TIMERINT2_3            (1 << INT_TIMERINT2_3)
+#define INTMASK_GPIOINT0               (1 << INT_GPIOINT0)
+#define INTMASK_GPIOINT1               (1 << INT_GPIOINT1)
+#define INTMASK_GPIOINT2               (1 << INT_GPIOINT2)
+#define INTMASK_RTCINT                 (1 << INT_RTCINT)
+#define INTMASK_SSPINT                 (1 << INT_SSPINT)
+#define INTMASK_UARTINT0               (1 << INT_UARTINT0)
+#define INTMASK_UARTINT1               (1 << INT_UARTINT1)
+#define INTMASK_UARTINT2               (1 << INT_UARTINT2)
+#define INTMASK_UARTINT3               (1 << INT_UARTINT3)
+#define INTMASK_SCIINT                 (1 << INT_SCIINT)
+#define INTMASK_MMCI0A                 (1 << INT_MMCI0A)
+#define INTMASK_MMCI0B                 (1 << INT_MMCI0B)
+#define INTMASK_AACI                   (1 << INT_AACI)
+#define INTMASK_KMI0                   (1 << INT_KMI0)
+#define INTMASK_KMI1                   (1 << INT_KMI1)
+#define INTMASK_CHARLCD                        (1 << INT_CHARLCD)
+#define INTMASK_CLCDINT                        (1 << INT_CLCDINT)
+#define INTMASK_DMAINT                 (1 << INT_DMAINT)
+#define INTMASK_PWRFAILINT             (1 << INT_PWRFAILINT)
+#define INTMASK_PISMO                  (1 << INT_PISMO)
+#define INTMASK_DoC                    (1 << INT_DoC)
+#define INTMASK_ETH                    (1 << INT_ETH)
+#define INTMASK_USB                    (1 << INT_USB)
+#define INTMASK_TSPENINT               (1 << INT_TSPENINT)
+#define INTMASK_TSKPADINT              (1 << INT_TSKPADINT)
+
+#define MAXIRQNUM                       31
+#define MAXFIQNUM                       31
+#define MAXSWINUM                       31
+
+/* 
+ *  Application Flash
+ * 
+ */
+#define FLASH_BASE                      REALVIEW_FLASH_BASE
+#define FLASH_SIZE                      REALVIEW_FLASH_SIZE
+#define FLASH_END                       (FLASH_BASE + FLASH_SIZE - 1)
+#define FLASH_BLOCK_SIZE                SZ_128K
+
+/* 
+ *  Boot Flash
+ * 
+ */
+#define EPROM_BASE                      REALVIEW_BOOT_ROM_HI
+#define EPROM_SIZE                      REALVIEW_BOOT_ROM_SIZE
+#define EPROM_END                       (EPROM_BASE + EPROM_SIZE - 1)
+
+/* 
+ *  Clean base - dummy
+ * 
+ */
+#define CLEAN_BASE                      EPROM_BASE
+
+/*
+ * System controller bit assignment
+ */
+#define REALVIEW_REFCLK        0
+#define REALVIEW_TIMCLK        1
+
+#define REALVIEW_TIMER1_EnSel  15
+#define REALVIEW_TIMER2_EnSel  17
+#define REALVIEW_TIMER3_EnSel  19
+#define REALVIEW_TIMER4_EnSel  21
+
+
+#define MAX_TIMER                       2
+#define MAX_PERIOD                      699050
+#define TICKS_PER_uSEC                  1
+
+/* 
+ *  These are useconds NOT ticks.  
+ * 
+ */
+#define mSEC_1                          1000
+#define mSEC_5                          (mSEC_1 * 5)
+#define mSEC_10                         (mSEC_1 * 10)
+#define mSEC_25                         (mSEC_1 * 25)
+#define SEC_1                           (mSEC_1 * 1000)
+
+#define REALVIEW_CSR_BASE             0x10000000
+#define REALVIEW_CSR_SIZE             0x10000000
+
+#endif
+
+/*     END */
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
new file mode 100644 (file)
index 0000000..9f8fcbc
--- /dev/null
@@ -0,0 +1,51 @@
+/*
+ *  linux/include/asm-arm/arch-realview/system.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/arch/platform.h>
+
+static inline void arch_idle(void)
+{
+       /*
+        * This should do all the clock switching
+        * and wait for interrupt tricks
+        */
+       cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+       unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET);
+       unsigned int val;
+
+       /*
+        * To reset, we hit the on-board reset register
+        * in the system FPGA
+        */
+       val = __raw_readl(hdr_ctrl);
+       val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
+       __raw_writel(val, hdr_ctrl);
+}
+
+#endif
diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h
new file mode 100644 (file)
index 0000000..5b9d82d
--- /dev/null
@@ -0,0 +1,23 @@
+/*
+ *  linux/include/asm-arm/arch-realview/timex.h
+ *
+ *  RealView architecture timex specifications
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#define CLOCK_TICK_RATE                (50000000 / 16)
diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h
new file mode 100644 (file)
index 0000000..b5e4d36
--- /dev/null
@@ -0,0 +1,54 @@
+/*
+ *  linux/include/asm-arm/arch-realview/uncompress.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <asm/hardware.h>
+
+#define AMBA_UART_DR   (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x00))
+#define AMBA_UART_LCRH (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x2c))
+#define AMBA_UART_CR   (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x30))
+#define AMBA_UART_FR   (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x18))
+
+/*
+ * This does not append a newline
+ */
+static void putstr(const char *s)
+{
+       while (*s) {
+               while (AMBA_UART_FR & (1 << 5))
+                       barrier();
+
+               AMBA_UART_DR = *s;
+
+               if (*s == '\n') {
+                       while (AMBA_UART_FR & (1 << 5))
+                               barrier();
+
+                       AMBA_UART_DR = '\r';
+               }
+               s++;
+       }
+       while (AMBA_UART_FR & (1 << 3))
+               barrier();
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h
new file mode 100644 (file)
index 0000000..0ad49af
--- /dev/null
@@ -0,0 +1,21 @@
+/*
+ *  linux/include/asm-arm/arch-realview/vmalloc.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *  Copyright (C) 2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#define VMALLOC_END            (PAGE_OFFSET + 0x18000000)
index ce4cf5c..6b8d73d 100644 (file)
@@ -22,7 +22,7 @@
 #define CLCD_UBAS              0x00000010
 #define CLCD_LBAS              0x00000014
 
-#ifndef CONFIG_ARCH_VERSATILE
+#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
 #define CLCD_IENB              0x00000018
 #define CLCD_CNTL              0x0000001c
 #else