Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzi...
Linus Torvalds [Sat, 13 Sep 2008 21:48:14 +0000 (14:48 -0700)]
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  [libata] LBA28/LBA48 off-by-one bug in ata.h
  sata_inic162x: enable LED blinking
  ata: duplicate variable sparse warning

37 files changed:
Documentation/ABI/testing/sysfs-gpio [new file with mode: 0644]
Documentation/cpusets.txt
Documentation/filesystems/proc.txt
MAINTAINERS
arch/sparc/kernel/of_device.c
arch/sparc/kernel/ptrace.c
arch/sparc64/kernel/pci_psycho.c
arch/sparc64/kernel/prom.c
arch/sparc64/kernel/ptrace.c
drivers/memstick/core/memstick.c
drivers/memstick/core/mspro_block.c
drivers/memstick/host/jmb38x_ms.c
drivers/misc/sgi-gru/grufile.c
drivers/net/niu.c
drivers/net/wireless/ath9k/beacon.c
drivers/net/wireless/ath9k/core.h
drivers/net/wireless/ath9k/main.c
drivers/pci/hotplug/fakephp.c
drivers/pci/hotplug/pciehp_hpc.c
drivers/pci/intel-iommu.c
drivers/pci/probe.c
drivers/pci/setup-bus.c
drivers/spi/pxa2xx_spi.c
drivers/spi/spi_mpc83xx.c
drivers/spi/spi_s3c24xx.c
drivers/video/atmel_lcdfb.c
fs/bfs/dir.c
fs/partitions/check.c
fs/proc/generic.c
fs/proc/proc_misc.c
include/linux/ioport.h
include/linux/memstick.h
include/linux/mmzone.h
include/net/netlink.h
kernel/cpuset.c
mm/mmzone.c
net/bluetooth/hci_core.c

diff --git a/Documentation/ABI/testing/sysfs-gpio b/Documentation/ABI/testing/sysfs-gpio
new file mode 100644 (file)
index 0000000..8aab809
--- /dev/null
@@ -0,0 +1,26 @@
+What:          /sys/class/gpio/
+Date:          July 2008
+KernelVersion: 2.6.27
+Contact:       David Brownell <dbrownell@users.sourceforge.net>
+Description:
+
+  As a Kconfig option, individual GPIO signals may be accessed from
+  userspace.  GPIOs are only made available to userspace by an explicit
+  "export" operation.  If a given GPIO is not claimed for use by
+  kernel code, it may be exported by userspace (and unexported later).
+  Kernel code may export it for complete or partial access.
+
+  GPIOs are identified as they are inside the kernel, using integers in
+  the range 0..INT_MAX.  See Documentation/gpio.txt for more information.
+
+    /sys/class/gpio
+       /export ... asks the kernel to export a GPIO to userspace
+       /unexport ... to return a GPIO to the kernel
+       /gpioN ... for each exported GPIO #N
+           /value ... always readable, writes fail for input GPIOs
+           /direction ... r/w as: in, out (default low); write: high, low
+       /gpiochipN ... for each gpiochip; #N is its first GPIO
+           /base ... (r/o) same as N
+           /label ... (r/o) descriptive, not necessarily unique
+           /ngpio ... (r/o) number of GPIOs; numbered N to N + (ngpio - 1)
+
index 1f5a924..47e568a 100644 (file)
@@ -635,14 +635,16 @@ prior 'mems' setting, will not be moved.
 
 There is an exception to the above.  If hotplug functionality is used
 to remove all the CPUs that are currently assigned to a cpuset,
-then the kernel will automatically update the cpus_allowed of all
-tasks attached to CPUs in that cpuset to allow all CPUs.  When memory
-hotplug functionality for removing Memory Nodes is available, a
-similar exception is expected to apply there as well.  In general,
-the kernel prefers to violate cpuset placement, over starving a task
-that has had all its allowed CPUs or Memory Nodes taken offline.  User
-code should reconfigure cpusets to only refer to online CPUs and Memory
-Nodes when using hotplug to add or remove such resources.
+then all the tasks in that cpuset will be moved to the nearest ancestor
+with non-empty cpus.  But the moving of some (or all) tasks might fail if
+cpuset is bound with another cgroup subsystem which has some restrictions
+on task attaching.  In this failing case, those tasks will stay
+in the original cpuset, and the kernel will automatically update
+their cpus_allowed to allow all online CPUs.  When memory hotplug
+functionality for removing Memory Nodes is available, a similar exception
+is expected to apply there as well.  In general, the kernel prefers to
+violate cpuset placement, over starving a task that has had all
+its allowed CPUs or Memory Nodes taken offline.
 
 There is a second exception to the above.  GFP_ATOMIC requests are
 kernel internal allocations that must be satisfied, immediately.
index 394eb2c..f566ad9 100644 (file)
@@ -2413,6 +2413,8 @@ The following 4 memory types are supported:
   - (bit 1) anonymous shared memory
   - (bit 2) file-backed private memory
   - (bit 3) file-backed shared memory
+  - (bit 4) ELF header pages in file-backed private memory areas (it is
+            effective only if the bit 2 is cleared)
 
   Note that MMIO pages such as frame buffer are never dumped and vDSO pages
   are always dumped regardless of the bitmask status.
index 186be3b..0a613cb 100644 (file)
@@ -4365,7 +4365,7 @@ S:        Maintained
 USB VIDEO CLASS
 P:     Laurent Pinchart
 M:     laurent.pinchart@skynet.be
-L:     linx-uvc-devel@berlios.de
+L:     linux-uvc-devel@lists.berlios.de
 L:     video4linux-list@redhat.com
 W:     http://linux-uvc.berlios.de
 S:     Maintained
index c481d45..f58c537 100644 (file)
@@ -241,7 +241,7 @@ static int of_bus_sbus_map(u32 *addr, const u32 *range, int na, int ns, int pna)
        return of_bus_default_map(addr, range, na, ns, pna);
 }
 
-static unsigned int of_bus_sbus_get_flags(const u32 *addr)
+static unsigned long of_bus_sbus_get_flags(const u32 *addr, unsigned long flags)
 {
        return IORESOURCE_MEM;
 }
index 20699c7..8ce6285 100644 (file)
@@ -288,7 +288,7 @@ static const struct user_regset sparc32_regsets[] = {
         */
        [REGSET_GENERAL] = {
                .core_note_type = NT_PRSTATUS,
-               .n = 38 * sizeof(u32),
+               .n = 38,
                .size = sizeof(u32), .align = sizeof(u32),
                .get = genregs32_get, .set = genregs32_set
        },
@@ -304,7 +304,7 @@ static const struct user_regset sparc32_regsets[] = {
         */
        [REGSET_FP] = {
                .core_note_type = NT_PRFPREG,
-               .n = 99 * sizeof(u32),
+               .n = 99,
                .size = sizeof(u32), .align = sizeof(u32),
                .get = fpregs32_get, .set = fpregs32_set
        },
index ef5fe29..e205ade 100644 (file)
@@ -744,16 +744,16 @@ static void psycho_register_error_handlers(struct pci_pbm_info *pbm)
         * the second will just error out since we do not pass in
         * IRQF_SHARED.
         */
-       err = request_irq(op->irqs[1], psycho_ue_intr, 0,
+       err = request_irq(op->irqs[1], psycho_ue_intr, IRQF_SHARED,
                          "PSYCHO_UE", pbm);
-       err = request_irq(op->irqs[2], psycho_ce_intr, 0,
+       err = request_irq(op->irqs[2], psycho_ce_intr, IRQF_SHARED,
                          "PSYCHO_CE", pbm);
 
        /* This one, however, ought not to fail.  We can just warn
         * about it since the system can still operate properly even
         * if this fails.
         */
-       err = request_irq(op->irqs[0], psycho_pcierr_intr, 0,
+       err = request_irq(op->irqs[0], psycho_pcierr_intr, IRQF_SHARED,
                          "PSYCHO_PCIERR", pbm);
        if (err)
                printk(KERN_WARNING "%s: Could not register PCIERR, "
index 3c048ac..7151513 100644 (file)
@@ -156,55 +156,11 @@ static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
                return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 }
 
-#define PSYCHO_IMAP_SCSI       0x1000UL
-#define PSYCHO_IMAP_ETH                0x1008UL
-#define PSYCHO_IMAP_BPP                0x1010UL
-#define PSYCHO_IMAP_AU_REC     0x1018UL
-#define PSYCHO_IMAP_AU_PLAY    0x1020UL
-#define PSYCHO_IMAP_PFAIL      0x1028UL
-#define PSYCHO_IMAP_KMS                0x1030UL
-#define PSYCHO_IMAP_FLPY       0x1038UL
-#define PSYCHO_IMAP_SHW                0x1040UL
-#define PSYCHO_IMAP_KBD                0x1048UL
-#define PSYCHO_IMAP_MS         0x1050UL
-#define PSYCHO_IMAP_SER                0x1058UL
-#define PSYCHO_IMAP_TIM0       0x1060UL
-#define PSYCHO_IMAP_TIM1       0x1068UL
-#define PSYCHO_IMAP_UE         0x1070UL
-#define PSYCHO_IMAP_CE         0x1078UL
-#define PSYCHO_IMAP_A_ERR      0x1080UL
-#define PSYCHO_IMAP_B_ERR      0x1088UL
-#define PSYCHO_IMAP_PMGMT      0x1090UL
-#define PSYCHO_IMAP_GFX                0x1098UL
-#define PSYCHO_IMAP_EUPA       0x10a0UL
-
-static unsigned long __psycho_onboard_imap_off[] = {
-/*0x20*/       PSYCHO_IMAP_SCSI,
-/*0x21*/       PSYCHO_IMAP_ETH,
-/*0x22*/       PSYCHO_IMAP_BPP,
-/*0x23*/       PSYCHO_IMAP_AU_REC,
-/*0x24*/       PSYCHO_IMAP_AU_PLAY,
-/*0x25*/       PSYCHO_IMAP_PFAIL,
-/*0x26*/       PSYCHO_IMAP_KMS,
-/*0x27*/       PSYCHO_IMAP_FLPY,
-/*0x28*/       PSYCHO_IMAP_SHW,
-/*0x29*/       PSYCHO_IMAP_KBD,
-/*0x2a*/       PSYCHO_IMAP_MS,
-/*0x2b*/       PSYCHO_IMAP_SER,
-/*0x2c*/       PSYCHO_IMAP_TIM0,
-/*0x2d*/       PSYCHO_IMAP_TIM1,
-/*0x2e*/       PSYCHO_IMAP_UE,
-/*0x2f*/       PSYCHO_IMAP_CE,
-/*0x30*/       PSYCHO_IMAP_A_ERR,
-/*0x31*/       PSYCHO_IMAP_B_ERR,
-/*0x32*/       PSYCHO_IMAP_PMGMT,
-/*0x33*/       PSYCHO_IMAP_GFX,
-/*0x34*/       PSYCHO_IMAP_EUPA,
-};
+#define PSYCHO_OBIO_IMAP_BASE  0x1000UL
+
 #define PSYCHO_ONBOARD_IRQ_BASE                0x20
-#define PSYCHO_ONBOARD_IRQ_LAST                0x34
 #define psycho_onboard_imap_offset(__ino) \
-       __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
+       (PSYCHO_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3))
 
 #define PSYCHO_ICLR_A_SLOT0    0x1400UL
 #define PSYCHO_ICLR_SCSI       0x1800UL
@@ -228,10 +184,6 @@ static unsigned int psycho_irq_build(struct device_node *dp,
                imap_off = psycho_pcislot_imap_offset(ino);
        } else {
                /* Onboard device */
-               if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
-                       prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
-                       prom_halt();
-               }
                imap_off = psycho_onboard_imap_offset(ino);
        }
 
@@ -318,23 +270,6 @@ static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 
 #define SABRE_IMAP_A_SLOT0     0x0c00UL
 #define SABRE_IMAP_B_SLOT0     0x0c20UL
-#define SABRE_IMAP_SCSI                0x1000UL
-#define SABRE_IMAP_ETH         0x1008UL
-#define SABRE_IMAP_BPP         0x1010UL
-#define SABRE_IMAP_AU_REC      0x1018UL
-#define SABRE_IMAP_AU_PLAY     0x1020UL
-#define SABRE_IMAP_PFAIL       0x1028UL
-#define SABRE_IMAP_KMS         0x1030UL
-#define SABRE_IMAP_FLPY                0x1038UL
-#define SABRE_IMAP_SHW         0x1040UL
-#define SABRE_IMAP_KBD         0x1048UL
-#define SABRE_IMAP_MS          0x1050UL
-#define SABRE_IMAP_SER         0x1058UL
-#define SABRE_IMAP_UE          0x1070UL
-#define SABRE_IMAP_CE          0x1078UL
-#define SABRE_IMAP_PCIERR      0x1080UL
-#define SABRE_IMAP_GFX         0x1098UL
-#define SABRE_IMAP_EUPA                0x10a0UL
 #define SABRE_ICLR_A_SLOT0     0x1400UL
 #define SABRE_ICLR_B_SLOT0     0x1480UL
 #define SABRE_ICLR_SCSI                0x1800UL
@@ -364,33 +299,10 @@ static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
                return SABRE_IMAP_B_SLOT0 + (slot * 8);
 }
 
-static unsigned long __sabre_onboard_imap_off[] = {
-/*0x20*/       SABRE_IMAP_SCSI,
-/*0x21*/       SABRE_IMAP_ETH,
-/*0x22*/       SABRE_IMAP_BPP,
-/*0x23*/       SABRE_IMAP_AU_REC,
-/*0x24*/       SABRE_IMAP_AU_PLAY,
-/*0x25*/       SABRE_IMAP_PFAIL,
-/*0x26*/       SABRE_IMAP_KMS,
-/*0x27*/       SABRE_IMAP_FLPY,
-/*0x28*/       SABRE_IMAP_SHW,
-/*0x29*/       SABRE_IMAP_KBD,
-/*0x2a*/       SABRE_IMAP_MS,
-/*0x2b*/       SABRE_IMAP_SER,
-/*0x2c*/       0 /* reserved */,
-/*0x2d*/       0 /* reserved */,
-/*0x2e*/       SABRE_IMAP_UE,
-/*0x2f*/       SABRE_IMAP_CE,
-/*0x30*/       SABRE_IMAP_PCIERR,
-/*0x31*/       0 /* reserved */,
-/*0x32*/       0 /* reserved */,
-/*0x33*/       SABRE_IMAP_GFX,
-/*0x34*/       SABRE_IMAP_EUPA,
-};
-#define SABRE_ONBOARD_IRQ_BASE         0x20
-#define SABRE_ONBOARD_IRQ_LAST         0x30
+#define SABRE_OBIO_IMAP_BASE   0x1000UL
+#define SABRE_ONBOARD_IRQ_BASE 0x20
 #define sabre_onboard_imap_offset(__ino) \
-       __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
+       (SABRE_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3))
 
 #define sabre_iclr_offset(ino)                                       \
        ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
@@ -453,10 +365,6 @@ static unsigned int sabre_irq_build(struct device_node *dp,
                imap_off = sabre_pcislot_imap_offset(ino);
        } else {
                /* onboard device */
-               if (ino > SABRE_ONBOARD_IRQ_LAST) {
-                       prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
-                       prom_halt();
-               }
                imap_off = sabre_onboard_imap_offset(ino);
        }
 
index bd578cc..10306e4 100644 (file)
@@ -443,7 +443,7 @@ static const struct user_regset sparc64_regsets[] = {
         */
        [REGSET_GENERAL] = {
                .core_note_type = NT_PRSTATUS,
-               .n = 36 * sizeof(u64),
+               .n = 36,
                .size = sizeof(u64), .align = sizeof(u64),
                .get = genregs64_get, .set = genregs64_set
        },
@@ -455,7 +455,7 @@ static const struct user_regset sparc64_regsets[] = {
         */
        [REGSET_FP] = {
                .core_note_type = NT_PRFPREG,
-               .n = 35 * sizeof(u64),
+               .n = 35,
                .size = sizeof(u64), .align = sizeof(u64),
                .get = fpregs64_get, .set = fpregs64_set
        },
@@ -801,7 +801,7 @@ static const struct user_regset sparc32_regsets[] = {
         */
        [REGSET_GENERAL] = {
                .core_note_type = NT_PRSTATUS,
-               .n = 38 * sizeof(u32),
+               .n = 38,
                .size = sizeof(u32), .align = sizeof(u32),
                .get = genregs32_get, .set = genregs32_set
        },
@@ -817,7 +817,7 @@ static const struct user_regset sparc32_regsets[] = {
         */
        [REGSET_FP] = {
                .core_note_type = NT_PRFPREG,
-               .n = 99 * sizeof(u32),
+               .n = 99,
                .size = sizeof(u32), .align = sizeof(u32),
                .get = fpregs32_get, .set = fpregs32_set
        },
index a380050..cea4690 100644 (file)
@@ -185,7 +185,7 @@ static void memstick_free(struct device *dev)
 }
 
 static struct class memstick_host_class = {
-       .name       = "memstick_host",
+       .name        = "memstick_host",
        .dev_release = memstick_free
 };
 
@@ -264,7 +264,7 @@ EXPORT_SYMBOL(memstick_new_req);
  * @sg - TPC argument
  */
 void memstick_init_req_sg(struct memstick_request *mrq, unsigned char tpc,
-                         struct scatterlist *sg)
+                         const struct scatterlist *sg)
 {
        mrq->tpc = tpc;
        if (tpc & 8)
@@ -294,7 +294,7 @@ EXPORT_SYMBOL(memstick_init_req_sg);
  * user supplied buffer.
  */
 void memstick_init_req(struct memstick_request *mrq, unsigned char tpc,
-                      void *buf, size_t length)
+                      const void *buf, size_t length)
 {
        mrq->tpc = tpc;
        if (tpc & 8)
@@ -439,7 +439,7 @@ static void memstick_check(struct work_struct *work)
        if (!host->card) {
                if (memstick_power_on(host))
                        goto out_power_off;
-       } else
+       } else if (host->card->stop)
                host->card->stop(host->card);
 
        card = memstick_alloc_card(host);
@@ -458,7 +458,7 @@ static void memstick_check(struct work_struct *work)
                            || !(host->card->check(host->card))) {
                                device_unregister(&host->card->dev);
                                host->card = NULL;
-                       } else
+                       } else if (host->card->start)
                                host->card->start(host->card);
                }
 
index 44b1817..d2d2318 100644 (file)
@@ -30,6 +30,8 @@ module_param(major, int, 0644);
 #define MSPRO_BLOCK_SIGNATURE        0xa5c3
 #define MSPRO_BLOCK_MAX_ATTRIBUTES   41
 
+#define MSPRO_BLOCK_PART_SHIFT 3
+
 enum {
        MSPRO_BLOCK_ID_SYSINFO         = 0x10,
        MSPRO_BLOCK_ID_MODELNAME       = 0x15,
@@ -195,7 +197,7 @@ static int mspro_block_bd_open(struct inode *inode, struct file *filp)
 static int mspro_block_disk_release(struct gendisk *disk)
 {
        struct mspro_block_data *msb = disk->private_data;
-       int disk_id = disk->first_minor >> MEMSTICK_PART_SHIFT;
+       int disk_id = disk->first_minor >> MSPRO_BLOCK_PART_SHIFT;
 
        mutex_lock(&mspro_block_disk_lock);
 
@@ -877,6 +879,7 @@ static int mspro_block_switch_interface(struct memstick_dev *card)
        struct mspro_block_data *msb = memstick_get_drvdata(card);
        int rc = 0;
 
+try_again:
        if (msb->caps & MEMSTICK_CAP_PAR4)
                rc = mspro_block_set_interface(card, MEMSTICK_SYS_PAR4);
        else
@@ -930,6 +933,18 @@ static int mspro_block_switch_interface(struct memstick_dev *card)
                rc = memstick_set_rw_addr(card);
                if (!rc)
                        rc = mspro_block_set_interface(card, msb->system);
+
+               if (!rc) {
+                       msleep(150);
+                       rc = mspro_block_wait_for_ced(card);
+                       if (rc)
+                               return rc;
+
+                       if (msb->caps & MEMSTICK_CAP_PAR8) {
+                               msb->caps &= ~MEMSTICK_CAP_PAR8;
+                               goto try_again;
+                       }
+               }
        }
        return rc;
 }
@@ -1117,14 +1132,16 @@ static int mspro_block_init_card(struct memstick_dev *card)
                return -EIO;
 
        msb->caps = host->caps;
-       rc = mspro_block_switch_interface(card);
+
+       msleep(150);
+       rc = mspro_block_wait_for_ced(card);
        if (rc)
                return rc;
 
-       msleep(200);
-       rc = mspro_block_wait_for_ced(card);
+       rc = mspro_block_switch_interface(card);
        if (rc)
                return rc;
+
        dev_dbg(&card->dev, "card activated\n");
        if (msb->system != MEMSTICK_SYS_SERIAL)
                msb->caps |= MEMSTICK_CAP_AUTO_GET_INT;
@@ -1192,12 +1209,12 @@ static int mspro_block_init_disk(struct memstick_dev *card)
        if (rc)
                return rc;
 
-       if ((disk_id << MEMSTICK_PART_SHIFT) > 255) {
+       if ((disk_id << MSPRO_BLOCK_PART_SHIFT) > 255) {
                rc = -ENOSPC;
                goto out_release_id;
        }
 
-       msb->disk = alloc_disk(1 << MEMSTICK_PART_SHIFT);
+       msb->disk = alloc_disk(1 << MSPRO_BLOCK_PART_SHIFT);
        if (!msb->disk) {
                rc = -ENOMEM;
                goto out_release_id;
@@ -1220,7 +1237,7 @@ static int mspro_block_init_disk(struct memstick_dev *card)
                                   MSPRO_BLOCK_MAX_PAGES * msb->page_size);
 
        msb->disk->major = major;
-       msb->disk->first_minor = disk_id << MEMSTICK_PART_SHIFT;
+       msb->disk->first_minor = disk_id << MSPRO_BLOCK_PART_SHIFT;
        msb->disk->fops = &ms_block_bdops;
        msb->usage_count = 1;
        msb->disk->private_data = msb;
@@ -1416,7 +1433,7 @@ out_unlock:
 
 static struct memstick_device_id mspro_block_id_tbl[] = {
        {MEMSTICK_MATCH_ALL, MEMSTICK_TYPE_PRO, MEMSTICK_CATEGORY_STORAGE_DUO,
-        MEMSTICK_CLASS_GENERIC_DUO},
+        MEMSTICK_CLASS_DUO},
        {}
 };
 
index 3485c63..2fb95a5 100644 (file)
@@ -81,6 +81,8 @@ struct jmb38x_ms {
 #define TPC_CODE_SZ_MASK       0x00000700
 #define TPC_DATA_SZ_MASK       0x00000007
 
+#define HOST_CONTROL_TDELAY_EN 0x00040000
+#define HOST_CONTROL_HW_OC_P   0x00010000
 #define HOST_CONTROL_RESET_REQ 0x00008000
 #define HOST_CONTROL_REI       0x00004000
 #define HOST_CONTROL_LED       0x00000400
@@ -88,6 +90,7 @@ struct jmb38x_ms {
 #define HOST_CONTROL_RESET     0x00000100
 #define HOST_CONTROL_POWER_EN  0x00000080
 #define HOST_CONTROL_CLOCK_EN  0x00000040
+#define HOST_CONTROL_REO       0x00000008
 #define HOST_CONTROL_IF_SHIFT  4
 
 #define HOST_CONTROL_IF_SERIAL 0x0
@@ -133,11 +136,15 @@ struct jmb38x_ms {
 #define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000
 
 #define CLOCK_CONTROL_40MHZ   0x00000001
-#define CLOCK_CONTROL_50MHZ   0x00000002
+#define CLOCK_CONTROL_50MHZ   0x0000000a
 #define CLOCK_CONTROL_60MHZ   0x00000008
 #define CLOCK_CONTROL_62_5MHZ 0x0000000c
 #define CLOCK_CONTROL_OFF     0x00000000
 
+#define PCI_CTL_CLOCK_DLY_ADDR   0x000000b0
+#define PCI_CTL_CLOCK_DLY_MASK_A 0x00000f00
+#define PCI_CTL_CLOCK_DLY_MASK_B 0x0000f000
+
 enum {
        CMD_READY    = 0x01,
        FIFO_READY   = 0x02,
@@ -367,8 +374,7 @@ static int jmb38x_ms_issue_cmd(struct memstick_host *msh)
                return host->req->error;
        }
 
-       dev_dbg(&msh->dev, "control %08x\n",
-               readl(host->addr + HOST_CONTROL));
+       dev_dbg(&msh->dev, "control %08x\n", readl(host->addr + HOST_CONTROL));
        dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS));
        dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS));
 
@@ -637,7 +643,7 @@ static int jmb38x_ms_reset(struct jmb38x_ms_host *host)
                ndelay(20);
        }
        dev_dbg(&host->chip->pdev->dev, "reset_req timeout\n");
-       return -EIO;
+       /* return -EIO; */
 
 reset_next:
        writel(HOST_CONTROL_RESET | HOST_CONTROL_CLOCK_EN
@@ -680,7 +686,9 @@ static int jmb38x_ms_set_param(struct memstick_host *msh,
 
                        host_ctl = 7;
                        host_ctl |= HOST_CONTROL_POWER_EN
-                                | HOST_CONTROL_CLOCK_EN;
+                                   | HOST_CONTROL_CLOCK_EN
+                                   | HOST_CONTROL_HW_OC_P
+                                   | HOST_CONTROL_TDELAY_EN;
                        writel(host_ctl, host->addr + HOST_CONTROL);
 
                        writel(host->id ? PAD_PU_PD_ON_MS_SOCK1
@@ -704,33 +712,40 @@ static int jmb38x_ms_set_param(struct memstick_host *msh,
                break;
        case MEMSTICK_INTERFACE:
                host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT);
+               pci_read_config_dword(host->chip->pdev,
+                                     PCI_CTL_CLOCK_DLY_ADDR,
+                                     &clock_delay);
+               clock_delay &= host->id ? ~PCI_CTL_CLOCK_DLY_MASK_B
+                                       : ~PCI_CTL_CLOCK_DLY_MASK_A;
 
                if (value == MEMSTICK_SERIAL) {
                        host_ctl &= ~HOST_CONTROL_FAST_CLK;
+                       host_ctl &= ~HOST_CONTROL_REO;
                        host_ctl |= HOST_CONTROL_IF_SERIAL
                                    << HOST_CONTROL_IF_SHIFT;
                        host_ctl |= HOST_CONTROL_REI;
                        clock_ctl = CLOCK_CONTROL_40MHZ;
-                       clock_delay = 0;
                } else if (value == MEMSTICK_PAR4) {
-                       host_ctl |= HOST_CONTROL_FAST_CLK;
+                       host_ctl |= HOST_CONTROL_FAST_CLK | HOST_CONTROL_REO;
                        host_ctl |= HOST_CONTROL_IF_PAR4
                                    << HOST_CONTROL_IF_SHIFT;
                        host_ctl &= ~HOST_CONTROL_REI;
                        clock_ctl = CLOCK_CONTROL_40MHZ;
-                       clock_delay = 4;
+                       clock_delay |= host->id ? (4 << 12) : (4 << 8);
                } else if (value == MEMSTICK_PAR8) {
                        host_ctl |= HOST_CONTROL_FAST_CLK;
                        host_ctl |= HOST_CONTROL_IF_PAR8
                                    << HOST_CONTROL_IF_SHIFT;
-                       host_ctl &= ~HOST_CONTROL_REI;
-                       clock_ctl = CLOCK_CONTROL_60MHZ;
-                       clock_delay = 0;
+                       host_ctl &= ~(HOST_CONTROL_REI | HOST_CONTROL_REO);
+                       clock_ctl = CLOCK_CONTROL_50MHZ;
                } else
                        return -EINVAL;
+
                writel(host_ctl, host->addr + HOST_CONTROL);
                writel(clock_ctl, host->addr + CLOCK_CONTROL);
-               writel(clock_delay, host->addr + CLOCK_DELAY);
+               pci_write_config_dword(host->chip->pdev,
+                                      PCI_CTL_CLOCK_DLY_ADDR,
+                                      clock_delay);
                break;
        };
        return 0;
index 23c91f5..d61cee7 100644 (file)
@@ -445,6 +445,9 @@ static void __exit gru_exit(void)
        int order = get_order(sizeof(struct gru_state) *
                              GRU_CHIPLETS_PER_BLADE);
 
+       if (!IS_UV())
+               return;
+
        for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++)
                free_irq(IRQ_GRU + i, NULL);
 
index e4765b7..e3be81e 100644 (file)
@@ -5984,6 +5984,56 @@ static void niu_netif_start(struct niu *np)
        niu_enable_interrupts(np, 1);
 }
 
+static void niu_reset_buffers(struct niu *np)
+{
+       int i, j, k, err;
+
+       if (np->rx_rings) {
+               for (i = 0; i < np->num_rx_rings; i++) {
+                       struct rx_ring_info *rp = &np->rx_rings[i];
+
+                       for (j = 0, k = 0; j < MAX_RBR_RING_SIZE; j++) {
+                               struct page *page;
+
+                               page = rp->rxhash[j];
+                               while (page) {
+                                       struct page *next =
+                                               (struct page *) page->mapping;
+                                       u64 base = page->index;
+                                       base = base >> RBR_DESCR_ADDR_SHIFT;
+                                       rp->rbr[k++] = cpu_to_le32(base);
+                                       page = next;
+                               }
+                       }
+                       for (; k < MAX_RBR_RING_SIZE; k++) {
+                               err = niu_rbr_add_page(np, rp, GFP_ATOMIC, k);
+                               if (unlikely(err))
+                                       break;
+                       }
+
+                       rp->rbr_index = rp->rbr_table_size - 1;
+                       rp->rcr_index = 0;
+                       rp->rbr_pending = 0;
+                       rp->rbr_refill_pending = 0;
+               }
+       }
+       if (np->tx_rings) {
+               for (i = 0; i < np->num_tx_rings; i++) {
+                       struct tx_ring_info *rp = &np->tx_rings[i];
+
+                       for (j = 0; j < MAX_TX_RING_SIZE; j++) {
+                               if (rp->tx_buffs[j].skb)
+                                       (void) release_tx_packet(np, rp, j);
+                       }
+
+                       rp->pending = MAX_TX_RING_SIZE;
+                       rp->prod = 0;
+                       rp->cons = 0;
+                       rp->wrap_bit = 0;
+               }
+       }
+}
+
 static void niu_reset_task(struct work_struct *work)
 {
        struct niu *np = container_of(work, struct niu, reset_task);
@@ -6006,6 +6056,12 @@ static void niu_reset_task(struct work_struct *work)
 
        niu_stop_hw(np);
 
+       spin_unlock_irqrestore(&np->lock, flags);
+
+       niu_reset_buffers(np);
+
+       spin_lock_irqsave(&np->lock, flags);
+
        err = niu_init_hw(np);
        if (!err) {
                np->timer.expires = jiffies + HZ;
index caf5694..00a0eaa 100644 (file)
@@ -209,6 +209,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
        unsigned int curlen;
        struct ath_txq *cabq;
        struct ath_txq *mcastq;
+       struct ieee80211_tx_info *info;
        avp = sc->sc_vaps[if_id];
 
        mcastq = &avp->av_mcastq;
@@ -232,6 +233,18 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
         */
        curlen = skb->len;
 
+       info = IEEE80211_SKB_CB(skb);
+       if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
+               /*
+                * TODO: make sure the seq# gets assigned properly (vs. other
+                * TX frames)
+                */
+               struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+               sc->seq_no += 0x10;
+               hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
+               hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
+       }
+
        /* XXX: spin_lock_bh should not be used here, but sparse bitches
         * otherwise. We should fix sparse :) */
        spin_lock_bh(&mcastq->axq_lock);
index 673b3d8..4ee695b 100644 (file)
@@ -992,6 +992,7 @@ struct ath_softc {
        u32 sc_txintrperiod;    /* tx interrupt batching */
        int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */
        u32 sc_ant_tx[8];       /* recent tx frames/antenna */
+       u16 seq_no; /* TX sequence number */
 
        /* Beacon */
        struct ath9k_tx_queue_info sc_beacon_qi;
index c5107f2..99badf1 100644 (file)
@@ -369,6 +369,20 @@ static int ath9k_tx(struct ieee80211_hw *hw,
 {
        struct ath_softc *sc = hw->priv;
        int hdrlen, padsize;
+       struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+
+       /*
+        * As a temporary workaround, assign seq# here; this will likely need
+        * to be cleaned up to work better with Beacon transmission and virtual
+        * BSSes.
+        */
+       if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
+               struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+               if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
+                       sc->seq_no += 0x10;
+               hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
+               hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
+       }
 
        /* Add the padding after the header if this is not already done */
        hdrlen = ieee80211_get_hdrlen_from_skb(skb);
index 40337a0..146ca9c 100644 (file)
@@ -320,15 +320,15 @@ static int disable_slot(struct hotplug_slot *slot)
                        return -ENODEV;
                }
 
+               /* remove the device from the pci core */
+               pci_remove_bus_device(dev);
+
                /* queue work item to blow away this sysfs entry and other
                 * parts.
                 */
                INIT_WORK(&dslot->remove_work, remove_slot_worker);
                queue_work(dummyphp_wq, &dslot->remove_work);
 
-               /* blow away this sysfs entry and other parts. */
-               remove_slot(dslot);
-
                pci_dev_put(dev);
        }
        return 0;
index ab31f5b..9d934dd 100644 (file)
@@ -258,7 +258,7 @@ static int pcie_poll_cmd(struct controller *ctrl)
                        return 1;
                }
        }
-       while (timeout > 1000) {
+       while (timeout > 0) {
                msleep(10);
                timeout -= 10;
                if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status)) {
index 8d0e60a..c3edcdc 100644 (file)
@@ -2348,11 +2348,34 @@ static void __init iommu_exit_mempool(void)
 
 }
 
+static int blacklist_iommu(const struct dmi_system_id *id)
+{
+       printk(KERN_INFO "%s detected; disabling IOMMU\n",
+              id->ident);
+       dmar_disabled = 1;
+       return 0;
+}
+
+static struct dmi_system_id __initdata intel_iommu_dmi_table[] = {
+       {       /* Some DG33BU BIOS revisions advertised non-existent VT-d */
+               .callback = blacklist_iommu,
+               .ident = "Intel DG33BU",
+               {       DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"),
+                       DMI_MATCH(DMI_BOARD_NAME, "DG33BU"),
+               }
+       },
+       { }
+};
+
+
 void __init detect_intel_iommu(void)
 {
        if (swiotlb || no_iommu || iommu_detected || dmar_disabled)
                return;
        if (early_dmar_detect()) {
+               dmi_check_system(intel_iommu_dmi_table);
+               if (dmar_disabled)
+                       return;
                iommu_detected = 1;
        }
 }
index cce2f4c..36698e5 100644 (file)
@@ -304,6 +304,9 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                } else {
                        res->start = l64;
                        res->end = l64 + sz64;
+                       printk(KERN_DEBUG "PCI: %s reg %x 64bit mmio: [%llx, %llx]\n",
+                               pci_name(dev), pos, (unsigned long long)res->start,
+                               (unsigned long long)res->end);
                }
        } else {
                sz = pci_size(l, sz, mask);
@@ -313,6 +316,9 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 
                res->start = l;
                res->end = l + sz;
+               printk(KERN_DEBUG "PCI: %s reg %x %s: [%llx, %llx]\n", pci_name(dev),
+                       pos, (res->flags & IORESOURCE_IO) ? "io port":"32bit mmio",
+                       (unsigned long long)res->start, (unsigned long long)res->end);
        }
 
  out:
@@ -383,7 +389,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                        res->start = base;
                if (!res->end)
                        res->end = limit + 0xfff;
-               printk(KERN_INFO "PCI: bridge %s io port: [%llx, %llx]\n", pci_name(dev), res->start, res->end);
+               printk(KERN_DEBUG "PCI: bridge %s io port: [%llx, %llx]\n",
+                       pci_name(dev), (unsigned long long) res->start,
+                       (unsigned long long) res->end);
        }
 
        res = child->resource[1];
@@ -395,7 +403,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                res->start = base;
                res->end = limit + 0xfffff;
-               printk(KERN_INFO "PCI: bridge %s 32bit mmio: [%llx, %llx]\n", pci_name(dev), res->start, res->end);
+               printk(KERN_DEBUG "PCI: bridge %s 32bit mmio: [%llx, %llx]\n",
+                       pci_name(dev), (unsigned long long) res->start,
+                       (unsigned long long) res->end);
        }
 
        res = child->resource[2];
@@ -431,7 +441,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
                res->start = base;
                res->end = limit + 0xfffff;
-               printk(KERN_INFO "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n", pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64)?"64":"32",res->start, res->end);
+               printk(KERN_DEBUG "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n",
+                       pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32",
+                       (unsigned long long) res->start, (unsigned long long) res->end);
        }
 }
 
index 1aad599..3abbfad 100644 (file)
@@ -540,7 +540,11 @@ static void pci_bus_dump_res(struct pci_bus *bus)
                 if (!res)
                         continue;
 
-               printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n", bus->number, i, (res->flags & IORESOURCE_IO)? "io port":"mmio", res->start, res->end);
+               printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n",
+                       bus->number, i,
+                       (res->flags & IORESOURCE_IO) ? "io port" : "mmio",
+                       (unsigned long long) res->start,
+                       (unsigned long long) res->end);
         }
 }
 
index 34c7c98..0e53354 100644 (file)
@@ -47,9 +47,10 @@ MODULE_ALIAS("platform:pxa2xx-spi");
 
 #define MAX_BUSES 3
 
-#define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR)
-#define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK)
-#define IS_DMA_ALIGNED(x) (((u32)(x)&0x07)==0)
+#define DMA_INT_MASK           (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR)
+#define RESET_DMA_CHANNEL      (DCSR_NODESC | DMA_INT_MASK)
+#define IS_DMA_ALIGNED(x)      (((x) & 0x07) == 0)
+#define MAX_DMA_LEN            8191
 
 /*
  * for testing SSCR1 changes that require SSP restart, basically
@@ -144,7 +145,6 @@ struct driver_data {
        size_t tx_map_len;
        u8 n_bytes;
        u32 dma_width;
-       int cs_change;
        int (*write)(struct driver_data *drv_data);
        int (*read)(struct driver_data *drv_data);
        irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
@@ -406,8 +406,45 @@ static void giveback(struct driver_data *drv_data)
                                        struct spi_transfer,
                                        transfer_list);
 
+       /* Delay if requested before any change in chip select */
+       if (last_transfer->delay_usecs)
+               udelay(last_transfer->delay_usecs);
+
+       /* Drop chip select UNLESS cs_change is true or we are returning
+        * a message with an error, or next message is for another chip
+        */
        if (!last_transfer->cs_change)
                drv_data->cs_control(PXA2XX_CS_DEASSERT);
+       else {
+               struct spi_message *next_msg;
+
+               /* Holding of cs was hinted, but we need to make sure
+                * the next message is for the same chip.  Don't waste
+                * time with the following tests unless this was hinted.
+                *
+                * We cannot postpone this until pump_messages, because
+                * after calling msg->complete (below) the driver that
+                * sent the current message could be unloaded, which
+                * could invalidate the cs_control() callback...
+                */
+
+               /* get a pointer to the next message, if any */
+               spin_lock_irqsave(&drv_data->lock, flags);
+               if (list_empty(&drv_data->queue))
+                       next_msg = NULL;
+               else
+                       next_msg = list_entry(drv_data->queue.next,
+                                       struct spi_message, queue);
+               spin_unlock_irqrestore(&drv_data->lock, flags);
+
+               /* see if the next and current messages point
+                * to the same chip
+                */
+               if (next_msg && next_msg->spi != msg->spi)
+                       next_msg = NULL;
+               if (!next_msg || msg->state == ERROR_STATE)
+                       drv_data->cs_control(PXA2XX_CS_DEASSERT);
+       }
 
        msg->state = NULL;
        if (msg->complete)
@@ -490,10 +527,9 @@ static void dma_transfer_complete(struct driver_data *drv_data)
        msg->actual_length += drv_data->len -
                                (drv_data->rx_end - drv_data->rx);
 
-       /* Release chip select if requested, transfer delays are
-        * handled in pump_transfers */
-       if (drv_data->cs_change)
-               drv_data->cs_control(PXA2XX_CS_DEASSERT);
+       /* Transfer delays and chip select release are
+        * handled in pump_transfers or giveback
+        */
 
        /* Move to next transfer */
        msg->state = next_transfer(drv_data);
@@ -602,10 +638,9 @@ static void int_transfer_complete(struct driver_data *drv_data)
        drv_data->cur_msg->actual_length += drv_data->len -
                                (drv_data->rx_end - drv_data->rx);
 
-       /* Release chip select if requested, transfer delays are
-        * handled in pump_transfers */
-       if (drv_data->cs_change)
-               drv_data->cs_control(PXA2XX_CS_DEASSERT);
+       /* Transfer delays and chip select release are
+        * handled in pump_transfers or giveback
+        */
 
        /* Move to next transfer */
        drv_data->cur_msg->state = next_transfer(drv_data);
@@ -840,23 +875,40 @@ static void pump_transfers(unsigned long data)
                return;
        }
 
-       /* Delay if requested at end of transfer*/
+       /* Delay if requested at end of transfer before CS change */
        if (message->state == RUNNING_STATE) {
                previous = list_entry(transfer->transfer_list.prev,
                                        struct spi_transfer,
                                        transfer_list);
                if (previous->delay_usecs)
                        udelay(previous->delay_usecs);
+
+               /* Drop chip select only if cs_change is requested */
+               if (previous->cs_change)
+                       drv_data->cs_control(PXA2XX_CS_DEASSERT);
        }
 
-       /* Check transfer length */
-       if (transfer->len > 8191)
-       {
-               dev_warn(&drv_data->pdev->dev, "pump_transfers: transfer "
-                               "length greater than 8191\n");
-               message->status = -EINVAL;
-               giveback(drv_data);
-               return;
+       /* Check for transfers that need multiple DMA segments */
+       if (transfer->len > MAX_DMA_LEN && chip->enable_dma) {
+
+               /* reject already-mapped transfers; PIO won't always work */
+               if (message->is_dma_mapped
+                               || transfer->rx_dma || transfer->tx_dma) {
+                       dev_err(&drv_data->pdev->dev,
+                               "pump_transfers: mapped transfer length "
+                               "of %lu is greater than %d\n",
+                               transfer->len, MAX_DMA_LEN);
+                       message->status = -EINVAL;
+                       giveback(drv_data);
+                       return;
+               }
+
+               /* warn ... we force this to PIO mode */
+               if (printk_ratelimit())
+                       dev_warn(&message->spi->dev, "pump_transfers: "
+                               "DMA disabled for transfer length %ld "
+                               "greater than %d\n",
+                               (long)drv_data->len, MAX_DMA_LEN);
        }
 
        /* Setup the transfer state based on the type of transfer */
@@ -878,7 +930,6 @@ static void pump_transfers(unsigned long data)
        drv_data->len = transfer->len & DCMD_LENGTH;
        drv_data->write = drv_data->tx ? chip->write : null_writer;
        drv_data->read = drv_data->rx ? chip->read : null_reader;
-       drv_data->cs_change = transfer->cs_change;
 
        /* Change speed and bit per word on a per transfer */
        cr0 = chip->cr0;
@@ -925,7 +976,7 @@ static void pump_transfers(unsigned long data)
                                                        &dma_thresh))
                                if (printk_ratelimit())
                                        dev_warn(&message->spi->dev,
-                                               "pump_transfer: "
+                                               "pump_transfers: "
                                                "DMA burst size reduced to "
                                                "match bits_per_word\n");
                }
@@ -939,8 +990,23 @@ static void pump_transfers(unsigned long data)
 
        message->state = RUNNING_STATE;
 
-       /* Try to map dma buffer and do a dma transfer if successful */
-       if ((drv_data->dma_mapped = map_dma_buffers(drv_data))) {
+       /* Try to map dma buffer and do a dma transfer if successful, but
+        * only if the length is non-zero and less than MAX_DMA_LEN.
+        *
+        * Zero-length non-descriptor DMA is illegal on PXA2xx; force use
+        * of PIO instead.  Care is needed above because the transfer may
+        * have have been passed with buffers that are already dma mapped.
+        * A zero-length transfer in PIO mode will not try to write/read
+        * to/from the buffers
+        *
+        * REVISIT large transfers are exactly where we most want to be
+        * using DMA.  If this happens much, split those transfers into
+        * multiple DMA segments rather than forcing PIO.
+        */
+       drv_data->dma_mapped = 0;
+       if (drv_data->len > 0 && drv_data->len <= MAX_DMA_LEN)
+               drv_data->dma_mapped = map_dma_buffers(drv_data);
+       if (drv_data->dma_mapped) {
 
                /* Ensure we have the correct interrupt handler */
                drv_data->transfer_handler = dma_transfer;
index 070c621..ac0e3e4 100644 (file)
@@ -267,16 +267,13 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
        cs->hw_mode |= SPMODE_LEN(bits_per_word);
 
        if ((mpc83xx_spi->spibrg / hz) > 64) {
+               cs->hw_mode |= SPMODE_DIV16;
                pm = mpc83xx_spi->spibrg / (hz * 64);
                if (pm > 16) {
-                       cs->hw_mode |= SPMODE_DIV16;
-                       pm /= 16;
-                       if (pm > 16) {
-                               dev_err(&spi->dev, "Requested speed is too "
-                                       "low: %d Hz. Will use %d Hz instead.\n",
-                                       hz, mpc83xx_spi->spibrg / 1024);
-                               pm = 16;
-                       }
+                       dev_err(&spi->dev, "Requested speed is too "
+                               "low: %d Hz. Will use %d Hz instead.\n",
+                               hz, mpc83xx_spi->spibrg / 1024);
+                       pm = 16;
                }
        } else
                pm = mpc83xx_spi->spibrg / (hz * 4);
@@ -315,11 +312,20 @@ static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
        if (t->bits_per_word)
                bits_per_word = t->bits_per_word;
        len = t->len;
-       if (bits_per_word > 8)
+       if (bits_per_word > 8) {
+               /* invalid length? */
+               if (len & 1)
+                       return -EINVAL;
                len /= 2;
-       if (bits_per_word > 16)
+       }
+       if (bits_per_word > 16) {
+               /* invalid length? */
+               if (len & 1)
+                       return -EINVAL;
                len /= 2;
+       }
        mpc83xx_spi->count = len;
+
        INIT_COMPLETION(mpc83xx_spi->done);
 
        /* enable rx ints */
index 98abc73..3eb414b 100644 (file)
@@ -430,7 +430,7 @@ static int s3c24xx_spi_resume(struct platform_device *pdev)
 #endif
 
 MODULE_ALIAS("platform:s3c2410-spi");
-static struct platform_driver s3c24xx_spidrv = {
+static struct platform_driver s3c24xx_spi_driver = {
        .remove         = __exit_p(s3c24xx_spi_remove),
        .suspend        = s3c24xx_spi_suspend,
        .resume         = s3c24xx_spi_resume,
@@ -442,12 +442,12 @@ static struct platform_driver s3c24xx_spidrv = {
 
 static int __init s3c24xx_spi_init(void)
 {
-        return platform_driver_probe(&s3c24xx_spidrv, s3c24xx_spi_probe);
+        return platform_driver_probe(&s3c24xx_spi_driver, s3c24xx_spi_probe);
 }
 
 static void __exit s3c24xx_spi_exit(void)
 {
-        platform_driver_unregister(&s3c24xx_spidrv);
+        platform_driver_unregister(&s3c24xx_spi_driver);
 }
 
 module_init(s3c24xx_spi_init);
index 5a24c64..75dac57 100644 (file)
@@ -208,6 +208,36 @@ static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
        return value;
 }
 
+static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
+{
+       /* Turn off the LCD controller and the DMA controller */
+       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
+                       sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
+
+       /* Wait for the LCDC core to become idle */
+       while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
+               msleep(10);
+
+       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
+}
+
+static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
+{
+       atmel_lcdfb_stop_nowait(sinfo);
+
+       /* Wait for DMA engine to become idle... */
+       while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
+               msleep(10);
+}
+
+static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
+{
+       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
+       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
+               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
+               | ATMEL_LCDC_PWR);
+}
+
 static void atmel_lcdfb_update_dma(struct fb_info *info,
                               struct fb_var_screeninfo *var)
 {
@@ -420,26 +450,8 @@ static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
 {
        might_sleep();
 
-       /* LCD power off */
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
-
-       /* wait for the LCDC core to become idle */
-       while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
-               msleep(10);
-
-       /* DMA disable */
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
-
-       /* wait for DMA engine to become idle */
-       while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
-               msleep(10);
-
-       /* LCD power on */
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
-               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
-
-       /* DMA enable */
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
+       atmel_lcdfb_stop(sinfo);
+       atmel_lcdfb_start(sinfo);
 }
 
 /**
@@ -471,14 +483,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
                 info->var.xres, info->var.yres,
                 info->var.xres_virtual, info->var.yres_virtual);
 
-       /* Turn off the LCD controller and the DMA controller */
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
-
-       /* Wait for the LCDC core to become idle */
-       while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
-               msleep(10);
-
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
+       atmel_lcdfb_stop_nowait(sinfo);
 
        if (info->var.bits_per_pixel == 1)
                info->fix.visual = FB_VISUAL_MONO01;
@@ -583,13 +588,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
        while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
                msleep(10);
 
-       dev_dbg(info->device, "  * re-enable DMA engine\n");
-       /* ...and enable it with updated configuration */
-       lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
-
-       dev_dbg(info->device, "  * re-enable LCDC core\n");
-       lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
-               (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
+       atmel_lcdfb_start(sinfo);
 
        dev_dbg(info->device, "  * DONE\n");
 
@@ -1032,11 +1031,20 @@ static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
        struct fb_info *info = platform_get_drvdata(pdev);
        struct atmel_lcdfb_info *sinfo = info->par;
 
+       /*
+        * We don't want to handle interrupts while the clock is
+        * stopped. It may take forever.
+        */
+       lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
+
        sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
        if (sinfo->atmel_lcdfb_power_control)
                sinfo->atmel_lcdfb_power_control(0);
+
+       atmel_lcdfb_stop(sinfo);
        atmel_lcdfb_stop_clock(sinfo);
+
        return 0;
 }
 
@@ -1046,9 +1054,15 @@ static int atmel_lcdfb_resume(struct platform_device *pdev)
        struct atmel_lcdfb_info *sinfo = info->par;
 
        atmel_lcdfb_start_clock(sinfo);
+       atmel_lcdfb_start(sinfo);
        if (sinfo->atmel_lcdfb_power_control)
                sinfo->atmel_lcdfb_power_control(1);
        lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
+
+       /* Enable FIFO & DMA errors */
+       lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
+                       | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
+
        return 0;
 }
 
index 87ee5cc..ed8feb0 100644 (file)
@@ -125,8 +125,8 @@ static int bfs_create(struct inode *dir, struct dentry *dentry, int mode,
                                                        inode->i_ino);
        if (err) {
                inode_dec_link_count(inode);
-               iput(inode);
                mutex_unlock(&info->bfs_lock);
+               iput(inode);
                return err;
        }
        mutex_unlock(&info->bfs_lock);
index 7d6b34e..ecc3330 100644 (file)
@@ -499,9 +499,9 @@ int rescan_partitions(struct gendisk *disk, struct block_device *bdev)
                if (!size)
                        continue;
                if (from + size > get_capacity(disk)) {
-                       printk(KERN_ERR " %s: p%d exceeds device capacity\n",
+                       printk(KERN_WARNING
+                               "%s: p%d exceeds device capacity\n",
                                disk->disk_name, p);
-                       continue;
                }
                res = add_partition(disk, p, from, size, state->parts[p].flags);
                if (res) {
index bca0f81..7821589 100644 (file)
@@ -547,8 +547,8 @@ static int proc_register(struct proc_dir_entry * dir, struct proc_dir_entry * dp
 
        for (tmp = dir->subdir; tmp; tmp = tmp->next)
                if (strcmp(tmp->name, dp->name) == 0) {
-                       printk(KERN_WARNING "proc_dir_entry '%s' already "
-                                       "registered\n", dp->name);
+                       printk(KERN_WARNING "proc_dir_entry '%s/%s' already registered\n",
+                               dir->name, dp->name);
                        dump_stack();
                        break;
                }
index 00f10a2..29e20c6 100644 (file)
@@ -183,6 +183,9 @@ static int meminfo_read_proc(char *page, char **start, off_t off,
                "SReclaimable: %8lu kB\n"
                "SUnreclaim:   %8lu kB\n"
                "PageTables:   %8lu kB\n"
+#ifdef CONFIG_QUICKLIST
+               "Quicklists:   %8lu kB\n"
+#endif
                "NFS_Unstable: %8lu kB\n"
                "Bounce:       %8lu kB\n"
                "WritebackTmp: %8lu kB\n"
@@ -190,8 +193,7 @@ static int meminfo_read_proc(char *page, char **start, off_t off,
                "Committed_AS: %8lu kB\n"
                "VmallocTotal: %8lu kB\n"
                "VmallocUsed:  %8lu kB\n"
-               "VmallocChunk: %8lu kB\n"
-               "Quicklists:   %8lu kB\n",
+               "VmallocChunk: %8lu kB\n",
                K(i.totalram),
                K(i.freeram),
                K(i.bufferram),
@@ -216,6 +218,9 @@ static int meminfo_read_proc(char *page, char **start, off_t off,
                K(global_page_state(NR_SLAB_RECLAIMABLE)),
                K(global_page_state(NR_SLAB_UNRECLAIMABLE)),
                K(global_page_state(NR_PAGETABLE)),
+#ifdef CONFIG_QUICKLIST
+               K(quicklist_total_size()),
+#endif
                K(global_page_state(NR_UNSTABLE_NFS)),
                K(global_page_state(NR_BOUNCE)),
                K(global_page_state(NR_WRITEBACK_TEMP)),
@@ -223,8 +228,7 @@ static int meminfo_read_proc(char *page, char **start, off_t off,
                K(committed),
                (unsigned long)VMALLOC_TOTAL >> 10,
                vmi.used >> 10,
-               vmi.largest_chunk >> 10,
-               K(quicklist_total_size())
+               vmi.largest_chunk >> 10
                );
 
                len += hugetlb_report_meminfo(page + len);
index 8d3b7a9..350033e 100644 (file)
@@ -159,9 +159,9 @@ extern struct resource * __devm_request_region(struct device *dev,
                                struct resource *parent, resource_size_t start,
                                resource_size_t n, const char *name);
 
-#define devm_release_region(start,n) \
+#define devm_release_region(dev, start, n) \
        __devm_release_region(dev, &ioport_resource, (start), (n))
-#define devm_release_mem_region(start,n) \
+#define devm_release_mem_region(dev, start, n) \
        __devm_release_region(dev, &iomem_resource, (start), (n))
 
 extern void __devm_release_region(struct device *dev, struct resource *parent,
index a9f998a..d0c37e6 100644 (file)
 struct ms_status_register {
        unsigned char reserved;
        unsigned char interrupt;
-#define MEMSTICK_INT_CMDNAK             0x0001
-#define MEMSTICK_INT_IOREQ              0x0008
-#define MEMSTICK_INT_IOBREQ             0x0010
-#define MEMSTICK_INT_BREQ               0x0020
-#define MEMSTICK_INT_ERR                0x0040
-#define MEMSTICK_INT_CED                0x0080
+#define MEMSTICK_INT_CMDNAK 0x01
+#define MEMSTICK_INT_IOREQ  0x08
+#define MEMSTICK_INT_IOBREQ 0x10
+#define MEMSTICK_INT_BREQ   0x20
+#define MEMSTICK_INT_ERR    0x40
+#define MEMSTICK_INT_CED    0x80
 
        unsigned char status0;
-#define MEMSTICK_STATUS0_WP             0x0001
-#define MEMSTICK_STATUS0_SL             0x0002
-#define MEMSTICK_STATUS0_BF             0x0010
-#define MEMSTICK_STATUS0_BE             0x0020
-#define MEMSTICK_STATUS0_FB0            0x0040
-#define MEMSTICK_STATUS0_MB             0x0080
+#define MEMSTICK_STATUS0_WP  0x01
+#define MEMSTICK_STATUS0_SL  0x02
+#define MEMSTICK_STATUS0_BF  0x10
+#define MEMSTICK_STATUS0_BE  0x20
+#define MEMSTICK_STATUS0_FB0 0x40
+#define MEMSTICK_STATUS0_MB  0x80
 
        unsigned char status1;
-#define MEMSTICK_STATUS1_UCFG           0x0001
-#define MEMSTICK_STATUS1_FGER           0x0002
-#define MEMSTICK_STATUS1_UCEX           0x0004
-#define MEMSTICK_STATUS1_EXER           0x0008
-#define MEMSTICK_STATUS1_UCDT           0x0010
-#define MEMSTICK_STATUS1_DTER           0x0020
-#define MEMSTICK_STATUS1_FBI            0x0040
-#define MEMSTICK_STATUS1_MB             0x0080
+#define MEMSTICK_STATUS1_UCFG 0x01
+#define MEMSTICK_STATUS1_FGER 0x02
+#define MEMSTICK_STATUS1_UCEX 0x04
+#define MEMSTICK_STATUS1_EXER 0x08
+#define MEMSTICK_STATUS1_UCDT 0x10
+#define MEMSTICK_STATUS1_DTER 0x20
+#define MEMSTICK_STATUS1_FB1  0x40
+#define MEMSTICK_STATUS1_MB   0x80
 } __attribute__((packed));
 
 struct ms_id_register {
@@ -56,32 +56,32 @@ struct ms_id_register {
 
 struct ms_param_register {
        unsigned char system;
-#define MEMSTICK_SYS_ATEN 0xc0
-#define MEMSTICK_SYS_BAMD 0x80
 #define MEMSTICK_SYS_PAM  0x08
+#define MEMSTICK_SYS_BAMD 0x80
 
        unsigned char block_address_msb;
        unsigned short block_address;
        unsigned char cp;
-#define MEMSTICK_CP_BLOCK               0x0000
-#define MEMSTICK_CP_PAGE                0x0020
-#define MEMSTICK_CP_EXTRA               0x0040
-#define MEMSTICK_CP_OVERWRITE           0x0080
+#define MEMSTICK_CP_BLOCK     0x00
+#define MEMSTICK_CP_PAGE      0x20
+#define MEMSTICK_CP_EXTRA     0x40
+#define MEMSTICK_CP_OVERWRITE 0x80
 
        unsigned char page_address;
 } __attribute__((packed));
 
 struct ms_extra_data_register {
        unsigned char  overwrite_flag;
-#define MEMSTICK_OVERWRITE_UPDATA       0x0010
-#define MEMSTICK_OVERWRITE_PAGE         0x0060
-#define MEMSTICK_OVERWRITE_BLOCK        0x0080
+#define MEMSTICK_OVERWRITE_UDST  0x10
+#define MEMSTICK_OVERWRITE_PGST1 0x20
+#define MEMSTICK_OVERWRITE_PGST0 0x40
+#define MEMSTICK_OVERWRITE_BKST  0x80
 
        unsigned char  management_flag;
-#define MEMSTICK_MANAGEMENT_SYSTEM      0x0004
-#define MEMSTICK_MANAGEMENT_TRANS_TABLE 0x0008
-#define MEMSTICK_MANAGEMENT_COPY        0x0010
-#define MEMSTICK_MANAGEMENT_ACCESS      0x0020
+#define MEMSTICK_MANAGEMENT_SYSFLG 0x04
+#define MEMSTICK_MANAGEMENT_ATFLG  0x08
+#define MEMSTICK_MANAGEMENT_SCMS1  0x10
+#define MEMSTICK_MANAGEMENT_SCMS0  0x20
 
        unsigned short logical_address;
 } __attribute__((packed));
@@ -96,9 +96,9 @@ struct ms_register {
 
 struct mspro_param_register {
        unsigned char  system;
-#define MEMSTICK_SYS_SERIAL 0x80
 #define MEMSTICK_SYS_PAR4   0x00
 #define MEMSTICK_SYS_PAR8   0x40
+#define MEMSTICK_SYS_SERIAL 0x80
 
        unsigned short data_count;
        unsigned int   data_address;
@@ -147,7 +147,7 @@ struct ms_register_addr {
        unsigned char w_length;
 } __attribute__((packed));
 
-enum {
+enum memstick_tpc {
        MS_TPC_READ_MG_STATUS   = 0x01,
        MS_TPC_READ_LONG_DATA   = 0x02,
        MS_TPC_READ_SHORT_DATA  = 0x03,
@@ -167,7 +167,7 @@ enum {
        MS_TPC_SET_CMD          = 0x0e
 };
 
-enum {
+enum memstick_command {
        MS_CMD_BLOCK_END       = 0x33,
        MS_CMD_RESET           = 0x3c,
        MS_CMD_BLOCK_WRITE     = 0x55,
@@ -201,8 +201,6 @@ enum {
 
 /*** Driver structures and functions ***/
 
-#define MEMSTICK_PART_SHIFT 3
-
 enum memstick_param { MEMSTICK_POWER = 1, MEMSTICK_INTERFACE };
 
 #define MEMSTICK_POWER_OFF 0
@@ -215,24 +213,27 @@ enum memstick_param { MEMSTICK_POWER = 1, MEMSTICK_INTERFACE };
 struct memstick_host;
 struct memstick_driver;
 
+struct memstick_device_id {
+       unsigned char match_flags;
 #define MEMSTICK_MATCH_ALL            0x01
 
+       unsigned char type;
 #define MEMSTICK_TYPE_LEGACY          0xff
 #define MEMSTICK_TYPE_DUO             0x00
 #define MEMSTICK_TYPE_PRO             0x01
 
+       unsigned char category;
 #define MEMSTICK_CATEGORY_STORAGE     0xff
 #define MEMSTICK_CATEGORY_STORAGE_DUO 0x00
+#define MEMSTICK_CATEGORY_IO          0x01
+#define MEMSTICK_CATEGORY_IO_PRO      0x10
 
-#define MEMSTICK_CLASS_GENERIC        0xff
-#define MEMSTICK_CLASS_GENERIC_DUO    0x00
-
-
-struct memstick_device_id {
-       unsigned char match_flags;
-       unsigned char type;
-       unsigned char category;
        unsigned char class;
+#define MEMSTICK_CLASS_FLASH          0xff
+#define MEMSTICK_CLASS_DUO            0x00
+#define MEMSTICK_CLASS_ROM            0x01
+#define MEMSTICK_CLASS_RO             0x02
+#define MEMSTICK_CLASS_WP             0x03
 };
 
 struct memstick_request {
@@ -319,9 +320,9 @@ void memstick_suspend_host(struct memstick_host *host);
 void memstick_resume_host(struct memstick_host *host);
 
 void memstick_init_req_sg(struct memstick_request *mrq, unsigned char tpc,
-                         struct scatterlist *sg);
+                         const struct scatterlist *sg);
 void memstick_init_req(struct memstick_request *mrq, unsigned char tpc,
-                      void *buf, size_t length);
+                      const void *buf, size_t length);
 int memstick_next_req(struct memstick_host *host,
                      struct memstick_request **mrq);
 void memstick_new_req(struct memstick_host *host);
index 443bc7c..428328a 100644 (file)
@@ -751,8 +751,9 @@ static inline int zonelist_node_idx(struct zoneref *zoneref)
  *
  * This function returns the next zone at or below a given zone index that is
  * within the allowed nodemask using a cursor as the starting point for the
- * search. The zoneref returned is a cursor that is used as the next starting
- * point for future calls to next_zones_zonelist().
+ * search. The zoneref returned is a cursor that represents the current zone
+ * being examined. It should be advanced by one before calling
+ * next_zones_zonelist again.
  */
 struct zoneref *next_zones_zonelist(struct zoneref *z,
                                        enum zone_type highest_zoneidx,
@@ -768,9 +769,8 @@ struct zoneref *next_zones_zonelist(struct zoneref *z,
  *
  * This function returns the first zone at or below a given zone index that is
  * within the allowed nodemask. The zoneref returned is a cursor that can be
- * used to iterate the zonelist with next_zones_zonelist. The cursor should
- * not be used by the caller as it does not match the value of the zone
- * returned.
+ * used to iterate the zonelist with next_zones_zonelist by advancing it by
+ * one before calling.
  */
 static inline struct zoneref *first_zones_zonelist(struct zonelist *zonelist,
                                        enum zone_type highest_zoneidx,
@@ -795,7 +795,7 @@ static inline struct zoneref *first_zones_zonelist(struct zonelist *zonelist,
 #define for_each_zone_zonelist_nodemask(zone, z, zlist, highidx, nodemask) \
        for (z = first_zones_zonelist(zlist, highidx, nodemask, &zone); \
                zone;                                                   \
-               z = next_zones_zonelist(z, highidx, nodemask, &zone))   \
+               z = next_zones_zonelist(++z, highidx, nodemask, &zone)) \
 
 /**
  * for_each_zone_zonelist - helper macro to iterate over valid zones in a zonelist at or below a given zone index
index 18024b8..208fe5a 100644 (file)
@@ -702,7 +702,7 @@ static inline int nla_len(const struct nlattr *nla)
  */
 static inline int nla_ok(const struct nlattr *nla, int remaining)
 {
-       return remaining >= sizeof(*nla) &&
+       return remaining >= (int) sizeof(*nla) &&
               nla->nla_len >= sizeof(*nla) &&
               nla->nla_len <= remaining;
 }
index f227bc1..827cd9a 100644 (file)
@@ -843,37 +843,25 @@ static void cpuset_change_cpumask(struct task_struct *tsk,
 /**
  * update_tasks_cpumask - Update the cpumasks of tasks in the cpuset.
  * @cs: the cpuset in which each task's cpus_allowed mask needs to be changed
+ * @heap: if NULL, defer allocating heap memory to cgroup_scan_tasks()
  *
  * Called with cgroup_mutex held
  *
  * The cgroup_scan_tasks() function will scan all the tasks in a cgroup,
  * calling callback functions for each.
  *
- * Return 0 if successful, -errno if not.
+ * No return value. It's guaranteed that cgroup_scan_tasks() always returns 0
+ * if @heap != NULL.
  */
-static int update_tasks_cpumask(struct cpuset *cs)
+static void update_tasks_cpumask(struct cpuset *cs, struct ptr_heap *heap)
 {
        struct cgroup_scanner scan;
-       struct ptr_heap heap;
-       int retval;
-
-       /*
-        * cgroup_scan_tasks() will initialize heap->gt for us.
-        * heap_init() is still needed here for we should not change
-        * cs->cpus_allowed when heap_init() fails.
-        */
-       retval = heap_init(&heap, PAGE_SIZE, GFP_KERNEL, NULL);
-       if (retval)
-               return retval;
 
        scan.cg = cs->css.cgroup;
        scan.test_task = cpuset_test_cpumask;
        scan.process_task = cpuset_change_cpumask;
-       scan.heap = &heap;
-       retval = cgroup_scan_tasks(&scan);
-
-       heap_free(&heap);
-       return retval;
+       scan.heap = heap;
+       cgroup_scan_tasks(&scan);
 }
 
 /**
@@ -883,6 +871,7 @@ static int update_tasks_cpumask(struct cpuset *cs)
  */
 static int update_cpumask(struct cpuset *cs, const char *buf)
 {
+       struct ptr_heap heap;
        struct cpuset trialcs;
        int retval;
        int is_load_balanced;
@@ -917,6 +906,10 @@ static int update_cpumask(struct cpuset *cs, const char *buf)
        if (cpus_equal(cs->cpus_allowed, trialcs.cpus_allowed))
                return 0;
 
+       retval = heap_init(&heap, PAGE_SIZE, GFP_KERNEL, NULL);
+       if (retval)
+               return retval;
+
        is_load_balanced = is_sched_load_balance(&trialcs);
 
        mutex_lock(&callback_mutex);
@@ -927,9 +920,9 @@ static int update_cpumask(struct cpuset *cs, const char *buf)
         * Scan tasks in the cpuset, and update the cpumasks of any
         * that need an update.
         */
-       retval = update_tasks_cpumask(cs);
-       if (retval < 0)
-               return retval;
+       update_tasks_cpumask(cs, &heap);
+
+       heap_free(&heap);
 
        if (is_load_balanced)
                async_rebuild_sched_domains();
@@ -1965,7 +1958,7 @@ static void scan_for_empty_cpusets(const struct cpuset *root)
                     nodes_empty(cp->mems_allowed))
                        remove_tasks_in_empty_cpuset(cp);
                else {
-                       update_tasks_cpumask(cp);
+                       update_tasks_cpumask(cp, NULL);
                        update_tasks_nodemask(cp, &oldmems);
                }
        }
index 486ed59..16ce8b9 100644 (file)
@@ -69,6 +69,6 @@ struct zoneref *next_zones_zonelist(struct zoneref *z,
                                (z->zone && !zref_in_nodemask(z, nodes)))
                        z++;
 
-       *zone = zonelist_zone(z++);
+       *zone = zonelist_zone(z);
        return z;
 }
index f5b21cb..278a3ac 100644 (file)
@@ -164,6 +164,9 @@ static inline int hci_request(struct hci_dev *hdev, void (*req)(struct hci_dev *
 {
        int ret;
 
+       if (!test_bit(HCI_UP, &hdev->flags))
+               return -ENETDOWN;
+
        /* Serialize all requests */
        hci_req_lock(hdev);
        ret = __hci_request(hdev, req, opt, timeout);