Merge master.kernel.org:/home/rmk/linux-2.6-arm
Linus Torvalds [Sat, 13 Sep 2008 21:51:22 +0000 (14:51 -0700)]
* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] Fix PCI_DMA_BUS_IS_PHYS for ARM
  [ARM] 5247/1: tosa: SW_EAR_IN support
  [ARM] 5246/1: tosa: add proper clock alias for tc6393xb clock
  [ARM] 5245/1: Fix warning about unused return value in drivers/pcmcia
  [ARM] OMAP: Fix MMC device data
  imx serial: fix rts handling for non imx1 based hardware
  imx serial: set RXD mux bit on i.MX27 and i.MX31
  i.MX serial: fix init failure
  pcm037: add rts/cts support for serial port

arch/arm/include/asm/pci.h
arch/arm/mach-mx3/pcm037.c
arch/arm/mach-pxa/tosa.c
arch/arm/plat-omap/devices.c
drivers/pcmcia/soc_common.c
drivers/serial/imx.c

index 721c03d..918d0cb 100644 (file)
@@ -30,7 +30,7 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
  * The networking and block device layers use this boolean for bounce
  * buffer decisions.
  */
-#define PCI_DMA_BUS_IS_PHYS     (0)
+#define PCI_DMA_BUS_IS_PHYS     (1)
 
 /*
  * Whether pci_unmap_{single,page} is a nop depends upon the
index 0a152ed..df8582a 100644 (file)
@@ -54,7 +54,7 @@ static struct platform_device pcm037_flash = {
 };
 
 static struct imxuart_platform_data uart_pdata = {
-       .flags = 0,
+       .flags = IMXUART_HAVE_RTSCTS,
 };
 
 static struct platform_device *devices[] __initdata = {
index 5dab30e..9f3ef9e 100644 (file)
@@ -50,6 +50,7 @@
 #include <asm/mach/sharpsl_param.h>
 
 #include "generic.h"
+#include "clock.h"
 #include "devices.h"
 
 static unsigned long tosa_pin_config[] = {
@@ -521,6 +522,14 @@ static struct gpio_keys_button tosa_gpio_keys[] = {
                .wakeup = 1,
                .active_low = 1,
        },
+       {
+               .type   = EV_SW,
+               .code   = SW_HEADPHONE_INSERT,
+               .gpio   = TOSA_GPIO_EAR_IN,
+               .desc   = "HeadPhone insert",
+               .active_low = 1,
+               .debounce_interval = 300,
+       },
 };
 
 static struct gpio_keys_platform_data tosa_gpio_keys_platform_data = {
@@ -792,6 +801,8 @@ static void __init tosa_init(void)
        pxa_set_i2c_info(NULL);
        platform_scoop_config = &tosa_pcmcia_config;
 
+       clk_add_alias("CLK_CK3P6MI", &tc6393xb_device.dev, "GPIO11_CLK", NULL);
+
        platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
index 187e3d8..bc1cf30 100644 (file)
@@ -21,6 +21,7 @@
 
 #include <mach/tc.h>
 #include <mach/board.h>
+#include <mach/mmc.h>
 #include <mach/mux.h>
 #include <mach/gpio.h>
 #include <mach/menelaus.h>
@@ -194,25 +195,38 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
 
 /*-------------------------------------------------------------------------*/
 
-#if    defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+#if    defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
+       defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 #define        OMAP_MMC1_BASE          0x4809c000
-#define OMAP_MMC1_INT          INT_24XX_MMC_IRQ
+#define        OMAP_MMC1_END           (OMAP_MMC1_BASE + 0x1fc)
+#define        OMAP_MMC1_INT           INT_24XX_MMC_IRQ
+
+#define        OMAP_MMC2_BASE          0x480b4000
+#define        OMAP_MMC2_END           (OMAP_MMC2_BASE + 0x1fc)
+#define        OMAP_MMC2_INT           INT_24XX_MMC2_IRQ
+
 #else
+
 #define        OMAP_MMC1_BASE          0xfffb7800
+#define        OMAP_MMC1_END           (OMAP_MMC1_BASE + 0x7f)
 #define OMAP_MMC1_INT          INT_MMC
-#endif
+
 #define        OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
+#define        OMAP_MMC2_END           (OMAP_MMC2_BASE + 0x7f)
+#define        OMAP_MMC2_INT           INT_1610_MMC2
 
-static struct omap_mmc_conf mmc1_conf;
+#endif
+
+static struct omap_mmc_platform_data mmc1_data;
 
 static u64 mmc1_dmamask = 0xffffffff;
 
 static struct resource mmc1_resources[] = {
        {
                .start          = OMAP_MMC1_BASE,
-               .end            = OMAP_MMC1_BASE + 0x7f,
+               .end            = OMAP_MMC1_END,
                .flags          = IORESOURCE_MEM,
        },
        {
@@ -226,26 +240,27 @@ static struct platform_device mmc_omap_device1 = {
        .id             = 1,
        .dev = {
                .dma_mask       = &mmc1_dmamask,
-               .platform_data  = &mmc1_conf,
+               .platform_data  = &mmc1_data,
        },
        .num_resources  = ARRAY_SIZE(mmc1_resources),
        .resource       = mmc1_resources,
 };
 
-#ifdef CONFIG_ARCH_OMAP16XX
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
+       defined(CONFIG_ARCH_OMAP34XX)
 
-static struct omap_mmc_conf mmc2_conf;
+static struct omap_mmc_platform_data mmc2_data;
 
 static u64 mmc2_dmamask = 0xffffffff;
 
 static struct resource mmc2_resources[] = {
        {
                .start          = OMAP_MMC2_BASE,
-               .end            = OMAP_MMC2_BASE + 0x7f,
+               .end            = OMAP_MMC2_END,
                .flags          = IORESOURCE_MEM,
        },
        {
-               .start          = INT_1610_MMC2,
+               .start          = OMAP_MMC2_INT,
                .flags          = IORESOURCE_IRQ,
        },
 };
@@ -255,26 +270,19 @@ static struct platform_device mmc_omap_device2 = {
        .id             = 2,
        .dev = {
                .dma_mask       = &mmc2_dmamask,
-               .platform_data  = &mmc2_conf,
+               .platform_data  = &mmc2_data,
        },
        .num_resources  = ARRAY_SIZE(mmc2_resources),
        .resource       = mmc2_resources,
 };
 #endif
 
-static void __init omap_init_mmc(void)
+static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
 {
-       const struct omap_mmc_config    *mmc_conf;
-       const struct omap_mmc_conf      *mmc;
-
-       /* NOTE:  assumes MMC was never (wrongly) enabled */
-       mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
-       if (!mmc_conf)
+       if (cpu_is_omap2430() || cpu_is_omap34xx())
                return;
 
-       /* block 1 is always available and has just one pinout option */
-       mmc = &mmc_conf->mmc[0];
-       if (mmc->enabled) {
+       if (mmc_conf->mmc[0].enabled) {
                if (cpu_is_omap24xx()) {
                        omap_cfg_reg(H18_24XX_MMC_CMD);
                        omap_cfg_reg(H15_24XX_MMC_CLKI);
@@ -292,7 +300,7 @@ static void __init omap_init_mmc(void)
                                omap_cfg_reg(P20_1710_MMC_DATDIR0);
                        }
                }
-               if (mmc->wire4) {
+               if (mmc_conf->mmc[0].wire4) {
                        if (cpu_is_omap24xx()) {
                                omap_cfg_reg(H14_24XX_MMC_DAT1);
                                omap_cfg_reg(E19_24XX_MMC_DAT2);
@@ -303,25 +311,35 @@ static void __init omap_init_mmc(void)
                        } else {
                                omap_cfg_reg(MMC_DAT1);
                                /* NOTE:  DAT2 can be on W10 (here) or M15 */
-                               if (!mmc->nomux)
+                               if (!mmc_conf->mmc[0].nomux)
                                        omap_cfg_reg(MMC_DAT2);
                                omap_cfg_reg(MMC_DAT3);
                        }
                }
-               mmc1_conf = *mmc;
-               (void) platform_device_register(&mmc_omap_device1);
+#if defined(CONFIG_ARCH_OMAP2420)
+               if (mmc_conf->mmc[0].internal_clock) {
+                       /*
+                        * Use internal loop-back in MMC/SDIO
+                        * Module Input Clock selection
+                        */
+                       if (cpu_is_omap24xx()) {
+                               u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+                               v |= (1 << 24); /* not used in 243x */
+                               omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
+                       }
+               }
+#endif
        }
 
 #ifdef CONFIG_ARCH_OMAP16XX
        /* block 2 is on newer chips, and has many pinout options */
-       mmc = &mmc_conf->mmc[1];
-       if (mmc->enabled) {
-               if (!mmc->nomux) {
+       if (mmc_conf->mmc[1].enabled) {
+               if (!mmc_conf->mmc[1].nomux) {
                        omap_cfg_reg(Y8_1610_MMC2_CMD);
                        omap_cfg_reg(Y10_1610_MMC2_CLK);
                        omap_cfg_reg(R18_1610_MMC2_CLKIN);
                        omap_cfg_reg(W8_1610_MMC2_DAT0);
-                       if (mmc->wire4) {
+                       if (mmc_conf->mmc[1].wire4) {
                                omap_cfg_reg(V8_1610_MMC2_DAT1);
                                omap_cfg_reg(W15_1610_MMC2_DAT2);
                                omap_cfg_reg(R10_1610_MMC2_DAT3);
@@ -337,14 +355,55 @@ static void __init omap_init_mmc(void)
                if (cpu_is_omap1710())
                        omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
                                     MOD_CONF_CTRL_1);
-               mmc2_conf = *mmc;
+       }
+#endif
+}
+
+static void __init omap_init_mmc(void)
+{
+       const struct omap_mmc_config    *mmc_conf;
+
+       /* NOTE:  assumes MMC was never (wrongly) enabled */
+       mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
+       if (!mmc_conf)
+               return;
+
+       omap_init_mmc_conf(mmc_conf);
+
+       if (mmc_conf->mmc[0].enabled) {
+               mmc1_data.conf = mmc_conf->mmc[0];
+               (void) platform_device_register(&mmc_omap_device1);
+       }
+
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
+       defined(CONFIG_ARCH_OMAP34XX)
+       if (mmc_conf->mmc[1].enabled) {
+               mmc2_data.conf = mmc_conf->mmc[1];
                (void) platform_device_register(&mmc_omap_device2);
        }
 #endif
-       return;
 }
+
+void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
+{
+       switch (host) {
+       case 1:
+               mmc1_data = *info;
+               break;
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
+       defined(CONFIG_ARCH_OMAP34XX)
+       case 2:
+               mmc2_data = *info;
+               break;
+#endif
+       default:
+               BUG();
+       }
+}
+
 #else
 static inline void omap_init_mmc(void) {}
+void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
 #endif
 
 /*-------------------------------------------------------------------------*/
index c48f3f6..da39721 100644 (file)
@@ -748,7 +748,9 @@ int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops
 
                add_timer(&skt->poll_timer);
 
-               device_create_file(&skt->socket.dev, &dev_attr_status);
+               ret = device_create_file(&skt->socket.dev, &dev_attr_status);
+               if (ret)
+                       goto out_err_8;
        }
 
        dev_set_drvdata(dev, sinfo);
@@ -758,6 +760,8 @@ int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops
        do {
                skt = &sinfo->skt[i];
 
+               device_remove_file(&skt->socket.dev, &dev_attr_status);
+ out_err_8:
                del_timer_sync(&skt->poll_timer);
                pcmcia_unregister_socket(&skt->socket);
 
index 6a29f93..3f90f1b 100644 (file)
 #define  UCR3_RXDSEN    (1<<6)  /* Receive status interrupt enable */
 #define  UCR3_AIRINTEN   (1<<5)  /* Async IR wake interrupt enable */
 #define  UCR3_AWAKEN    (1<<4)  /* Async wake interrupt enable */
-#define  UCR3_REF25     (1<<3)  /* Ref freq 25 MHz */
-#define  UCR3_REF30     (1<<2)  /* Ref Freq 30 MHz */
+#ifdef CONFIG_ARCH_IMX
+#define  UCR3_REF25     (1<<3)  /* Ref freq 25 MHz, only on mx1 */
+#define  UCR3_REF30     (1<<2)  /* Ref Freq 30 MHz, only on mx1 */
+#endif
+#if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3
+#define  UCR3_RXDMUXSEL         (1<<2)  /* RXD Muxed Input Select, on mx2/mx3 */
+#endif
 #define  UCR3_INVT      (1<<1)  /* Inverted Infrared transmission */
 #define  UCR3_BPEN      (1<<0)  /* Preset registers enable */
 #define  UCR4_CTSTL_32   (32<<10) /* CTS trigger level (32 chars) */
@@ -445,7 +450,7 @@ static irqreturn_t imx_int(int irq, void *dev_id)
                        readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN)
                imx_txint(irq, dev_id);
 
-       if (sts & USR1_RTSS)
+       if (sts & USR1_RTSD)
                imx_rtsint(irq, dev_id);
 
        return IRQ_HANDLED;
@@ -598,6 +603,12 @@ static int imx_startup(struct uart_port *port)
        temp |= (UCR2_RXEN | UCR2_TXEN);
        writel(temp, sport->port.membase + UCR2);
 
+#if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3
+       temp = readl(sport->port.membase + UCR3);
+       temp |= UCR3_RXDMUXSEL;
+       writel(temp, sport->port.membase + UCR3);
+#endif
+
        /*
         * Enable modem status interrupts
         */
@@ -1133,13 +1144,19 @@ static int serial_imx_probe(struct platform_device *pdev)
        if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS))
                sport->have_rtscts = 1;
 
-       if (pdata->init)
-               pdata->init(pdev);
+       if (pdata->init) {
+               ret = pdata->init(pdev);
+               if (ret)
+                       goto clkput;
+       }
 
        uart_add_one_port(&imx_reg, &sport->port);
        platform_set_drvdata(pdev, &sport->port);
 
        return 0;
+clkput:
+       clk_put(sport->clk);
+       clk_disable(sport->clk);
 unmap:
        iounmap(sport->port.membase);
 free: