x86/cache_info: Fix setup of l2/l3 ids
[linux-3.10.git] / arch / x86 / kernel / cpu / intel_cacheinfo.c
index b8f3653..9a7c90d 100644 (file)
@@ -615,14 +615,14 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
                                        new_l2 = this_leaf.size/1024;
                                        num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
                                        index_msb = get_count_order(num_threads_sharing);
-                                       l2_id = c->apicid >> index_msb;
+                                       l2_id = c->apicid & ~((1 << index_msb) - 1);
                                        break;
                                case 3:
                                        new_l3 = this_leaf.size/1024;
                                        num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
                                        index_msb = get_count_order(
                                                        num_threads_sharing);
-                                       l3_id = c->apicid >> index_msb;
+                                       l3_id = c->apicid & ~((1 << index_msb) - 1);
                                        break;
                                default:
                                        break;