bf47025bdf45776ce020e738f04af62752ea025c
[linux-3.10.git] / sound / atmel / ac97c.c
1 /*
2  * Driver for Atmel AC97C
3  *
4  * Copyright (C) 2005-2009 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License version 2 as published by
8  * the Free Software Foundation.
9  */
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/bitmap.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/atmel_pdc.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/mutex.h>
22 #include <linux/gpio.h>
23 #include <linux/types.h>
24 #include <linux/io.h>
25
26 #include <sound/core.h>
27 #include <sound/initval.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/ac97_codec.h>
31 #include <sound/atmel-ac97c.h>
32 #include <sound/memalloc.h>
33
34 #include <linux/dw_dmac.h>
35
36 #include <mach/cpu.h>
37 #include <mach/gpio.h>
38
39 #ifdef CONFIG_ARCH_AT91
40 #include <mach/hardware.h>
41 #endif
42
43 #include "ac97c.h"
44
45 enum {
46         DMA_TX_READY = 0,
47         DMA_RX_READY,
48         DMA_TX_CHAN_PRESENT,
49         DMA_RX_CHAN_PRESENT,
50 };
51
52 /* Serialize access to opened variable */
53 static DEFINE_MUTEX(opened_mutex);
54
55 struct atmel_ac97c_dma {
56         struct dma_chan                 *rx_chan;
57         struct dma_chan                 *tx_chan;
58 };
59
60 struct atmel_ac97c {
61         struct clk                      *pclk;
62         struct platform_device          *pdev;
63         struct atmel_ac97c_dma          dma;
64
65         struct snd_pcm_substream        *playback_substream;
66         struct snd_pcm_substream        *capture_substream;
67         struct snd_card                 *card;
68         struct snd_pcm                  *pcm;
69         struct snd_ac97                 *ac97;
70         struct snd_ac97_bus             *ac97_bus;
71
72         u64                             cur_format;
73         unsigned int                    cur_rate;
74         unsigned long                   flags;
75         int                             playback_period, capture_period;
76         /* Serialize access to opened variable */
77         spinlock_t                      lock;
78         void __iomem                    *regs;
79         int                             irq;
80         int                             opened;
81         int                             reset_pin;
82 };
83
84 #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
85
86 #define ac97c_writel(chip, reg, val)                    \
87         __raw_writel((val), (chip)->regs + AC97C_##reg)
88 #define ac97c_readl(chip, reg)                          \
89         __raw_readl((chip)->regs + AC97C_##reg)
90
91 /* This function is called by the DMA driver. */
92 static void atmel_ac97c_dma_playback_period_done(void *arg)
93 {
94         struct atmel_ac97c *chip = arg;
95         snd_pcm_period_elapsed(chip->playback_substream);
96 }
97
98 static void atmel_ac97c_dma_capture_period_done(void *arg)
99 {
100         struct atmel_ac97c *chip = arg;
101         snd_pcm_period_elapsed(chip->capture_substream);
102 }
103
104 static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
105                 struct snd_pcm_substream *substream,
106                 enum dma_transfer_direction direction)
107 {
108         struct dma_chan                 *chan;
109         struct dw_cyclic_desc           *cdesc;
110         struct snd_pcm_runtime          *runtime = substream->runtime;
111         unsigned long                   buffer_len, period_len;
112
113         /*
114          * We don't do DMA on "complex" transfers, i.e. with
115          * non-halfword-aligned buffers or lengths.
116          */
117         if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
118                 dev_dbg(&chip->pdev->dev, "too complex transfer\n");
119                 return -EINVAL;
120         }
121
122         if (direction == DMA_MEM_TO_DEV)
123                 chan = chip->dma.tx_chan;
124         else
125                 chan = chip->dma.rx_chan;
126
127         buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
128         period_len = frames_to_bytes(runtime, runtime->period_size);
129
130         cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
131                         period_len, direction);
132         if (IS_ERR(cdesc)) {
133                 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
134                 return PTR_ERR(cdesc);
135         }
136
137         if (direction == DMA_MEM_TO_DEV) {
138                 cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
139                 set_bit(DMA_TX_READY, &chip->flags);
140         } else {
141                 cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
142                 set_bit(DMA_RX_READY, &chip->flags);
143         }
144
145         cdesc->period_callback_param = chip;
146
147         return 0;
148 }
149
150 static struct snd_pcm_hardware atmel_ac97c_hw = {
151         .info                   = (SNDRV_PCM_INFO_MMAP
152                                   | SNDRV_PCM_INFO_MMAP_VALID
153                                   | SNDRV_PCM_INFO_INTERLEAVED
154                                   | SNDRV_PCM_INFO_BLOCK_TRANSFER
155                                   | SNDRV_PCM_INFO_JOINT_DUPLEX
156                                   | SNDRV_PCM_INFO_RESUME
157                                   | SNDRV_PCM_INFO_PAUSE),
158         .formats                = (SNDRV_PCM_FMTBIT_S16_BE
159                                   | SNDRV_PCM_FMTBIT_S16_LE),
160         .rates                  = (SNDRV_PCM_RATE_CONTINUOUS),
161         .rate_min               = 4000,
162         .rate_max               = 48000,
163         .channels_min           = 1,
164         .channels_max           = 2,
165         .buffer_bytes_max       = 2 * 2 * 64 * 2048,
166         .period_bytes_min       = 4096,
167         .period_bytes_max       = 4096,
168         .periods_min            = 6,
169         .periods_max            = 64,
170 };
171
172 static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
173 {
174         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
175         struct snd_pcm_runtime *runtime = substream->runtime;
176
177         mutex_lock(&opened_mutex);
178         chip->opened++;
179         runtime->hw = atmel_ac97c_hw;
180         if (chip->cur_rate) {
181                 runtime->hw.rate_min = chip->cur_rate;
182                 runtime->hw.rate_max = chip->cur_rate;
183         }
184         if (chip->cur_format)
185                 runtime->hw.formats = (1ULL << chip->cur_format);
186         mutex_unlock(&opened_mutex);
187         chip->playback_substream = substream;
188         return 0;
189 }
190
191 static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
192 {
193         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
194         struct snd_pcm_runtime *runtime = substream->runtime;
195
196         mutex_lock(&opened_mutex);
197         chip->opened++;
198         runtime->hw = atmel_ac97c_hw;
199         if (chip->cur_rate) {
200                 runtime->hw.rate_min = chip->cur_rate;
201                 runtime->hw.rate_max = chip->cur_rate;
202         }
203         if (chip->cur_format)
204                 runtime->hw.formats = (1ULL << chip->cur_format);
205         mutex_unlock(&opened_mutex);
206         chip->capture_substream = substream;
207         return 0;
208 }
209
210 static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
211 {
212         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
213
214         mutex_lock(&opened_mutex);
215         chip->opened--;
216         if (!chip->opened) {
217                 chip->cur_rate = 0;
218                 chip->cur_format = 0;
219         }
220         mutex_unlock(&opened_mutex);
221
222         chip->playback_substream = NULL;
223
224         return 0;
225 }
226
227 static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
228 {
229         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
230
231         mutex_lock(&opened_mutex);
232         chip->opened--;
233         if (!chip->opened) {
234                 chip->cur_rate = 0;
235                 chip->cur_format = 0;
236         }
237         mutex_unlock(&opened_mutex);
238
239         chip->capture_substream = NULL;
240
241         return 0;
242 }
243
244 static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
245                 struct snd_pcm_hw_params *hw_params)
246 {
247         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
248         int retval;
249
250         retval = snd_pcm_lib_malloc_pages(substream,
251                                         params_buffer_bytes(hw_params));
252         if (retval < 0)
253                 return retval;
254         /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
255         if (cpu_is_at32ap7000()) {
256                 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
257                 if (retval == 1)
258                         if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
259                                 dw_dma_cyclic_free(chip->dma.tx_chan);
260         }
261         /* Set restrictions to params. */
262         mutex_lock(&opened_mutex);
263         chip->cur_rate = params_rate(hw_params);
264         chip->cur_format = params_format(hw_params);
265         mutex_unlock(&opened_mutex);
266
267         return retval;
268 }
269
270 static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
271                 struct snd_pcm_hw_params *hw_params)
272 {
273         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
274         int retval;
275
276         retval = snd_pcm_lib_malloc_pages(substream,
277                                         params_buffer_bytes(hw_params));
278         if (retval < 0)
279                 return retval;
280         /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
281         if (cpu_is_at32ap7000()) {
282                 if (retval < 0)
283                         return retval;
284                 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
285                 if (retval == 1)
286                         if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
287                                 dw_dma_cyclic_free(chip->dma.rx_chan);
288         }
289
290         /* Set restrictions to params. */
291         mutex_lock(&opened_mutex);
292         chip->cur_rate = params_rate(hw_params);
293         chip->cur_format = params_format(hw_params);
294         mutex_unlock(&opened_mutex);
295
296         return retval;
297 }
298
299 static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
300 {
301         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
302         if (cpu_is_at32ap7000()) {
303                 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
304                         dw_dma_cyclic_free(chip->dma.tx_chan);
305         }
306         return snd_pcm_lib_free_pages(substream);
307 }
308
309 static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
310 {
311         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
312         if (cpu_is_at32ap7000()) {
313                 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
314                         dw_dma_cyclic_free(chip->dma.rx_chan);
315         }
316         return snd_pcm_lib_free_pages(substream);
317 }
318
319 static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
320 {
321         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
322         struct snd_pcm_runtime *runtime = substream->runtime;
323         int block_size = frames_to_bytes(runtime, runtime->period_size);
324         unsigned long word = ac97c_readl(chip, OCA);
325         int retval;
326
327         chip->playback_period = 0;
328         word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
329
330         /* assign channels to AC97C channel A */
331         switch (runtime->channels) {
332         case 1:
333                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
334                 break;
335         case 2:
336                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
337                         | AC97C_CH_ASSIGN(PCM_RIGHT, A);
338                 break;
339         default:
340                 /* TODO: support more than two channels */
341                 return -EINVAL;
342         }
343         ac97c_writel(chip, OCA, word);
344
345         /* configure sample format and size */
346         word = ac97c_readl(chip, CAMR);
347         if (chip->opened <= 1)
348                 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
349         else
350                 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
351
352         switch (runtime->format) {
353         case SNDRV_PCM_FORMAT_S16_LE:
354                 if (cpu_is_at32ap7000())
355                         word |= AC97C_CMR_CEM_LITTLE;
356                 break;
357         case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
358                 word &= ~(AC97C_CMR_CEM_LITTLE);
359                 break;
360         default:
361                 word = ac97c_readl(chip, OCA);
362                 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
363                 ac97c_writel(chip, OCA, word);
364                 return -EINVAL;
365         }
366
367         /* Enable underrun interrupt on channel A */
368         word |= AC97C_CSR_UNRUN;
369
370         ac97c_writel(chip, CAMR, word);
371
372         /* Enable channel A event interrupt */
373         word = ac97c_readl(chip, IMR);
374         word |= AC97C_SR_CAEVT;
375         ac97c_writel(chip, IER, word);
376
377         /* set variable rate if needed */
378         if (runtime->rate != 48000) {
379                 word = ac97c_readl(chip, MR);
380                 word |= AC97C_MR_VRA;
381                 ac97c_writel(chip, MR, word);
382         } else {
383                 word = ac97c_readl(chip, MR);
384                 word &= ~(AC97C_MR_VRA);
385                 ac97c_writel(chip, MR, word);
386         }
387
388         retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
389                         runtime->rate);
390         if (retval)
391                 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
392                                 runtime->rate);
393
394         if (cpu_is_at32ap7000()) {
395                 if (!test_bit(DMA_TX_READY, &chip->flags))
396                         retval = atmel_ac97c_prepare_dma(chip, substream,
397                                         DMA_MEM_TO_DEV);
398         } else {
399                 /* Initialize and start the PDC */
400                 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
401                 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
402                 writel(runtime->dma_addr + block_size,
403                                 chip->regs + ATMEL_PDC_TNPR);
404                 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
405         }
406
407         return retval;
408 }
409
410 static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
411 {
412         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
413         struct snd_pcm_runtime *runtime = substream->runtime;
414         int block_size = frames_to_bytes(runtime, runtime->period_size);
415         unsigned long word = ac97c_readl(chip, ICA);
416         int retval;
417
418         chip->capture_period = 0;
419         word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
420
421         /* assign channels to AC97C channel A */
422         switch (runtime->channels) {
423         case 1:
424                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
425                 break;
426         case 2:
427                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
428                         | AC97C_CH_ASSIGN(PCM_RIGHT, A);
429                 break;
430         default:
431                 /* TODO: support more than two channels */
432                 return -EINVAL;
433         }
434         ac97c_writel(chip, ICA, word);
435
436         /* configure sample format and size */
437         word = ac97c_readl(chip, CAMR);
438         if (chip->opened <= 1)
439                 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
440         else
441                 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
442
443         switch (runtime->format) {
444         case SNDRV_PCM_FORMAT_S16_LE:
445                 if (cpu_is_at32ap7000())
446                         word |= AC97C_CMR_CEM_LITTLE;
447                 break;
448         case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
449                 word &= ~(AC97C_CMR_CEM_LITTLE);
450                 break;
451         default:
452                 word = ac97c_readl(chip, ICA);
453                 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
454                 ac97c_writel(chip, ICA, word);
455                 return -EINVAL;
456         }
457
458         /* Enable overrun interrupt on channel A */
459         word |= AC97C_CSR_OVRUN;
460
461         ac97c_writel(chip, CAMR, word);
462
463         /* Enable channel A event interrupt */
464         word = ac97c_readl(chip, IMR);
465         word |= AC97C_SR_CAEVT;
466         ac97c_writel(chip, IER, word);
467
468         /* set variable rate if needed */
469         if (runtime->rate != 48000) {
470                 word = ac97c_readl(chip, MR);
471                 word |= AC97C_MR_VRA;
472                 ac97c_writel(chip, MR, word);
473         } else {
474                 word = ac97c_readl(chip, MR);
475                 word &= ~(AC97C_MR_VRA);
476                 ac97c_writel(chip, MR, word);
477         }
478
479         retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
480                         runtime->rate);
481         if (retval)
482                 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
483                                 runtime->rate);
484
485         if (cpu_is_at32ap7000()) {
486                 if (!test_bit(DMA_RX_READY, &chip->flags))
487                         retval = atmel_ac97c_prepare_dma(chip, substream,
488                                         DMA_DEV_TO_MEM);
489         } else {
490                 /* Initialize and start the PDC */
491                 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
492                 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
493                 writel(runtime->dma_addr + block_size,
494                                 chip->regs + ATMEL_PDC_RNPR);
495                 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
496         }
497
498         return retval;
499 }
500
501 static int
502 atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
503 {
504         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
505         unsigned long camr, ptcr = 0;
506         int retval = 0;
507
508         camr = ac97c_readl(chip, CAMR);
509
510         switch (cmd) {
511         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
512         case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
513         case SNDRV_PCM_TRIGGER_START:
514                 if (cpu_is_at32ap7000()) {
515                         retval = dw_dma_cyclic_start(chip->dma.tx_chan);
516                         if (retval)
517                                 goto out;
518                 } else {
519                         ptcr = ATMEL_PDC_TXTEN;
520                 }
521                 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
522                 break;
523         case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
524         case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
525         case SNDRV_PCM_TRIGGER_STOP:
526                 if (cpu_is_at32ap7000())
527                         dw_dma_cyclic_stop(chip->dma.tx_chan);
528                 else
529                         ptcr |= ATMEL_PDC_TXTDIS;
530                 if (chip->opened <= 1)
531                         camr &= ~AC97C_CMR_CENA;
532                 break;
533         default:
534                 retval = -EINVAL;
535                 goto out;
536         }
537
538         ac97c_writel(chip, CAMR, camr);
539         if (!cpu_is_at32ap7000())
540                 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
541 out:
542         return retval;
543 }
544
545 static int
546 atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
547 {
548         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
549         unsigned long camr, ptcr = 0;
550         int retval = 0;
551
552         camr = ac97c_readl(chip, CAMR);
553         ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
554
555         switch (cmd) {
556         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
557         case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
558         case SNDRV_PCM_TRIGGER_START:
559                 if (cpu_is_at32ap7000()) {
560                         retval = dw_dma_cyclic_start(chip->dma.rx_chan);
561                         if (retval)
562                                 goto out;
563                 } else {
564                         ptcr = ATMEL_PDC_RXTEN;
565                 }
566                 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
567                 break;
568         case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
569         case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
570         case SNDRV_PCM_TRIGGER_STOP:
571                 if (cpu_is_at32ap7000())
572                         dw_dma_cyclic_stop(chip->dma.rx_chan);
573                 else
574                         ptcr |= (ATMEL_PDC_RXTDIS);
575                 if (chip->opened <= 1)
576                         camr &= ~AC97C_CMR_CENA;
577                 break;
578         default:
579                 retval = -EINVAL;
580                 break;
581         }
582
583         ac97c_writel(chip, CAMR, camr);
584         if (!cpu_is_at32ap7000())
585                 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
586 out:
587         return retval;
588 }
589
590 static snd_pcm_uframes_t
591 atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
592 {
593         struct atmel_ac97c      *chip = snd_pcm_substream_chip(substream);
594         struct snd_pcm_runtime  *runtime = substream->runtime;
595         snd_pcm_uframes_t       frames;
596         unsigned long           bytes;
597
598         if (cpu_is_at32ap7000())
599                 bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
600         else
601                 bytes = readl(chip->regs + ATMEL_PDC_TPR);
602         bytes -= runtime->dma_addr;
603
604         frames = bytes_to_frames(runtime, bytes);
605         if (frames >= runtime->buffer_size)
606                 frames -= runtime->buffer_size;
607         return frames;
608 }
609
610 static snd_pcm_uframes_t
611 atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
612 {
613         struct atmel_ac97c      *chip = snd_pcm_substream_chip(substream);
614         struct snd_pcm_runtime  *runtime = substream->runtime;
615         snd_pcm_uframes_t       frames;
616         unsigned long           bytes;
617
618         if (cpu_is_at32ap7000())
619                 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
620         else
621                 bytes = readl(chip->regs + ATMEL_PDC_RPR);
622         bytes -= runtime->dma_addr;
623
624         frames = bytes_to_frames(runtime, bytes);
625         if (frames >= runtime->buffer_size)
626                 frames -= runtime->buffer_size;
627         return frames;
628 }
629
630 static struct snd_pcm_ops atmel_ac97_playback_ops = {
631         .open           = atmel_ac97c_playback_open,
632         .close          = atmel_ac97c_playback_close,
633         .ioctl          = snd_pcm_lib_ioctl,
634         .hw_params      = atmel_ac97c_playback_hw_params,
635         .hw_free        = atmel_ac97c_playback_hw_free,
636         .prepare        = atmel_ac97c_playback_prepare,
637         .trigger        = atmel_ac97c_playback_trigger,
638         .pointer        = atmel_ac97c_playback_pointer,
639 };
640
641 static struct snd_pcm_ops atmel_ac97_capture_ops = {
642         .open           = atmel_ac97c_capture_open,
643         .close          = atmel_ac97c_capture_close,
644         .ioctl          = snd_pcm_lib_ioctl,
645         .hw_params      = atmel_ac97c_capture_hw_params,
646         .hw_free        = atmel_ac97c_capture_hw_free,
647         .prepare        = atmel_ac97c_capture_prepare,
648         .trigger        = atmel_ac97c_capture_trigger,
649         .pointer        = atmel_ac97c_capture_pointer,
650 };
651
652 static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
653 {
654         struct atmel_ac97c      *chip  = (struct atmel_ac97c *)dev;
655         irqreturn_t             retval = IRQ_NONE;
656         u32                     sr     = ac97c_readl(chip, SR);
657         u32                     casr   = ac97c_readl(chip, CASR);
658         u32                     cosr   = ac97c_readl(chip, COSR);
659         u32                     camr   = ac97c_readl(chip, CAMR);
660
661         if (sr & AC97C_SR_CAEVT) {
662                 struct snd_pcm_runtime *runtime;
663                 int offset, next_period, block_size;
664                 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
665                                 casr & AC97C_CSR_OVRUN   ? " OVRUN"   : "",
666                                 casr & AC97C_CSR_RXRDY   ? " RXRDY"   : "",
667                                 casr & AC97C_CSR_UNRUN   ? " UNRUN"   : "",
668                                 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
669                                 casr & AC97C_CSR_TXRDY   ? " TXRDY"   : "",
670                                 !casr                    ? " NONE"    : "");
671                 if (!cpu_is_at32ap7000()) {
672                         if ((casr & camr) & AC97C_CSR_ENDTX) {
673                                 runtime = chip->playback_substream->runtime;
674                                 block_size = frames_to_bytes(runtime,
675                                                 runtime->period_size);
676                                 chip->playback_period++;
677
678                                 if (chip->playback_period == runtime->periods)
679                                         chip->playback_period = 0;
680                                 next_period = chip->playback_period + 1;
681                                 if (next_period == runtime->periods)
682                                         next_period = 0;
683
684                                 offset = block_size * next_period;
685
686                                 writel(runtime->dma_addr + offset,
687                                                 chip->regs + ATMEL_PDC_TNPR);
688                                 writel(block_size / 2,
689                                                 chip->regs + ATMEL_PDC_TNCR);
690
691                                 snd_pcm_period_elapsed(
692                                                 chip->playback_substream);
693                         }
694                         if ((casr & camr) & AC97C_CSR_ENDRX) {
695                                 runtime = chip->capture_substream->runtime;
696                                 block_size = frames_to_bytes(runtime,
697                                                 runtime->period_size);
698                                 chip->capture_period++;
699
700                                 if (chip->capture_period == runtime->periods)
701                                         chip->capture_period = 0;
702                                 next_period = chip->capture_period + 1;
703                                 if (next_period == runtime->periods)
704                                         next_period = 0;
705
706                                 offset = block_size * next_period;
707
708                                 writel(runtime->dma_addr + offset,
709                                                 chip->regs + ATMEL_PDC_RNPR);
710                                 writel(block_size / 2,
711                                                 chip->regs + ATMEL_PDC_RNCR);
712                                 snd_pcm_period_elapsed(chip->capture_substream);
713                         }
714                 }
715                 retval = IRQ_HANDLED;
716         }
717
718         if (sr & AC97C_SR_COEVT) {
719                 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
720                                 cosr & AC97C_CSR_OVRUN   ? " OVRUN"   : "",
721                                 cosr & AC97C_CSR_RXRDY   ? " RXRDY"   : "",
722                                 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
723                                 cosr & AC97C_CSR_TXRDY   ? " TXRDY"   : "",
724                                 !cosr                    ? " NONE"    : "");
725                 retval = IRQ_HANDLED;
726         }
727
728         if (retval == IRQ_NONE) {
729                 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
730                                 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
731         }
732
733         return retval;
734 }
735
736 static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = {
737         /* Playback */
738         {
739                 .exclusive = 1,
740                 .r = { {
741                         .slots = ((1 << AC97_SLOT_PCM_LEFT)
742                                   | (1 << AC97_SLOT_PCM_RIGHT)),
743                 } },
744         },
745         /* PCM in */
746         {
747                 .stream = 1,
748                 .exclusive = 1,
749                 .r = { {
750                         .slots = ((1 << AC97_SLOT_PCM_LEFT)
751                                         | (1 << AC97_SLOT_PCM_RIGHT)),
752                 } }
753         },
754         /* Mic in */
755         {
756                 .stream = 1,
757                 .exclusive = 1,
758                 .r = { {
759                         .slots = (1<<AC97_SLOT_MIC),
760                 } }
761         },
762 };
763
764 static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
765 {
766         struct snd_pcm          *pcm;
767         struct snd_pcm_hardware hw = atmel_ac97c_hw;
768         int                     capture, playback, retval, err;
769
770         capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
771         playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
772
773         if (!cpu_is_at32ap7000()) {
774                 err = snd_ac97_pcm_assign(chip->ac97_bus,
775                                 ARRAY_SIZE(at91_ac97_pcm_defs),
776                                 at91_ac97_pcm_defs);
777                 if (err)
778                         return err;
779         }
780         retval = snd_pcm_new(chip->card, chip->card->shortname,
781                         chip->pdev->id, playback, capture, &pcm);
782         if (retval)
783                 return retval;
784
785         if (capture)
786                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
787                                 &atmel_ac97_capture_ops);
788         if (playback)
789                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
790                                 &atmel_ac97_playback_ops);
791
792         retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
793                         &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
794                         hw.buffer_bytes_max);
795         if (retval)
796                 return retval;
797
798         pcm->private_data = chip;
799         pcm->info_flags = 0;
800         strcpy(pcm->name, chip->card->shortname);
801         chip->pcm = pcm;
802
803         return 0;
804 }
805
806 static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
807 {
808         struct snd_ac97_template template;
809         memset(&template, 0, sizeof(template));
810         template.private_data = chip;
811         return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
812 }
813
814 static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
815                 unsigned short val)
816 {
817         struct atmel_ac97c *chip = get_chip(ac97);
818         unsigned long word;
819         int timeout = 40;
820
821         word = (reg & 0x7f) << 16 | val;
822
823         do {
824                 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
825                         ac97c_writel(chip, COTHR, word);
826                         return;
827                 }
828                 udelay(1);
829         } while (--timeout);
830
831         dev_dbg(&chip->pdev->dev, "codec write timeout\n");
832 }
833
834 static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
835                 unsigned short reg)
836 {
837         struct atmel_ac97c *chip = get_chip(ac97);
838         unsigned long word;
839         int timeout = 40;
840         int write = 10;
841
842         word = (0x80 | (reg & 0x7f)) << 16;
843
844         if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
845                 ac97c_readl(chip, CORHR);
846
847 retry_write:
848         timeout = 40;
849
850         do {
851                 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
852                         ac97c_writel(chip, COTHR, word);
853                         goto read_reg;
854                 }
855                 udelay(10);
856         } while (--timeout);
857
858         if (!--write)
859                 goto timed_out;
860         goto retry_write;
861
862 read_reg:
863         do {
864                 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
865                         unsigned short val = ac97c_readl(chip, CORHR);
866                         return val;
867                 }
868                 udelay(10);
869         } while (--timeout);
870
871         if (!--write)
872                 goto timed_out;
873         goto retry_write;
874
875 timed_out:
876         dev_dbg(&chip->pdev->dev, "codec read timeout\n");
877         return 0xffff;
878 }
879
880 static bool filter(struct dma_chan *chan, void *slave)
881 {
882         struct dw_dma_slave *dws = slave;
883
884         if (dws->dma_dev == chan->device->dev) {
885                 chan->private = dws;
886                 return true;
887         } else
888                 return false;
889 }
890
891 static void atmel_ac97c_reset(struct atmel_ac97c *chip)
892 {
893         ac97c_writel(chip, MR,   0);
894         ac97c_writel(chip, MR,   AC97C_MR_ENA);
895         ac97c_writel(chip, CAMR, 0);
896         ac97c_writel(chip, COMR, 0);
897
898         if (gpio_is_valid(chip->reset_pin)) {
899                 gpio_set_value(chip->reset_pin, 0);
900                 /* AC97 v2.2 specifications says minimum 1 us. */
901                 udelay(2);
902                 gpio_set_value(chip->reset_pin, 1);
903         } else {
904                 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
905                 udelay(2);
906                 ac97c_writel(chip, MR, AC97C_MR_ENA);
907         }
908 }
909
910 static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
911 {
912         struct snd_card                 *card;
913         struct atmel_ac97c              *chip;
914         struct resource                 *regs;
915         struct ac97c_platform_data      *pdata;
916         struct clk                      *pclk;
917         static struct snd_ac97_bus_ops  ops = {
918                 .write  = atmel_ac97c_write,
919                 .read   = atmel_ac97c_read,
920         };
921         int                             retval;
922         int                             irq;
923
924         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
925         if (!regs) {
926                 dev_dbg(&pdev->dev, "no memory resource\n");
927                 return -ENXIO;
928         }
929
930         pdata = pdev->dev.platform_data;
931         if (!pdata) {
932                 dev_dbg(&pdev->dev, "no platform data\n");
933                 return -ENXIO;
934         }
935
936         irq = platform_get_irq(pdev, 0);
937         if (irq < 0) {
938                 dev_dbg(&pdev->dev, "could not get irq\n");
939                 return -ENXIO;
940         }
941
942         if (cpu_is_at32ap7000()) {
943                 pclk = clk_get(&pdev->dev, "pclk");
944         } else {
945                 pclk = clk_get(&pdev->dev, "ac97_clk");
946         }
947
948         if (IS_ERR(pclk)) {
949                 dev_dbg(&pdev->dev, "no peripheral clock\n");
950                 return PTR_ERR(pclk);
951         }
952         clk_enable(pclk);
953
954         retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
955                         THIS_MODULE, sizeof(struct atmel_ac97c), &card);
956         if (retval) {
957                 dev_dbg(&pdev->dev, "could not create sound card device\n");
958                 goto err_snd_card_new;
959         }
960
961         chip = get_chip(card);
962
963         retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
964         if (retval) {
965                 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
966                 goto err_request_irq;
967         }
968         chip->irq = irq;
969
970         spin_lock_init(&chip->lock);
971
972         strcpy(card->driver, "Atmel AC97C");
973         strcpy(card->shortname, "Atmel AC97C");
974         sprintf(card->longname, "Atmel AC97 controller");
975
976         chip->card = card;
977         chip->pclk = pclk;
978         chip->pdev = pdev;
979         chip->regs = ioremap(regs->start, resource_size(regs));
980
981         if (!chip->regs) {
982                 dev_dbg(&pdev->dev, "could not remap register memory\n");
983                 goto err_ioremap;
984         }
985
986         if (gpio_is_valid(pdata->reset_pin)) {
987                 if (gpio_request(pdata->reset_pin, "reset_pin")) {
988                         dev_dbg(&pdev->dev, "reset pin not available\n");
989                         chip->reset_pin = -ENODEV;
990                 } else {
991                         gpio_direction_output(pdata->reset_pin, 1);
992                         chip->reset_pin = pdata->reset_pin;
993                 }
994         } else {
995                 chip->reset_pin = -EINVAL;
996         }
997
998         snd_card_set_dev(card, &pdev->dev);
999
1000         atmel_ac97c_reset(chip);
1001
1002         /* Enable overrun interrupt from codec channel */
1003         ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
1004         ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
1005
1006         retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
1007         if (retval) {
1008                 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
1009                 goto err_ac97_bus;
1010         }
1011
1012         retval = atmel_ac97c_mixer_new(chip);
1013         if (retval) {
1014                 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
1015                 goto err_ac97_bus;
1016         }
1017
1018         if (cpu_is_at32ap7000()) {
1019                 if (pdata->rx_dws.dma_dev) {
1020                         dma_cap_mask_t mask;
1021
1022                         dma_cap_zero(mask);
1023                         dma_cap_set(DMA_SLAVE, mask);
1024
1025                         chip->dma.rx_chan = dma_request_channel(mask, filter,
1026                                                                 &pdata->rx_dws);
1027                         if (chip->dma.rx_chan) {
1028                                 struct dma_slave_config dma_conf = {
1029                                         .src_addr = regs->start + AC97C_CARHR +
1030                                                 2,
1031                                         .src_addr_width =
1032                                                 DMA_SLAVE_BUSWIDTH_2_BYTES,
1033                                         .src_maxburst = 1,
1034                                         .dst_maxburst = 1,
1035                                         .direction = DMA_DEV_TO_MEM,
1036                                         .device_fc = false,
1037                                 };
1038
1039                                 dmaengine_slave_config(chip->dma.rx_chan,
1040                                                 &dma_conf);
1041                         }
1042
1043                         dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
1044                                 dev_name(&chip->dma.rx_chan->dev->device));
1045                         set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1046                 }
1047
1048                 if (pdata->tx_dws.dma_dev) {
1049                         dma_cap_mask_t mask;
1050
1051                         dma_cap_zero(mask);
1052                         dma_cap_set(DMA_SLAVE, mask);
1053
1054                         chip->dma.tx_chan = dma_request_channel(mask, filter,
1055                                                                 &pdata->tx_dws);
1056                         if (chip->dma.tx_chan) {
1057                                 struct dma_slave_config dma_conf = {
1058                                         .dst_addr = regs->start + AC97C_CATHR +
1059                                                 2,
1060                                         .dst_addr_width =
1061                                                 DMA_SLAVE_BUSWIDTH_2_BYTES,
1062                                         .src_maxburst = 1,
1063                                         .dst_maxburst = 1,
1064                                         .direction = DMA_MEM_TO_DEV,
1065                                         .device_fc = false,
1066                                 };
1067
1068                                 dmaengine_slave_config(chip->dma.tx_chan,
1069                                                 &dma_conf);
1070                         }
1071
1072                         dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
1073                                 dev_name(&chip->dma.tx_chan->dev->device));
1074                         set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1075                 }
1076
1077                 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
1078                                 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
1079                         dev_dbg(&pdev->dev, "DMA not available\n");
1080                         retval = -ENODEV;
1081                         goto err_dma;
1082                 }
1083         } else {
1084                 /* Just pretend that we have DMA channel(for at91 i is actually
1085                  * the PDC) */
1086                 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1087                 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1088         }
1089
1090         retval = atmel_ac97c_pcm_new(chip);
1091         if (retval) {
1092                 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
1093                 goto err_dma;
1094         }
1095
1096         retval = snd_card_register(card);
1097         if (retval) {
1098                 dev_dbg(&pdev->dev, "could not register sound card\n");
1099                 goto err_dma;
1100         }
1101
1102         platform_set_drvdata(pdev, card);
1103
1104         dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
1105                         chip->regs, irq);
1106
1107         return 0;
1108
1109 err_dma:
1110         if (cpu_is_at32ap7000()) {
1111                 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1112                         dma_release_channel(chip->dma.rx_chan);
1113                 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1114                         dma_release_channel(chip->dma.tx_chan);
1115                 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1116                 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1117                 chip->dma.rx_chan = NULL;
1118                 chip->dma.tx_chan = NULL;
1119         }
1120 err_ac97_bus:
1121         snd_card_set_dev(card, NULL);
1122
1123         if (gpio_is_valid(chip->reset_pin))
1124                 gpio_free(chip->reset_pin);
1125
1126         iounmap(chip->regs);
1127 err_ioremap:
1128         free_irq(irq, chip);
1129 err_request_irq:
1130         snd_card_free(card);
1131 err_snd_card_new:
1132         clk_disable(pclk);
1133         clk_put(pclk);
1134         return retval;
1135 }
1136
1137 #ifdef CONFIG_PM
1138 static int atmel_ac97c_suspend(struct device *pdev)
1139 {
1140         struct snd_card *card = dev_get_drvdata(pdev);
1141         struct atmel_ac97c *chip = card->private_data;
1142
1143         if (cpu_is_at32ap7000()) {
1144                 if (test_bit(DMA_RX_READY, &chip->flags))
1145                         dw_dma_cyclic_stop(chip->dma.rx_chan);
1146                 if (test_bit(DMA_TX_READY, &chip->flags))
1147                         dw_dma_cyclic_stop(chip->dma.tx_chan);
1148         }
1149         clk_disable(chip->pclk);
1150
1151         return 0;
1152 }
1153
1154 static int atmel_ac97c_resume(struct device *pdev)
1155 {
1156         struct snd_card *card = dev_get_drvdata(pdev);
1157         struct atmel_ac97c *chip = card->private_data;
1158
1159         clk_enable(chip->pclk);
1160         if (cpu_is_at32ap7000()) {
1161                 if (test_bit(DMA_RX_READY, &chip->flags))
1162                         dw_dma_cyclic_start(chip->dma.rx_chan);
1163                 if (test_bit(DMA_TX_READY, &chip->flags))
1164                         dw_dma_cyclic_start(chip->dma.tx_chan);
1165         }
1166         return 0;
1167 }
1168
1169 static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume);
1170 #define ATMEL_AC97C_PM_OPS      &atmel_ac97c_pm
1171 #else
1172 #define ATMEL_AC97C_PM_OPS      NULL
1173 #endif
1174
1175 static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
1176 {
1177         struct snd_card *card = platform_get_drvdata(pdev);
1178         struct atmel_ac97c *chip = get_chip(card);
1179
1180         if (gpio_is_valid(chip->reset_pin))
1181                 gpio_free(chip->reset_pin);
1182
1183         ac97c_writel(chip, CAMR, 0);
1184         ac97c_writel(chip, COMR, 0);
1185         ac97c_writel(chip, MR,   0);
1186
1187         clk_disable(chip->pclk);
1188         clk_put(chip->pclk);
1189         iounmap(chip->regs);
1190         free_irq(chip->irq, chip);
1191
1192         if (cpu_is_at32ap7000()) {
1193                 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1194                         dma_release_channel(chip->dma.rx_chan);
1195                 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1196                         dma_release_channel(chip->dma.tx_chan);
1197                 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1198                 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1199                 chip->dma.rx_chan = NULL;
1200                 chip->dma.tx_chan = NULL;
1201         }
1202
1203         snd_card_set_dev(card, NULL);
1204         snd_card_free(card);
1205
1206         platform_set_drvdata(pdev, NULL);
1207
1208         return 0;
1209 }
1210
1211 static struct platform_driver atmel_ac97c_driver = {
1212         .remove         = __devexit_p(atmel_ac97c_remove),
1213         .driver         = {
1214                 .name   = "atmel_ac97c",
1215                 .owner  = THIS_MODULE,
1216                 .pm     = ATMEL_AC97C_PM_OPS,
1217         },
1218 };
1219
1220 static int __init atmel_ac97c_init(void)
1221 {
1222         return platform_driver_probe(&atmel_ac97c_driver,
1223                         atmel_ac97c_probe);
1224 }
1225 module_init(atmel_ac97c_init);
1226
1227 static void __exit atmel_ac97c_exit(void)
1228 {
1229         platform_driver_unregister(&atmel_ac97c_driver);
1230 }
1231 module_exit(atmel_ac97c_exit);
1232
1233 MODULE_LICENSE("GPL");
1234 MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1235 MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");