[ARM] 3146/1: OMAP 3b/5: Add omap24xx clock framework
[linux-3.10.git] / include / asm-arm / arch-omap / dma.h
1 /*
2  *  linux/include/asm-arm/arch-omap/dma.h
3  *
4  *  Copyright (C) 2003 Nokia Corporation
5  *  Author: Juha Yrjölä <juha.yrjola@nokia.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20  */
21 #ifndef __ASM_ARCH_DMA_H
22 #define __ASM_ARCH_DMA_H
23
24 #define MAX_DMA_ADDRESS                 0xffffffff
25
26 #define OMAP_LOGICAL_DMA_CH_COUNT       17
27
28 #define OMAP_DMA_NO_DEVICE              0
29 #define OMAP_DMA_MCSI1_TX               1
30 #define OMAP_DMA_MCSI1_RX               2
31 #define OMAP_DMA_I2C_RX                 3
32 #define OMAP_DMA_I2C_TX                 4
33 #define OMAP_DMA_EXT_NDMA_REQ           5
34 #define OMAP_DMA_EXT_NDMA_REQ2          6
35 #define OMAP_DMA_UWIRE_TX               7
36 #define OMAP_DMA_MCBSP1_TX              8
37 #define OMAP_DMA_MCBSP1_RX              9
38 #define OMAP_DMA_MCBSP3_TX              10
39 #define OMAP_DMA_MCBSP3_RX              11
40 #define OMAP_DMA_UART1_TX               12
41 #define OMAP_DMA_UART1_RX               13
42 #define OMAP_DMA_UART2_TX               14
43 #define OMAP_DMA_UART2_RX               15
44 #define OMAP_DMA_MCBSP2_TX              16
45 #define OMAP_DMA_MCBSP2_RX              17
46 #define OMAP_DMA_UART3_TX               18
47 #define OMAP_DMA_UART3_RX               19
48 #define OMAP_DMA_CAMERA_IF_RX           20
49 #define OMAP_DMA_MMC_TX                 21
50 #define OMAP_DMA_MMC_RX                 22
51 #define OMAP_DMA_NAND                   23
52 #define OMAP_DMA_IRQ_LCD_LINE           24
53 #define OMAP_DMA_MEMORY_STICK           25
54 #define OMAP_DMA_USB_W2FC_RX0           26
55 #define OMAP_DMA_USB_W2FC_RX1           27
56 #define OMAP_DMA_USB_W2FC_RX2           28
57 #define OMAP_DMA_USB_W2FC_TX0           29
58 #define OMAP_DMA_USB_W2FC_TX1           30
59 #define OMAP_DMA_USB_W2FC_TX2           31
60
61 /* These are only for 1610 */
62 #define OMAP_DMA_CRYPTO_DES_IN          32
63 #define OMAP_DMA_SPI_TX                 33
64 #define OMAP_DMA_SPI_RX                 34
65 #define OMAP_DMA_CRYPTO_HASH            35
66 #define OMAP_DMA_CCP_ATTN               36
67 #define OMAP_DMA_CCP_FIFO_NOT_EMPTY     37
68 #define OMAP_DMA_CMT_APE_TX_CHAN_0      38
69 #define OMAP_DMA_CMT_APE_RV_CHAN_0      39
70 #define OMAP_DMA_CMT_APE_TX_CHAN_1      40
71 #define OMAP_DMA_CMT_APE_RV_CHAN_1      41
72 #define OMAP_DMA_CMT_APE_TX_CHAN_2      42
73 #define OMAP_DMA_CMT_APE_RV_CHAN_2      43
74 #define OMAP_DMA_CMT_APE_TX_CHAN_3      44
75 #define OMAP_DMA_CMT_APE_RV_CHAN_3      45
76 #define OMAP_DMA_CMT_APE_TX_CHAN_4      46
77 #define OMAP_DMA_CMT_APE_RV_CHAN_4      47
78 #define OMAP_DMA_CMT_APE_TX_CHAN_5      48
79 #define OMAP_DMA_CMT_APE_RV_CHAN_5      49
80 #define OMAP_DMA_CMT_APE_TX_CHAN_6      50
81 #define OMAP_DMA_CMT_APE_RV_CHAN_6      51
82 #define OMAP_DMA_CMT_APE_TX_CHAN_7      52
83 #define OMAP_DMA_CMT_APE_RV_CHAN_7      53
84 #define OMAP_DMA_MMC2_TX                54
85 #define OMAP_DMA_MMC2_RX                55
86 #define OMAP_DMA_CRYPTO_DES_OUT         56
87
88
89 #define OMAP_DMA_BASE                   (0xfffed800)
90 #define OMAP_DMA_GCR                    (OMAP_DMA_BASE + 0x400)
91 #define OMAP_DMA_GSCR                   (OMAP_DMA_BASE + 0x404)
92 #define OMAP_DMA_GRST                   (OMAP_DMA_BASE + 0x408)
93 #define OMAP_DMA_HW_ID                  (OMAP_DMA_BASE + 0x442)
94 #define OMAP_DMA_PCH2_ID                (OMAP_DMA_BASE + 0x444)
95 #define OMAP_DMA_PCH0_ID                (OMAP_DMA_BASE + 0x446)
96 #define OMAP_DMA_PCH1_ID                (OMAP_DMA_BASE + 0x448)
97 #define OMAP_DMA_PCHG_ID                (OMAP_DMA_BASE + 0x44a)
98 #define OMAP_DMA_PCHD_ID                (OMAP_DMA_BASE + 0x44c)
99 #define OMAP_DMA_CAPS_0_U               (OMAP_DMA_BASE + 0x44e)
100 #define OMAP_DMA_CAPS_0_L               (OMAP_DMA_BASE + 0x450)
101 #define OMAP_DMA_CAPS_1_U               (OMAP_DMA_BASE + 0x452)
102 #define OMAP_DMA_CAPS_1_L               (OMAP_DMA_BASE + 0x454)
103 #define OMAP_DMA_CAPS_2                 (OMAP_DMA_BASE + 0x456)
104 #define OMAP_DMA_CAPS_3                 (OMAP_DMA_BASE + 0x458)
105 #define OMAP_DMA_CAPS_4                 (OMAP_DMA_BASE + 0x45a)
106 #define OMAP_DMA_PCH2_SR                (OMAP_DMA_BASE + 0x460)
107 #define OMAP_DMA_PCH0_SR                (OMAP_DMA_BASE + 0x480)
108 #define OMAP_DMA_PCH1_SR                (OMAP_DMA_BASE + 0x482)
109 #define OMAP_DMA_PCHD_SR                (OMAP_DMA_BASE + 0x4c0)
110
111 #define OMAP1510_DMA_LCD_BASE           (0xfffedb00)
112 #define OMAP1510_DMA_LCD_CTRL           (OMAP1510_DMA_LCD_BASE + 0x00)
113 #define OMAP1510_DMA_LCD_TOP_F1_L       (OMAP1510_DMA_LCD_BASE + 0x02)
114 #define OMAP1510_DMA_LCD_TOP_F1_U       (OMAP1510_DMA_LCD_BASE + 0x04)
115 #define OMAP1510_DMA_LCD_BOT_F1_L       (OMAP1510_DMA_LCD_BASE + 0x06)
116 #define OMAP1510_DMA_LCD_BOT_F1_U       (OMAP1510_DMA_LCD_BASE + 0x08)
117
118 #define OMAP1610_DMA_LCD_BASE           (0xfffee300)
119 #define OMAP1610_DMA_LCD_CSDP           (OMAP1610_DMA_LCD_BASE + 0xc0)
120 #define OMAP1610_DMA_LCD_CCR            (OMAP1610_DMA_LCD_BASE + 0xc2)
121 #define OMAP1610_DMA_LCD_CTRL           (OMAP1610_DMA_LCD_BASE + 0xc4)
122 #define OMAP1610_DMA_LCD_TOP_B1_L       (OMAP1610_DMA_LCD_BASE + 0xc8)
123 #define OMAP1610_DMA_LCD_TOP_B1_U       (OMAP1610_DMA_LCD_BASE + 0xca)
124 #define OMAP1610_DMA_LCD_BOT_B1_L       (OMAP1610_DMA_LCD_BASE + 0xcc)
125 #define OMAP1610_DMA_LCD_BOT_B1_U       (OMAP1610_DMA_LCD_BASE + 0xce)
126 #define OMAP1610_DMA_LCD_TOP_B2_L       (OMAP1610_DMA_LCD_BASE + 0xd0)
127 #define OMAP1610_DMA_LCD_TOP_B2_U       (OMAP1610_DMA_LCD_BASE + 0xd2)
128 #define OMAP1610_DMA_LCD_BOT_B2_L       (OMAP1610_DMA_LCD_BASE + 0xd4)
129 #define OMAP1610_DMA_LCD_BOT_B2_U       (OMAP1610_DMA_LCD_BASE + 0xd6)
130 #define OMAP1610_DMA_LCD_SRC_EI_B1      (OMAP1610_DMA_LCD_BASE + 0xd8)
131 #define OMAP1610_DMA_LCD_SRC_FI_B1_L    (OMAP1610_DMA_LCD_BASE + 0xda)
132 #define OMAP1610_DMA_LCD_SRC_EN_B1      (OMAP1610_DMA_LCD_BASE + 0xe0)
133 #define OMAP1610_DMA_LCD_SRC_FN_B1      (OMAP1610_DMA_LCD_BASE + 0xe4)
134 #define OMAP1610_DMA_LCD_LCH_CTRL       (OMAP1610_DMA_LCD_BASE + 0xea)
135 #define OMAP1610_DMA_LCD_SRC_FI_B1_U    (OMAP1610_DMA_LCD_BASE + 0xf4)
136
137
138 /* Every LCh has its own set of the registers below */
139 #define OMAP_DMA_CSDP(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x00)
140 #define OMAP_DMA_CCR(n)                 (OMAP_DMA_BASE + 0x40 * (n) + 0x02)
141 #define OMAP_DMA_CICR(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x04)
142 #define OMAP_DMA_CSR(n)                 (OMAP_DMA_BASE + 0x40 * (n) + 0x06)
143 #define OMAP_DMA_CSSA_L(n)              (OMAP_DMA_BASE + 0x40 * (n) + 0x08)
144 #define OMAP_DMA_CSSA_U(n)              (OMAP_DMA_BASE + 0x40 * (n) + 0x0a)
145 #define OMAP_DMA_CDSA_L(n)              (OMAP_DMA_BASE + 0x40 * (n) + 0x0c)
146 #define OMAP_DMA_CDSA_U(n)              (OMAP_DMA_BASE + 0x40 * (n) + 0x0e)
147 #define OMAP_DMA_CEN(n)                 (OMAP_DMA_BASE + 0x40 * (n) + 0x10)
148 #define OMAP_DMA_CFN(n)                 (OMAP_DMA_BASE + 0x40 * (n) + 0x12)
149 #define OMAP_DMA_CSFI(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x14)
150 #define OMAP_DMA_CSEI(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x16)
151 #define OMAP_DMA_CSAC(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x18)
152 #define OMAP_DMA_CDAC(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x1a)
153 #define OMAP_DMA_CDEI(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x1c)
154 #define OMAP_DMA_CDFI(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x1e)
155 #define OMAP_DMA_COLOR_L(n)             (OMAP_DMA_BASE + 0x40 * (n) + 0x20)
156 #define OMAP_DMA_COLOR_U(n)             (OMAP_DMA_BASE + 0x40 * (n) + 0x22)
157 #define OMAP_DMA_CCR2(n)                (OMAP_DMA_BASE + 0x40 * (n) + 0x24)
158 #define OMAP_DMA_CLNK_CTRL(n)           (OMAP_DMA_BASE + 0x40 * (n) + 0x28)
159 #define OMAP_DMA_LCH_CTRL(n)            (OMAP_DMA_BASE + 0x40 * (n) + 0x2a)
160
161 #define OMAP_DMA_TOUT_IRQ               (1 << 0)
162 #define OMAP_DMA_DROP_IRQ               (1 << 1)
163 #define OMAP_DMA_HALF_IRQ               (1 << 2)
164 #define OMAP_DMA_FRAME_IRQ              (1 << 3)
165 #define OMAP_DMA_LAST_IRQ               (1 << 4)
166 #define OMAP_DMA_BLOCK_IRQ              (1 << 5)
167 #define OMAP_DMA_SYNC_IRQ               (1 << 6)
168
169 #define OMAP_DMA_DATA_TYPE_S8           0x00
170 #define OMAP_DMA_DATA_TYPE_S16          0x01
171 #define OMAP_DMA_DATA_TYPE_S32          0x02
172
173 #define OMAP_DMA_SYNC_ELEMENT           0x00
174 #define OMAP_DMA_SYNC_FRAME             0x01
175 #define OMAP_DMA_SYNC_BLOCK             0x02
176
177 #define OMAP_DMA_PORT_EMIFF             0x00
178 #define OMAP_DMA_PORT_EMIFS             0x01
179 #define OMAP_DMA_PORT_OCP_T1            0x02
180 #define OMAP_DMA_PORT_TIPB              0x03
181 #define OMAP_DMA_PORT_OCP_T2            0x04
182 #define OMAP_DMA_PORT_MPUI              0x05
183
184 #define OMAP_DMA_AMODE_CONSTANT         0x00
185 #define OMAP_DMA_AMODE_POST_INC         0x01
186 #define OMAP_DMA_AMODE_SINGLE_IDX       0x02
187 #define OMAP_DMA_AMODE_DOUBLE_IDX       0x03
188
189 /* LCD DMA block numbers */
190 enum {
191         OMAP_LCD_DMA_B1_TOP,
192         OMAP_LCD_DMA_B1_BOTTOM,
193         OMAP_LCD_DMA_B2_TOP,
194         OMAP_LCD_DMA_B2_BOTTOM
195 };
196
197 enum omap_dma_burst_mode {
198         OMAP_DMA_DATA_BURST_DIS = 0,
199         OMAP_DMA_DATA_BURST_4,
200         OMAP_DMA_DATA_BURST_8
201 };
202
203 enum omap_dma_color_mode {
204         OMAP_DMA_COLOR_DIS = 0,
205         OMAP_DMA_CONSTANT_FILL,
206         OMAP_DMA_TRANSPARENT_COPY
207 };
208
209 extern void omap_set_dma_priority(int dst_port, int priority);
210 extern int omap_request_dma(int dev_id, const char *dev_name,
211                             void (* callback)(int lch, u16 ch_status, void *data),
212                             void *data, int *dma_ch);
213 extern void omap_enable_dma_irq(int ch, u16 irq_bits);
214 extern void omap_disable_dma_irq(int ch, u16 irq_bits);
215 extern void omap_free_dma(int ch);
216 extern void omap_start_dma(int lch);
217 extern void omap_stop_dma(int lch);
218 extern void omap_set_dma_transfer_params(int lch, int data_type,
219                                          int elem_count, int frame_count,
220                                          int sync_mode);
221 extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
222                                     u32 color);
223
224 extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
225                                     unsigned long src_start);
226 extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
227 extern void omap_set_dma_src_data_pack(int lch, int enable);
228 extern void omap_set_dma_src_burst_mode(int lch,
229                                         enum omap_dma_burst_mode burst_mode);
230
231 extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
232                                      unsigned long dest_start);
233 extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
234 extern void omap_set_dma_dest_data_pack(int lch, int enable);
235 extern void omap_set_dma_dest_burst_mode(int lch,
236                                          enum omap_dma_burst_mode burst_mode);
237
238 extern void omap_dma_link_lch (int lch_head, int lch_queue);
239 extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
240
241 extern dma_addr_t omap_get_dma_src_pos(int lch);
242 extern dma_addr_t omap_get_dma_dst_pos(int lch);
243 extern int omap_get_dma_src_addr_counter(int lch);
244 extern void omap_clear_dma(int lch);
245 extern int omap_dma_running(void);
246
247 /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
248 extern int omap_dma_in_1510_mode(void);
249
250 /* LCD DMA functions */
251 extern int omap_request_lcd_dma(void (* callback)(u16 status, void *data),
252                                 void *data);
253 extern void omap_free_lcd_dma(void);
254 extern void omap_setup_lcd_dma(void);
255 extern void omap_enable_lcd_dma(void);
256 extern void omap_stop_lcd_dma(void);
257 extern void omap_set_lcd_dma_ext_controller(int external);
258 extern void omap_set_lcd_dma_single_transfer(int single);
259 extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
260                                 int data_type);
261 extern void omap_set_lcd_dma_b1_rotation(int rotate);
262 extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres);
263 extern void omap_set_lcd_dma_b1_mirror(int mirror);
264 extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale);
265
266 #endif /* __ASM_ARCH_DMA_H */