drivers: misc: therm_est: Refactored therm_est

1) Registered therm_est as a platform driver.
2) Driver now registers with linux thermal framework
   on it's own.
3) Allow the driver to connect with one passive cooling
   device

Change-Id: If37ad1c142a9be0dee3e844b3ffb435cfebeaf01
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/127671
GVS: Gerrit_Virtual_Submit
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

tegra: dc: Fix div by zero in frame time computation.

- Set frame duration to 0 in NULL modeset.

bug 1039104

Change-Id: I2b7d5a8a7c1748d8d582505946014e002326cbee
Signed-off-by: Raghavendra VK <rvk@nvidia.com>
Reviewed-on: http://git-master/r/127603
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

ARM: tegra: usb_phy: HSIC phy changes

Following HSIC phy changes ported from main.

1. HSIC rail enable,disable & phy close api's added
2. Power downs enabled during phy power off
3. PMC code clean-up
4. Fake remote wakeup fix
5. HSIC wakeup support added
6. Phy resume code removed

Bug 1023928

Change-Id: I90f92ce3e44feed744aea12fc0c3a3ca05b5a16b
Signed-off-by: srinivas thaduvai <sthaduvai@nvidia.com>
Reviewed-on: http://git-master/r/127587
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

regulator: max77663: register all regulators in single probe

Register the max77663 regulator sub driver as regulator-pmic and
register all regulators in single probe calls.
This will ease the DT porting.

Change-Id: Id50bf52ada4da0e45fabd540c7d9ba5949bbd4f8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127515

mfd: max77663: register rtc sub driver as mfd sub device

Register RTC sub driver for PMIC MAX77663 as mfd sub device rather
than registering from board file.

Change-Id: I6b565c5c7c88f48e9aee33c044e7694ce77c4c8a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127514
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

ARM:tegra:dalmore: update pinmux with autogen code

Bug 1026002

Change-Id: I8cf43bde1d4bc4369703cfb0635ab9c235cc51cb
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/127462
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

ARM: tegra: dalmore: added board KBC file

Bug 1017712

Change-Id: I42b34e492d08938c82b81bcc8cd4cbc795f54dfd
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/127454
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

ARM: tegra11: dvfs: Enable CPU auto-dvfs

Change-Id: I072461d7718a8f672d2e44bbcb9738ddf9039b46
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127374
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

ARM: tegra11: clock: Increase cpu clock limits

Change-Id: Icc234a57c0f0369503a42551e6186e4c1424e62b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127373
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

ARM: tegra11: fuse: Add speedo interface stubs

Change-Id: I85616afc530f120e87d0b993dc9e08873dc9ccd1
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127371
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

ARM: tegra11: dvfs: Add frequency multiplier to cvb data

Added frequency multiplier to cvb dvfs data to make data entry
more flexible.

Change-Id: I505219497f8800d358f8933d62ac7b9b236ff07f
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127370
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

ARM: tegra11: dvfs: Add cvb maximum voltage limit

Added maximum voltage entry to cvb data. It will be filled in based
on reliability data. This settings affect
(a) maximum cpu frequency in dfll clock source mode
(b) nominal (maximum) cpu voltage in pll clock source mode

In case (a) voltage is controlled automatically by CL-DVFS, and
cvb maximum voltage limit is applied implicitly by capping frequency
target. In case (b) voltage limit is explicitly checked by s/w legacy
DVFS. Depending on actual SoC data, this voltage boundary may prevent
reaching maximum dfll frequency in pll mode.

Change-Id: Ice7b0cd45302b8d29d2a40491701070b8cd74d3c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127369
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

ARM: tegra11: dvfs: Re-factor dvfs initialization.

So far, maximum frequency and voltage for any clock domain match
each other in dvfs tables. However, on Tegra11 maximum cpu rate is
determined when dfll is used as cpu clock source. On the other hand,
nominal voltage is set for the case when cpu is running from pll,
since pll source requires higher than dfll voltage at the same
frequency. In addition nominal voltage is limited by reliability
requirements. Hence, it is possible that cpu nominal voltage and
maximum frequency will not match in dvfs table. Re-factored dvfs
initialization to be ready for such mismatch (although for now
matching is still in place).

Change-Id: I1402f6943635cbb201956255c66dc32e0b79425e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

usb: otg: tegra: add stub runtime power management

Add stub runtime power management calls. This provides
the core PM framework with information about when the
device is idle, etc.

Bug 887315

Change-Id: I0dfe5c151fa5f987196a307441a2705ca52e70d7
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/127358
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

ARM: tegra11: clock: Update PLLU secondary outputs

Implemented enable and disable operations for PLLU secondary
outputs. Added 12MHz output.

Change-Id: I297623631ec5078d809494c0026f051650c12082
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127319
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

regulator: tps65090: Add support always/boot_on

Check if always_on or boot_on in preinit and enable regulator
accordingly.

Bug 982726

Change-Id: Ic18569bafaa8333c85a16873db32946b5cd1a40c
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/127234
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

video: tegra: dc: Add support to sequential blending

Change-Id: I9fcef4544e934fb59c55968484059e938e82da43
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/126943
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

Merge remote-tracking branch 'origin/dev/android-t114-3.4-next' into work

This merge is part of the merge from main to dev-t114 from main-jb-2012.08.27-C2.1

Change-Id: I0345cf306eb7b4ac3d72ef4cfea2fa5bdbfd713d

arm: tegra: E1239: Fix LP0 audio stop issue

Fix audio stop issue after resuming from lp0.

Bug 1039326

Change-Id: Ieb586b614ffecc9d149213fbfd3cbb3198088725
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/127562
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

video: tegra: host: fix integer overflows

job_size() calculates the size of a job structure based on a struct
passed as a ioctl parameter. This calculation was not checked for
overflow.

Bug 1038551

Change-Id: I13d087dbd5aad5fef1c5d13ceb23e50f565acf95
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/127185
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

usb: otg: tegra: Notify USB events to otg core

Notify USB connection events to otg core. These
notifications will be used by drivers (e.g. otg wakelock
driver) who registered for the events.

Bug 1031034
Bug 976849

Change-Id: I3655071af9226e3aef385681fcabc94b9def4233
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/127137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Courbot <acourbot@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

asoc: aic326x machine: Add support for D-Mic

Bug 1034241

Change-Id: I205a74a8f27237470a3cd1266bb925971654459c
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125280
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

asoc: codecs: TI aic326x: Add Digital Mic support

Bug 1034241

Change-Id: Id0037f18afa58be82cbeeb43e97b606614fb8ba8
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125273
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

arm: tegra: E1239: Add TI aic326x support

1) Add latest TI aic326x codec driver support
2) Dmic support for TAI

Bug 1034241

Change-Id: I8db5223fd203a4e8f93f159a9c654486831f08a1
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125265
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

arm: tegra: config: Enable TI TLV320AIC326X codec

Enable TI TLV320AIC326X audio codec configuration.

Bug 1034241

Change-Id: I5997c365f6ae3fde12e40f3a157421b655bb054e
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125261
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

asoc: aic326x machine: Add supp. for new TI driver

Add support for latest TI codec aic326x driver.

Bug 1034241

Change-Id: I387693ed2de466d1704c6f7ff0a1b15c7cbff32f
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125180
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>

drivers: mfd: Add support for TI aic3262 driver

Bug 1034241

Change-Id: I5607d53cf0bdd25c5e2b8447cd7e676b64cd32a2
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125169
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>

asoc: codecs: Add TI aic326x driver

Add latest TI aic326x driver.

Bug 1034241

Change-Id: I8457538025b2989c4baa5eaefef48bdd5535def9
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/125167
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>

arm: tegra: pcie: WAR to avoid hang on PCIe device

Setting DFPCI_RSPPASSPW bit in AFI_CONFIGURATION
register to avoid instant hang on CPU read/write
while gpu transfers are in progress.

Bug 1034443

Change-Id: I40c99588753b8b2cb2d418b54c6ac73f7b8ddc13
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/124037
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

video: tegra: nvmap: fix handle usecount tracking

A handle's usecount used to be incremented once during the mmap ioctl,
and decremented when the mapping is closed by the kernel. However, that
fails if a mapping cloned, for example if the mapping was split due to
a munmap, or (presumably) during fork, as the decrement will then happen
for each cloned mapping.

Therefore increment the usecount when a mapping is opened.
Also fix a BUG_ON() that would have caught this bug, if it wouldn't
have done the check by checking if the unsigned usecount field is
less than zero.

Bug 1033981

Change-Id: I72ac9361a19e44f91ffd6b1126f4632e0f7b6726
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/123710
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: TAI: Add E1239 support

Bug 1002637

Change-Id: I1271f95e8c174422bcb93eed3cc2bd7df8012479
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/123537
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Peterson <speterson@nvidia.com>

Revert "arm: tegra: Enable speculative line fill in SCU."

This reverts commit 06c880a6086183173c361b4a9d4f8047c6a39769.
This CL is reverted as it causes write perf regression with lmbench(bw_mem)
benchmark.
Bug 1026077

Change-Id: I7ff9ffbfe74e2083aa43cab75b694b1c61987bc3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/125097
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

Revert "arm: tegra: scu: Enable IC and SCU standby"

This reverts commit b25193d5c3e2c59169c127d23b59123136cfefa7.
This CL is reverted as it causes write perf regression with lmbench(bw_mem)
benchmark.
Bug 1026077

Change-Id: I9858c88a6e846d2c3629f14c7cc62a7feb4f4528
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/125096
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

ARM:tegra:emc: scale latency allowance by tick len

Calculate the tick length of the EMC DFS table
and scale the latency allowance settings.

Bug 955082

Change-Id: Id7b1504c6854009ba7677c7ddebe0a8f62cbfb7e
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/124980
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

video: console: Enable framebuffer console

Framebuffer console init failed issue will be fixed by:
http://git-master/r/#change,107866
So we should enable framebuffer console now.

Bug 996992
Bug 941073

Change-Id: I6841248fad406f4a00055062691f5794145c030a
Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/124805
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peer Chen <pchen@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Rhyland Klein <rklein@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Allen Martin <amartin@nvidia.com>

arm: tegra: pluto: Add LH500WX1 LG panel support

5" 720x1280 LG panel

Bug 1028791

Change-Id: I30c8757f9f8aa6d0a706b4c316a1071fbc1280e7
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/127459
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

sdhci: tegra: disable HS200 mode

Diasble HS200 mode support for T20 and T30 devices

Change-Id: I6c48e366a15cdecd3d29a2a510b78e4bfd75ef48
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/127427
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

ARM: tegra: dalmore: Add Audio Devices

Add audio devices for ALC5640, I2S, DAM.
Add I2C client info. Register audio devices.
Update build configuration flag.

Change-Id: Ia4a20c8c802c6d4ef49c7a21d8f412f982d10431
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/127362
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

ARM: tegra: dalmore: Add GPIO pin for Audio codec

GMI_AD12 GPIO pin is used for turning on audio codec
Move GMI_AD12 from unused to common pinmux table
Set GPIO direction as output

Change-Id: Ib6b11715c621cd067691a00db11a8463d2a91bbc
Signed-off-by: Vijay Mali <vmali@nvidia.com>
Reviewed-on: http://git-master/r/127361
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Scott Peterson <speterson@nvidia.com>

asoc: tegra: utils: Set new base rates for Tegra11

Change-Id: I54ec21750a2f9bd65387c14d454d3f44e190b339
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127318
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

video: tegra: host: Host1x tickcount

Add support for host1x tick counters. Adds under debugfs entries
that export the tickcount, which is global, and stallcount and
xfercount which are per channel counters.

The counters are reset when host1x loses power.

Bug 1036465

Change-Id: I2342078f98f6b67a376130bb68fbae84e070c0eb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/127117
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

video: tegra: host: add Tegra path to firmware

This change coalesces paths for nvhost devices which request firmware.
And it allows a path to be prefixed to them based upon nvhost's
runtime determintion of the chip/SOC.

Change-Id: I2852e1f02f337538e2537934d99db1b45658ccdb
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/125061
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

ARM: tegra: dalmore/pluto: Remove uarte instance

Remove uarte instance from board uart initialization since it is
been removed from T114 chip.

Bug 1017709

Change-Id: Ie19d79ab55ffdfbf45997b85157f5f4e396aaf18
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/127412
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

regulator: max77663: move desc as part of device info

Moving the regulator descriptor of device to device
regulator info to move all device related information
under one structure.

Change-Id: I61264ca7703e9d874141e656786f02397b2f552a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127160
Reviewed-by: Automatic_Commit_Validation_User

regulator: max77663: separate device info with instance info

Currently device instance info is share with device static
information. This avoid to use the multiple instance of device.
Separating device specific static information with instance
specific information.

Change-Id: I321f0836bd6fdc908844aba4a12c31828b11a598
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127159
Reviewed-by: Automatic_Commit_Validation_User

regulator: max77663: convert regulator init data to pointer

The platform data for max77663 regulator have the member for
regulator init data.  Convert this to pointer type to easing
the dt support for regulator.

Change-Id: I7ce715c5afc4046f85fd86e7e6efb27ec0e7e9e7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127158
Reviewed-by: Automatic_Commit_Validation_User

video: tegra: host: Read TSEC key

Read TSEC encrypted key from command line, and patch it in front of
the TSEC firmware.

Bug 969164

Change-Id: I396e7780362b92dca0c18f2ace5fefd825dd84c5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/122664
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

pm: EDP: adding priority governor

This patch adds the priority governor to EDP framework. When throttling
is required, lower priority clients are picked first.

Change-Id: I9e673f35dbe98728bb2fbd9e4ca1c7af684e1d1c
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/125226
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

arm: tegra: pluto: Implement board panel file

Comprises of:
1. nvmap device registration
2. nvavp device registration
3. host1x device registration
4. display device registration
5. basic dsi and hdmi support
6. pwm support

Bug 1017715

Change-Id: Ic832cca42afb9d91454de056be1e0fa1cddd66e2
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/127211
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

ARM: tegra: name the supply name of regulator rails

Provide the name of the regulator rails of MAX77663 from
platform data in place of relying on the name given by
driver.

Change-Id: Ib77acefe7117115745e8414fae966b04339c6c6a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127182
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

mfd: max77663: remove gpio support from core

GPIO driver support for MAX77663 is moved as separate driver
under gpio directory. Removing the code which support gpio
driver in core driver and register max77663-gpio driver as
mfd sub device.

Change-Id: Iaa414e2e7f2d91ca98ab1c996154aeb01daa63ec
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127147
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

ARM: tegra: enable MAX77663_GPIO config

Enable MAXIM PMIC MAX77663 GPIO driver.

Change-Id: I4200f774f4628448a355fc295afc28bc613659e2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127146
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

gpio: max77663: add gpio driver

Maxim PMIC MAX77663 supports 8 GPIOs. Providing
the access to GPIO through gpio driver.

The support is already in core driver but gpio
functionality should be provided through gpio driver
and keeping this in gpio directory.
This is inline with mfd driver implementation.

Change-Id: I31e169a4be33aa3e1677a2006a70dd05c9da22a9
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127145
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

ARM: tegra: dalmore: Adding machine check

Adding machine check for dalmore fixed regulator registration.

Bug 982726

Change-Id: Ic186d7c2bab832fa8630301b5a6bd75253d32b08
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/127144
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>

regulator: core: Take supply regulator from init_data only

As EPROBE_DEFER is not supported in K3.4 and hence if supply
regulator is not found then regulator registration fails.
Setting the supply regulator only from init_data in place of
providing it through desc.

Change-Id: Iebe321abd84fc3bec2c4aa5a4233320efef0387b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/127106
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

ARM: tegra11: clock: Update pll set rate operation

Modified set out-of-table-rate operation to guarantee that vco
minimum limit is not violated in this case as well (this procedure
applied to PLLD/D2, PLLU, and PLLA, although the latter plls are not
expected to run at out-of-table rates ever).

According to PLLD/D2 and PLLU specification update, increased CPCON
and LFCON values. Removed LFCON dependency on feedback divider range.

Change-Id: Ib785ad54df3d50440ee4a44af45658b95d25001e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127094
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra11: clock: Update PLLD/D2 configuration

Changed tabulated PLLD/D2 settings to increase vco above 500MHz
minimum, and increased CPCON values respectively.

Change-Id: I78f8f9a60e274ae49a0899e54b0f465106544f84
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127093
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra11: clock: Update PLLA configuration

Changed PLLA configuration tables in order to
- lower vco below maximum divider input at Vmin - 408MHz - when
9.6MHz reference frequency is used
- increase vco above minimum - 200MHz - when 28.8MHz reference
frequency is used.

Updated curacao clock initialization accordingly.

Change-Id: Ic333be296d16761c5c3ea39e09ba7ab1ea4124e8
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>

ARM: tegra11: clock: Update vco ranges for PLLP, PLLA, PLLD/D2

Change-Id: Ibebdaac1b6594542698198d7c17d977924cf64a5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127091
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

keyboard: tegra-kbc: Fix build for p1852

tegra_kbc_set_keypress_interrupt was defined but not used
in the non CONFIG_PM_SLEEP config.  This failed the build.
Changing to defining function for CONFIG_PM_SLEEP only.

Bug: 1033000

Change-Id: I9ddaaeb9616d22da6c540ded8c83867e6bbfcfaa
Signed-off-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-on: http://git-master/r/126967
Reviewed-by: David Gorgen <dgorgen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Frank Bourgeois <fbourgeois@nvidia.com>

video: tegra: dc: Fix timestamp sim build

bug 1021221

Change-Id: Ic7b69a19f7baecb8768179d34bdf94bae81969ee
Signed-off-by: Jeff Smith <jsmith@nvidia.com>
Reviewed-on: http://git-master/r/126952
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Robert Morell <rmorell@nvidia.com>
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>

pm: EDP: Add governor framework

This patch introduces the governor framework into EDP. Governor will
handle all request related processing including issuing of notifications
and throttling.

A single governor can be used by multiple managers.

Change-Id: If0f97107d6a2df9dfa22e7e84c1f48ba27d27280
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/125225
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

pm: EDP: adding client priority

This patch adds the priority field to EDP client. List of clients with
the EDP manager are kept sorted on this field.

Change-Id: I53bb5c0b826a4f02ed1e8e1729463ce8b754fc55
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/125224
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

arm: tegra: dalmore: Add LQ101R1SX01 sharp panel support

10.07" 2560x1600 sharp panel.

Bug 1012298

Change-Id: Iaf1177a2886c4364111f0e0ee8426c52af3b2b2b
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/124915
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

cpuquiet: Add notifiers for the runnables governor

The governor stops sampling whenever the device is busy and starts its
sampling loop when the device is free.

Change-Id: Ifdae4a84e56c2734be48e49f6112b537602a02da
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/124680
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

cpuquiet: Runnable threads governor

[perf] The runnable threads governor only looks at the average number of
runnables in the system to make a decision when bringing cores
offline/online. First pass; tweaks thresholds and delays to reduce
decision latency to about ~50-70ms per core (from ~100-150ms per core)

Change-Id: Idd3b268a74a8f56ad3fc0e5c7f388174d1b6611f
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/124679
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

arm: tegra: dalmore: Add B116HAN03.0 AUO panel support

11.6" 1920x1080 AUO panel

Bug 1028789

Change-Id: I78d591e8764134cdb39fbd2191ed7e7cecabf51a
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/124619
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

arm: tegra: dalmore: Add VVX10F004B00 panasonic panel support

10.1" 1920 x 1200 panasonic panel

Bug 1028790

Change-Id: I2c32ec5c8f6c6e927a1b411504b9399e4559bb5c
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/124579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

ARM: tegra: thermal: Thermal Refactor

Removed all edp and throttling specific code in the tegra
thermal framework.

Change-Id: I60eb89266d19d8c8beab833f5c6953364b679318
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/124502
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

ARM: tegra: thermal: Edp into cooling device

Removed EDP specific code from tegra thermal layer. It is
now implemented as a cooling device.

Change-Id: Ica9602569367e07deb04cf3cb8064a1c4101a7a4
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/124501
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

ARM: tegra: thermal: Cleaned up thermal framework

Removed shutdown and tc1,tc2,passive delay parameters from
thermal state.

Change-Id: Icd97afaf912a9fb7ab930c95d52d0e1dee42ce5a
Signed-off-by: Joshua Primero <jprimero@nvidia.com>
Reviewed-on: http://git-master/r/124500
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

ARM: tegra: fuse: Add support to query gpu info

Bug 1018116

Change-Id: Ib80d596d2ec6e2d6ea291b07e1e215e263a1ab5a
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/123826
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Merge remote-tracking branch 'origin/dev/android-t114-3.4-next' into promotion_build

This is part of the main to dev-t114 delivery from main-jb-2012.08.23-B4

Change-Id: If77fb5bcaed386a512d151cf37bdfe90a749ecaf

Merge remote-tracking branch 'experimental/dev/android-t114-3.4-rebased' into android-t114-3.4

ARM: tegra: la: add function to scale LA

Add functionality to enable changing of latency
allowance settings. This is used for memory
tables that may have different tick lengths.

Bug 955082

Change-Id: I3055a062846cfdeb992931e691cf687ffb05725c
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/124979
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

video: tegra: host: Clear intr list at intr_put

Process wait list when removing a waiter. This clears the interrupt
once it is no longer needed.

Bug 1031724

Change-Id: Ifb46672f70c8bbd6359d0a8aeaac0d718a5394b2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/125230
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

video: tegra: dc: Make framebuffer console init OK

Update framebuffer's modelist after we changed it's fb_var_screeninfo.
This makes sure the framebuffer console can be inited successfully.
During framebuffer console init, it'll check whether the var info of
the framebuffer is consistent with the modelist.
Unsuccessful init of framebuffer console driver makes VT driver
doesn't work in right way.

Bug 996992

Signed-off-by: Mark Zhang <markz@nvidia.com>
Change-Id: I96a1db1f389be75dcba48b20447cf1510ad3768b
Reviewed-on: http://git-master/r/107866
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

gpio: tegra: Added support for GCOV for GPIO

Added support for GCOV code coverage for GPIO

Signed-off-by: Sumit Sharma <sumsharma@nvidia.com>
Change-Id: I407433db690696644aa67dffc0de8bc03c624b54
Reviewed-on: http://git-master/r/125183
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

hwmon: tegra: tsensor:Fix compilation error

Bug 1024886

Resolved compilation error for unused code.

Signed-off-by: Nagaraja Kolur <nkolur@nvidia.com>

Change-Id: I9167d8129a9cba0fc6cb203180e07192d66db439
Reviewed-on: http://git-master/r/120581
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nagaraj Kolur <nkolur@nvidia.com>
Tested-by: Nagaraj Kolur <nkolur@nvidia.com>
Reviewed-by: Vijaya Bhaskar <vbhaskar@nvidia.com>
Reviewed-by: Wahed Syed <wsyed@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

ARM: tegra: iovmm: Fix spinlock bug if alloc fails

iovmm_split_free_block leaves the domain's spinlock unlocked if a
memory allocation failed. Unfortunately, all the callers of that
function assume that it takes the spinlock. This will then lead to
double unlocking of the spinlock.

Bug 1035105

Change-Id: Ib4379cad76f053586d6a77b8d0dc9f41af01931a
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-on: http://git-master/r/124299
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

PM QoS: Add disable parameter

For testing purposes it is useful to be able to disable
PM Qos.

Bug 1020898
Bug 917572

Reviewed-on: http://git-master/r/124667

Change-Id: I266f5b5730cfe4705197d8b09db7f9eda6766c7c
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

ARM: tegra: config: enable TPS65090 devices

Enable config variable for TPS65090
- MFD core driver
- Regulator driver
- Battery charging driver.

Change-Id: I83ae5694f17f1b30a2af2e9279dcee844b9d0035
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/126826
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

power: tps65090-charger: fix multiple issue

Some changes:
- Correct platform data struture name and get correct platform data.
- Make remove function to __devexit.
- Correct license to GPL v2
- Add error print when failure occurs.
- remove unnecessary tabs.

Change-Id: If4d3e09cbd4a762c909586146021004b945a9a6d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/126825
Reviewed-by: Automatic_Commit_Validation_User

power: tps65090-charger: fix compilation warning

Fix the "maybe-uninitialized" warnings.

Change-Id: I80bacdbf7e8886dfa6afef8877529ed2abd81155
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/126824
Reviewed-by: Automatic_Commit_Validation_User

power: tps65090-charger: fix compilation error

The driver is missing the include of interrupt header file.
Including it to fix compilation error.
Also it is not suggested to use the devm_request_threaded_irq() as
it is not safe when removing driver. converting it to non-devm version
of API.

Change-Id: I5dc3acf731d62861be0fc0f396b97997e7d269ea
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/126823
Reviewed-by: Automatic_Commit_Validation_User

regulator: tps65090: fix compilation error

The driver is pulled from the K3.1 kernel and when compiling
for K3.4 it is failing because the regulator_register() have more
number of argument.
Fixing the compilation error.

Change-Id: I8e8b43fe29b3bfddf5294a1eb5c3bf430b6dc9fd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/126822
Reviewed-by: Automatic_Commit_Validation_User

Revert "ARM: tegra: enterprise: update memory timings"

This reverts commit 64d7608ed4a0fe0964250ad0423c499841292bf6

Reviewed-on: http://git-master/r/125322
(cherry-picked from e0ed318ccce39543fa821d3cef901111bae556a0)

Bug 1037320

Change-Id: I0178366917146090d75d00ab284286745ed2f785
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/126760

ARM: Tegra30: defconfig: Add camera devices

This adds camera related devices to be built
as modules.

Bug 1034567

Change-Id: I6cf1397fbbaa766c7344d61abbb6bcfb111cdfbe
Signed-off-by: Rahool Paliwal <rpaliwal@nvidia.com>
Reviewed-on: http://git-master/r/124849
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

HACK: Disable dpd spew messages on FPGA

Bug 1031496
Bug 1013917

Change-Id: I489e88dd3c3a2ddffc398dbfbdd2b415ce96233a
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/124291
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User

cpuquiet: Adding runnable thread knobs

Ported the knobs that select runnable thread profiles from autohotplug
into cpuquiet.

Change-Id: I6858731e238404d33c772767d066cd6d467267a8
Signed-off-by: Xiao Bo Zhao <xiaoboz@nvidia.com>
Reviewed-on: http://git-master/r/123852
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Tested-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

cpuquiet: Enable cpuquiet by default

Enable cpuquiet by default if autohotplug is enabled. Cpuquiet will now
replace autohotplug as the hotplugging infrastructure. The down_delay in
the balanced governor has also been increased to 2s from 500ms to match
a similar patch for autohotplug.

Change-Id: I36747af67c55547b3dee95f7d435f9ebc075d393
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/123851
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

cpuquiet: Fix cpuquiet for k3.4

Change-Id: I75d8dba6c9c4c43152c819e08beeccb1e3c07c0c
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/123850
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

cpuquiet: Added cpuquiet to driver Makefile

Change-Id: I8a3fd51df81de8d4375b9ddabbaf4fed5277b17d
Signed-off-by: Sai Charan Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/123849
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

video: tegra: host: Enable 3D power gating

Enable power gating for Tegra11 gr3d.

Bug 971602

Change-Id: I0286b3b05f57e62d2ab8fefc73470a279e640f4e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/123307
Reviewed-by: Automatic_Commit_Validation_User

video: tegra: host: Abstract actmon support

Abstract actmon support behind chip_support. This will make the
actmon code adhere to the correct register layout.

Initialization of actmon now happens from gr3d driver. This allows
initializing and deinitializing actmon when gr3d is power gated. The
consequence is that the avg value must be readable even when there
are no channels open to gr3d.

Bug 971602

Change-Id: I87ebf0e873ad3d9f38d5640a8e98be768fdeb5fd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/123306
Reviewed-by: Automatic_Commit_Validation_User

dt: add property iteration helpers

This patch adds macros of_property_for_each_u32() and
of_property_for_each_string(), which iterate over an array of values
within a device-tree property. Usage is for example:

struct property *prop;
const __be32 *p;
u32 u;
of_property_for_each_u32(np, "propname", prop, p, u)
printk("U32 value: %x\n", u);

struct property *prop;
const char *s;
of_property_for_each_string(np, "propname", prop, s)
printk("String value: %s\n", s);

Based on work by Rob Herring <robherring2@gmail.com>

Change-Id: I8409ee84d2a94398a36bf1cc3f8b8e6821f40842
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from commit c541adc637066407d4cda9db14dcb0e618966a4c)
Reviewed-on: http://git-master/r/120038
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

pm: EDP: fixing license text

License text updated to correct version

Change-Id: I55fa5ad518f559fada8a55bb058d166318b7eed3
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/125223
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

ARM: tegra11: dvfs: Add miscellaneous I/O dvfs tables

Added dvfs tables and updated maximum limits for i2c, sbc, sdmmc, pwm.

Change-Id: I9f0d8fab8b832e045057c56bbb9c2c574c555301
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/125113
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra11: dvfs: Update audio clocks maximum limits

Change-Id: I3ccba9d88f3143bdbe7e9a72507508eafce150e9
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/125112
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

ARM: tegra11: dvfs: Add dvfs tables for display subsystem

Added dvfs tables for display, hdmi, dsi, and csi clocks.
Updated maximum limits accordingly.

Change-Id: I30e1660eb71562ecd545ebb3efcca441a27081cb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/125111
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>