Joshua Primero [Thu, 23 Aug 2012 23:34:34 +0000 (16:34 -0700)]
drivers: misc: therm_est: Refactored therm_est
1) Registered therm_est as a platform driver.
2) Driver now registers with linux thermal framework
on it's own.
3) Allow the driver to connect with one passive cooling
device
Alex Frid [Sat, 25 Aug 2012 23:28:10 +0000 (16:28 -0700)]
ARM: tegra11: dvfs: Enable CPU auto-dvfs
Change-Id: I072461d7718a8f672d2e44bbcb9738ddf9039b46 Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127374 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Alex Frid [Sat, 25 Aug 2012 23:26:57 +0000 (16:26 -0700)]
ARM: tegra11: clock: Increase cpu clock limits
Change-Id: Icc234a57c0f0369503a42551e6186e4c1424e62b Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127373 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Alex Frid [Sun, 26 Aug 2012 00:24:25 +0000 (17:24 -0700)]
ARM: tegra11: fuse: Add speedo interface stubs
Change-Id: I85616afc530f120e87d0b993dc9e08873dc9ccd1 Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127371 Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
Alex Frid [Sat, 25 Aug 2012 07:12:52 +0000 (00:12 -0700)]
ARM: tegra11: dvfs: Add frequency multiplier to cvb data
Added frequency multiplier to cvb dvfs data to make data entry
more flexible.
Change-Id: I505219497f8800d358f8933d62ac7b9b236ff07f Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127370 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Alex Frid [Sat, 25 Aug 2012 06:40:00 +0000 (23:40 -0700)]
ARM: tegra11: dvfs: Add cvb maximum voltage limit
Added maximum voltage entry to cvb data. It will be filled in based
on reliability data. This settings affect
(a) maximum cpu frequency in dfll clock source mode
(b) nominal (maximum) cpu voltage in pll clock source mode
In case (a) voltage is controlled automatically by CL-DVFS, and
cvb maximum voltage limit is applied implicitly by capping frequency
target. In case (b) voltage limit is explicitly checked by s/w legacy
DVFS. Depending on actual SoC data, this voltage boundary may prevent
reaching maximum dfll frequency in pll mode.
Change-Id: Ice7b0cd45302b8d29d2a40491701070b8cd74d3c Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127369 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
So far, maximum frequency and voltage for any clock domain match
each other in dvfs tables. However, on Tegra11 maximum cpu rate is
determined when dfll is used as cpu clock source. On the other hand,
nominal voltage is set for the case when cpu is running from pll,
since pll source requires higher than dfll voltage at the same
frequency. In addition nominal voltage is limited by reliability
requirements. Hence, it is possible that cpu nominal voltage and
maximum frequency will not match in dvfs table. Re-factored dvfs
initialization to be ready for such mismatch (although for now
matching is still in place).
Change-Id: I1402f6943635cbb201956255c66dc32e0b79425e Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127368 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Implemented enable and disable operations for PLLU secondary
outputs. Added 12MHz output.
Change-Id: I297623631ec5078d809494c0026f051650c12082 Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127319 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Tuomas Tynkkynen [Wed, 15 Aug 2012 14:54:38 +0000 (17:54 +0300)]
video: tegra: nvmap: fix handle usecount tracking
A handle's usecount used to be incremented once during the mmap ioctl,
and decremented when the mapping is closed by the kernel. However, that
fails if a mapping cloned, for example if the mapping was split due to
a munmap, or (presumably) during fork, as the decrement will then happen
for each cloned mapping.
Therefore increment the usecount when a mapping is opened.
Also fix a BUG_ON() that would have caught this bug, if it wouldn't
have done the check by checking if the unsigned usecount field is
less than zero.
Mark Zhang [Tue, 21 Aug 2012 05:20:35 +0000 (13:20 +0800)]
video: console: Enable framebuffer console
Framebuffer console init failed issue will be fixed by:
http://git-master/r/#change,107866
So we should enable framebuffer console now.
Bug 996992
Bug 941073
Change-Id: I6841248fad406f4a00055062691f5794145c030a Signed-off-by: Mark Zhang <markz@nvidia.com>
Reviewed-on: http://git-master/r/124805 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peer Chen <pchen@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Rhyland Klein <rklein@nvidia.com>
GVS: Gerrit_Virtual_Submit Reviewed-by: Allen Martin <amartin@nvidia.com>
Alex Frid [Fri, 24 Aug 2012 23:02:39 +0000 (16:02 -0700)]
asoc: tegra: utils: Set new base rates for Tegra11
Change-Id: I54ec21750a2f9bd65387c14d454d3f44e190b339 Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127318 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Terje Bergstrom [Thu, 23 Aug 2012 06:18:23 +0000 (09:18 +0300)]
video: tegra: host: Host1x tickcount
Add support for host1x tick counters. Adds under debugfs entries
that export the tickcount, which is global, and stallcount and
xfercount which are per channel counters.
Ken Adams [Thu, 17 May 2012 15:34:32 +0000 (11:34 -0400)]
video: tegra: host: add Tegra path to firmware
This change coalesces paths for nvhost devices which request firmware.
And it allows a path to be prefixed to them based upon nvhost's
runtime determintion of the chip/SOC.
Laxman Dewangan [Fri, 24 Aug 2012 10:40:14 +0000 (16:10 +0530)]
regulator: max77663: separate device info with instance info
Currently device instance info is share with device static
information. This avoid to use the multiple instance of device.
Separating device specific static information with instance
specific information.
Laxman Dewangan [Fri, 24 Aug 2012 09:58:36 +0000 (15:28 +0530)]
mfd: max77663: remove gpio support from core
GPIO driver support for MAX77663 is moved as separate driver
under gpio directory. Removing the code which support gpio
driver in core driver and register max77663-gpio driver as
mfd sub device.
Laxman Dewangan [Fri, 24 Aug 2012 09:21:26 +0000 (14:51 +0530)]
gpio: max77663: add gpio driver
Maxim PMIC MAX77663 supports 8 GPIOs. Providing
the access to GPIO through gpio driver.
The support is already in core driver but gpio
functionality should be provided through gpio driver
and keeping this in gpio directory.
This is inline with mfd driver implementation.
Laxman Dewangan [Fri, 24 Aug 2012 07:13:58 +0000 (12:43 +0530)]
regulator: core: Take supply regulator from init_data only
As EPROBE_DEFER is not supported in K3.4 and hence if supply
regulator is not found then regulator registration fails.
Setting the supply regulator only from init_data in place of
providing it through desc.
Alex Frid [Fri, 24 Aug 2012 03:01:09 +0000 (20:01 -0700)]
ARM: tegra11: clock: Update pll set rate operation
Modified set out-of-table-rate operation to guarantee that vco
minimum limit is not violated in this case as well (this procedure
applied to PLLD/D2, PLLU, and PLLA, although the latter plls are not
expected to run at out-of-table rates ever).
According to PLLD/D2 and PLLU specification update, increased CPCON
and LFCON values. Removed LFCON dependency on feedback divider range.
Alex Frid [Fri, 24 Aug 2012 01:00:34 +0000 (18:00 -0700)]
ARM: tegra11: clock: Update PLLA configuration
Changed PLLA configuration tables in order to
- lower vco below maximum divider input at Vmin - 408MHz - when
9.6MHz reference frequency is used
- increase vco above minimum - 200MHz - when 28.8MHz reference
frequency is used.
Updated curacao clock initialization accordingly.
Change-Id: Ic333be296d16761c5c3ea39e09ba7ab1ea4124e8 Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/127092 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com>
Bob Johnston [Thu, 23 Aug 2012 19:40:29 +0000 (15:40 -0400)]
keyboard: tegra-kbc: Fix build for p1852
tegra_kbc_set_keypress_interrupt was defined but not used
in the non CONFIG_PM_SLEEP config. This failed the build.
Changing to defining function for CONFIG_PM_SLEEP only.
Sivaram Nair [Wed, 22 Aug 2012 07:13:48 +0000 (10:13 +0300)]
pm: EDP: Add governor framework
This patch introduces the governor framework into EDP. Governor will
handle all request related processing including issuing of notifications
and throttling.
A single governor can be used by multiple managers.
[perf] The runnable threads governor only looks at the average number of
runnables in the system to make a decision when bringing cores
offline/online. First pass; tweaks thresholds and delays to reduce
decision latency to about ~50-70ms per core (from ~100-150ms per core)
Mark Zhang [Fri, 17 Aug 2012 05:31:37 +0000 (13:31 +0800)]
video: tegra: dc: Make framebuffer console init OK
Update framebuffer's modelist after we changed it's fb_var_screeninfo.
This makes sure the framebuffer console can be inited successfully.
During framebuffer console init, it'll check whether the var info of
the framebuffer is consistent with the modelist.
Unsuccessful init of framebuffer console driver makes VT driver
doesn't work in right way.
Bug 996992
Signed-off-by: Mark Zhang <markz@nvidia.com>
Change-Id: I96a1db1f389be75dcba48b20447cf1510ad3768b
Reviewed-on: http://git-master/r/107866 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tuomas Tynkkynen [Fri, 17 Aug 2012 08:37:02 +0000 (11:37 +0300)]
ARM: tegra: iovmm: Fix spinlock bug if alloc fails
iovmm_split_free_block leaves the domain's spinlock unlocked if a
memory allocation failed. Unfortunately, all the callers of that
function assume that it takes the spinlock. This will then lead to
double unlocking of the spinlock.
Laxman Dewangan [Thu, 23 Aug 2012 08:10:58 +0000 (13:40 +0530)]
power: tps65090-charger: fix multiple issue
Some changes:
- Correct platform data struture name and get correct platform data.
- Make remove function to __devexit.
- Correct license to GPL v2
- Add error print when failure occurs.
- remove unnecessary tabs.
Laxman Dewangan [Thu, 23 Aug 2012 07:22:35 +0000 (12:52 +0530)]
power: tps65090-charger: fix compilation error
The driver is missing the include of interrupt header file.
Including it to fix compilation error.
Also it is not suggested to use the devm_request_threaded_irq() as
it is not safe when removing driver. converting it to non-devm version
of API.
Laxman Dewangan [Thu, 23 Aug 2012 07:20:31 +0000 (12:50 +0530)]
regulator: tps65090: fix compilation error
The driver is pulled from the K3.1 kernel and when compiling
for K3.4 it is failing because the regulator_register() have more
number of argument.
Fixing the compilation error.
Enable cpuquiet by default if autohotplug is enabled. Cpuquiet will now
replace autohotplug as the hotplugging infrastructure. The down_delay in
the balanced governor has also been increased to 2s from 500ms to match
a similar patch for autohotplug.
Terje Bergstrom [Tue, 14 Aug 2012 07:42:50 +0000 (10:42 +0300)]
video: tegra: host: Abstract actmon support
Abstract actmon support behind chip_support. This will make the
actmon code adhere to the correct register layout.
Initialization of actmon now happens from gr3d driver. This allows
initializing and deinitializing actmon when gr3d is power gated. The
consequence is that the avg value must be readable even when there
are no channels open to gr3d.
Stephen Warren [Wed, 4 Apr 2012 15:27:46 +0000 (09:27 -0600)]
dt: add property iteration helpers
This patch adds macros of_property_for_each_u32() and
of_property_for_each_string(), which iterate over an array of values
within a device-tree property. Usage is for example:
Code Review / linux-2.6.git / log