Blackfin arch: smp patch cleanup from LKML review
Graf Yang [Wed, 7 Jan 2009 15:14:39 +0000 (23:14 +0800)]
1. Use inline get_l1_... functions instead of macro
2. Fix compile issue about smp barrier functions

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

17 files changed:
arch/blackfin/include/asm/mem_map.h
arch/blackfin/include/asm/smp.h
arch/blackfin/include/asm/system.h
arch/blackfin/kernel/bfin_ksyms.c
arch/blackfin/kernel/cplb-mpu/cplbinit.c
arch/blackfin/kernel/cplb-nompu/cplbinit.c
arch/blackfin/kernel/process.c
arch/blackfin/kernel/ptrace.c
arch/blackfin/mach-bf518/include/mach/mem_map.h
arch/blackfin/mach-bf527/include/mach/mem_map.h
arch/blackfin/mach-bf533/include/mach/mem_map.h
arch/blackfin/mach-bf537/include/mach/mem_map.h
arch/blackfin/mach-bf538/include/mach/mem_map.h
arch/blackfin/mach-bf548/include/mach/mem_map.h
arch/blackfin/mach-bf561/include/mach/mem_map.h
arch/blackfin/mach-bf561/smp.c
arch/blackfin/mm/sram-alloc.c

index 88d04a7..e92b310 100644 (file)
@@ -9,4 +9,79 @@
 
 #include <mach/mem_map.h>
 
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_SMP
+static inline ulong get_l1_scratch_start_cpu(int cpu)
+{
+       return (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;
+}
+static inline ulong get_l1_code_start_cpu(int cpu)
+{
+       return (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START;
+}
+static inline ulong get_l1_data_a_start_cpu(int cpu)
+{
+       return (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;
+}
+static inline ulong get_l1_data_b_start_cpu(int cpu)
+{
+       return (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;
+}
+
+static inline ulong get_l1_scratch_start(void)
+{
+       return get_l1_scratch_start_cpu(blackfin_core_id());
+}
+static inline ulong get_l1_code_start(void)
+{
+       return get_l1_code_start_cpu(blackfin_core_id());
+}
+static inline ulong get_l1_data_a_start(void)
+{
+       return get_l1_data_a_start_cpu(blackfin_core_id());
+}
+static inline ulong get_l1_data_b_start(void)
+{
+       return get_l1_data_b_start_cpu(blackfin_core_id());
+}
+
+#else /* !CONFIG_SMP */
+
+static inline ulong get_l1_scratch_start_cpu(int cpu)
+{
+       return L1_SCRATCH_START;
+}
+static inline ulong get_l1_code_start_cpu(int cpu)
+{
+       return L1_CODE_START;
+}
+static inline ulong get_l1_data_a_start_cpu(int cpu)
+{
+       return L1_DATA_A_START;
+}
+static inline ulong get_l1_data_b_start_cpu(int cpu)
+{
+       return L1_DATA_B_START;
+}
+static inline ulong get_l1_scratch_start(void)
+{
+       return get_l1_scratch_start_cpu(0);
+}
+static inline ulong get_l1_code_start(void)
+{
+       return  get_l1_code_start_cpu(0);
+}
+static inline ulong get_l1_data_a_start(void)
+{
+       return get_l1_data_a_start_cpu(0);
+}
+static inline ulong get_l1_data_b_start(void)
+{
+       return get_l1_data_b_start_cpu(0);
+}
+
+#endif /* CONFIG_SMP */
+#endif /* __ASSEMBLY__ */
+
 #endif                         /* _MEM_MAP_H_ */
index 233cb8c..118deee 100644 (file)
@@ -32,6 +32,8 @@
 
 #define raw_smp_processor_id()  blackfin_core_id()
 
+extern char coreb_trampoline_start, coreb_trampoline_end;
+
 struct corelock_slot {
        int lock;
 };
index e8bcfa4..dea9203 100644 (file)
@@ -66,10 +66,13 @@ asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
 # define smp_mb()      do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
 # define smp_rmb()     do { barrier(); smp_check_barrier(); } while (0)
 # define smp_wmb()     do { barrier(); smp_mark_barrier(); } while (0)
+#define smp_read_barrier_depends()     do { barrier(); smp_check_barrier(); } while (0)
+
 #else
 # define smp_mb()      barrier()
 # define smp_rmb()     barrier()
 # define smp_wmb()     barrier()
+#define smp_read_barrier_depends()     barrier()
 #endif
 
 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
@@ -120,8 +123,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
        ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
                (unsigned long)(n), sizeof(*(ptr))))
 
-#define smp_read_barrier_depends()     smp_check_barrier()
-
 #else /* !CONFIG_SMP */
 
 #define smp_mb()       barrier()
@@ -192,6 +193,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
  */
 
 #include <asm/l1layout.h>
+#include <asm/mem_map.h>
 
 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
 
index 763c315..01f917d 100644 (file)
@@ -99,6 +99,8 @@ EXPORT_SYMBOL(__raw_bit_test_set_asm);
 EXPORT_SYMBOL(__raw_bit_test_clear_asm);
 EXPORT_SYMBOL(__raw_bit_test_toggle_asm);
 EXPORT_SYMBOL(__raw_uncached_fetch_asm);
+#ifdef __ARCH_SYNC_CORE_DCACHE
 EXPORT_SYMBOL(__raw_smp_mark_barrier_asm);
 EXPORT_SYMBOL(__raw_smp_check_barrier_asm);
 #endif
+#endif
index 269d2a3..1ea7c18 100644 (file)
@@ -25,6 +25,7 @@
 #include <asm/blackfin.h>
 #include <asm/cplb.h>
 #include <asm/cplbinit.h>
+#include <asm/mem_map.h>
 
 #if ANOMALY_05000263
 # error the MPU will not function safely while Anomaly 05000263 applies
index 735413d..4c010ba 100644 (file)
@@ -27,6 +27,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cplb.h>
 #include <asm/cplbinit.h>
+#include <asm/mem_map.h>
 
 u_long icplb_tables[NR_CPUS][CPLB_TBL_ENTRIES+1];
 u_long dcplb_tables[NR_CPUS][CPLB_TBL_ENTRIES+1];
index 4359ea2..1ec0faa 100644 (file)
@@ -39,6 +39,7 @@
 
 #include <asm/blackfin.h>
 #include <asm/fixed_code.h>
+#include <asm/mem_map.h>
 
 asmlinkage void ret_from_fork(void);
 
index d5e6be2..d2d3885 100644 (file)
@@ -45,6 +45,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/dma.h>
 #include <asm/fixed_code.h>
+#include <asm/mem_map.h>
 
 #define TEXT_OFFSET 0
 /*
index ac95d33..62bcc78 100644 (file)
 #define L1_SCRATCH_START       0xFFB00000
 #define L1_SCRATCH_LENGTH      0x1000
 
-#define get_l1_scratch_start_cpu(cpu)          L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)             L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)           L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)           L1_DATA_B_START
-#define get_l1_scratch_start()                 L1_SCRATCH_START
-#define get_l1_code_start()                    L1_CODE_START
-#define get_l1_data_a_start()                  L1_DATA_A_START
-#define get_l1_data_b_start()                  L1_DATA_B_START
-
 #define GET_PDA_SAFE(preg)             \
        preg.l = _cpu_pda;              \
        preg.h = _cpu_pda;
index bd7fe0f..019e001 100644 (file)
 #define L1_SCRATCH_START       0xFFB00000
 #define L1_SCRATCH_LENGTH      0x1000
 
-#define get_l1_scratch_start_cpu(cpu)          L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)             L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)           L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)           L1_DATA_B_START
-#define get_l1_scratch_start()                 L1_SCRATCH_START
-#define get_l1_code_start()                    L1_CODE_START
-#define get_l1_data_a_start()                  L1_DATA_A_START
-#define get_l1_data_b_start()                  L1_DATA_B_START
-
 #define GET_PDA_SAFE(preg)             \
        preg.l = _cpu_pda;              \
        preg.h = _cpu_pda;
index d5eaef2..fc33b7c 100644 (file)
 #define L1_SCRATCH_START       0xFFB00000
 #define L1_SCRATCH_LENGTH      0x1000
 
-#define get_l1_scratch_start_cpu(cpu)          L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)             L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)           L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)           L1_DATA_B_START
-#define get_l1_scratch_start()                 L1_SCRATCH_START
-#define get_l1_code_start()                    L1_CODE_START
-#define get_l1_data_a_start()                  L1_DATA_A_START
-#define get_l1_data_b_start()                  L1_DATA_B_START
-
 #define GET_PDA_SAFE(preg)             \
        preg.l = _cpu_pda;              \
        preg.h = _cpu_pda;
index be4de76..f9010c4 100644 (file)
 #define L1_SCRATCH_START       0xFFB00000
 #define L1_SCRATCH_LENGTH      0x1000
 
-#define get_l1_scratch_start_cpu(cpu)          L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)             L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)           L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)           L1_DATA_B_START
-#define get_l1_scratch_start()                 L1_SCRATCH_START
-#define get_l1_code_start()                    L1_CODE_START
-#define get_l1_data_a_start()                  L1_DATA_A_START
-#define get_l1_data_b_start()                  L1_DATA_B_START
-
 #define GET_PDA_SAFE(preg)             \
        preg.l = _cpu_pda;              \
        preg.h = _cpu_pda;
index c134057..7681196 100644 (file)
 #define L1_SCRATCH_START       0xFFB00000
 #define L1_SCRATCH_LENGTH      0x1000
 
-#define get_l1_scratch_start_cpu(cpu)          L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)             L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)           L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)           L1_DATA_B_START
-#define get_l1_scratch_start()                 L1_SCRATCH_START
-#define get_l1_code_start()                    L1_CODE_START
-#define get_l1_data_a_start()                  L1_DATA_A_START
-#define get_l1_data_b_start()                  L1_DATA_B_START
-
 #define GET_PDA_SAFE(preg)             \
        preg.l = _cpu_pda;              \
        preg.h = _cpu_pda;
index 361eb0e..70b9c11 100644 (file)
 #define L1_SCRATCH_START       0xFFB00000
 #define L1_SCRATCH_LENGTH      0x1000
 
-#define get_l1_scratch_start_cpu(cpu)          L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)             L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)           L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)           L1_DATA_B_START
-#define get_l1_scratch_start()                 L1_SCRATCH_START
-#define get_l1_code_start()                    L1_CODE_START
-#define get_l1_data_a_start()                  L1_DATA_A_START
-#define get_l1_data_b_start()                  L1_DATA_B_START
-
 #define GET_PDA_SAFE(preg)             \
        preg.l = _cpu_pda;              \
        preg.h = _cpu_pda;
index 488c3bd..419dffd 100644 (file)
 #define L1_SCRATCH_START       COREA_L1_SCRATCH_START
 #define L1_SCRATCH_LENGTH      0x1000
 
-#ifndef __ASSEMBLY__
-
-#ifdef CONFIG_SMP
-
-#define get_l1_scratch_start_cpu(cpu)                          \
-       ({ unsigned long __addr;                                \
-          __addr = (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;\
-          __addr; })
-
-#define get_l1_code_start_cpu(cpu)                             \
-       ({ unsigned long __addr;                                \
-          __addr = (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START;  \
-          __addr; })
-
-#define get_l1_data_a_start_cpu(cpu)                           \
-       ({ unsigned long __addr;                                \
-          __addr = (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;\
-          __addr; })
-
-#define get_l1_data_b_start_cpu(cpu)                           \
-       ({ unsigned long __addr;                                \
-          __addr = (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;\
-          __addr; })
-
-#define get_l1_scratch_start() get_l1_scratch_start_cpu(blackfin_core_id())
-#define get_l1_code_start()    get_l1_code_start_cpu(blackfin_core_id())
-#define get_l1_data_a_start()  get_l1_data_a_start_cpu(blackfin_core_id())
-#define get_l1_data_b_start()  get_l1_data_b_start_cpu(blackfin_core_id())
-
-#else /* !CONFIG_SMP */
-#define get_l1_scratch_start_cpu(cpu)  L1_SCRATCH_START
-#define get_l1_code_start_cpu(cpu)     L1_CODE_START
-#define get_l1_data_a_start_cpu(cpu)   L1_DATA_A_START
-#define get_l1_data_b_start_cpu(cpu)   L1_DATA_B_START
-#define get_l1_scratch_start()         L1_SCRATCH_START
-#define get_l1_code_start()            L1_CODE_START
-#define get_l1_data_a_start()          L1_DATA_A_START
-#define get_l1_data_b_start()          L1_DATA_B_START
-#endif /* !CONFIG_SMP */
-
-#else /* __ASSEMBLY__ */
+#ifdef __ASSEMBLY__
 
 /*
  * The following macros both return the address of the PDA for the
index 23fd4c1..9b27e69 100644 (file)
 #include <asm/smp.h>
 #include <asm/dma.h>
 
-#define COREB_SRAM_BASE  0xff600000
-#define COREB_SRAM_SIZE  0x4000
-
-extern char coreb_trampoline_start, coreb_trampoline_end;
-
 static DEFINE_SPINLOCK(boot_lock);
 
 static cpumask_t cpu_callin_map;
@@ -54,15 +49,15 @@ void __init platform_prepare_cpus(unsigned int max_cpus)
        int len;
 
        len = &coreb_trampoline_end - &coreb_trampoline_start + 1;
-       BUG_ON(len > COREB_SRAM_SIZE);
+       BUG_ON(len > L1_CODE_LENGTH);
 
-       dma_memcpy((void *)COREB_SRAM_BASE, &coreb_trampoline_start, len);
+       dma_memcpy((void *)COREB_L1_CODE_START, &coreb_trampoline_start, len);
 
        /* Both cores ought to be present on a bf561! */
        cpu_set(0, cpu_present_map); /* CoreA */
        cpu_set(1, cpu_present_map); /* CoreB */
 
-       printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_SRAM_BASE);
+       printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_L1_CODE_START);
 }
 
 int __init setup_profiling_timer(unsigned int multiplier) /* not supported */
index 1ca5deb..834cab7 100644 (file)
@@ -39,6 +39,7 @@
 #include <linux/spinlock.h>
 #include <linux/rtc.h>
 #include <asm/blackfin.h>
+#include <asm/mem_map.h>
 #include "blackfin_sram.h"
 
 static DEFINE_PER_CPU(spinlock_t, l1sram_lock) ____cacheline_aligned_in_smp;