sh: Use clk_always_enable() on sh7343 / SE77343
Magnus Damm [Thu, 17 Jul 2008 10:18:24 +0000 (19:18 +0900)]
Use clk_always_enable() on the sh7343 processor and in the board code
for Solution Engine 7343. Remove duplicate MSTPCR register definitions.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

arch/sh/boards/se/7343/setup.c
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
include/asm-sh/se7343.h

index 59d8d94..8ae718d 100644 (file)
@@ -114,10 +114,6 @@ static void __init sh7343se_setup(char **cmdline_p)
 {
        ctrl_outw(0xf900, FPGA_OUT);    /* FPGA */
 
-       ctrl_outl(0x00001001, MSTPCR0);
-       ctrl_outl(0x00000000, MSTPCR1);
-       ctrl_outl(0xffffbfC0, MSTPCR2); /* LCDC, BEU, CEU, VEU, KEYSC */
-
        ctrl_outw(0x0002, PORT_PECR);   /* PORT E 1 = IRQ5 */
        ctrl_outw(0x0020, PORT_PSELD);
 
index 79ce34e..78881b4 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <asm/clock.h>
 
 static struct resource iic0_resources[] = {
        [0] = {
@@ -138,8 +139,22 @@ static struct platform_device *sh7343_devices[] __initdata = {
 
 static int __init sh7343_devices_setup(void)
 {
+       clk_always_enable("mstp031"); /* TLB */
+       clk_always_enable("mstp030"); /* IC */
+       clk_always_enable("mstp029"); /* OC */
+       clk_always_enable("mstp028"); /* URAM */
+       clk_always_enable("mstp026"); /* XYMEM */
+       clk_always_enable("mstp023"); /* INTC3 */
+       clk_always_enable("mstp022"); /* INTC */
+       clk_always_enable("mstp020"); /* SuperHyway */
+       clk_always_enable("mstp109"); /* I2C0 */
+       clk_always_enable("mstp108"); /* I2C1 */
+       clk_always_enable("mstp202"); /* VEU */
+       clk_always_enable("mstp201"); /* VPU */
+
        platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
        platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
+
        return platform_add_devices(sh7343_devices,
                                    ARRAY_SIZE(sh7343_devices));
 }
index 8d2af77..9845846 100644 (file)
 #define PORT_PWDR      0xA4050166
 #define PORT_PYDR      0xA4050168
 
-#define MSTPCR0                0xA4150030
-#define MSTPCR1                0xA4150034
-#define MSTPCR2                0xA4150038
-
 #define FPGA_IN                0xb1400000
 #define FPGA_OUT       0xb1400002