Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Linus Torvalds [Thu, 29 Jun 2006 20:44:45 +0000 (13:44 -0700)]
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (33 commits)
  [MIPS] Add missing backslashes to macro definitions.
  [MIPS] Death list of board support to be removed after 2.6.18.
  [MIPS] Remove BSD and Sys V compat data types.
  [MIPS] ioc3.h: Uses u8, so include <linux/types.h>.
  [MIPS] 74K: Assume it will also have an AR bit in config7
  [MIPS] Treat CPUs with AR bit as physically indexed.
  [MIPS] Oprofile: Support VSMP on 34K.
  [MIPS] MIPS32/MIPS64 S-cache fix and cleanup
  [MIPS] excite: PCI makefile needs to use += if it wants a chance to work.
  [MIPS] excite: plat_setup -> plat_mem_setup.
  [MIPS] au1xxx: export dbdma functions
  [MIPS] au1xxx: dbdma, no sleeping under spin_lock
  [MIPS] au1xxx: fix PSC_SMBTXRX_RSR.
  [MIPS] Early printk for IP27.
  [MIPS] Fix handling of 0 length I & D caches.
  [MIPS] Typo fixes.
  [MIPS] MIPS32/MIPS64 secondary cache management
  [MIPS] Fix FIXADDR_TOP for TX39/TX49.
  [MIPS] Remove first timer interrupt setup in wrppmc_timer_setup()
  [MIPS] Fix configuration of R2 CPU features and multithreading.
  ...

527 files changed:
CREDITS
Documentation/DocBook/Makefile
Documentation/DocBook/genericirq.tmpl [new file with mode: 0644]
Documentation/IRQ.txt [new file with mode: 0644]
Documentation/kernel-parameters.txt
Documentation/keys-request-key.txt
Documentation/keys.txt
Documentation/sound/alsa/ALSA-Configuration.txt
arch/alpha/kernel/irq.c
arch/alpha/kernel/irq_alpha.c
arch/alpha/kernel/irq_i8259.c
arch/alpha/kernel/irq_pyxis.c
arch/alpha/kernel/irq_srm.c
arch/alpha/kernel/pci.c
arch/alpha/kernel/sys_alcor.c
arch/alpha/kernel/sys_cabriolet.c
arch/alpha/kernel/sys_dp264.c
arch/alpha/kernel/sys_eb64p.c
arch/alpha/kernel/sys_eiger.c
arch/alpha/kernel/sys_jensen.c
arch/alpha/kernel/sys_marvel.c
arch/alpha/kernel/sys_mikasa.c
arch/alpha/kernel/sys_noritake.c
arch/alpha/kernel/sys_rawhide.c
arch/alpha/kernel/sys_rx164.c
arch/alpha/kernel/sys_sable.c
arch/alpha/kernel/sys_takara.c
arch/alpha/kernel/sys_titan.c
arch/alpha/kernel/sys_wildfire.c
arch/arm/kernel/bios32.c
arch/arm/kernel/setup.c
arch/cris/Kconfig
arch/cris/arch-v10/kernel/irq.c
arch/cris/arch-v32/drivers/pci/bios.c
arch/cris/arch-v32/kernel/irq.c
arch/cris/kernel/irq.c
arch/frv/mb93090-mb00/pci-frv.c
arch/i386/Kconfig
arch/i386/kernel/efi.c
arch/i386/kernel/i8259.c
arch/i386/kernel/io_apic.c
arch/i386/kernel/irq.c
arch/i386/kernel/setup.c
arch/i386/mach-visws/setup.c
arch/i386/mach-visws/visws_apic.c
arch/i386/mach-voyager/voyager_smp.c
arch/i386/pci/i386.c
arch/ia64/Kconfig
arch/ia64/hp/sim/hpsim_irq.c
arch/ia64/kernel/iosapic.c
arch/ia64/kernel/irq.c
arch/ia64/kernel/irq_ia64.c
arch/ia64/kernel/irq_lsapic.c
arch/ia64/kernel/mca.c
arch/ia64/kernel/perfmon.c
arch/ia64/kernel/smpboot.c
arch/ia64/pci/pci.c
arch/ia64/sn/kernel/irq.c
arch/m32r/kernel/irq.c
arch/m32r/kernel/setup_m32104ut.c
arch/m32r/kernel/setup_m32700ut.c
arch/m32r/kernel/setup_mappi.c
arch/m32r/kernel/setup_mappi2.c
arch/m32r/kernel/setup_mappi3.c
arch/m32r/kernel/setup_oaks32r.c
arch/m32r/kernel/setup_opsput.c
arch/m32r/kernel/setup_usrv.c
arch/m68knommu/kernel/comempci.c
arch/mips/Kconfig
arch/mips/au1000/common/irq.c
arch/mips/au1000/pb1200/irqmap.c
arch/mips/ddb5xxx/ddb5477/irq_5477.c
arch/mips/dec/ioasic-irq.c
arch/mips/dec/kn02-irq.c
arch/mips/gt64120/ev64120/irq.c
arch/mips/ite-boards/generic/irq.c
arch/mips/jazz/irq.c
arch/mips/jmr3927/rbhma3100/irq.c
arch/mips/kernel/i8259.c
arch/mips/kernel/irq-msc01.c
arch/mips/kernel/irq-mv6434x.c
arch/mips/kernel/irq-rm7000.c
arch/mips/kernel/irq-rm9000.c
arch/mips/kernel/irq.c
arch/mips/kernel/irq_cpu.c
arch/mips/lasat/interrupt.c
arch/mips/mips-boards/atlas/atlas_int.c
arch/mips/momentum/ocelot_c/cpci-irq.c
arch/mips/momentum/ocelot_c/uart-irq.c
arch/mips/pci/pci.c
arch/mips/philips/pnx8550/common/int.c
arch/mips/pmc-sierra/yosemite/ht.c
arch/mips/sgi-ip22/ip22-eisa.c
arch/mips/sgi-ip22/ip22-int.c
arch/mips/sgi-ip27/ip27-irq.c
arch/mips/sgi-ip32/ip32-irq.c
arch/mips/sibyte/bcm1480/irq.c
arch/mips/sibyte/sb1250/irq.c
arch/mips/sni/irq.c
arch/mips/tx4927/common/tx4927_irq.c
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
arch/mips/tx4938/common/irq.c
arch/mips/tx4938/toshiba_rbtx4938/irq.c
arch/mips/vr41xx/common/icu.c
arch/mips/vr41xx/common/irq.c
arch/mips/vr41xx/common/vrc4173.c
arch/mips/vr41xx/nec-cmbvr4133/irq.c
arch/parisc/Kconfig
arch/parisc/kernel/cache.c
arch/parisc/kernel/entry.S
arch/parisc/kernel/firmware.c
arch/parisc/kernel/irq.c
arch/parisc/kernel/module.c
arch/parisc/kernel/pci.c
arch/parisc/kernel/pdc_chassis.c
arch/parisc/kernel/ptrace.c
arch/parisc/kernel/real2.S
arch/parisc/kernel/setup.c
arch/parisc/kernel/signal.c
arch/parisc/kernel/syscall.S
arch/parisc/kernel/time.c
arch/parisc/kernel/traps.c
arch/parisc/kernel/unaligned.c
arch/powerpc/Kconfig
arch/powerpc/Kconfig.debug
arch/powerpc/configs/cell_defconfig
arch/powerpc/configs/mpc7448_hpc2_defconfig [new file with mode: 0644]
arch/powerpc/kernel/Makefile
arch/powerpc/kernel/cpu_setup_power4.S
arch/powerpc/kernel/cputable.c
arch/powerpc/kernel/crash.c
arch/powerpc/kernel/head_64.S
arch/powerpc/kernel/iommu.c
arch/powerpc/kernel/irq.c
arch/powerpc/kernel/legacy_serial.c
arch/powerpc/kernel/lparcfg.c
arch/powerpc/kernel/machine_kexec_64.c
arch/powerpc/kernel/misc.S [new file with mode: 0644]
arch/powerpc/kernel/misc_32.S
arch/powerpc/kernel/misc_64.S
arch/powerpc/kernel/paca.c
arch/powerpc/kernel/pci_32.c
arch/powerpc/kernel/pci_64.c
arch/powerpc/kernel/prom.c
arch/powerpc/kernel/rtas.c
arch/powerpc/kernel/setup_64.c
arch/powerpc/kernel/traps.c
arch/powerpc/kernel/udbg.c
arch/powerpc/mm/hash_native_64.c
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/mmu_context_64.c
arch/powerpc/platforms/83xx/pci.c
arch/powerpc/platforms/85xx/pci.c
arch/powerpc/platforms/86xx/Kconfig
arch/powerpc/platforms/86xx/Makefile
arch/powerpc/platforms/86xx/mpc8641_hpcn.h
arch/powerpc/platforms/86xx/mpc86xx.h
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
arch/powerpc/platforms/86xx/mpc86xx_smp.c
arch/powerpc/platforms/86xx/pci.c
arch/powerpc/platforms/Makefile
arch/powerpc/platforms/cell/Kconfig
arch/powerpc/platforms/cell/interrupt.c
arch/powerpc/platforms/cell/setup.c
arch/powerpc/platforms/cell/spider-pic.c
arch/powerpc/platforms/cell/spu_base.c
arch/powerpc/platforms/cell/spufs/file.c
arch/powerpc/platforms/cell/spufs/switch.c
arch/powerpc/platforms/chrp/pci.c
arch/powerpc/platforms/embedded6xx/Kconfig
arch/powerpc/platforms/embedded6xx/Makefile [new file with mode: 0644]
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c [new file with mode: 0644]
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h [new file with mode: 0644]
arch/powerpc/platforms/iseries/dt.c
arch/powerpc/platforms/iseries/htab.c
arch/powerpc/platforms/iseries/irq.c
arch/powerpc/platforms/iseries/lpevents.c
arch/powerpc/platforms/iseries/proc.c
arch/powerpc/platforms/iseries/setup.c
arch/powerpc/platforms/maple/pci.c
arch/powerpc/platforms/maple/setup.c
arch/powerpc/platforms/powermac/pci.c
arch/powerpc/platforms/powermac/pic.c
arch/powerpc/platforms/powermac/setup.c
arch/powerpc/platforms/pseries/iommu.c
arch/powerpc/platforms/pseries/lpar.c
arch/powerpc/platforms/pseries/setup.c
arch/powerpc/platforms/pseries/xics.c
arch/powerpc/sysdev/Makefile
arch/powerpc/sysdev/dart.h
arch/powerpc/sysdev/dart_iommu.c
arch/powerpc/sysdev/i8259.c
arch/powerpc/sysdev/ipic.c
arch/powerpc/sysdev/mpic.c
arch/powerpc/sysdev/todc.c [new file with mode: 0644]
arch/powerpc/sysdev/tsi108_dev.c [new file with mode: 0644]
arch/powerpc/sysdev/tsi108_pci.c [new file with mode: 0644]
arch/ppc/8xx_io/commproc.c
arch/ppc/Kconfig
arch/ppc/kernel/pci.c
arch/ppc/platforms/apus_setup.c
arch/ppc/platforms/sbc82xx.c
arch/ppc/syslib/cpc700_pic.c
arch/ppc/syslib/cpm2_pic.c
arch/ppc/syslib/gt64260_pic.c
arch/ppc/syslib/m82xx_pci.c
arch/ppc/syslib/m8xx_setup.c
arch/ppc/syslib/mpc52xx_pic.c
arch/ppc/syslib/mv64360_pic.c
arch/ppc/syslib/open_pic.c
arch/ppc/syslib/open_pic2.c
arch/ppc/syslib/ppc403_pic.c
arch/ppc/syslib/ppc4xx_pic.c
arch/ppc/syslib/xilinx_pic.c
arch/s390/appldata/appldata.h
arch/s390/appldata/appldata_base.c
arch/s390/appldata/appldata_mem.c
arch/s390/appldata/appldata_net_sum.c
arch/s390/appldata/appldata_os.c
arch/s390/kernel/binfmt_elf32.c
arch/s390/kernel/entry.S
arch/s390/kernel/entry64.S
arch/s390/kernel/head.S
arch/s390/kernel/head31.S
arch/s390/kernel/head64.S
arch/s390/kernel/s390_ksyms.c
arch/s390/kernel/setup.c
arch/s390/kernel/traps.c
arch/sh/Kconfig
arch/sh/boards/adx/irq_maskreg.c
arch/sh/boards/bigsur/irq.c
arch/sh/boards/cqreek/irq.c
arch/sh/boards/dreamcast/setup.c
arch/sh/boards/ec3104/setup.c
arch/sh/boards/harp/irq.c
arch/sh/boards/mpc1211/pci.c
arch/sh/boards/mpc1211/setup.c
arch/sh/boards/overdrive/galileo.c
arch/sh/boards/overdrive/irq.c
arch/sh/boards/renesas/hs7751rvoip/irq.c
arch/sh/boards/renesas/rts7751r2d/irq.c
arch/sh/boards/renesas/systemh/irq.c
arch/sh/boards/se/73180/irq.c
arch/sh/boards/superh/microdev/irq.c
arch/sh/cchips/hd6446x/hd64461/setup.c
arch/sh/cchips/hd6446x/hd64465/setup.c
arch/sh/cchips/voyagergx/irq.c
arch/sh/drivers/pci/pci.c
arch/sh/kernel/cpu/irq/imask.c
arch/sh/kernel/cpu/irq/intc2.c
arch/sh/kernel/cpu/irq/ipr.c
arch/sh/kernel/cpu/irq/pint.c
arch/sh/kernel/irq.c
arch/sh64/kernel/irq.c
arch/sh64/kernel/irq_intc.c
arch/sh64/kernel/pcibios.c
arch/sh64/mach-cayman/irq.c
arch/sparc/kernel/ioport.c
arch/sparc/kernel/pcic.c
arch/sparc/kernel/setup.c
arch/sparc64/kernel/irq.c
arch/sparc64/kernel/pci.c
arch/um/kernel/irq.c
arch/v850/kernel/irq.c
arch/v850/kernel/rte_mb_a_pci.c
arch/x86_64/Kconfig
arch/x86_64/kernel/i8259.c
arch/x86_64/kernel/io_apic.c
arch/x86_64/kernel/irq.c
arch/xtensa/kernel/irq.c
arch/xtensa/kernel/pci.c
drivers/amba/bus.c
drivers/atm/ambassador.c
drivers/atm/firestream.c
drivers/block/paride/pf.c
drivers/block/sx8.c
drivers/char/Kconfig
drivers/char/applicom.c
drivers/char/vr41xx_giu.c
drivers/ide/Kconfig
drivers/ide/pci/aec62xx.c
drivers/ide/pci/hpt34x.c
drivers/ide/pci/pdc202xx_new.c
drivers/ide/pci/pdc202xx_old.c
drivers/ide/ppc/pmac.c
drivers/ieee1394/ohci1394.c
drivers/infiniband/hw/ipath/ipath_driver.c
drivers/infiniband/hw/mthca/mthca_main.c
drivers/input/serio/ct82c710.c
drivers/isdn/hardware/avm/b1pcmcia.c
drivers/isdn/hisax/hfc_pci.c
drivers/isdn/hisax/sedlbauer_cs.c
drivers/isdn/hisax/teles3.c
drivers/isdn/hisax/telespci.c
drivers/isdn/i4l/isdn_common.c
drivers/isdn/i4l/isdn_x25iface.c
drivers/macintosh/Kconfig
drivers/macintosh/Makefile
drivers/macintosh/macio_asic.c
drivers/macintosh/via-pmu-led.c [new file with mode: 0644]
drivers/md/raid5.c
drivers/media/video/bt8xx/bttv-driver.c
drivers/media/video/cx88/cx88-alsa.c
drivers/media/video/cx88/cx88-core.c
drivers/media/video/cx88/cx88-mpeg.c
drivers/media/video/cx88/cx88-video.c
drivers/media/video/saa7134/saa7134-core.c
drivers/message/i2o/iop.c
drivers/mmc/mmci.c
drivers/mtd/devices/pmc551.c
drivers/mtd/maps/amd76xrom.c
drivers/mtd/maps/ichxrom.c
drivers/mtd/maps/scx200_docflash.c
drivers/mtd/maps/sun_uflash.c
drivers/net/3c59x.c
drivers/net/8139cp.c
drivers/net/8139too.c
drivers/net/e100.c
drivers/net/skge.c
drivers/net/sky2.c
drivers/net/tulip/de2104x.c
drivers/net/tulip/tulip_core.c
drivers/net/typhoon.c
drivers/net/wan/dscc4.c
drivers/net/wan/pc300_drv.c
drivers/parisc/Kconfig
drivers/parisc/dino.c
drivers/parisc/eisa.c
drivers/parisc/gsc.c
drivers/parisc/iosapic.c
drivers/parisc/pdc_stable.c
drivers/parisc/sba_iommu.c
drivers/parisc/superio.c
drivers/pci/bus.c
drivers/pci/hotplug/cpcihp_zt5550.c
drivers/pci/hotplug/cpqphp_core.c
drivers/pci/hotplug/pciehp_hpc.c
drivers/pci/hotplug/shpchp_sysfs.c
drivers/pci/msi.c
drivers/pci/pci-sysfs.c
drivers/pci/pci.c
drivers/pci/pci.h
drivers/pci/proc.c
drivers/pci/rom.c
drivers/pci/setup-bus.c
drivers/pci/setup-res.c
drivers/pcmcia/hd64465_ss.c
drivers/pcmcia/i82365.c
drivers/pcmcia/pd6729.c
drivers/pcmcia/rsrc_nonstatic.c
drivers/pcmcia/tcic.c
drivers/pnp/interface.c
drivers/pnp/manager.c
drivers/pnp/resource.c
drivers/s390/block/dasd.c
drivers/s390/block/dasd_3370_erp.c
drivers/s390/block/dasd_3990_erp.c
drivers/s390/block/dasd_9336_erp.c
drivers/s390/block/dasd_9343_erp.c
drivers/s390/block/dasd_devmap.c
drivers/s390/block/dasd_diag.c
drivers/s390/block/dasd_diag.h
drivers/s390/block/dasd_eckd.c
drivers/s390/block/dasd_eckd.h
drivers/s390/block/dasd_eer.c
drivers/s390/block/dasd_erp.c
drivers/s390/block/dasd_fba.c
drivers/s390/block/dasd_fba.h
drivers/s390/block/dasd_int.h
drivers/s390/block/dasd_ioctl.c
drivers/s390/char/raw3270.c
drivers/s390/cio/blacklist.c
drivers/s390/cio/ccwgroup.c
drivers/s390/cio/chsc.c
drivers/s390/cio/cmf.c
drivers/s390/cio/css.c
drivers/s390/cio/device.c
drivers/s390/cio/device.h
drivers/s390/cio/device_fsm.c
drivers/s390/cio/device_ops.c
drivers/s390/s390mach.c
drivers/scsi/sata_via.c
drivers/serial/8250_pci.c
drivers/sn/ioc4.c
drivers/usb/host/sl811-hcd.c
drivers/video/console/vgacon.c
drivers/video/sgivwfb.c
fs/ufs/inode.c
include/asm-alpha/hw_irq.h
include/asm-arm/mach/pci.h
include/asm-cris/hw_irq.h
include/asm-cris/irq.h
include/asm-i386/hw_irq.h
include/asm-i386/mach-visws/setup_arch.h
include/asm-ia64/hw_irq.h
include/asm-ia64/irq.h
include/asm-m32r/hw_irq.h
include/asm-mips/hw_irq.h
include/asm-parisc/assembly.h
include/asm-parisc/compat.h
include/asm-parisc/hw_irq.h
include/asm-parisc/irq.h
include/asm-parisc/pdc.h
include/asm-parisc/pgtable.h
include/asm-parisc/processor.h
include/asm-parisc/system.h
include/asm-parisc/uaccess.h
include/asm-parisc/unistd.h
include/asm-powerpc/cputable.h
include/asm-powerpc/hw_irq.h
include/asm-powerpc/irq.h
include/asm-powerpc/iseries/it_lp_queue.h
include/asm-powerpc/kdump.h
include/asm-powerpc/kexec.h
include/asm-powerpc/machdep.h
include/asm-powerpc/mmu.h
include/asm-powerpc/mmu_context.h
include/asm-powerpc/mpc86xx.h
include/asm-powerpc/pci.h
include/asm-powerpc/rtas.h
include/asm-powerpc/time.h
include/asm-powerpc/todc.h [new file with mode: 0644]
include/asm-powerpc/tsi108.h [new file with mode: 0644]
include/asm-powerpc/udbg.h
include/asm-ppc/pci.h
include/asm-s390/bitops.h
include/asm-s390/cio.h
include/asm-s390/cmb.h
include/asm-s390/dasd.h
include/asm-s390/thread_info.h
include/asm-s390/unistd.h
include/asm-sh/hw_irq.h
include/asm-sh64/hw_irq.h
include/asm-um/hw_irq.h
include/asm-v850/hw_irq.h
include/asm-x86_64/hw_irq.h
include/asm-xtensa/hw_irq.h
include/linux/interrupt.h
include/linux/ioport.h
include/linux/irq.h
include/linux/isdn/tpam.h [deleted file]
include/linux/key.h
include/linux/pci.h
include/linux/pnp.h
include/linux/types.h
include/sound/ac97_codec.h
include/sound/ak4xxx-adda.h
include/sound/initval.h
kernel/irq/Makefile
kernel/irq/autoprobe.c
kernel/irq/chip.c [new file with mode: 0644]
kernel/irq/handle.c
kernel/irq/internals.h
kernel/irq/manage.c
kernel/irq/migration.c
kernel/irq/proc.c
kernel/irq/resend.c [new file with mode: 0644]
kernel/irq/spurious.c
kernel/kexec.c
kernel/resource.c
mm/Kconfig
mm/filemap.c
mm/filemap.h
security/keys/internal.h
security/keys/keyctl.c
security/keys/request_key.c
sound/Makefile
sound/aoa/Kconfig
sound/aoa/core/snd-aoa-gpio-feature.c
sound/aoa/fabrics/snd-aoa-fabric-layout.c
sound/aoa/soundbus/Kconfig
sound/arm/aaci.c
sound/core/Kconfig
sound/core/seq/seq_ports.c
sound/drivers/mpu401/mpu401.c
sound/i2c/other/ak4xxx-adda.c
sound/isa/es18xx.c
sound/isa/gus/interwave.c
sound/isa/sb/sb16.c
sound/oss/Kconfig
sound/oss/forte.c
sound/pci/Kconfig
sound/pci/Makefile
sound/pci/ac97/ac97_patch.c
sound/pci/bt87x.c
sound/pci/echoaudio/Makefile [new file with mode: 0644]
sound/pci/echoaudio/darla20.c [new file with mode: 0644]
sound/pci/echoaudio/darla20_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/darla24.c [new file with mode: 0644]
sound/pci/echoaudio/darla24_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/echo3g.c [new file with mode: 0644]
sound/pci/echoaudio/echo3g_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/echoaudio.c [new file with mode: 0644]
sound/pci/echoaudio/echoaudio.h [new file with mode: 0644]
sound/pci/echoaudio/echoaudio_3g.c [new file with mode: 0644]
sound/pci/echoaudio/echoaudio_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/echoaudio_dsp.h [new file with mode: 0644]
sound/pci/echoaudio/echoaudio_gml.c [new file with mode: 0644]
sound/pci/echoaudio/gina20.c [new file with mode: 0644]
sound/pci/echoaudio/gina20_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/gina24.c [new file with mode: 0644]
sound/pci/echoaudio/gina24_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/indigo.c [new file with mode: 0644]
sound/pci/echoaudio/indigo_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/indigodj.c [new file with mode: 0644]
sound/pci/echoaudio/indigodj_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/indigoio.c [new file with mode: 0644]
sound/pci/echoaudio/indigoio_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/layla20.c [new file with mode: 0644]
sound/pci/echoaudio/layla20_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/layla24.c [new file with mode: 0644]
sound/pci/echoaudio/layla24_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/mia.c [new file with mode: 0644]
sound/pci/echoaudio/mia_dsp.c [new file with mode: 0644]
sound/pci/echoaudio/midi.c [new file with mode: 0644]
sound/pci/echoaudio/mona.c [new file with mode: 0644]
sound/pci/echoaudio/mona_dsp.c [new file with mode: 0644]
sound/pci/hda/hda_codec.c
sound/pci/hda/patch_analog.c
sound/pci/hda/patch_realtek.c
sound/pci/hda/patch_sigmatel.c
sound/pci/ice1712/revo.c
sound/pci/sonicvibes.c
sound/ppc/pmac.c
sound/sparc/cs4231.c
sound/sparc/dbri.c
sound/usb/usbaudio.c

diff --git a/CREDITS b/CREDITS
index 85c7c70..66b9e7a 100644 (file)
--- a/CREDITS
+++ b/CREDITS
@@ -3401,10 +3401,10 @@ S: Czech Republic
 
 N: Thibaut Varene
 E: T-Bone@parisc-linux.org
-W: http://www.parisc-linux.org/
+W: http://www.parisc-linux.org/~varenet/
 P: 1024D/B7D2F063 E67C 0D43 A75E 12A5 BB1C  FA2F 1E32 C3DA B7D2 F063
 D: PA-RISC port minion, PDC and GSCPS2 drivers, debuglocks and other bits
-D: Some bits in an ARM port, S1D13XXX FB driver, random patches here and there
+D: Some ARM at91rm9200 bits, S1D13XXX FB driver, random patches here and there
 D: AD1889 sound driver
 S: Paris, France
 
index 5a2882d..66e1cf7 100644 (file)
@@ -10,7 +10,8 @@ DOCBOOKS := wanbook.xml z8530book.xml mcabook.xml videobook.xml \
            kernel-hacking.xml kernel-locking.xml deviceiobook.xml \
            procfs-guide.xml writing_usb_driver.xml \
            kernel-api.xml journal-api.xml lsm.xml usb.xml \
-           gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml
+           gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml \
+           genericirq.xml
 
 ###
 # The build process is as follows (targets):
diff --git a/Documentation/DocBook/genericirq.tmpl b/Documentation/DocBook/genericirq.tmpl
new file mode 100644 (file)
index 0000000..0f4a4b6
--- /dev/null
@@ -0,0 +1,474 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
+       "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
+
+<book id="Generic-IRQ-Guide">
+ <bookinfo>
+  <title>Linux generic IRQ handling</title>
+
+  <authorgroup>
+   <author>
+    <firstname>Thomas</firstname>
+    <surname>Gleixner</surname>
+    <affiliation>
+     <address>
+      <email>tglx@linutronix.de</email>
+     </address>
+    </affiliation>
+   </author>
+   <author>
+    <firstname>Ingo</firstname>
+    <surname>Molnar</surname>
+    <affiliation>
+     <address>
+      <email>mingo@elte.hu</email>
+     </address>
+    </affiliation>
+   </author>
+  </authorgroup>
+
+  <copyright>
+   <year>2005-2006</year>
+   <holder>Thomas Gleixner</holder>
+  </copyright>
+  <copyright>
+   <year>2005-2006</year>
+   <holder>Ingo Molnar</holder>
+  </copyright>
+
+  <legalnotice>
+   <para>
+     This documentation is free software; you can redistribute
+     it and/or modify it under the terms of the GNU General Public
+     License version 2 as published by the Free Software Foundation.
+   </para>
+
+   <para>
+     This program is distributed in the hope that it will be
+     useful, but WITHOUT ANY WARRANTY; without even the implied
+     warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+     See the GNU General Public License for more details.
+   </para>
+
+   <para>
+     You should have received a copy of the GNU General Public
+     License along with this program; if not, write to the Free
+     Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+     MA 02111-1307 USA
+   </para>
+
+   <para>
+     For more details see the file COPYING in the source
+     distribution of Linux.
+   </para>
+  </legalnotice>
+ </bookinfo>
+
+<toc></toc>
+
+  <chapter id="intro">
+    <title>Introduction</title>
+    <para>
+       The generic interrupt handling layer is designed to provide a
+       complete abstraction of interrupt handling for device drivers.
+       It is able to handle all the different types of interrupt controller
+       hardware. Device drivers use generic API functions to request, enable,
+       disable and free interrupts. The drivers do not have to know anything
+       about interrupt hardware details, so they can be used on different
+       platforms without code changes.
+    </para>
+    <para>
+       This documentation is provided to developers who want to implement
+       an interrupt subsystem based for their architecture, with the help
+       of the generic IRQ handling layer.
+    </para>
+  </chapter>
+
+  <chapter id="rationale">
+    <title>Rationale</title>
+       <para>
+       The original implementation of interrupt handling in Linux is using
+       the __do_IRQ() super-handler, which is able to deal with every
+       type of interrupt logic.
+       </para>
+       <para>
+       Originally, Russell King identified different types of handlers to
+       build a quite universal set for the ARM interrupt handler
+       implementation in Linux 2.5/2.6. He distinguished between:
+       <itemizedlist>
+         <listitem><para>Level type</para></listitem>
+         <listitem><para>Edge type</para></listitem>
+         <listitem><para>Simple type</para></listitem>
+       </itemizedlist>
+       In the SMP world of the __do_IRQ() super-handler another type
+       was identified:
+       <itemizedlist>
+         <listitem><para>Per CPU type</para></listitem>
+       </itemizedlist>
+       </para>
+       <para>
+       This split implementation of highlevel IRQ handlers allows us to
+       optimize the flow of the interrupt handling for each specific
+       interrupt type. This reduces complexity in that particular codepath
+       and allows the optimized handling of a given type.
+       </para>
+       <para>
+       The original general IRQ implementation used hw_interrupt_type
+       structures and their ->ack(), ->end() [etc.] callbacks to
+       differentiate the flow control in the super-handler. This leads to
+       a mix of flow logic and lowlevel hardware logic, and it also leads
+       to unnecessary code duplication: for example in i386, there is a
+       ioapic_level_irq and a ioapic_edge_irq irq-type which share many
+       of the lowlevel details but have different flow handling.
+       </para>
+       <para>
+       A more natural abstraction is the clean separation of the
+       'irq flow' and the 'chip details'.
+       </para>
+       <para>
+       Analysing a couple of architecture's IRQ subsystem implementations
+       reveals that most of them can use a generic set of 'irq flow'
+       methods and only need to add the chip level specific code.
+       The separation is also valuable for (sub)architectures
+       which need specific quirks in the irq flow itself but not in the
+       chip-details - and thus provides a more transparent IRQ subsystem
+       design.
+       </para>
+       <para>
+       Each interrupt descriptor is assigned its own highlevel flow
+       handler, which is normally one of the generic
+       implementations. (This highlevel flow handler implementation also
+       makes it simple to provide demultiplexing handlers which can be
+       found in embedded platforms on various architectures.)
+       </para>
+       <para>
+       The separation makes the generic interrupt handling layer more
+       flexible and extensible. For example, an (sub)architecture can
+       use a generic irq-flow implementation for 'level type' interrupts
+       and add a (sub)architecture specific 'edge type' implementation.
+       </para>
+       <para>
+       To make the transition to the new model easier and prevent the
+       breakage of existing implementations, the __do_IRQ() super-handler
+       is still available. This leads to a kind of duality for the time
+       being. Over time the new model should be used in more and more
+       architectures, as it enables smaller and cleaner IRQ subsystems.
+       </para>
+  </chapter>
+  <chapter id="bugs">
+    <title>Known Bugs And Assumptions</title>
+    <para>
+       None (knock on wood).
+    </para>
+  </chapter>
+
+  <chapter id="Abstraction">
+    <title>Abstraction layers</title>
+    <para>
+       There are three main levels of abstraction in the interrupt code:
+       <orderedlist>
+         <listitem><para>Highlevel driver API</para></listitem>
+         <listitem><para>Highlevel IRQ flow handlers</para></listitem>
+         <listitem><para>Chiplevel hardware encapsulation</para></listitem>
+       </orderedlist>
+    </para>
+    <sect1>
+       <title>Interrupt control flow</title>
+       <para>
+       Each interrupt is described by an interrupt descriptor structure
+       irq_desc. The interrupt is referenced by an 'unsigned int' numeric
+       value which selects the corresponding interrupt decription structure
+       in the descriptor structures array.
+       The descriptor structure contains status information and pointers
+       to the interrupt flow method and the interrupt chip structure
+       which are assigned to this interrupt.
+       </para>
+       <para>
+       Whenever an interrupt triggers, the lowlevel arch code calls into
+       the generic interrupt code by calling desc->handle_irq().
+       This highlevel IRQ handling function only uses desc->chip primitives
+       referenced by the assigned chip descriptor structure.
+       </para>
+    </sect1>
+    <sect1>
+       <title>Highlevel Driver API</title>
+       <para>
+         The highlevel Driver API consists of following functions:
+         <itemizedlist>
+         <listitem><para>request_irq()</para></listitem>
+         <listitem><para>free_irq()</para></listitem>
+         <listitem><para>disable_irq()</para></listitem>
+         <listitem><para>enable_irq()</para></listitem>
+         <listitem><para>disable_irq_nosync() (SMP only)</para></listitem>
+         <listitem><para>synchronize_irq() (SMP only)</para></listitem>
+         <listitem><para>set_irq_type()</para></listitem>
+         <listitem><para>set_irq_wake()</para></listitem>
+         <listitem><para>set_irq_data()</para></listitem>
+         <listitem><para>set_irq_chip()</para></listitem>
+         <listitem><para>set_irq_chip_data()</para></listitem>
+          </itemizedlist>
+         See the autogenerated function documentation for details.
+       </para>
+    </sect1>
+    <sect1>
+       <title>Highlevel IRQ flow handlers</title>
+       <para>
+         The generic layer provides a set of pre-defined irq-flow methods:
+         <itemizedlist>
+         <listitem><para>handle_level_irq</para></listitem>
+         <listitem><para>handle_edge_irq</para></listitem>
+         <listitem><para>handle_simple_irq</para></listitem>
+         <listitem><para>handle_percpu_irq</para></listitem>
+         </itemizedlist>
+         The interrupt flow handlers (either predefined or architecture
+         specific) are assigned to specific interrupts by the architecture
+         either during bootup or during device initialization.
+       </para>
+       <sect2>
+       <title>Default flow implementations</title>
+           <sect3>
+               <title>Helper functions</title>
+               <para>
+               The helper functions call the chip primitives and
+               are used by the default flow implementations.
+               The following helper functions are implemented (simplified excerpt):
+               <programlisting>
+default_enable(irq)
+{
+       desc->chip->unmask(irq);
+}
+
+default_disable(irq)
+{
+       if (!delay_disable(irq))
+               desc->chip->mask(irq);
+}
+
+default_ack(irq)
+{
+       chip->ack(irq);
+}
+
+default_mask_ack(irq)
+{
+       if (chip->mask_ack) {
+               chip->mask_ack(irq);
+       } else {
+               chip->mask(irq);
+               chip->ack(irq);
+       }
+}
+
+noop(irq)
+{
+}
+
+               </programlisting>
+               </para>
+           </sect3>
+       </sect2>
+       <sect2>
+       <title>Default flow handler implementations</title>
+           <sect3>
+               <title>Default Level IRQ flow handler</title>
+               <para>
+               handle_level_irq provides a generic implementation
+               for level-triggered interrupts.
+               </para>
+               <para>
+               The following control flow is implemented (simplified excerpt):
+               <programlisting>
+desc->chip->start();
+handle_IRQ_event(desc->action);
+desc->chip->end();
+               </programlisting>
+               </para>
+           </sect3>
+           <sect3>
+               <title>Default Edge IRQ flow handler</title>
+               <para>
+               handle_edge_irq provides a generic implementation
+               for edge-triggered interrupts.
+               </para>
+               <para>
+               The following control flow is implemented (simplified excerpt):
+               <programlisting>
+if (desc->status &amp; running) {
+       desc->chip->hold();
+       desc->status |= pending | masked;
+       return;
+}
+desc->chip->start();
+desc->status |= running;
+do {
+       if (desc->status &amp; masked)
+               desc->chip->enable();
+       desc-status &amp;= ~pending;
+       handle_IRQ_event(desc->action);
+} while (status &amp; pending);
+desc-status &amp;= ~running;
+desc->chip->end();
+               </programlisting>
+               </para>
+           </sect3>
+           <sect3>
+               <title>Default simple IRQ flow handler</title>
+               <para>
+               handle_simple_irq provides a generic implementation
+               for simple interrupts.
+               </para>
+               <para>
+               Note: The simple flow handler does not call any
+               handler/chip primitives.
+               </para>
+               <para>
+               The following control flow is implemented (simplified excerpt):
+               <programlisting>
+handle_IRQ_event(desc->action);
+               </programlisting>
+               </para>
+           </sect3>
+           <sect3>
+               <title>Default per CPU flow handler</title>
+               <para>
+               handle_percpu_irq provides a generic implementation
+               for per CPU interrupts.
+               </para>
+               <para>
+               Per CPU interrupts are only available on SMP and
+               the handler provides a simplified version without
+               locking.
+               </para>
+               <para>
+               The following control flow is implemented (simplified excerpt):
+               <programlisting>
+desc->chip->start();
+handle_IRQ_event(desc->action);
+desc->chip->end();
+               </programlisting>
+               </para>
+           </sect3>
+       </sect2>
+       <sect2>
+       <title>Quirks and optimizations</title>
+       <para>
+       The generic functions are intended for 'clean' architectures and chips,
+       which have no platform-specific IRQ handling quirks. If an architecture
+       needs to implement quirks on the 'flow' level then it can do so by
+       overriding the highlevel irq-flow handler.
+       </para>
+       </sect2>
+       <sect2>
+       <title>Delayed interrupt disable</title>
+       <para>
+       This per interrupt selectable feature, which was introduced by Russell
+       King in the ARM interrupt implementation, does not mask an interrupt
+       at the hardware level when disable_irq() is called. The interrupt is
+       kept enabled and is masked in the flow handler when an interrupt event
+       happens. This prevents losing edge interrupts on hardware which does
+       not store an edge interrupt event while the interrupt is disabled at
+       the hardware level. When an interrupt arrives while the IRQ_DISABLED
+       flag is set, then the interrupt is masked at the hardware level and
+       the IRQ_PENDING bit is set. When the interrupt is re-enabled by
+       enable_irq() the pending bit is checked and if it is set, the
+       interrupt is resent either via hardware or by a software resend
+       mechanism. (It's necessary to enable CONFIG_HARDIRQS_SW_RESEND when
+       you want to use the delayed interrupt disable feature and your
+       hardware is not capable of retriggering an interrupt.)
+       The delayed interrupt disable can be runtime enabled, per interrupt,
+       by setting the IRQ_DELAYED_DISABLE flag in the irq_desc status field.
+       </para>
+       </sect2>
+    </sect1>
+    <sect1>
+       <title>Chiplevel hardware encapsulation</title>
+       <para>
+       The chip level hardware descriptor structure irq_chip
+       contains all the direct chip relevant functions, which
+       can be utilized by the irq flow implementations.
+         <itemizedlist>
+         <listitem><para>ack()</para></listitem>
+         <listitem><para>mask_ack() - Optional, recommended for performance</para></listitem>
+         <listitem><para>mask()</para></listitem>
+         <listitem><para>unmask()</para></listitem>
+         <listitem><para>retrigger() - Optional</para></listitem>
+         <listitem><para>set_type() - Optional</para></listitem>
+         <listitem><para>set_wake() - Optional</para></listitem>
+         </itemizedlist>
+       These primitives are strictly intended to mean what they say: ack means
+       ACK, masking means masking of an IRQ line, etc. It is up to the flow
+       handler(s) to use these basic units of lowlevel functionality.
+       </para>
+    </sect1>
+  </chapter>
+
+  <chapter id="doirq">
+     <title>__do_IRQ entry point</title>
+     <para>
+       The original implementation __do_IRQ() is an alternative entry
+       point for all types of interrupts.
+     </para>
+     <para>
+       This handler turned out to be not suitable for all
+       interrupt hardware and was therefore reimplemented with split
+       functionality for egde/level/simple/percpu interrupts. This is not
+       only a functional optimization. It also shortens code paths for
+       interrupts.
+      </para>
+      <para>
+       To make use of the split implementation, replace the call to
+       __do_IRQ by a call to desc->chip->handle_irq() and associate
+        the appropriate handler function to desc->chip->handle_irq().
+       In most cases the generic handler implementations should
+       be sufficient.
+     </para>
+  </chapter>
+
+  <chapter id="locking">
+     <title>Locking on SMP</title>
+     <para>
+       The locking of chip registers is up to the architecture that
+       defines the chip primitives. There is a chip->lock field that can be used
+       for serialization, but the generic layer does not touch it. The per-irq
+       structure is protected via desc->lock, by the generic layer.
+     </para>
+  </chapter>
+  <chapter id="structs">
+     <title>Structures</title>
+     <para>
+     This chapter contains the autogenerated documentation of the structures which are
+     used in the generic IRQ layer.
+     </para>
+!Iinclude/linux/irq.h
+  </chapter>
+
+  <chapter id="pubfunctions">
+     <title>Public Functions Provided</title>
+     <para>
+     This chapter contains the autogenerated documentation of the kernel API functions
+      which are exported.
+     </para>
+!Ekernel/irq/manage.c
+!Ekernel/irq/chip.c
+  </chapter>
+
+  <chapter id="intfunctions">
+     <title>Internal Functions Provided</title>
+     <para>
+     This chapter contains the autogenerated documentation of the internal functions.
+     </para>
+!Ikernel/irq/handle.c
+!Ikernel/irq/chip.c
+  </chapter>
+
+  <chapter id="credits">
+     <title>Credits</title>
+       <para>
+               The following people have contributed to this document:
+               <orderedlist>
+                       <listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
+                       <listitem><para>Ingo Molnar<email>mingo@elte.hu</email></para></listitem>
+               </orderedlist>
+       </para>
+  </chapter>
+</book>
diff --git a/Documentation/IRQ.txt b/Documentation/IRQ.txt
new file mode 100644 (file)
index 0000000..1011e71
--- /dev/null
@@ -0,0 +1,22 @@
+What is an IRQ?
+
+An IRQ is an interrupt request from a device.
+Currently they can come in over a pin, or over a packet.
+Several devices may be connected to the same pin thus
+sharing an IRQ.
+
+An IRQ number is a kernel identifier used to talk about a hardware
+interrupt source.  Typically this is an index into the global irq_desc
+array, but except for what linux/interrupt.h implements the details
+are architecture specific.
+
+An IRQ number is an enumeration of the possible interrupt sources on a
+machine.  Typically what is enumerated is the number of input pins on
+all of the interrupt controller in the system.  In the case of ISA
+what is enumerated are the 16 input pins on the two i8259 interrupt
+controllers.
+
+Architectures can assign additional meaning to the IRQ numbers, and
+are encouraged to in the case  where there is any manual configuration
+of the hardware involved.  The ISA IRQs are a classic example of
+assigning this kind of additional meaning.
index 0d189c9..25f8d20 100644 (file)
@@ -1689,9 +1689,14 @@ running once the system is up.
                        decrease the size and leave more room for directly
                        mapped kernel RAM.
 
-       vmhalt=         [KNL,S390]
+       vmhalt=         [KNL,S390] Perform z/VM CP command after system halt.
+                       Format: <command>
 
-       vmpoff=         [KNL,S390]
+       vmpanic=        [KNL,S390] Perform z/VM CP command after kernel panic.
+                       Format: <command>
+
+       vmpoff=         [KNL,S390] Perform z/VM CP command after power off.
+                       Format: <command>
 
        waveartist=     [HW,OSS]
                        Format: <io>,<irq>,<dma>,<dma2>
index 22488d7..c1f64fd 100644 (file)
@@ -3,16 +3,23 @@
                              ===================
 
 The key request service is part of the key retention service (refer to
-Documentation/keys.txt). This document explains more fully how that the
-requesting algorithm works.
+Documentation/keys.txt).  This document explains more fully how the requesting
+algorithm works.
 
 The process starts by either the kernel requesting a service by calling
-request_key():
+request_key*():
 
        struct key *request_key(const struct key_type *type,
                                const char *description,
                                const char *callout_string);
 
+or:
+
+       struct key *request_key_with_auxdata(const struct key_type *type,
+                                            const char *description,
+                                            const char *callout_string,
+                                            void *aux);
+
 Or by userspace invoking the request_key system call:
 
        key_serial_t request_key(const char *type,
@@ -20,16 +27,26 @@ Or by userspace invoking the request_key system call:
                                 const char *callout_info,
                                 key_serial_t dest_keyring);
 
-The main difference between the two access points is that the in-kernel
-interface does not need to link the key to a keyring to prevent it from being
-immediately destroyed. The kernel interface returns a pointer directly to the
-key, and it's up to the caller to destroy the key.
+The main difference between the access points is that the in-kernel interface
+does not need to link the key to a keyring to prevent it from being immediately
+destroyed.  The kernel interface returns a pointer directly to the key, and
+it's up to the caller to destroy the key.
+
+The request_key_with_auxdata() call is like the in-kernel request_key() call,
+except that it permits auxiliary data to be passed to the upcaller (the default
+is NULL).  This is only useful for those key types that define their own upcall
+mechanism rather than using /sbin/request-key.
 
 The userspace interface links the key to a keyring associated with the process
 to prevent the key from going away, and returns the serial number of the key to
 the caller.
 
 
+The following example assumes that the key types involved don't define their
+own upcall mechanisms.  If they do, then those should be substituted for the
+forking and execution of /sbin/request-key.
+
+
 ===========
 THE PROCESS
 ===========
@@ -40,8 +57,8 @@ A request proceeds in the following manner:
      interface].
 
  (2) request_key() searches the process's subscribed keyrings to see if there's
-     a suitable key there. If there is, it returns the key. If there isn't, and
-     callout_info is not set, an error is returned. Otherwise the process
+     a suitable key there.  If there is, it returns the key.  If there isn't,
+     and callout_info is not set, an error is returned.  Otherwise the process
      proceeds to the next step.
 
  (3) request_key() sees that A doesn't have the desired key yet, so it creates
@@ -62,7 +79,7 @@ A request proceeds in the following manner:
      instantiation.
 
  (7) The program may want to access another key from A's context (say a
-     Kerberos TGT key). It just requests the appropriate key, and the keyring
+     Kerberos TGT key).  It just requests the appropriate key, and the keyring
      search notes that the session keyring has auth key V in its bottom level.
 
      This will permit it to then search the keyrings of process A with the
@@ -79,10 +96,11 @@ A request proceeds in the following manner:
 (10) The program then exits 0 and request_key() deletes key V and returns key
      U to the caller.
 
-This also extends further. If key W (step 7 above) didn't exist, key W would be
-created uninstantiated, another auth key (X) would be created (as per step 3)
-and another copy of /sbin/request-key spawned (as per step 4); but the context
-specified by auth key X will still be process A, as it was in auth key V.
+This also extends further.  If key W (step 7 above) didn't exist, key W would
+be created uninstantiated, another auth key (X) would be created (as per step
+3) and another copy of /sbin/request-key spawned (as per step 4); but the
+context specified by auth key X will still be process A, as it was in auth key
+V.
 
 This is because process A's keyrings can't simply be attached to
 /sbin/request-key at the appropriate places because (a) execve will discard two
@@ -118,17 +136,17 @@ A search of any particular keyring proceeds in the following fashion:
 
  (2) It considers all the non-keyring keys within that keyring and, if any key
      matches the criteria specified, calls key_permission(SEARCH) on it to see
-     if the key is allowed to be found. If it is, that key is returned; if
+     if the key is allowed to be found.  If it is, that key is returned; if
      not, the search continues, and the error code is retained if of higher
      priority than the one currently set.
 
  (3) It then considers all the keyring-type keys in the keyring it's currently
-     searching. It calls key_permission(SEARCH) on each keyring, and if this
+     searching.  It calls key_permission(SEARCH) on each keyring, and if this
      grants permission, it recurses, executing steps (2) and (3) on that
      keyring.
 
 The process stops immediately a valid key is found with permission granted to
-use it. Any error from a previous match attempt is discarded and the key is
+use it.  Any error from a previous match attempt is discarded and the key is
 returned.
 
 When search_process_keyrings() is invoked, it performs the following searches
@@ -153,7 +171,7 @@ The moment one succeeds, all pending errors are discarded and the found key is
 returned.
 
 Only if all these fail does the whole thing fail with the highest priority
-error. Note that several errors may have come from LSM.
+error.  Note that several errors may have come from LSM.
 
 The error priority is:
 
index 61c0fad..e373f02 100644 (file)
@@ -780,6 +780,17 @@ payload contents" for more information.
     See also Documentation/keys-request-key.txt.
 
 
+(*) To search for a key, passing auxiliary data to the upcaller, call:
+
+       struct key *request_key_with_auxdata(const struct key_type *type,
+                                            const char *description,
+                                            const char *callout_string,
+                                            void *aux);
+
+    This is identical to request_key(), except that the auxiliary data is
+    passed to the key_type->request_key() op if it exists.
+
+
 (*) When it is no longer required, the key should be released using:
 
        void key_put(struct key *key);
@@ -1031,6 +1042,24 @@ The structure has a number of fields, some of which are mandatory:
      as might happen when the userspace buffer is accessed.
 
 
+ (*) int (*request_key)(struct key *key, struct key *authkey, const char *op,
+                       void *aux);
+
+     This method is optional.  If provided, request_key() and
+     request_key_with_auxdata() will invoke this function rather than
+     upcalling to /sbin/request-key to operate upon a key of this type.
+
+     The aux parameter is as passed to request_key_with_auxdata() or is NULL
+     otherwise.  Also passed are the key to be operated upon, the
+     authorisation key for this operation and the operation type (currently
+     only "create").
+
+     This function should return only when the upcall is complete.  Upon return
+     the authorisation key will be revoked, and the target key will be
+     negatively instantiated if it is still uninstantiated.  The error will be
+     returned to the caller of request_key*().
+
+
 ============================
 REQUEST-KEY CALLBACK SERVICE
 ============================
index 87d76a5..f61af23 100644 (file)
@@ -472,6 +472,22 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
 
     The power-management is supported.
 
+  Module snd-darla20
+  ------------------
+
+    Module for Echoaudio Darla20
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
+  Module snd-darla24
+  ------------------
+
+    Module for Echoaudio Darla24
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-dt019x
   -----------------
 
@@ -499,6 +515,14 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
 
     The power-management is supported.
 
+  Module snd-echo3g
+  -----------------
+
+    Module for Echoaudio 3G cards (Gina3G/Layla3G)
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-emu10k1
   ------------------
 
@@ -657,6 +681,22 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
     
     The power-management is supported.
 
+  Module snd-gina20
+  -----------------
+
+    Module for Echoaudio Gina20
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
+  Module snd-gina24
+  -----------------
+
+    Module for Echoaudio Gina24
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-gusclassic
   ---------------------
 
@@ -760,12 +800,18 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
          basic         fixed pin assignment w/o SPDIF
          auto          auto-config reading BIOS (default)
 
-       ALC882/883/885
+       ALC882/885
          3stack-dig    3-jack with SPDIF I/O
          6stck-dig     6-jack digital with SPDIF I/O
          auto          auto-config reading BIOS (default)
 
-       ALC861
+       ALC883/888
+         3stack-dig    3-jack with SPDIF I/O
+         6stack-dig    6-jack digital with SPDIF I/O
+         6stack-dig-demo  6-stack digital for Intel demo board
+         auto          auto-config reading BIOS (default)
+
+       ALC861/660
          3stack        3-jack
          3stack-dig    3-jack with SPDIF I/O
          6stack-dig    6-jack with SPDIF I/O
@@ -937,6 +983,30 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
          driver isn't configured properly or you want to try another
          type for testing.
 
+  Module snd-indigo
+  -----------------
+
+    Module for Echoaudio Indigo
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
+  Module snd-indigodj
+  -------------------
+
+    Module for Echoaudio Indigo DJ
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
+  Module snd-indigoio
+  -------------------
+
+    Module for Echoaudio Indigo IO
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-intel8x0
   -------------------
 
@@ -1036,6 +1106,22 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
 
     This module supports multiple cards.
 
+  Module snd-layla20
+  ------------------
+
+    Module for Echoaudio Layla20
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
+  Module snd-layla24
+  ------------------
+
+    Module for Echoaudio Layla24
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-maestro3
   -------------------
 
@@ -1056,6 +1142,14 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
 
     The power-management is supported.
 
+  Module snd-mia
+  ---------------
+
+    Module for Echoaudio Mia
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-miro
   ---------------
 
@@ -1088,6 +1182,14 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
     When no hotplug fw loader is available, you need to load the
     firmware via mixartloader utility in alsa-tools package.
 
+  Module snd-mona
+  ---------------
+
+    Module for Echoaudio Mona
+
+    This module supports multiple cards.
+    The driver requires the firmware loader support on kernel.
+
   Module snd-mpu401
   -----------------
 
index da677f8..63af36c 100644 (file)
@@ -49,15 +49,15 @@ select_smp_affinity(unsigned int irq)
        static int last_cpu;
        int cpu = last_cpu + 1;
 
-       if (!irq_desc[irq].handler->set_affinity || irq_user_affinity[irq])
+       if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
                return 1;
 
        while (!cpu_possible(cpu))
                cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
        last_cpu = cpu;
 
-       irq_affinity[irq] = cpumask_of_cpu(cpu);
-       irq_desc[irq].handler->set_affinity(irq, cpumask_of_cpu(cpu));
+       irq_desc[irq].affinity = cpumask_of_cpu(cpu);
+       irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
        return 0;
 }
 #endif /* CONFIG_SMP */
@@ -93,7 +93,7 @@ show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]);
 #endif
-               seq_printf(p, " %14s", irq_desc[irq].handler->typename);
+               seq_printf(p, " %14s", irq_desc[irq].chip->typename);
                seq_printf(p, "  %c%s",
                        (action->flags & SA_INTERRUPT)?'+':' ',
                        action->name);
index 9d34ce2..f20f2df 100644 (file)
@@ -233,7 +233,7 @@ void __init
 init_rtc_irq(void)
 {
        irq_desc[RTC_IRQ].status = IRQ_DISABLED;
-       irq_desc[RTC_IRQ].handler = &rtc_irq_type;
+       irq_desc[RTC_IRQ].chip = &rtc_irq_type;
        setup_irq(RTC_IRQ, &timer_irqaction);
 }
 
index b188683..ac893bd 100644 (file)
@@ -109,7 +109,7 @@ init_i8259a_irqs(void)
 
        for (i = 0; i < 16; i++) {
                irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].handler = &i8259a_irq_type;
+               irq_desc[i].chip = &i8259a_irq_type;
        }
 
        setup_irq(2, &cascade);
index 146a20b..3b58141 100644 (file)
@@ -120,7 +120,7 @@ init_pyxis_irqs(unsigned long ignore_mask)
                if ((ignore_mask >> i) & 1)
                        continue;
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &pyxis_irq_type;
+               irq_desc[i].chip = &pyxis_irq_type;
        }
 
        setup_irq(16+7, &isa_cascade_irqaction);
index 0a87e46..8e4d121 100644 (file)
@@ -67,7 +67,7 @@ init_srm_irqs(long max, unsigned long ignore_mask)
                if (i < 64 && ((ignore_mask >> i) & 1))
                        continue;
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &srm_irq_type;
+               irq_desc[i].chip = &srm_irq_type;
        }
 }
 
index 2a8b364..4ea6711 100644 (file)
@@ -124,12 +124,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final);
 
 void
 pcibios_align_resource(void *data, struct resource *res,
-                      unsigned long size, unsigned long align)
+                      resource_size_t size, resource_size_t align)
 {
        struct pci_dev *dev = data;
        struct pci_controller *hose = dev->sysdata;
        unsigned long alignto;
-       unsigned long start = res->start;
+       resource_size_t start = res->start;
 
        if (res->flags & IORESOURCE_IO) {
                /* Make sure we start at our min on all hoses */
index d7f0e97..1a1a2c7 100644 (file)
@@ -144,7 +144,7 @@ alcor_init_irq(void)
                if (i >= 16+20 && i <= 16+30)
                        continue;
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &alcor_irq_type;
+               irq_desc[i].chip = &alcor_irq_type;
        }
        i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
 
index 8e3374d..8c9e443 100644 (file)
@@ -124,7 +124,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r))
 
                for (i = 16; i < 35; ++i) {
                        irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-                       irq_desc[i].handler = &cabriolet_irq_type;
+                       irq_desc[i].chip = &cabriolet_irq_type;
                }
        }
 
index d5da6b1..b28c8f1 100644 (file)
@@ -300,7 +300,7 @@ init_tsunami_irqs(struct hw_interrupt_type * ops, int imin, int imax)
        long i;
        for (i = imin; i <= imax; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = ops;
+               irq_desc[i].chip = ops;
        }
 }
 
index 61a79c3..aeb8e02 100644 (file)
@@ -137,7 +137,7 @@ eb64p_init_irq(void)
 
        for (i = 16; i < 32; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &eb64p_irq_type;
+               irq_desc[i].chip = &eb64p_irq_type;
        }               
 
        common_init_isa_dma();
index bd6e5f0..64a785b 100644 (file)
@@ -154,7 +154,7 @@ eiger_init_irq(void)
 
        for (i = 16; i < 128; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &eiger_irq_type;
+               irq_desc[i].chip = &eiger_irq_type;
        }
 }
 
index fcabb7c..0148e09 100644 (file)
@@ -206,11 +206,11 @@ jensen_init_irq(void)
 {
        init_i8259a_irqs();
 
-       irq_desc[1].handler = &jensen_local_irq_type;
-       irq_desc[4].handler = &jensen_local_irq_type;
-       irq_desc[3].handler = &jensen_local_irq_type;
-       irq_desc[7].handler = &jensen_local_irq_type;
-       irq_desc[9].handler = &jensen_local_irq_type;
+       irq_desc[1].chip = &jensen_local_irq_type;
+       irq_desc[4].chip = &jensen_local_irq_type;
+       irq_desc[3].chip = &jensen_local_irq_type;
+       irq_desc[7].chip = &jensen_local_irq_type;
+       irq_desc[9].chip = &jensen_local_irq_type;
 
        common_init_isa_dma();
 }
index e32fee5..36d2159 100644 (file)
@@ -303,7 +303,7 @@ init_io7_irqs(struct io7 *io7,
        /* Set up the lsi irqs.  */
        for (i = 0; i < 128; ++i) {
                irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[base + i].handler = lsi_ops;
+               irq_desc[base + i].chip = lsi_ops;
        }
 
        /* Disable the implemented irqs in hardware.  */
@@ -317,7 +317,7 @@ init_io7_irqs(struct io7 *io7,
        /* Set up the msi irqs.  */
        for (i = 128; i < (128 + 512); ++i) {
                irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[base + i].handler = msi_ops;
+               irq_desc[base + i].chip = msi_ops;
        }
 
        for (i = 0; i < 16; ++i)
@@ -335,7 +335,7 @@ marvel_init_irq(void)
        /* Reserve the legacy irqs.  */
        for (i = 0; i < 16; ++i) {
                irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].handler = &marvel_legacy_irq_type;
+               irq_desc[i].chip = &marvel_legacy_irq_type;
        }
 
        /* Init the io7 irqs.  */
index d78a0da..b741600 100644 (file)
@@ -117,7 +117,7 @@ mikasa_init_irq(void)
 
        for (i = 16; i < 32; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &mikasa_irq_type;
+               irq_desc[i].chip = &mikasa_irq_type;
        }
 
        init_i8259a_irqs();
index 65061f5..55db02d 100644 (file)
@@ -139,7 +139,7 @@ noritake_init_irq(void)
 
        for (i = 16; i < 48; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &noritake_irq_type;
+               irq_desc[i].chip = &noritake_irq_type;
        }
 
        init_i8259a_irqs();
index 05888a0..949607e 100644 (file)
@@ -180,7 +180,7 @@ rawhide_init_irq(void)
 
        for (i = 16; i < 128; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &rawhide_irq_type;
+               irq_desc[i].chip = &rawhide_irq_type;
        }
 
        init_i8259a_irqs();
index 5840424..6ae5060 100644 (file)
@@ -117,7 +117,7 @@ rx164_init_irq(void)
        rx164_update_irq_hw(0);
        for (i = 16; i < 40; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &rx164_irq_type;
+               irq_desc[i].chip = &rx164_irq_type;
        }
 
        init_i8259a_irqs();
index a7ff844..24dea40 100644 (file)
@@ -537,7 +537,7 @@ sable_lynx_init_irq(int nr_irqs)
 
        for (i = 0; i < nr_irqs; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &sable_lynx_irq_type;
+               irq_desc[i].chip = &sable_lynx_irq_type;
        }
 
        common_init_isa_dma();
index 7955bdf..2c75cd1 100644 (file)
@@ -154,7 +154,7 @@ takara_init_irq(void)
 
        for (i = 16; i < 128; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &takara_irq_type;
+               irq_desc[i].chip = &takara_irq_type;
        }
 
        common_init_isa_dma();
index 2551fb4..13f3ed8 100644 (file)
@@ -189,7 +189,7 @@ init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax)
        long i;
        for (i = imin; i <= imax; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = ops;
+               irq_desc[i].chip = ops;
        }
 }
 
index 1553f47..22c5798 100644 (file)
@@ -199,14 +199,14 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
                if (i == 2)
                        continue;
                irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i+irq_bias].handler = &wildfire_irq_type;
+               irq_desc[i+irq_bias].chip = &wildfire_irq_type;
        }
 
        irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-       irq_desc[36+irq_bias].handler = &wildfire_irq_type;
+       irq_desc[36+irq_bias].chip = &wildfire_irq_type;
        for (i = 40; i < 64; ++i) {
                irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i+irq_bias].handler = &wildfire_irq_type;
+               irq_desc[i+irq_bias].chip = &wildfire_irq_type;
        }
 
        setup_irq(32+irq_bias, &isa_enable);    
index 302fc14..45da06f 100644 (file)
@@ -304,7 +304,7 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
 static void __devinit
 pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
 {
-       unsigned long offset;
+       resource_size_t offset;
        int i;
 
        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
@@ -634,9 +634,9 @@ char * __init pcibios_setup(char *str)
  * which might be mirrored at 0x0100-0x03ff..
  */
 void pcibios_align_resource(void *data, struct resource *res,
-                           unsigned long size, unsigned long align)
+                           resource_size_t size, resource_size_t align)
 {
-       unsigned long start = res->start;
+       resource_size_t start = res->start;
 
        if (res->flags & IORESOURCE_IO && start & 0x300)
                start = (start + 0x3ff) & ~0x3ff;
index 093ccba..6bdf70d 100644 (file)
@@ -119,9 +119,24 @@ DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  * Standard memory resources
  */
 static struct resource mem_res[] = {
-       { "Video RAM",   0,     0,     IORESOURCE_MEM                   },
-       { "Kernel text", 0,     0,     IORESOURCE_MEM                   },
-       { "Kernel data", 0,     0,     IORESOURCE_MEM                   }
+       {
+               .name = "Video RAM",
+               .start = 0,
+               .end = 0,
+               .flags = IORESOURCE_MEM
+       },
+       {
+               .name = "Kernel text",
+               .start = 0,
+               .end = 0,
+               .flags = IORESOURCE_MEM
+       },
+       {
+               .name = "Kernel data",
+               .start = 0,
+               .end = 0,
+               .flags = IORESOURCE_MEM
+       }
 };
 
 #define video_ram   mem_res[0]
@@ -129,9 +144,24 @@ static struct resource mem_res[] = {
 #define kernel_data mem_res[2]
 
 static struct resource io_res[] = {
-       { "reserved",    0x3bc, 0x3be, IORESOURCE_IO | IORESOURCE_BUSY },
-       { "reserved",    0x378, 0x37f, IORESOURCE_IO | IORESOURCE_BUSY },
-       { "reserved",    0x278, 0x27f, IORESOURCE_IO | IORESOURCE_BUSY }
+       {
+               .name = "reserved",
+               .start = 0x3bc,
+               .end = 0x3be,
+               .flags = IORESOURCE_IO | IORESOURCE_BUSY
+       },
+       {
+               .name = "reserved",
+               .start = 0x378,
+               .end = 0x37f,
+               .flags = IORESOURCE_IO | IORESOURCE_BUSY
+       },
+       {
+               .name = "reserved",
+               .start = 0x278,
+               .end = 0x27f,
+               .flags = IORESOURCE_IO | IORESOURCE_BUSY
+       }
 };
 
 #define lp0 io_res[0]
index 856b665..6a1238a 100644 (file)
@@ -28,6 +28,10 @@ config GENERIC_CALIBRATE_DELAY
        bool
        default y
 
+config IRQ_PER_CPU
+       bool
+       default y
+
 config CRIS
        bool
        default y
index 4b368a1..2d5be93 100644 (file)
@@ -172,7 +172,7 @@ init_IRQ(void)
 
        /* Initialize IRQ handler descriptiors. */
        for(i = 2; i < NR_IRQS; i++) {
-               irq_desc[i].handler = &crisv10_irq_type;
+               irq_desc[i].chip = &crisv10_irq_type;
                set_int_vector(i, interrupt[i]);
        }
 
index 1e9d062..a2b9c60 100644 (file)
@@ -43,10 +43,10 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 
 void
 pcibios_align_resource(void *data, struct resource *res,
-                      unsigned long size, unsigned long align)
+                      resource_size_t size, resource_size_t align)
 {
        if (res->flags & IORESOURCE_IO) {
-               unsigned long start = res->start;
+               resource_size_t start = res->start;
 
                if (start & 0x300) {
                        start = (start + 0x3ff) & ~0x3ff;
index c78cc26..0626087 100644 (file)
@@ -369,7 +369,7 @@ init_IRQ(void)
 
        /* Point all IRQ's to bad handlers. */
        for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
-               irq_desc[j].handler = &crisv32_irq_type;
+               irq_desc[j].chip = &crisv32_irq_type;
                set_exception_vector(i, interrupt[j]);
        }
 
index b504def..6547bb6 100644 (file)
@@ -69,7 +69,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
index 0a26bf6..4f165c9 100644 (file)
@@ -64,10 +64,10 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root,
  */
 void
 pcibios_align_resource(void *data, struct resource *res,
-                      unsigned long size, unsigned long align)
+                      resource_size_t size, resource_size_t align)
 {
        if (res->flags & IORESOURCE_IO) {
-               unsigned long start = res->start;
+               resource_size_t start = res->start;
 
                if (start & 0x300) {
                        start = (start + 0x3ff) & ~0x3ff;
index 3bb221d..1718429 100644 (file)
@@ -529,6 +529,7 @@ config X86_PAE
        bool
        depends on HIGHMEM64G
        default y
+       select RESOURCES_64BIT
 
 # Common NUMA Features
 config NUMA
@@ -737,7 +738,7 @@ config KEXEC
          but it is independent of the system firmware.   And like a reboot
          you can start any kernel with it, not just Linux.
 
-         The name comes from the similiarity to the exec system call.
+         The name comes from the similarity to the exec system call.
 
          It is an ongoing process to be certain the hardware in a machine
          is properly shutdown, so do not be surprised if this code does not
@@ -794,6 +795,9 @@ config COMPAT_VDSO
 
 endmenu
 
+config ARCH_ENABLE_MEMORY_HOTPLUG
+       def_bool y
+       depends on HIGHMEM
 
 menu "Power management options (ACPI, APM)"
        depends on !X86_VOYAGER
index 9202b67..8beb0f0 100644 (file)
@@ -601,8 +601,10 @@ efi_initialize_iomem_resources(struct resource *code_resource,
                res->end = res->start + ((md->num_pages << EFI_PAGE_SHIFT) - 1);
                res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
                if (request_resource(&iomem_resource, res) < 0)
-                       printk(KERN_ERR PFX "Failed to allocate res %s : 0x%lx-0x%lx\n",
-                               res->name, res->start, res->end);
+                       printk(KERN_ERR PFX "Failed to allocate res %s : "
+                               "0x%llx-0x%llx\n", res->name,
+                               (unsigned long long)res->start,
+                               (unsigned long long)res->end);
                /*
                 * We don't know which region contains kernel data so we try
                 * it repeatedly and let the resource manager test it.
index c1a42fe..3c60636 100644 (file)
@@ -132,7 +132,7 @@ void make_8259A_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
        io_apic_irqs &= ~(1<<irq);
-       irq_desc[irq].handler = &i8259A_irq_type;
+       irq_desc[irq].chip = &i8259A_irq_type;
        enable_irq(irq);
 }
 
@@ -386,12 +386,12 @@ void __init init_ISA_irqs (void)
                        /*
                         * 16 old-style INTA-cycle interrupts:
                         */
-                       irq_desc[i].handler = &i8259A_irq_type;
+                       irq_desc[i].chip = &i8259A_irq_type;
                } else {
                        /*
                         * 'high' PCI IRQs filled in on demand
                         */
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index 72ae414..ec9ea02 100644 (file)
@@ -581,7 +581,7 @@ static int balanced_irq(void *unused)
        
        /* push everything to CPU 0 to give us a starting point.  */
        for (i = 0 ; i < NR_IRQS ; i++) {
-               pending_irq_cpumask[i] = cpumask_of_cpu(0);
+               irq_desc[i].pending_mask = cpumask_of_cpu(0);
                set_pending_irq(i, cpumask_of_cpu(0));
        }
 
@@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type;
 #define IOAPIC_EDGE    0
 #define IOAPIC_LEVEL   1
 
-static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger)
+static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
 {
-       unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
+       unsigned idx;
+
+       idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
 
        if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
                        trigger == IOAPIC_LEVEL)
-               irq_desc[idx].handler = &ioapic_level_type;
+               irq_desc[idx].chip = &ioapic_level_type;
        else
-               irq_desc[idx].handler = &ioapic_edge_type;
+               irq_desc[idx].chip = &ioapic_edge_type;
        set_intr_gate(vector, interrupt[idx]);
 }
 
@@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
         * The timer IRQ doesn't have to know that behind the
         * scene we have a 8259A-master in AEOI mode ...
         */
-       irq_desc[0].handler = &ioapic_edge_type;
+       irq_desc[0].chip = &ioapic_edge_type;
 
        /*
         * Add it to the IO-APIC irq-routing table:
@@ -2069,6 +2071,13 @@ static void set_ioapic_affinity_vector (unsigned int vector,
 #endif
 #endif
 
+static int ioapic_retrigger(unsigned int irq)
+{
+       send_IPI_self(IO_APIC_VECTOR(irq));
+
+       return 1;
+}
+
 /*
  * Level and edge triggered IO-APIC interrupts need different handling,
  * so we use two separate IRQ descriptors. Edge triggered IRQs can be
@@ -2088,6 +2097,7 @@ static struct hw_interrupt_type ioapic_edge_type __read_mostly = {
 #ifdef CONFIG_SMP
        .set_affinity   = set_ioapic_affinity,
 #endif
+       .retrigger      = ioapic_retrigger,
 };
 
 static struct hw_interrupt_type ioapic_level_type __read_mostly = {
@@ -2101,6 +2111,7 @@ static struct hw_interrupt_type ioapic_level_type __read_mostly = {
 #ifdef CONFIG_SMP
        .set_affinity   = set_ioapic_affinity,
 #endif
+       .retrigger      = ioapic_retrigger,
 };
 
 static inline void init_IO_APIC_traps(void)
@@ -2135,7 +2146,7 @@ static inline void init_IO_APIC_traps(void)
                                make_8259A_irq(irq);
                        else
                                /* Strange. Oh, well.. */
-                               irq_desc[irq].handler = &no_irq_type;
+                               irq_desc[irq].chip = &no_irq_type;
                }
        }
 }
@@ -2351,7 +2362,7 @@ static inline void check_timer(void)
        printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
 
        disable_8259A_irq(0);
-       irq_desc[0].handler = &lapic_irq_type;
+       irq_desc[0].chip = &lapic_irq_type;
        apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector);   /* Fixed mode */
        enable_8259A_irq(0);
 
index 9eec943..16b4917 100644 (file)
@@ -82,6 +82,10 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
        }
 #endif
 
+       if (!irq_desc[irq].handle_irq) {
+               __do_IRQ(irq, regs);
+               goto out_exit;
+       }
 #ifdef CONFIG_4KSTACKS
 
        curctx = (union irq_ctx *) current_thread_info();
@@ -121,6 +125,7 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
 #endif
                __do_IRQ(irq, regs);
 
+out_exit:
        irq_exit();
 
        return 1;
@@ -249,7 +254,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -291,13 +296,13 @@ void fixup_irqs(cpumask_t map)
                if (irq == 2)
                        continue;
 
-               cpus_and(mask, irq_affinity[irq], map);
+               cpus_and(mask, irq_desc[irq].affinity, map);
                if (any_online_cpu(mask) == NR_CPUS) {
                        printk("Breaking affinity for irq %i\n", irq);
                        mask = map;
                }
-               if (irq_desc[irq].handler->set_affinity)
-                       irq_desc[irq].handler->set_affinity(irq, mask);
+               if (irq_desc[irq].chip->set_affinity)
+                       irq_desc[irq].chip->set_affinity(irq, mask);
                else if (irq_desc[irq].action && !(warned++))
                        printk("Cannot set affinity for irq %i\n", irq);
        }
index 4a65040..6712f0d 100644 (file)
@@ -1314,8 +1314,10 @@ legacy_init_iomem_resources(struct resource *code_resource, struct resource *dat
        probe_roms();
        for (i = 0; i < e820.nr_map; i++) {
                struct resource *res;
+#ifndef CONFIG_RESOURCES_64BIT
                if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL)
                        continue;
+#endif
                res = kzalloc(sizeof(struct resource), GFP_ATOMIC);
                switch (e820.map[i].type) {
                case E820_RAM:  res->name = "System RAM"; break;
index 8a9e1a6..1f84cdb 100644 (file)
@@ -140,8 +140,8 @@ void __init time_init_hook(void)
 
 #define MB (1024 * 1024)
 
-static unsigned long sgivwfb_mem_phys;
-static unsigned long sgivwfb_mem_size;
+unsigned long sgivwfb_mem_phys;
+unsigned long sgivwfb_mem_size;
 
 long long mem_size __initdata = 0;
 
@@ -177,8 +177,4 @@ char * __init machine_specific_memory_setup(void)
        add_memory_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED);
 
        return "PROM";
-
-       /* Remove gcc warnings */
-       (void) sanitize_e820_map(NULL, NULL);
-       (void) copy_e820_map(NULL, 0);
 }
index 3e64fb7..c418521 100644 (file)
@@ -278,22 +278,22 @@ void init_VISWS_APIC_irqs(void)
                irq_desc[i].depth = 1;
 
                if (i == 0) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
                else if (i == CO_IRQ_IDE0) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
                else if (i == CO_IRQ_IDE1) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
                else if (i == CO_IRQ_8259) {
-                       irq_desc[i].handler = &piix4_master_irq_type;
+                       irq_desc[i].chip = &piix4_master_irq_type;
                }
                else if (i < CO_IRQ_APIC0) {
-                       irq_desc[i].handler = &piix4_virtual_irq_type;
+                       irq_desc[i].chip = &piix4_virtual_irq_type;
                }
                else if (IS_CO_APIC(i)) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
        }
 
index 8242af9..5b8b579 100644 (file)
@@ -1419,7 +1419,7 @@ smp_intr_init(void)
         * This is for later: first 16 correspond to PC IRQs; next 16
         * are Primary MC IRQs and final 16 are Secondary MC IRQs */
        for(i = 0; i < 48; i++)
-               irq_desc[i].handler = &vic_irq_type;
+               irq_desc[i].chip = &vic_irq_type;
 }
 
 /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
index a151f7a..10154a2 100644 (file)
  */
 void
 pcibios_align_resource(void *data, struct resource *res,
-                      unsigned long size, unsigned long align)
+                       resource_size_t size, resource_size_t align)
 {
        if (res->flags & IORESOURCE_IO) {
-               unsigned long start = res->start;
+               resource_size_t start = res->start;
 
                if (start & 0x300) {
                        start = (start + 0x3ff) & ~0x3ff;
index a56df7b..b487e22 100644 (file)
@@ -271,6 +271,9 @@ config HOTPLUG_CPU
          can be controlled through /sys/devices/system/cpu/cpu#.
          Say N if you want to disable CPU hotplug.
 
+config ARCH_ENABLE_MEMORY_HOTPLUG
+       def_bool y
+
 config SCHED_SMT
        bool "SMT scheduler support"
        depends on SMP
@@ -489,6 +492,10 @@ config GENERIC_PENDING_IRQ
        depends on GENERIC_HARDIRQS && SMP
        default y
 
+config IRQ_PER_CPU
+       bool
+       default y
+
 source "arch/ia64/hp/sim/Kconfig"
 
 menu "Instrumentation Support"
index c0d25a2..8145547 100644 (file)
@@ -44,8 +44,8 @@ hpsim_irq_init (void)
        int i;
 
        for (i = 0; i < NR_IRQS; ++i) {
-               idesc = irq_descp(i);
-               if (idesc->handler == &no_irq_type)
-                       idesc->handler = &irq_type_hp_sim;
+               idesc = irq_desc + i;
+               if (idesc->chip == &no_irq_type)
+                       idesc->chip = &irq_type_hp_sim;
        }
 }
index d58c1c5..efc7df4 100644 (file)
@@ -456,7 +456,7 @@ iosapic_startup_edge_irq (unsigned int irq)
 static void
 iosapic_ack_edge_irq (unsigned int irq)
 {
-       irq_desc_t *idesc = irq_descp(irq);
+       irq_desc_t *idesc = irq_desc + irq;
 
        move_native_irq(irq);
        /*
@@ -659,14 +659,14 @@ register_intr (unsigned int gsi, int vector, unsigned char delivery,
        else
                irq_type = &irq_type_iosapic_level;
 
-       idesc = irq_descp(vector);
-       if (idesc->handler != irq_type) {
-               if (idesc->handler != &no_irq_type)
+       idesc = irq_desc + vector;
+       if (idesc->chip != irq_type) {
+               if (idesc->chip != &no_irq_type)
                        printk(KERN_WARNING
                               "%s: changing vector %d from %s to %s\n",
                               __FUNCTION__, vector,
-                              idesc->handler->typename, irq_type->typename);
-               idesc->handler = irq_type;
+                              idesc->chip->typename, irq_type->typename);
+               idesc->chip = irq_type;
        }
        return 0;
 }
@@ -793,14 +793,14 @@ again:
                        return -ENOSPC;
        }
 
-       spin_lock_irqsave(&irq_descp(vector)->lock, flags);
+       spin_lock_irqsave(&irq_desc[vector].lock, flags);
        spin_lock(&iosapic_lock);
        {
                if (gsi_to_vector(gsi) > 0) {
                        if (list_empty(&iosapic_intr_info[vector].rtes))
                                free_irq_vector(vector);
                        spin_unlock(&iosapic_lock);
-                       spin_unlock_irqrestore(&irq_descp(vector)->lock,
+                       spin_unlock_irqrestore(&irq_desc[vector].lock,
                                               flags);
                        goto again;
                }
@@ -810,7 +810,7 @@ again:
                              polarity, trigger);
                if (err < 0) {
                        spin_unlock(&iosapic_lock);
-                       spin_unlock_irqrestore(&irq_descp(vector)->lock,
+                       spin_unlock_irqrestore(&irq_desc[vector].lock,
                                               flags);
                        return err;
                }
@@ -825,7 +825,7 @@ again:
                set_rte(gsi, vector, dest, mask);
        }
        spin_unlock(&iosapic_lock);
-       spin_unlock_irqrestore(&irq_descp(vector)->lock, flags);
+       spin_unlock_irqrestore(&irq_desc[vector].lock, flags);
 
        printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n",
               gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
@@ -860,7 +860,7 @@ iosapic_unregister_intr (unsigned int gsi)
        }
        vector = irq_to_vector(irq);
 
-       idesc = irq_descp(irq);
+       idesc = irq_desc + irq;
        spin_lock_irqsave(&idesc->lock, flags);
        spin_lock(&iosapic_lock);
        {
@@ -903,7 +903,7 @@ iosapic_unregister_intr (unsigned int gsi)
                        BUG_ON(iosapic_intr_info[vector].count);
 
                        /* Clear the interrupt controller descriptor */
-                       idesc->handler = &no_irq_type;
+                       idesc->chip = &no_irq_type;
 
                        /* Clear the interrupt information */
                        memset(&iosapic_intr_info[vector], 0,
index 9c72ea3..7852382 100644 (file)
@@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
                }
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -100,7 +100,7 @@ void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
        cpu_set(cpu_logical_id(hwid), mask);
 
        if (irq < NR_IRQS) {
-               irq_affinity[irq] = mask;
+               irq_desc[irq].affinity = mask;
                irq_redir[irq] = (char) (redir & 0xff);
        }
 }
@@ -120,7 +120,7 @@ static void migrate_irqs(void)
        int             irq, new_cpu;
 
        for (irq=0; irq < NR_IRQS; irq++) {
-               desc = irq_descp(irq);
+               desc = irq_desc + irq;
 
                /*
                 * No handling for now.
@@ -131,7 +131,7 @@ static void migrate_irqs(void)
                if (desc->status == IRQ_PER_CPU)
                        continue;
 
-               cpus_and(mask, irq_affinity[irq], cpu_online_map);
+               cpus_and(mask, irq_desc[irq].affinity, cpu_online_map);
                if (any_online_cpu(mask) == NR_CPUS) {
                        /*
                         * Save it for phase 2 processing
@@ -144,15 +144,15 @@ static void migrate_irqs(void)
                        /*
                         * Al three are essential, currently WARN_ON.. maybe panic?
                         */
-                       if (desc->handler && desc->handler->disable &&
-                               desc->handler->enable && desc->handler->set_affinity) {
-                               desc->handler->disable(irq);
-                               desc->handler->set_affinity(irq, mask);
-                               desc->handler->enable(irq);
+                       if (desc->chip && desc->chip->disable &&
+                               desc->chip->enable && desc->chip->set_affinity) {
+                               desc->chip->disable(irq);
+                               desc->chip->set_affinity(irq, mask);
+                               desc->chip->enable(irq);
                        } else {
-                               WARN_ON((!(desc->handler) || !(desc->handler->disable) ||
-                                               !(desc->handler->enable) ||
-                                               !(desc->handler->set_affinity)));
+                               WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
+                                               !(desc->chip->enable) ||
+                                               !(desc->chip->set_affinity)));
                        }
                }
        }
index ef9a2b4..f503530 100644 (file)
@@ -249,9 +249,9 @@ register_percpu_irq (ia64_vector vec, struct irqaction *action)
 
        for (irq = 0; irq < NR_IRQS; ++irq)
                if (irq_to_vector(irq) == vec) {
-                       desc = irq_descp(irq);
+                       desc = irq_desc + irq;
                        desc->status |= IRQ_PER_CPU;
-                       desc->handler = &irq_type_ia64_lsapic;
+                       desc->chip = &irq_type_ia64_lsapic;
                        if (action)
                                setup_irq(irq, action);
                }
index ea14e6a..1ab58b0 100644 (file)
@@ -26,6 +26,13 @@ lsapic_noop (unsigned int irq)
        /* nuthing to do... */
 }
 
+static int lsapic_retrigger(unsigned int irq)
+{
+       ia64_resend_irq(irq);
+
+       return 1;
+}
+
 struct hw_interrupt_type irq_type_ia64_lsapic = {
        .typename =     "LSAPIC",
        .startup =      lsapic_noop_startup,
@@ -33,5 +40,6 @@ struct hw_interrupt_type irq_type_ia64_lsapic = {
        .enable =       lsapic_noop,
        .disable =      lsapic_noop,
        .ack =          lsapic_noop,
-       .end =          lsapic_noop
+       .end =          lsapic_noop,
+       .retrigger =    lsapic_retrigger,
 };
index 6a08806..d7dc5e6 100644 (file)
@@ -1788,7 +1788,7 @@ ia64_mca_late_init(void)
                        cpe_poll_enabled = 0;
                        for (irq = 0; irq < NR_IRQS; ++irq)
                                if (irq_to_vector(irq) == cpe_vector) {
-                                       desc = irq_descp(irq);
+                                       desc = irq_desc + irq;
                                        desc->status |= IRQ_PER_CPU;
                                        setup_irq(irq, &mca_cpe_irqaction);
                                        ia64_cpe_irq = irq;
index 6d7bc8f..a0055d3 100644 (file)
@@ -6165,7 +6165,7 @@ pfm_load_regs (struct task_struct *task)
                /*
                 * will replay the PMU interrupt
                 */
-               if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR);
+               if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR);
 
                pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
        }
@@ -6305,7 +6305,7 @@ pfm_load_regs (struct task_struct *task)
                /*
                 * will replay the PMU interrupt
                 */
-               if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR);
+               if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR);
 
                pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
        }
index 44e9547..5203df7 100644 (file)
@@ -677,16 +677,16 @@ int migrate_platform_irqs(unsigned int cpu)
                        new_cpei_cpu = any_online_cpu(cpu_online_map);
                        mask = cpumask_of_cpu(new_cpei_cpu);
                        set_cpei_target_cpu(new_cpei_cpu);
-                       desc = irq_descp(ia64_cpe_irq);
+                       desc = irq_desc + ia64_cpe_irq;
                        /*
                         * Switch for now, immediatly, we need to do fake intr
                         * as other interrupts, but need to study CPEI behaviour with
                         * polling before making changes.
                         */
                        if (desc) {
-                               desc->handler->disable(ia64_cpe_irq);
-                               desc->handler->set_affinity(ia64_cpe_irq, mask);
-                               desc->handler->enable(ia64_cpe_irq);
+                               desc->chip->disable(ia64_cpe_irq);
+                               desc->chip->set_affinity(ia64_cpe_irq, mask);
+                               desc->chip->enable(ia64_cpe_irq);
                                printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
                        }
                }
index 77375a5..5bef0e3 100644 (file)
@@ -568,7 +568,7 @@ pcibios_disable_device (struct pci_dev *dev)
 
 void
 pcibios_align_resource (void *data, struct resource *res,
-                       unsigned long size, unsigned long align)
+                       resource_size_t size, resource_size_t align)
 {
 }
 
index 677c6c0..7bb6ad1 100644 (file)
@@ -225,8 +225,8 @@ void sn_irq_init(void)
        ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
 
        for (i = 0; i < NR_IRQS; i++) {
-               if (base_desc[i].handler == &no_irq_type) {
-                       base_desc[i].handler = &irq_type_sn;
+               if (base_desc[i].chip == &no_irq_type) {
+                       base_desc[i].chip = &irq_type_sn;
                }
        }
 }
index a4634b0..3841861 100644 (file)
@@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
index 6328e13..f9f56c2 100644 (file)
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
@@ -113,7 +113,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
index fad1fc9..b6ab00e 100644 (file)
@@ -301,7 +301,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
        irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-       irq_desc[M32700UT_LAN_IRQ_LAN].handler = &m32700ut_lanpld_irq_type;
+       irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
        irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
        irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1;       /* disable nested irq */
        lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;   /* "H" edge sense */
@@ -310,7 +310,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -318,7 +318,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : receive */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -326,7 +326,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : send */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -334,7 +334,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : receive */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -342,7 +342,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : send */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -350,7 +350,7 @@ void __init init_IRQ(void)
 
        /* DMA1 : */
        irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_DMA1].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_DMA1].action = 0;
        irq_desc[M32R_IRQ_DMA1].depth = 1;
        icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -359,7 +359,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
        /* INT#1: SIO0 Receive on PLD */
        irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_RCV].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
        irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -367,7 +367,7 @@ void __init init_IRQ(void)
 
        /* INT#1: SIO0 Send on PLD */
        irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_SND].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_SND].action = 0;
        irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -376,7 +376,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC IREQ on PLD */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
@@ -384,7 +384,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Insert on PLD */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
@@ -392,7 +392,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Eject on PLD */
        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_EJECT].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
@@ -416,7 +416,7 @@ void __init init_IRQ(void)
        outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
 
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].handler = &m32700ut_lcdpld_irq_type;
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
     lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
@@ -434,7 +434,7 @@ void __init init_IRQ(void)
         * INT3# is used for AR
         */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index 00f2532..c268044 100644 (file)
@@ -86,7 +86,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
        /* INT0 : LAN controller (RTL8019AS) */
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -95,7 +95,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -104,7 +104,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -112,7 +112,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -120,7 +120,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_PCC)
        /* INT1 : pccard0 interrupt */
        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_INT1].action = 0;
        irq_desc[M32R_IRQ_INT1].depth = 1;
        icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
@@ -146,7 +146,7 @@ void __init init_IRQ(void)
 
        /* INT2 : pccard1 interrupt */
        irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_INT2].action = 0;
        irq_desc[M32R_IRQ_INT2].depth = 1;
        icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
index eebc9d8..bd2327d 100644 (file)
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT0 : LAN controller (SMC91111) */
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
        disable_mappi2_irq(M32R_IRQ_SIO0_S);
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_USB)
        /* INT1 : USB Host controller interrupt */
        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_INT1].action = 0;
        irq_desc[M32R_IRQ_INT1].depth = 1;
        icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
 
        /* ICUCR40: CFC IREQ */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
        /* ICUCR41: CFC Insert */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -164,7 +164,7 @@ void __init init_IRQ(void)
 
        /* ICUCR42: CFC Eject */
        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type;
+       irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
        icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index d2ff021..014b51d 100644 (file)
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT0 : LAN controller (SMC91111) */
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
        disable_mappi3_irq(M32R_IRQ_SIO0_S);
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_USB)
        /* INT1 : USB Host controller interrupt */
        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_INT1].action = 0;
        irq_desc[M32R_IRQ_INT1].depth = 1;
        icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
 
        /* CFC IREQ */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
        /* ICUCR41: CFC Insert & eject */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -166,7 +166,7 @@ void __init init_IRQ(void)
 
        /* IDE IREQ */
        irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type;
+       irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
        irq_desc[PLD_IRQ_IDEIREQ].action = 0;
        irq_desc[PLD_IRQ_IDEIREQ].depth = 1;    /* disable nested irq */
        icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index 0e9e635..ea64831 100644 (file)
@@ -85,7 +85,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
        /* INT3 : LAN controller (RTL8019AS) */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -94,7 +94,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -103,7 +103,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -111,7 +111,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -119,7 +119,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -127,7 +127,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
index 548e8fc..55e8972 100644 (file)
@@ -302,7 +302,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
        irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-       irq_desc[OPSPUT_LAN_IRQ_LAN].handler = &opsput_lanpld_irq_type;
+       irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
        irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
        irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
        lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;     /* "H" edge sense */
@@ -311,7 +311,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -319,7 +319,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : receive */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -327,7 +327,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : send */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -335,7 +335,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : receive */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -343,7 +343,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : send */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -351,7 +351,7 @@ void __init init_IRQ(void)
 
        /* DMA1 : */
        irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_DMA1].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_DMA1].action = 0;
        irq_desc[M32R_IRQ_DMA1].depth = 1;
        icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -360,7 +360,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
        /* INT#1: SIO0 Receive on PLD */
        irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_RCV].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
        irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -368,7 +368,7 @@ void __init init_IRQ(void)
 
        /* INT#1: SIO0 Send on PLD */
        irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_SND].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_SND].action = 0;
        irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -378,7 +378,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
        /* INT#1: CFC IREQ on PLD */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
@@ -386,7 +386,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Insert on PLD */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
@@ -394,7 +394,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Eject on PLD */
        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_EJECT].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
@@ -420,7 +420,7 @@ void __init init_IRQ(void)
        outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
 
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].handler = &opsput_lcdpld_irq_type;
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
     lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;   /* "L" level sense */
@@ -438,7 +438,7 @@ void __init init_IRQ(void)
         * INT3# is used for AR
         */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index 64be659..7fa12d8 100644 (file)
@@ -158,7 +158,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -167,7 +167,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SERIAL_M32R_SIO)
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -175,7 +175,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -183,7 +183,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -191,7 +191,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -201,7 +201,7 @@ void __init init_IRQ(void)
        /* INT#67-#71: CFC#0 IREQ on PLD */
        for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
                irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
-               irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type;
+               irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
                irq_desc[PLD_IRQ_CF0 + i].action = 0;
                irq_desc[PLD_IRQ_CF0 + i].depth = 1;    /* disable nested irq */
                pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -212,7 +212,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
        /* INT#76: 16552D#0 IREQ on PLD */
        irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_UART0].action = 0;
        irq_desc[PLD_IRQ_UART0].depth = 1;      /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
@@ -221,7 +221,7 @@ void __init init_IRQ(void)
 
        /* INT#77: 16552D#1 IREQ on PLD */
        irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_UART1].action = 0;
        irq_desc[PLD_IRQ_UART1].depth = 1;      /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
@@ -232,7 +232,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
        /* INT#80: AK4524 IREQ on PLD */
        irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_SNDINT].action = 0;
        irq_desc[PLD_IRQ_SNDINT].depth = 1;     /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
index 8670938..db7a0c1 100644 (file)
@@ -357,7 +357,8 @@ void pcibios_fixup_bus(struct pci_bus *b)
 
 /*****************************************************************************/
 
-void pcibios_align_resource(void *data, struct resource *res, unsigned long size, unsigned long align)
+void pcibios_align_resource(void *data, struct resource *res,
+                               resource_size_t size, resource_size_t align)
 {
 }
 
index 8e10f02..747a9c1 100644 (file)
@@ -1647,6 +1647,11 @@ config GENERIC_IRQ_PROBE
        bool
        default y
 
+config IRQ_PER_CPU
+       depends on SMP
+       bool
+       default y
+
 #
 # - Highmem only makes sense for the 32-bit kernel.
 # - The current highmem code will only work properly on physically indexed
index ab444c7..12d6ede 100644 (file)
@@ -333,31 +333,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
                                au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG0SET);
-                               irq_desc[irq_nr].handler = &rise_edge_irq_type;
+                               irq_desc[irq_nr].chip = &rise_edge_irq_type;
                                break;
                        case INTC_INT_FALL_EDGE: /* 0:1:0 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG1SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
-                               irq_desc[irq_nr].handler = &fall_edge_irq_type;
+                               irq_desc[irq_nr].chip = &fall_edge_irq_type;
                                break;
                        case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG1SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG0SET);
-                               irq_desc[irq_nr].handler = &either_edge_irq_type;
+                               irq_desc[irq_nr].chip = &either_edge_irq_type;
                                break;
                        case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG0SET);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_LOW_LEVEL: /* 1:1:0 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG1SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_DISABLED: /* 0:0:0 */
                                au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
@@ -385,31 +385,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
                                au_writel(1<<irq_nr, IC0_CFG2CLR);
                                au_writel(1<<irq_nr, IC0_CFG1CLR);
                                au_writel(1<<irq_nr, IC0_CFG0SET);
-                               irq_desc[irq_nr].handler = &rise_edge_irq_type;
+                               irq_desc[irq_nr].chip = &rise_edge_irq_type;
                                break;
                        case INTC_INT_FALL_EDGE: /* 0:1:0 */
                                au_writel(1<<irq_nr, IC0_CFG2CLR);
                                au_writel(1<<irq_nr, IC0_CFG1SET);
                                au_writel(1<<irq_nr, IC0_CFG0CLR);
-                               irq_desc[irq_nr].handler = &fall_edge_irq_type;
+                               irq_desc[irq_nr].chip = &fall_edge_irq_type;
                                break;
                        case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
                                au_writel(1<<irq_nr, IC0_CFG2CLR);
                                au_writel(1<<irq_nr, IC0_CFG1SET);
                                au_writel(1<<irq_nr, IC0_CFG0SET);
-                               irq_desc[irq_nr].handler = &either_edge_irq_type;
+                               irq_desc[irq_nr].chip = &either_edge_irq_type;
                                break;
                        case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
                                au_writel(1<<irq_nr, IC0_CFG2SET);
                                au_writel(1<<irq_nr, IC0_CFG1CLR);
                                au_writel(1<<irq_nr, IC0_CFG0SET);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_LOW_LEVEL: /* 1:1:0 */
                                au_writel(1<<irq_nr, IC0_CFG2SET);
                                au_writel(1<<irq_nr, IC0_CFG1SET);
                                au_writel(1<<irq_nr, IC0_CFG0CLR);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_DISABLED: /* 0:0:0 */
                                au_writel(1<<irq_nr, IC0_CFG0CLR);
index bacc0c6..5dd164f 100644 (file)
@@ -172,7 +172,7 @@ void _board_init_irq(void)
 
        for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
        {
-               irq_desc[irq_nr].handler = &external_irq_type;
+               irq_desc[irq_nr].chip = &external_irq_type;
                pb1200_disable_irq(irq_nr);
        }
 
index 5fcd5f0..63c3d65 100644 (file)
@@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &vrc5477_irq_controller;
+               irq_desc[i].chip = &vrc5477_irq_controller;
        }
 
        vrc5477_irq_base = irq_base;
index d5bca5d..da2dbb4 100644 (file)
@@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &ioasic_irq_type;
+               irq_desc[i].chip = &ioasic_irq_type;
        }
        for (; i < base + IO_IRQ_LINES; i++) {
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &ioasic_dma_irq_type;
+               irq_desc[i].chip = &ioasic_dma_irq_type;
        }
 
        ioasic_irq_base = base;
index 898bed5..d44c00d 100644 (file)
@@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &kn02_irq_type;
+               irq_desc[i].chip = &kn02_irq_type;
        }
 
        kn02_irq_base = base;
index 46c468b..f489a80 100644 (file)
@@ -138,7 +138,7 @@ void __init arch_init_irq(void)
        /*  Let's initialize our IRQ descriptors  */
        for (i = 0; i < NR_IRQS; i++) {
                irq_desc[i].status = 0;
-               irq_desc[i].handler = &no_irq_type;
+               irq_desc[i].chip = &no_irq_type;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 0;
                spin_lock_init(&irq_desc[i].lock);
index 77be721..a6749c5 100644 (file)
@@ -208,10 +208,10 @@ void __init arch_init_irq(void)
 #endif
 
        for (i = 0; i <= IT8172_LAST_IRQ; i++) {
-               irq_desc[i].handler = &it8172_irq_type;
+               irq_desc[i].chip = &it8172_irq_type;
                spin_lock_init(&irq_desc[i].lock);
        }
-       irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
+       irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
        set_c0_status(ALLINTS_NOTIMER);
 }
 
index becc9ac..478be98 100644 (file)
@@ -73,7 +73,7 @@ void __init init_r4030_ints(void)
                irq_desc[i].status     = IRQ_DISABLED;
                irq_desc[i].action     = 0;
                irq_desc[i].depth      = 1;
-               irq_desc[i].handler    = &r4030_irq_type;
+               irq_desc[i].chip    = &r4030_irq_type;
        }
 
        r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
index 11304d1..380046e 100644 (file)
@@ -435,7 +435,7 @@ void jmr3927_irq_init(u32 irq_base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &jmr3927_irq_controller;
+               irq_desc[i].chip = &jmr3927_irq_controller;
        }
 
        jmr3927_irq_base = irq_base;
index 0cb8ed5..91ffb12 100644 (file)
@@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq)
 void make_8259A_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &i8259A_irq_type;
+       irq_desc[irq].chip = &i8259A_irq_type;
        enable_irq(irq);
 }
 
@@ -327,7 +327,7 @@ void __init init_i8259_irqs (void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &i8259A_irq_type;
+               irq_desc[i].chip = &i8259A_irq_type;
        }
 
        setup_irq(2, &irq2);
index 97ebdc7..f8cd1ac 100644 (file)
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
 
                switch (imp->im_type) {
                case MSC01_IRQ_EDGE:
-                       irq_desc[base+n].handler = &msc_edgeirq_type;
+                       irq_desc[base+n].chip = &msc_edgeirq_type;
                        if (cpu_has_veic)
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
                        else
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
                        break;
                case MSC01_IRQ_LEVEL:
-                       irq_desc[base+n].handler = &msc_levelirq_type;
+                       irq_desc[base+n].chip = &msc_levelirq_type;
                        if (cpu_has_veic)
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
                        else
index 0613f1f..f9c763a 100644 (file)
@@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &mv64340_irq_type;
+               irq_desc[i].chip = &mv64340_irq_type;
        }
 
        irq_base = base;
index 0b130c5..121da38 100644 (file)
@@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &rm7k_irq_controller;
+               irq_desc[i].chip = &rm7k_irq_controller;
        }
 
        irq_base = base;
index 9b5f20c..25109c1 100644 (file)
@@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &rm9k_irq_controller;
+               irq_desc[i].chip = &rm9k_irq_controller;
        }
 
        rm9000_perfcount_irq = base + 1;
-       irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq;
+       irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq;
 
        irq_base = base;
 }
index 3dce742..5c9dcd5 100644 (file)
@@ -95,7 +95,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -137,7 +137,7 @@ void __init init_IRQ(void)
                irq_desc[i].status  = IRQ_DISABLED;
                irq_desc[i].action  = NULL;
                irq_desc[i].depth   = 1;
-               irq_desc[i].handler = &no_irq_type;
+               irq_desc[i].chip = &no_irq_type;
                spin_lock_init(&irq_desc[i].lock);
 #ifdef CONFIG_MIPS_MT_SMTC
                irq_hwmask[i] = 0;
index 5db67e3..0e455a8 100644 (file)
@@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base)
                        irq_desc[i].status = IRQ_DISABLED;
                        irq_desc[i].action = NULL;
                        irq_desc[i].depth = 1;
-                       irq_desc[i].handler = &mips_mt_cpu_irq_controller;
+                       irq_desc[i].chip = &mips_mt_cpu_irq_controller;
                }
 
        for (i = irq_base + 2; i < irq_base + 8; i++) {
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &mips_cpu_irq_controller;
+               irq_desc[i].chip = &mips_cpu_irq_controller;
        }
 
        mips_cpu_irq_base = irq_base;
index 2d3472b..9316a02 100644 (file)
@@ -156,6 +156,6 @@ void __init arch_init_irq(void)
                irq_desc[i].status      = IRQ_DISABLED;
                irq_desc[i].action      = 0;
                irq_desc[i].depth       = 1;
-               irq_desc[i].handler     = &lasat_irq_type;
+               irq_desc[i].chip        = &lasat_irq_type;
        }
 }
index db53950..9dd6b89 100644 (file)
@@ -215,7 +215,7 @@ void __init arch_init_irq(void)
                irq_desc[i].status      = IRQ_DISABLED;
                irq_desc[i].action      = 0;
                irq_desc[i].depth       = 1;
-               irq_desc[i].handler     = &atlas_irq_type;
+               irq_desc[i].chip        = &atlas_irq_type;
                spin_lock_init(&irq_desc[i].lock);
        }
 }
index bd88578..31d179c 100644 (file)
@@ -147,6 +147,6 @@ void cpci_irq_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &cpci_irq_type;
+               irq_desc[i].chip = &cpci_irq_type;
        }
 }
index 755bde5..8522650 100644 (file)
@@ -137,10 +137,10 @@ void uart_irq_init(void)
        irq_desc[80].status = IRQ_DISABLED;
        irq_desc[80].action = 0;
        irq_desc[80].depth = 2;
-       irq_desc[80].handler = &uart_irq_type;
+       irq_desc[80].chip = &uart_irq_type;
 
        irq_desc[81].status = IRQ_DISABLED;
        irq_desc[81].action = 0;
        irq_desc[81].depth = 2;
-       irq_desc[81].handler = &uart_irq_type;
+       irq_desc[81].chip = &uart_irq_type;
 }
index 4dfce15..ba66f8c 100644 (file)
@@ -51,11 +51,11 @@ unsigned long PCIBIOS_MIN_MEM       = 0;
  */
 void
 pcibios_align_resource(void *data, struct resource *res,
-                      unsigned long size, unsigned long align)
+                      resource_size_t size, resource_size_t align)
 {
        struct pci_dev *dev = data;
        struct pci_controller *hose = dev->sysdata;
-       unsigned long start = res->start;
+       resource_size_t start = res->start;
 
        if (res->flags & IORESOURCE_IO) {
                /* Make sure we start at our min on all hoses */
index 39ee631..8f18764 100644 (file)
@@ -236,7 +236,7 @@ void __init arch_init_irq(void)
        int configPR;
 
        for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
-               irq_desc[i].handler = &level_irq_type;
+               irq_desc[i].chip = &level_irq_type;
                pnx8550_ack(i); /* mask the irq just in case  */
        }
 
@@ -273,7 +273,7 @@ void __init arch_init_irq(void)
                /* mask/priority is still 0 so we will not get any
                 * interrupts until it is unmasked */
 
-               irq_desc[i].handler = &level_irq_type;
+               irq_desc[i].chip = &level_irq_type;
        }
 
        /* Priority level 0 */
@@ -282,12 +282,12 @@ void __init arch_init_irq(void)
        /* Set int vector table address */
        PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0;
 
-       irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type;
+       irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type;
        setup_irq(MIPS_CPU_GIC_IRQ, &gic_action);
 
        /* init of Timer interrupts */
        for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) {
-               irq_desc[i].handler = &level_irq_type;
+               irq_desc[i].chip = &level_irq_type;
        }
 
        /* Stop Timer 1-3 */
@@ -295,7 +295,7 @@ void __init arch_init_irq(void)
        configPR |= 0x00000038;
        write_c0_config7(configPR);
 
-       irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type;
+       irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type;
        setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action);
 }
 
index 54b65a8..fb523eb 100644 (file)
@@ -383,12 +383,12 @@ void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
 
 
 void pcibios_align_resource(void *data, struct resource *res,
-                            unsigned long size, unsigned long align)
+                            resource_size_t size, resource_size_t align)
 {
         struct pci_dev *dev = data;
 
         if (res->flags & IORESOURCE_IO) {
-                unsigned long start = res->start;
+                resource_size_t start = res->start;
 
                 /* We need to avoid collisions with `mirrored' VGA ports
                    and other strange ISA hardware, so we always want the
index b198201..989167b 100644 (file)
@@ -279,9 +279,9 @@ int __init ip22_eisa_init(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
                if (i < (SGINT_EISA + 8))
-                       irq_desc[i].handler = &ip22_eisa1_irq_type;
+                       irq_desc[i].chip = &ip22_eisa1_irq_type;
                else
-                       irq_desc[i].handler = &ip22_eisa2_irq_type;
+                       irq_desc[i].chip = &ip22_eisa2_irq_type;
        }
 
        /* Cannot use request_irq because of kmalloc not being ready at such
index fc6a7e2..18906af 100644 (file)
@@ -436,7 +436,7 @@ void __init arch_init_irq(void)
                irq_desc[i].status      = IRQ_DISABLED;
                irq_desc[i].action      = 0;
                irq_desc[i].depth       = 1;
-               irq_desc[i].handler     = handler;
+               irq_desc[i].chip        = handler;
        }
 
        /* vector handler. this register the IRQ as non-sharable */
index 0b61a39..869566c 100644 (file)
@@ -386,7 +386,7 @@ void __devinit register_bridge_irq(unsigned int irq)
        irq_desc[irq].status    = IRQ_DISABLED;
        irq_desc[irq].action    = 0;
        irq_desc[irq].depth     = 1;
-       irq_desc[irq].handler   = &bridge_irq_type;
+       irq_desc[irq].chip      = &bridge_irq_type;
 }
 
 int __devinit request_bridge_irq(struct bridge_controller *bc)
index 8ba0804..00b94aa 100644 (file)
@@ -591,7 +591,7 @@ void __init arch_init_irq(void)
                irq_desc[irq].status = IRQ_DISABLED;
                irq_desc[irq].action = 0;
                irq_desc[irq].depth = 0;
-               irq_desc[irq].handler = controller;
+               irq_desc[irq].chip = controller;
        }
        setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
        setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
index e61760b..610df40 100644 (file)
@@ -276,10 +276,10 @@ void __init init_bcm1480_irqs(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
                if (i < BCM1480_NR_IRQS) {
-                       irq_desc[i].handler = &bcm1480_irq_type;
+                       irq_desc[i].chip = &bcm1480_irq_type;
                        bcm1480_irq_owner[i] = 0;
                } else {
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index f853c32..fcc6194 100644 (file)
@@ -246,10 +246,10 @@ void __init init_sb1250_irqs(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
                if (i < SB1250_NR_IRQS) {
-                       irq_desc[i].handler = &sb1250_irq_type;
+                       irq_desc[i].chip = &sb1250_irq_type;
                        sb1250_irq_owner[i] = 0;
                } else {
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index 7365b48..c19e158 100644 (file)
@@ -203,7 +203,7 @@ void __init arch_init_irq(void)
                irq_desc[i].status     = IRQ_DISABLED;
                irq_desc[i].action     = 0;
                irq_desc[i].depth      = 1;
-               irq_desc[i].handler    = &pciasic_irq_type;
+               irq_desc[i].chip    = &pciasic_irq_type;
        }
 
        change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4);
index 8ca6801..a42be00 100644 (file)
@@ -227,7 +227,7 @@ static void __init tx4927_irq_cp0_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &tx4927_irq_cp0_type;
+               irq_desc[i].chip = &tx4927_irq_cp0_type;
        }
 
        return;
@@ -435,7 +435,7 @@ static void __init tx4927_irq_pic_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &tx4927_irq_pic_type;
+               irq_desc[i].chip = &tx4927_irq_pic_type;
        }
 
        setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
index aee07ff..c67978b 100644 (file)
@@ -368,7 +368,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 3;
-               irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type;
+               irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
        }
 
        setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
@@ -526,7 +526,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth =
                    ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
-               irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type;
+               irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
        }
 
        setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
@@ -692,13 +692,13 @@ void toshiba_rbtx4927_irq_dump(char *key)
        {
                u32 i, j = 0;
                for (i = 0; i < NR_IRQS; i++) {
-                       if (strcmp(irq_desc[i].handler->typename, "none")
+                       if (strcmp(irq_desc[i].chip->typename, "none")
                            == 0)
                                continue;
 
                        if ((i >= 1)
-                           && (irq_desc[i - 1].handler->typename ==
-                               irq_desc[i].handler->typename)) {
+                           && (irq_desc[i - 1].chip->typename ==
+                               irq_desc[i].chip->typename)) {
                                j++;
                        } else {
                                j = 0;
@@ -707,12 +707,12 @@ void toshiba_rbtx4927_irq_dump(char *key)
                            (TOSHIBA_RBTX4927_IRQ_INFO,
                             "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
                             key, i, i, irq_desc[i].status,
-                            (u32) irq_desc[i].handler,
+                            (u32) irq_desc[i].chip,
                             (u32) irq_desc[i].action,
                             (u32) (irq_desc[i].action ? irq_desc[i].
                                    action->handler : 0),
                             irq_desc[i].depth,
-                            irq_desc[i].handler->typename, j);
+                            irq_desc[i].chip->typename, j);
                }
        }
 #endif
index 8738051..0b2f8c8 100644 (file)
@@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &tx4938_irq_cp0_type;
+               irq_desc[i].chip = &tx4938_irq_cp0_type;
        }
 
        return;
@@ -306,7 +306,7 @@ tx4938_irq_pic_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &tx4938_irq_pic_type;
+               irq_desc[i].chip = &tx4938_irq_pic_type;
        }
 
        setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action);
index 9cd9c0f..3b8245d 100644 (file)
@@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 3;
-               irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type;
+               irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type;
        }
 
        setup_irq(RBTX4938_IRQ_IOCINT,
index 07ae19c..b932330 100644 (file)
@@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void)
        icu2_write(MGIUINTHREG, 0xffff);
 
        for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
-               irq_desc[i].handler = &sysint1_irq_type;
+               irq_desc[i].chip = &sysint1_irq_type;
 
        for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
-               irq_desc[i].handler = &sysint2_irq_type;
+               irq_desc[i].chip = &sysint2_irq_type;
 
        cascade_irq(INT0_IRQ, icu_get_irq);
        cascade_irq(INT1_IRQ, icu_get_irq);
index 86796bb..66aa508 100644 (file)
@@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
        if (cascade->get_irq != NULL) {
                unsigned int source_irq = irq;
                desc = irq_desc + source_irq;
-               desc->handler->ack(source_irq);
+               desc->chip->ack(source_irq);
                irq = cascade->get_irq(irq, regs);
                if (irq < 0)
                        atomic_inc(&irq_err_count);
                else
                        irq_dispatch(irq, regs);
-               desc->handler->end(source_irq);
+               desc->chip->end(source_irq);
        } else
                do_IRQ(irq, regs);
 }
index 3e31f81..2d287b8 100644 (file)
@@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq)
        vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
 
        for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
-                irq_desc[i].handler = &vrc4173_irq_type;
+                irq_desc[i].chip = &vrc4173_irq_type;
 
        return 0;
 }
index 31db6b6..7b2511c 100644 (file)
@@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void)
        }
 
        for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
-               irq_desc[i].handler = &i8259_irq_type;
+               irq_desc[i].chip = &i8259_irq_type;
 
        setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
 
index 910fb3a..6dd0ea8 100644 (file)
@@ -51,6 +51,10 @@ config GENERIC_HARDIRQS
 config GENERIC_IRQ_PROBE
        def_bool y
 
+config IRQ_PER_CPU
+       bool
+       default y
+
 # unless you want to implement ACPI on PA-RISC ... ;-)
 config PM
        bool
index c057ad7..bc7c4a4 100644 (file)
@@ -97,15 +97,17 @@ update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 void
 show_cache_info(struct seq_file *m)
 {
+       char buf[32];
+
        seq_printf(m, "I-cache\t\t: %ld KB\n", 
                cache_info.ic_size/1024 );
-       seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %d-way associative)\n", 
+       if (cache_info.dc_loop == 1)
+               snprintf(buf, 32, "%lu-way associative", cache_info.dc_loop);
+       seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %s)\n",
                cache_info.dc_size/1024,
                (cache_info.dc_conf.cc_wt ? "WT":"WB"),
                (cache_info.dc_conf.cc_sh ? ", shared I/D":""),
-               (cache_info.dc_conf.cc_assoc)
-       );
-
+               ((cache_info.dc_loop == 1) ? "direct mapped" : buf));
        seq_printf(m, "ITLB entries\t: %ld\n" "DTLB entries\t: %ld%s\n",
                cache_info.it_size,
                cache_info.dt_size,
@@ -158,11 +160,11 @@ parisc_cache_init(void)
                cache_info.dc_conf.cc_block,
                cache_info.dc_conf.cc_line,
                cache_info.dc_conf.cc_shift);
-       printk("        wt %d sh %d cst %d assoc %d\n",
+       printk("        wt %d sh %d cst %d hv %d\n",
                cache_info.dc_conf.cc_wt,
                cache_info.dc_conf.cc_sh,
                cache_info.dc_conf.cc_cst,
-               cache_info.dc_conf.cc_assoc);
+               cache_info.dc_conf.cc_hv);
 
        printk("IC  base 0x%lx stride 0x%lx count 0x%lx loop 0x%lx\n",
                cache_info.ic_base,
@@ -176,11 +178,11 @@ parisc_cache_init(void)
                cache_info.ic_conf.cc_block,
                cache_info.ic_conf.cc_line,
                cache_info.ic_conf.cc_shift);
-       printk("        wt %d sh %d cst %d assoc %d\n",
+       printk("        wt %d sh %d cst %d hv %d\n",
                cache_info.ic_conf.cc_wt,
                cache_info.ic_conf.cc_sh,
                cache_info.ic_conf.cc_cst,
-               cache_info.ic_conf.cc_assoc);
+               cache_info.ic_conf.cc_hv);
 
        printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n",
                cache_info.dt_conf.tc_sh,
@@ -234,7 +236,8 @@ parisc_cache_init(void)
 
 void disable_sr_hashing(void)
 {
-       int srhash_type;
+       int srhash_type, retval;
+       unsigned long space_bits;
 
        switch (boot_cpu_data.cpu_type) {
        case pcx: /* We shouldn't get this far.  setup.c should prevent it. */
@@ -260,6 +263,13 @@ void disable_sr_hashing(void)
        }
 
        disable_sr_hashing_asm(srhash_type);
+
+       retval = pdc_spaceid_bits(&space_bits);
+       /* If this procedure isn't implemented, don't panic. */
+       if (retval < 0 && retval != PDC_BAD_OPTION)
+               panic("pdc_spaceid_bits call failed.\n");
+       if (space_bits != 0)
+               panic("SpaceID hashing is still on!\n");
 }
 
 void flush_dcache_page(struct page *page)
index d9e53cf..630730c 100644 (file)
@@ -1638,7 +1638,7 @@ dbit_trap_20w:
        load32          PA(pa_dbit_lock),t0
 
 dbit_spin_20w:
-       ldcw            0(t0),t1
+       LDCW            0(t0),t1
        cmpib,=         0,t1,dbit_spin_20w
        nop
 
@@ -1674,7 +1674,7 @@ dbit_trap_11:
        load32          PA(pa_dbit_lock),t0
 
 dbit_spin_11:
-       ldcw            0(t0),t1
+       LDCW            0(t0),t1
        cmpib,=         0,t1,dbit_spin_11
        nop
 
@@ -1714,7 +1714,7 @@ dbit_trap_20:
        load32          PA(pa_dbit_lock),t0
 
 dbit_spin_20:
-       ldcw            0(t0),t1
+       LDCW            0(t0),t1
        cmpib,=         0,t1,dbit_spin_20
        nop
 
index 2dc06b8..4398d2a 100644 (file)
@@ -11,7 +11,7 @@
  * Copyright 1999 The Puffin Group, (Alex deVries, David Kennedy)
  * Copyright 2003 Grant Grundler <grundler parisc-linux org>
  * Copyright 2003,2004 Ryan Bradetich <rbrad@parisc-linux.org>
- * Copyright 2004 Thibaut VARENE <varenet@parisc-linux.org>
+ * Copyright 2004,2006 Thibaut VARENE <varenet@parisc-linux.org>
  *
  *    This program is free software; you can redistribute it and/or modify
  *    it under the terms of the GNU General Public License as published by
@@ -252,10 +252,8 @@ int pdc_pat_chassis_send_log(unsigned long state, unsigned long data)
 #endif
 
 /**
- * pdc_chassis_disp - Updates display
+ * pdc_chassis_disp - Updates chassis code
  * @retval: -1 on error, 0 on success
- *
- * Works on old PDC only (E class, others?)
  */
 int pdc_chassis_disp(unsigned long disp)
 {
@@ -269,6 +267,22 @@ int pdc_chassis_disp(unsigned long disp)
 }
 
 /**
+ * pdc_chassis_warn - Fetches chassis warnings
+ * @retval: -1 on error, 0 on success
+ */
+int pdc_chassis_warn(unsigned long *warn)
+{
+       int retval = 0;
+
+       spin_lock_irq(&pdc_lock);
+       retval = mem_pdc_call(PDC_CHASSIS, PDC_CHASSIS_WARN, __pa(pdc_result));
+       *warn = pdc_result[0];
+       spin_unlock_irq(&pdc_lock);
+
+       return retval;
+}
+
+/**
  * pdc_coproc_cfg - To identify coprocessors attached to the processor.
  * @pdc_coproc_info: Return buffer address.
  *
@@ -393,7 +407,9 @@ int pdc_model_info(struct pdc_model *model)
  * pdc_model_sysmodel - Get the system model name.
  * @name: A char array of at least 81 characters.
  *
- * Get system model name from PDC ROM (e.g. 9000/715 or 9000/778/B160L)
+ * Get system model name from PDC ROM (e.g. 9000/715 or 9000/778/B160L).
+ * Using OS_ID_HPUX will return the equivalent of the 'modelname' command
+ * on HP/UX.
  */
 int pdc_model_sysmodel(char *name)
 {
@@ -498,6 +514,26 @@ int pdc_cache_info(struct pdc_cache_info *cache_info)
         return retval;
 }
 
+/**
+ * pdc_spaceid_bits - Return whether Space ID hashing is turned on.
+ * @space_bits: Should be 0, if not, bad mojo!
+ *
+ * Returns information about Space ID hashing.
+ */
+int pdc_spaceid_bits(unsigned long *space_bits)
+{
+       int retval;
+
+       spin_lock_irq(&pdc_lock);
+       pdc_result[0] = 0;
+       retval = mem_pdc_call(PDC_CACHE, PDC_CACHE_RET_SPID, __pa(pdc_result), 0);
+       convert_to_wide(pdc_result);
+       *space_bits = pdc_result[0];
+       spin_unlock_irq(&pdc_lock);
+
+       return retval;
+}
+
 #ifndef CONFIG_PA20
 /**
  * pdc_btlb_info - Return block TLB information.
index 197936d..82fe6ba 100644 (file)
@@ -94,7 +94,7 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
        if (irq == TIMER_IRQ || irq == IPI_IRQ) {
                /* Bad linux design decision.  The mask has already
                 * been set; we must reset it */
-               irq_affinity[irq] = CPU_MASK_ALL;
+               irq_desc[irq].affinity = CPU_MASK_ALL;
                return -EINVAL;
        }
 
@@ -110,7 +110,7 @@ static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest)
        if (cpu_check_affinity(irq, &dest))
                return;
 
-       irq_affinity[irq] = dest;
+       irq_desc[irq].affinity = dest;
 }
 #endif
 
@@ -125,6 +125,10 @@ static struct hw_interrupt_type cpu_interrupt_type = {
 #ifdef CONFIG_SMP
        .set_affinity   = cpu_set_affinity_irq,
 #endif
+       /* XXX: Needs to be written.  We managed without it so far, but
+        * we really ought to write it.
+        */
+       .retrigger      = NULL,
 };
 
 int show_interrupts(struct seq_file *p, void *v)
@@ -158,7 +162,7 @@ int show_interrupts(struct seq_file *p, void *v)
                seq_printf(p, "%10u ", kstat_irqs(i));
 #endif
 
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
 #ifndef PARISC_IRQ_CR16_COUNTS
                seq_printf(p, "  %s", action->name);
 
@@ -210,12 +214,12 @@ int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data)
 {
        if (irq_desc[irq].action)
                return -EBUSY;
-       if (irq_desc[irq].handler != &cpu_interrupt_type)
+       if (irq_desc[irq].chip != &cpu_interrupt_type)
                return -EBUSY;
 
        if (type) {
-               irq_desc[irq].handler = type;
-               irq_desc[irq].handler_data = data;
+               irq_desc[irq].chip = type;
+               irq_desc[irq].chip_data = data;
                cpu_interrupt_type.enable(irq);
        }
        return 0;
@@ -265,7 +269,7 @@ int txn_alloc_irq(unsigned int bits_wide)
 unsigned long txn_affinity_addr(unsigned int irq, int cpu)
 {
 #ifdef CONFIG_SMP
-       irq_affinity[irq] = cpumask_of_cpu(cpu);
+       irq_desc[irq].affinity = cpumask_of_cpu(cpu);
 #endif
 
        return cpu_data[cpu].txn_addr;
@@ -326,7 +330,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
                /* Work our way from MSb to LSb...same order we alloc EIRs */
                for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) {
 #ifdef CONFIG_SMP
-                       cpumask_t dest = irq_affinity[irq];
+                       cpumask_t dest = irq_desc[irq].affinity;
 #endif
                        if (!(bit & eirr_val))
                                continue;
@@ -378,7 +382,7 @@ static void claim_cpu_irqs(void)
 {
        int i;
        for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
-               irq_desc[i].handler = &cpu_interrupt_type;
+               irq_desc[i].chip = &cpu_interrupt_type;
        }
 
        irq_desc[TIMER_IRQ].action = &timer_action;
@@ -404,13 +408,6 @@ void __init init_IRQ(void)
 
 }
 
-void hw_resend_irq(struct hw_interrupt_type *type, unsigned int irq)
-{
-       /* XXX: Needs to be written.  We managed without it so far, but
-        * we really ought to write it.
-        */
-}
-
 void ack_bad_irq(unsigned int irq)
 {
        printk("unexpected IRQ %d\n", irq);
index f27cfe4..aee3118 100644 (file)
@@ -89,6 +89,12 @@ static inline int is_local(struct module *me, void *loc)
        return is_init(me, loc) || is_core(me, loc);
 }
 
+static inline int is_local_section(struct module *me, void *loc, void *dot)
+{
+       return (is_init(me, loc) && is_init(me, dot)) ||
+               (is_core(me, loc) && is_core(me, dot));
+}
+
 
 #ifndef __LP64__
 struct got_entry {
@@ -364,8 +370,14 @@ static Elf_Addr get_fdesc(struct module *me, unsigned long value)
 }
 #endif /* __LP64__ */
 
+enum elf_stub_type {
+       ELF_STUB_GOT,
+       ELF_STUB_MILLI,
+       ELF_STUB_DIRECT,
+};
+
 static Elf_Addr get_stub(struct module *me, unsigned long value, long addend,
-       int millicode, int init_section)
+       enum elf_stub_type stub_type, int init_section)
 {
        unsigned long i;
        struct stub_entry *stub;
@@ -396,7 +408,7 @@ static Elf_Addr get_stub(struct module *me, unsigned long value, long addend,
        stub->insns[1] |= reassemble_17(rrsel(value, addend) / 4);
 
 #else
-/* for 64-bit we have two kinds of stubs:
+/* for 64-bit we have three kinds of stubs:
  * for normal function calls:
  *     ldd 0(%dp),%dp
  *     ldd 10(%dp), %r1
@@ -408,18 +420,23 @@ static Elf_Addr get_stub(struct module *me, unsigned long value, long addend,
  *     ldo 0(%r1), %r1
  *     ldd 10(%r1), %r1
  *     bve,n (%r1)
+ *
+ * for direct branches (jumps between different section of the
+ * same module):
+ *     ldil 0, %r1
+ *     ldo 0(%r1), %r1
+ *     bve,n (%r1)
  */
-       if (!millicode)
-       {
+       switch (stub_type) {
+       case ELF_STUB_GOT:
                stub->insns[0] = 0x537b0000;    /* ldd 0(%dp),%dp       */
                stub->insns[1] = 0x53610020;    /* ldd 10(%dp),%r1      */
                stub->insns[2] = 0xe820d000;    /* bve (%r1)            */
                stub->insns[3] = 0x537b0030;    /* ldd 18(%dp),%dp      */
 
                stub->insns[0] |= reassemble_14(get_got(me, value, addend) & 0x3fff);
-       }
-       else
-       {
+               break;
+       case ELF_STUB_MILLI:
                stub->insns[0] = 0x20200000;    /* ldil 0,%r1           */
                stub->insns[1] = 0x34210000;    /* ldo 0(%r1), %r1      */
                stub->insns[2] = 0x50210020;    /* ldd 10(%r1),%r1      */
@@ -427,7 +444,17 @@ static Elf_Addr get_stub(struct module *me, unsigned long value, long addend,
 
                stub->insns[0] |= reassemble_21(lrsel(value, addend));
                stub->insns[1] |= reassemble_14(rrsel(value, addend));
+               break;
+       case ELF_STUB_DIRECT:
+               stub->insns[0] = 0x20200000;    /* ldil 0,%r1           */
+               stub->insns[1] = 0x34210000;    /* ldo 0(%r1), %r1      */
+               stub->insns[2] = 0xe820d002;    /* bve,n (%r1)          */
+
+               stub->insns[0] |= reassemble_21(lrsel(value, addend));
+               stub->insns[1] |= reassemble_14(rrsel(value, addend));
+               break;
        }
+
 #endif
 
        return (Elf_Addr)stub;
@@ -539,14 +566,14 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
                        break;
                case R_PARISC_PCREL17F:
                        /* 17-bit PC relative address */
-                       val = get_stub(me, val, addend, 0, is_init(me, loc));
+                       val = get_stub(me, val, addend, ELF_STUB_GOT, is_init(me, loc));
                        val = (val - dot - 8)/4;
                        CHECK_RELOC(val, 17)
                        *loc = (*loc & ~0x1f1ffd) | reassemble_17(val);
                        break;
                case R_PARISC_PCREL22F:
                        /* 22-bit PC relative address; only defined for pa20 */
-                       val = get_stub(me, val, addend, 0, is_init(me, loc));
+                       val = get_stub(me, val, addend, ELF_STUB_GOT, is_init(me, loc));
                        DEBUGP("STUB FOR %s loc %lx+%lx at %lx\n", 
                               strtab + sym->st_name, (unsigned long)loc, addend, 
                               val)
@@ -643,13 +670,23 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
                               strtab + sym->st_name,
                               loc, val);
                        /* can we reach it locally? */
-                       if(!is_local(me, (void *)val)) {
-                               if (strncmp(strtab + sym->st_name, "$$", 2)
+                       if(!is_local_section(me, (void *)val, (void *)dot)) {
+
+                               if (is_local(me, (void *)val))
+                                       /* this is the case where the
+                                        * symbol is local to the
+                                        * module, but in a different
+                                        * section, so stub the jump
+                                        * in case it's more than 22
+                                        * bits away */
+                                       val = get_stub(me, val, addend, ELF_STUB_DIRECT,
+                                                      is_init(me, loc));
+                               else if (strncmp(strtab + sym->st_name, "$$", 2)
                                    == 0)
-                                       val = get_stub(me, val, addend, 1,
+                                       val = get_stub(me, val, addend, ELF_STUB_MILLI,
                                                       is_init(me, loc));
                                else
-                                       val = get_stub(me, val, addend, 0,
+                                       val = get_stub(me, val, addend, ELF_STUB_GOT,
                                                       is_init(me, loc));
                        }
                        DEBUGP("STUB FOR %s loc %lx, val %lx+%lx at %lx\n", 
index 79c7db2..7d6967e 100644 (file)
@@ -289,7 +289,7 @@ EXPORT_SYMBOL(pcibios_bus_to_resource);
  * than res->start.
  */
 void pcibios_align_resource(void *data, struct resource *res,
-                               unsigned long size, unsigned long alignment)
+                               resource_size_t size, resource_size_t alignment)
 {
        unsigned long mask, align;
 
index a45e2e2..d47ba1a 100644 (file)
@@ -1,8 +1,8 @@
 /* 
- *    interfaces to log Chassis Codes via PDC (firmware)
+ *    interfaces to Chassis Codes via PDC (firmware)
  *
  *    Copyright (C) 2002 Laurent Canet <canetl@esiee.fr>
- *    Copyright (C) 2002-2004 Thibaut VARENE <varenet@parisc-linux.org>
+ *    Copyright (C) 2002-2006 Thibaut VARENE <varenet@parisc-linux.org>
  *
  *    This program is free software; you can redistribute it and/or modify
  *    it under the terms of the GNU General Public License, version 2, as
@@ -16,6