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Handle mtc0 - tlb write hazard for VR5432.
Ralf Baechle [Mon, 29 Aug 2005 16:49:55 +0000 (16:49 +0000)]
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/tlbex.c
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diff --git
a/arch/mips/mm/tlbex.c
b/arch/mips/mm/tlbex.c
index
c3c75a2
..
e8a8ffd
100644
(file)
--- a/
arch/mips/mm/tlbex.c
+++ b/
arch/mips/mm/tlbex.c
@@
-916,6
+916,7
@@
static __init void build_tlb_write_entry(u32 **p, struct label **l,
case CPU_VR4131:
case CPU_VR4133:
+ case CPU_R5432:
i_nop(p);
i_nop(p);
tlbw(p);