x86/oprofile: Fix cast of counter value
[linux-2.6.git] / arch / x86 / oprofile / op_model_p4.c
index 05ba028..9db9e36 100644 (file)
@@ -32,6 +32,8 @@
 #define NUM_CCCRS_HT2 9
 #define NUM_CONTROLS_HT2 (NUM_ESCRS_HT2 + NUM_CCCRS_HT2)
 
+#define OP_CTR_OVERFLOW                        (1ULL<<31)
+
 static unsigned int num_counters = NUM_COUNTERS_NON_HT;
 static unsigned int num_controls = NUM_CONTROLS_NON_HT;
 
@@ -362,8 +364,6 @@ static struct p4_event_binding p4_events[NUM_EVENTS] = {
 #define CCCR_OVF_P(cccr) ((cccr) & (1U<<31))
 #define CCCR_CLEAR_OVF(cccr) ((cccr) &= (~(1U<<31)))
 
-#define CTR_OVERFLOW_P(ctr) (!((ctr) & 0x80000000))
-
 
 /* this assigns a "stagger" to the current CPU, which is used throughout
    the code in this module as an extra array offset, to select the "even"
@@ -559,7 +559,7 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model,
 
        /* clear the cccrs we will use */
        for (i = 0 ; i < num_counters ; i++) {
-               if (unlikely(!CTRL_IS_RESERVED(msrs, i)))
+               if (unlikely(!msrs->controls[i].addr))
                        continue;
                rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
                CCCR_CLEAR(low);
@@ -569,18 +569,18 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model,
 
        /* clear all escrs (including those outside our concern) */
        for (i = num_counters; i < num_controls; i++) {
-               if (unlikely(!CTRL_IS_RESERVED(msrs, i)))
+               if (unlikely(!msrs->controls[i].addr))
                        continue;
                wrmsr(msrs->controls[i].addr, 0, 0);
        }
 
        /* setup all counters */
        for (i = 0 ; i < num_counters ; ++i) {
-               if ((counter_config[i].enabled) && (CTRL_IS_RESERVED(msrs, i))) {
+               if (counter_config[i].enabled && msrs->controls[i].addr) {
                        reset_value[i] = counter_config[i].count;
                        pmc_setup_one_p4_counter(i);
-                       wrmsr(p4_counters[VIRT_CTR(stag, i)].counter_address,
-                             -(u32)counter_config[i].count, -1);
+                       wrmsrl(p4_counters[VIRT_CTR(stag, i)].counter_address,
+                              -(u64)counter_config[i].count);
                } else {
                        reset_value[i] = 0;
                }
@@ -622,14 +622,14 @@ static int p4_check_ctrs(struct pt_regs * const regs,
 
                rdmsr(p4_counters[real].cccr_address, low, high);
                rdmsr(p4_counters[real].counter_address, ctr, high);
-               if (CCCR_OVF_P(low) || CTR_OVERFLOW_P(ctr)) {
+               if (CCCR_OVF_P(low) || !(ctr & OP_CTR_OVERFLOW)) {
                        oprofile_add_sample(regs, i);
-                       wrmsr(p4_counters[real].counter_address,
-                             -(u32)reset_value[i], -1);
+                       wrmsrl(p4_counters[real].counter_address,
+                              -(u64)reset_value[i]);
                        CCCR_CLEAR_OVF(low);
                        wrmsr(p4_counters[real].cccr_address, low, high);
-                       wrmsr(p4_counters[real].counter_address,
-                             -(u32)reset_value[i], -1);
+                       wrmsrl(p4_counters[real].counter_address,
+                              -(u64)reset_value[i]);
                }
        }
 
@@ -679,7 +679,7 @@ static void p4_shutdown(struct op_msrs const * const msrs)
        int i;
 
        for (i = 0 ; i < num_counters ; ++i) {
-               if (CTR_IS_RESERVED(msrs, i))
+               if (msrs->counters[i].addr)
                        release_perfctr_nmi(msrs->counters[i].addr);
        }
        /*
@@ -688,7 +688,7 @@ static void p4_shutdown(struct op_msrs const * const msrs)
         * This saves a few bits.
         */
        for (i = num_counters ; i < num_controls ; ++i) {
-               if (CTRL_IS_RESERVED(msrs, i))
+               if (msrs->controls[i].addr)
                        release_evntsel_nmi(msrs->controls[i].addr);
        }
 }