ARM: mach-shmobile: sh73a0: add MMC data pin pull-up
[linux-2.6.git] / arch / arm / mach-shmobile / pfc-sh73a0.c
index 3eed44e..a2d99b3 100644 (file)
@@ -22,6 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <mach/sh73a0.h>
+#include <mach/irqs.h>
 
 #define _1(fn, pfx, sfx) fn(pfx, sfx)
 
@@ -488,13 +489,34 @@ enum {
        KEYIN5_PU_MARK,
        KEYIN6_PU_MARK,
        KEYIN7_PU_MARK,
+       SDHICD0_PU_MARK,
+       SDHID0_0_PU_MARK,
+       SDHID0_1_PU_MARK,
+       SDHID0_2_PU_MARK,
+       SDHID0_3_PU_MARK,
+       SDHICMD0_PU_MARK,
+       SDHIWP0_PU_MARK,
        SDHID1_0_PU_MARK,
        SDHID1_1_PU_MARK,
        SDHID1_2_PU_MARK,
        SDHID1_3_PU_MARK,
        SDHICMD1_PU_MARK,
+       SDHID2_0_PU_MARK,
+       SDHID2_1_PU_MARK,
+       SDHID2_2_PU_MARK,
+       SDHID2_3_PU_MARK,
+       SDHICMD2_PU_MARK,
        MMCCMD0_PU_MARK,
        MMCCMD1_PU_MARK,
+       MMCD0_0_PU_MARK,
+       MMCD0_1_PU_MARK,
+       MMCD0_2_PU_MARK,
+       MMCD0_3_PU_MARK,
+       MMCD0_4_PU_MARK,
+       MMCD0_5_PU_MARK,
+       MMCD0_6_PU_MARK,
+       MMCD0_7_PU_MARK,
+       FSIBISLD_PU_MARK,
        FSIACK_PU_MARK,
        FSIAILR_PU_MARK,
        FSIAIBT_PU_MARK,
@@ -1387,19 +1409,28 @@ static pinmux_enum_t pinmux_data[] = {
        PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3),
        PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1),
        PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0),
-       PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, MSEL4CR_MSEL15_0),
-       PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, MSEL4CR_MSEL15_0),
-       PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, MSEL4CR_MSEL15_0),
-       PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, MSEL4CR_MSEL15_0),
-       PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, MSEL4CR_MSEL15_0), \
+       PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU,
+               MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU,
+               MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU,
+               MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU,
+               MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU,
+               MSEL4CR_MSEL15_0), \
        PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3),
-       PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, MSEL4CR_MSEL15_0), \
+       PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU,
+               MSEL4CR_MSEL15_0), \
        PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3),
-       PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, MSEL4CR_MSEL15_0), \
+       PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU,
+               MSEL4CR_MSEL15_0), \
        PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3),
-       PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, MSEL4CR_MSEL15_0), \
+       PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU,
+               MSEL4CR_MSEL15_0), \
        PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3),
-       PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU,
+               MSEL4CR_MSEL15_0),
        PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \
        PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2),
        PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1),
@@ -1516,16 +1547,47 @@ static pinmux_enum_t pinmux_data[] = {
        PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU),
        PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU),
 
-       PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_IN_PU, PORT259_FN1),
-       PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_IN_PU, PORT260_FN1),
-       PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_IN_PU, PORT261_FN1),
-       PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_IN_PU, PORT262_FN1),
-       PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_IN_PU, PORT263_FN1),
+       PINMUX_DATA(SDHICD0_PU_MARK,  PORT251_FN1, PORT251_IN_PU),
+       PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU),
+       PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU),
+       PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU),
+       PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU),
+       PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU),
+       PINMUX_DATA(SDHIWP0_PU_MARK,  PORT257_FN1, PORT256_IN_PU),
+       PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU),
+       PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU),
+       PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU),
+       PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU),
+       PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU),
+       PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU),
+       PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU),
+       PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU),
+       PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU),
+       PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU),
 
        PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU,
                MSEL4CR_MSEL15_0),
-       PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT279_IN_PU,
+       PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
                MSEL4CR_MSEL15_1),
+
+       PINMUX_DATA(MMCD0_0_PU_MARK,
+                   PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_1_PU_MARK,
+                   PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_2_PU_MARK,
+                   PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_3_PU_MARK,
+                   PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_4_PU_MARK,
+                   PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_5_PU_MARK,
+                   PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_6_PU_MARK,
+                   PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
+       PINMUX_DATA(MMCD0_7_PU_MARK,
+                   PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
+
+       PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
        PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
        PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
        PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU),
@@ -2181,13 +2243,33 @@ static struct pinmux_gpio pinmux_gpios[] = {
        GPIO_FN(KEYIN5_PU),
        GPIO_FN(KEYIN6_PU),
        GPIO_FN(KEYIN7_PU),
+       GPIO_FN(SDHICD0_PU),
+       GPIO_FN(SDHID0_0_PU),
+       GPIO_FN(SDHID0_1_PU),
+       GPIO_FN(SDHID0_2_PU),
+       GPIO_FN(SDHID0_3_PU),
+       GPIO_FN(SDHICMD0_PU),
+       GPIO_FN(SDHIWP0_PU),
        GPIO_FN(SDHID1_0_PU),
        GPIO_FN(SDHID1_1_PU),
        GPIO_FN(SDHID1_2_PU),
        GPIO_FN(SDHID1_3_PU),
        GPIO_FN(SDHICMD1_PU),
+       GPIO_FN(SDHID2_0_PU),
+       GPIO_FN(SDHID2_1_PU),
+       GPIO_FN(SDHID2_2_PU),
+       GPIO_FN(SDHID2_3_PU),
+       GPIO_FN(SDHICMD2_PU),
        GPIO_FN(MMCCMD0_PU),
        GPIO_FN(MMCCMD1_PU),
+       GPIO_FN(MMCD0_0_PU),
+       GPIO_FN(MMCD0_1_PU),
+       GPIO_FN(MMCD0_2_PU),
+       GPIO_FN(MMCD0_3_PU),
+       GPIO_FN(MMCD0_4_PU),
+       GPIO_FN(MMCD0_5_PU),
+       GPIO_FN(MMCD0_6_PU),
+       GPIO_FN(MMCD0_7_PU),
        GPIO_FN(FSIACK_PU),
        GPIO_FN(FSIAILR_PU),
        GPIO_FN(FSIAIBT_PU),
@@ -2718,6 +2800,45 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
        { },
 };
 
+/* IRQ pins through INTCS with IRQ0->15 from 0x200 and IRQ16-31 from 0x3200 */
+#define EXT_IRQ16L(n) intcs_evt2irq(0x200 + ((n) << 5))
+#define EXT_IRQ16H(n) intcs_evt2irq(0x3200 + ((n - 16) << 5))
+
+static struct pinmux_irq pinmux_irqs[] = {
+       PINMUX_IRQ(EXT_IRQ16H(19), PORT9_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(1), PORT10_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(0), PORT11_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(18), PORT13_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(20), PORT14_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(21), PORT15_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(31), PORT26_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(30), PORT27_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(29), PORT28_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(22), PORT40_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(23), PORT53_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(10), PORT54_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(9), PORT56_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(26), PORT115_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(27), PORT116_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(28), PORT117_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(24), PORT118_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(6), PORT147_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(2), PORT149_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(7), PORT150_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(12), PORT156_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(4), PORT159_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(25), PORT164_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(8), PORT223_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(3), PORT224_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(5), PORT227_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(17), PORT234_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(11), PORT238_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(13), PORT239_FN0),
+       PINMUX_IRQ(EXT_IRQ16H(16), PORT249_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(14), PORT251_FN0),
+       PINMUX_IRQ(EXT_IRQ16L(9), PORT308_FN0),
+};
+
 static struct pinmux_info sh73a0_pinmux_info = {
        .name = "sh73a0_pfc",
        .reserved_id = PINMUX_RESERVED,
@@ -2738,6 +2859,9 @@ static struct pinmux_info sh73a0_pinmux_info = {
 
        .gpio_data = pinmux_data,
        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+
+       .gpio_irq = pinmux_irqs,
+       .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
 };
 
 void sh73a0_pinmux_init(void)