[ARM] replace remaining __FUNCTION__ occurrences
[linux-2.6.git] / arch / arm / mach-iop13xx / pci.c
index 89ec70e..7825c1a 100644 (file)
 
 #include <linux/pci.h>
 #include <linux/delay.h>
-
+#include <linux/jiffies.h>
 #include <asm/irq.h>
 #include <asm/hardware.h>
 #include <asm/sizes.h>
+#include <asm/signal.h>
 #include <asm/mach/pci.h>
 #include <asm/arch/pci.h>
 
@@ -88,18 +89,18 @@ void iop13xx_map_pci_memory(void)
 
                                if (end) {
                                        iop13xx_atux_mem_base =
-                                       (u32) __ioremap_pfn(
+                                       (u32) __arm_ioremap_pfn(
                                        __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA)
-                                       , 0, iop13xx_atux_mem_size, 0);
+                                       , 0, iop13xx_atux_mem_size, MT_DEVICE);
                                        if (!iop13xx_atux_mem_base) {
                                                printk("%s: atux allocation "
-                                                      "failed\n", __FUNCTION__);
+                                                      "failed\n", __func__);
                                                BUG();
                                        }
                                } else
                                        iop13xx_atux_mem_size = 0;
                                PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
-                               __FUNCTION__, atu, iop13xx_atux_mem_size,
+                               __func__, atu, iop13xx_atux_mem_size,
                                iop13xx_atux_mem_base);
                                break;
                        case 1:
@@ -114,18 +115,18 @@ void iop13xx_map_pci_memory(void)
 
                                if (end) {
                                        iop13xx_atue_mem_base =
-                                       (u32) __ioremap_pfn(
+                                       (u32) __arm_ioremap_pfn(
                                        __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA)
-                                       , 0, iop13xx_atue_mem_size, 0);
+                                       , 0, iop13xx_atue_mem_size, MT_DEVICE);
                                        if (!iop13xx_atue_mem_base) {
                                                printk("%s: atue allocation "
-                                                      "failed\n", __FUNCTION__);
+                                                      "failed\n", __func__);
                                                BUG();
                                        }
                                } else
                                        iop13xx_atue_mem_size = 0;
                                PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
-                               __FUNCTION__, atu, iop13xx_atue_mem_size,
+                               __func__, atu, iop13xx_atue_mem_size,
                                iop13xx_atue_mem_base);
                                break;
                        }
@@ -144,7 +145,7 @@ void iop13xx_map_pci_memory(void)
        }
 }
 
-static inline int iop13xx_atu_function(int atu)
+static int iop13xx_atu_function(int atu)
 {
        int func = 0;
        /* the function number depends on the value of the
@@ -259,7 +260,7 @@ static int iop13xx_atux_pci_status(int clear)
  * data.  Note that the data dependency on %0 encourages an abort
  * to be detected before we return.
  */
-static inline u32 iop13xx_atux_read(unsigned long addr)
+static u32 iop13xx_atux_read(unsigned long addr)
 {
        u32 val;
 
@@ -387,7 +388,7 @@ static int iop13xx_atue_pci_status(int clear)
        return err;
 }
 
-static inline int __init
+static int
 iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 {
        WARN_ON(idsel != 0);
@@ -401,7 +402,7 @@ iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
        }
 }
 
-static inline u32 iop13xx_atue_read(unsigned long addr)
+static u32 iop13xx_atue_read(unsigned long addr)
 {
        u32 val;
 
@@ -559,6 +560,14 @@ void __init iop13xx_atue_setup(void)
        int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE);
        u32 reg_val;
 
+#ifdef CONFIG_PCI_MSI
+       /* BAR 0 (inbound msi window) */
+       __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR);
+       __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUE_IALR0);
+       __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUE_IATVR0);
+       __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUE_IABAR0);
+#endif
+
        /* BAR 1 (1:1 mapping with Physical RAM) */
        /* Set limit and enable */
        __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
@@ -720,6 +729,14 @@ void __init iop13xx_atux_setup(void)
        else
                atux_trhfa_timeout = jiffies;
 
+#ifdef CONFIG_PCI_MSI
+       /* BAR 0 (inbound msi window) */
+       __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR);
+       __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUX_IALR0);
+       __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUX_IATVR0);
+       __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUX_IABAR0);
+#endif
+
        /* BAR 1 (1:1 mapping with Physical RAM) */
        /* Set limit and enable */
        __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
@@ -973,7 +990,7 @@ void __init iop13xx_pci_init(void)
                        "imprecise external abort");
 }
 
-/* intialize the pci memory space.  handle any combination of
+/* initialize the pci memory space.  handle any combination of
  * atue and atux enabled/disabled
  */
 int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
@@ -985,11 +1002,10 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
        if (nr > 1)
                return 0;
 
-       res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
+       res = kcalloc(2, sizeof(struct resource), GFP_KERNEL);
        if (!res)
                panic("PCI: unable to alloc resources");
 
-       memset(res, 0, sizeof(struct resource) * 2);
 
        /* 'nr' assumptions:
         * ATUX is always 0
@@ -1023,7 +1039,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
                                  << IOP13XX_ATUX_PCIXSR_FUNC_NUM;
                __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR);
 
-               res[0].start = IOP13XX_PCIX_LOWER_IO_PA;
+               res[0].start = IOP13XX_PCIX_LOWER_IO_PA + IOP13XX_PCIX_IO_BUS_OFFSET;
                res[0].end   = IOP13XX_PCIX_UPPER_IO_PA;
                res[0].name  = "IQ81340 ATUX PCI I/O Space";
                res[0].flags = IORESOURCE_IO;
@@ -1033,7 +1049,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
                res[1].name  = "IQ81340 ATUX PCI Memory Space";
                res[1].flags = IORESOURCE_MEM;
                sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET;
-               sys->io_offset = IOP13XX_PCIX_IO_OFFSET;
+               sys->io_offset = IOP13XX_PCIX_LOWER_IO_PA;
                break;
        case IOP13XX_INIT_ATU_ATUE:
                /* Note: the function number field in the PCSR is ro */
@@ -1044,7 +1060,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
 
                __raw_writel(pcsr, IOP13XX_ATUE_PCSR);
 
-               res[0].start = IOP13XX_PCIE_LOWER_IO_PA;
+               res[0].start = IOP13XX_PCIE_LOWER_IO_PA + IOP13XX_PCIE_IO_BUS_OFFSET;
                res[0].end   = IOP13XX_PCIE_UPPER_IO_PA;
                res[0].name  = "IQ81340 ATUE PCI I/O Space";
                res[0].flags = IORESOURCE_IO;
@@ -1054,7 +1070,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
                res[1].name  = "IQ81340 ATUE PCI Memory Space";
                res[1].flags = IORESOURCE_MEM;
                sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET;
-               sys->io_offset = IOP13XX_PCIE_IO_OFFSET;
+               sys->io_offset = IOP13XX_PCIE_LOWER_IO_PA;
                sys->map_irq = iop13xx_pcie_map_irq;
                break;
        default: