2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <sound/driver.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/pci.h>
37 #include <linux/slab.h>
38 #include <linux/vmalloc.h>
40 #include <sound/core.h>
41 #include <sound/emu10k1.h>
46 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
47 MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
48 MODULE_LICENSE("GPL");
51 /*************************************************************************
53 *************************************************************************/
55 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
57 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
58 snd_emu10k1_ptr_write(emu, IP, ch, 0);
59 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
60 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
61 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
62 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
63 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
65 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
66 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
67 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
68 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
69 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
70 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
72 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
73 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
74 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
75 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
76 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
77 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
78 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
79 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
81 /*** these are last so OFF prevents writing ***/
82 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
83 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
84 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
85 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
86 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
88 /* Audigy extra stuffs */
90 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
92 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
93 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
94 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
95 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
96 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
100 static int __devinit snd_emu10k1_init(struct snd_emu10k1 * emu, int enable_ir)
103 unsigned int silent_page;
105 emu->fx8010.itram_size = (16 * 1024)/2;
106 emu->fx8010.etram_pages.area = NULL;
107 emu->fx8010.etram_pages.bytes = 0;
109 /* disable audio and lock cache */
110 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
112 /* reset recording buffers */
113 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
114 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
115 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
116 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
117 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
118 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
120 /* disable channel interrupt */
121 outl(0, emu->port + INTE);
122 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
123 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
124 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
125 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
128 /* set SPDIF bypass mode */
129 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
130 /* enable rear left + rear right AC97 slots */
131 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | AC97SLOT_REAR_LEFT);
134 /* init envelope engine */
135 for (ch = 0; ch < NUM_G; ch++) {
136 emu->voices[ch].emu = emu;
137 emu->voices[ch].number = ch;
138 snd_emu10k1_voice_init(emu, ch);
142 * Init to 0x02109204 :
143 * Clock accuracy = 0 (1000ppm)
144 * Sample Rate = 2 (48kHz)
145 * Audio Channel = 1 (Left of 2)
146 * Source Number = 0 (Unspecified)
147 * Generation Status = 1 (Original for Cat Code 12)
148 * Cat Code = 12 (Digital Signal Mixer)
150 * Emphasis = 0 (None)
151 * CP = 1 (Copyright unasserted)
152 * AN = 0 (Audio data)
155 snd_emu10k1_ptr_write(emu, SPCS0, 0,
157 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
158 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
159 SPCS_GENERATIONSTATUS | 0x00001200 |
160 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
161 snd_emu10k1_ptr_write(emu, SPCS1, 0,
163 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
164 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
165 SPCS_GENERATIONSTATUS | 0x00001200 |
166 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
167 snd_emu10k1_ptr_write(emu, SPCS2, 0,
169 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
170 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
171 SPCS_GENERATIONSTATUS | 0x00001200 |
172 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
174 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
175 /* Hacks for Alice3 to work independent of haP16V driver */
178 //Setup SRCMulti_I2S SamplingRate
179 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
182 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
184 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
185 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
186 /* Setup SRCMulti Input Audio Enable */
187 /* Use 0xFFFFFFFF to enable P16V sounds. */
188 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
190 /* Enabled Phased (8-channel) P16V playback */
191 outl(0x0201, emu->port + HCFG2);
192 /* Set playback routing. */
193 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
195 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
196 /* Hacks for Alice3 to work independent of haP16V driver */
199 snd_printk(KERN_ERR "Audigy2 value:Special config.\n");
200 //Setup SRCMulti_I2S SamplingRate
201 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
204 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 outl(0x600000, emu->port + 0x20);
208 outl(0x14, emu->port + 0x24);
210 /* Setup SRCMulti Input Audio Enable */
211 outl(0x7b0000, emu->port + 0x20);
212 outl(0xFF000000, emu->port + 0x24);
214 /* Setup SPDIF Out Audio Enable */
215 /* The Audigy 2 Value has a separate SPDIF out,
216 * so no need for a mixer switch
218 outl(0x7a0000, emu->port + 0x20);
219 outl(0xFF000000, emu->port + 0x24);
220 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
221 outl(tmp, emu->port + A_IOCFG);
226 * Clear page with silence & setup all pointers to this page
228 memset(emu->silent_page.area, 0, PAGE_SIZE);
229 silent_page = emu->silent_page.addr << 1;
230 for (idx = 0; idx < MAXPAGES; idx++)
231 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
232 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
233 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
234 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
236 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
237 for (ch = 0; ch < NUM_G; ch++) {
238 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
239 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
244 * Mute Disable Audio = 0
245 * Lock Tank Memory = 1
246 * Lock Sound Memory = 0
250 if (emu->revision == 4) /* audigy2 */
251 outl(HCFG_AUDIOENABLE |
252 HCFG_AC3ENABLE_CDSPDIF |
253 HCFG_AC3ENABLE_GPSPDIF |
254 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
256 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
257 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
258 * e.g. card_capabilities->joystick */
259 } else if (emu->model == 0x20 ||
260 emu->model == 0xc400 ||
261 (emu->model == 0x21 && emu->revision < 6))
262 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
264 // With on-chip joystick
265 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
267 if (enable_ir) { /* enable IR for SB Live */
269 unsigned int reg = inl(emu->port + A_IOCFG);
270 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
272 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
274 outl(reg, emu->port + A_IOCFG);
276 unsigned int reg = inl(emu->port + HCFG);
277 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
279 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
281 outl(reg, emu->port + HCFG);
285 if (emu->audigy) { /* enable analog output */
286 unsigned int reg = inl(emu->port + A_IOCFG);
287 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
291 * Initialize the effect engine
293 if ((err = snd_emu10k1_init_efx(emu)) < 0)
297 * Enable the audio bit
299 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
301 /* Enable analog/digital outs on audigy */
303 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
305 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
306 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
307 * This has to be done after init ALice3 I2SOut beyond 48KHz.
308 * So, sequence is important. */
309 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
310 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
311 /* Unmute Analog now. */
312 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
314 /* Disable routing from AC97 line out to Front speakers */
315 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
322 /* FIXME: the following routine disables LiveDrive-II !! */
325 tmp = inl(emu->port + HCFG);
326 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
327 outl(tmp|0x800, emu->port + HCFG);
329 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
331 outl(tmp, emu->port + HCFG);
337 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
339 emu->reserved_page = (struct snd_emu10k1_memblk *)snd_emu10k1_synth_alloc(emu, 4096);
340 if (emu->reserved_page)
341 emu->reserved_page->map_locked = 1;
346 static int snd_emu10k1_done(struct snd_emu10k1 * emu)
350 outl(0, emu->port + INTE);
355 for (ch = 0; ch < NUM_G; ch++)
356 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
357 for (ch = 0; ch < NUM_G; ch++) {
358 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
359 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
360 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
361 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
364 /* reset recording buffers */
365 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
366 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
367 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
368 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
369 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
370 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
371 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
372 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
373 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
375 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
377 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
379 /* disable channel interrupt */
380 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
381 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
382 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
383 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
385 /* remove reserved page */
386 if (emu->reserved_page != NULL) {
387 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
388 emu->reserved_page = NULL;
391 /* disable audio and lock cache */
392 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
393 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
395 snd_emu10k1_free_efx(emu);
400 /*************************************************************************
401 * ECARD functional implementation
402 *************************************************************************/
404 /* In A1 Silicon, these bits are in the HC register */
405 #define HOOKN_BIT (1L << 12)
406 #define HANDN_BIT (1L << 11)
407 #define PULSEN_BIT (1L << 10)
409 #define EC_GDI1 (1 << 13)
410 #define EC_GDI0 (1 << 14)
412 #define EC_NUM_CONTROL_BITS 20
414 #define EC_AC3_DATA_SELN 0x0001L
415 #define EC_EE_DATA_SEL 0x0002L
416 #define EC_EE_CNTRL_SELN 0x0004L
417 #define EC_EECLK 0x0008L
418 #define EC_EECS 0x0010L
419 #define EC_EESDO 0x0020L
420 #define EC_TRIM_CSN 0x0040L
421 #define EC_TRIM_SCLK 0x0080L
422 #define EC_TRIM_SDATA 0x0100L
423 #define EC_TRIM_MUTEN 0x0200L
424 #define EC_ADCCAL 0x0400L
425 #define EC_ADCRSTN 0x0800L
426 #define EC_DACCAL 0x1000L
427 #define EC_DACMUTEN 0x2000L
428 #define EC_LEDN 0x4000L
430 #define EC_SPDIF0_SEL_SHIFT 15
431 #define EC_SPDIF1_SEL_SHIFT 17
432 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
433 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
434 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
435 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
436 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
437 * be incremented any time the EEPROM's
438 * format is changed. */
440 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
442 /* Addresses for special values stored in to EEPROM */
443 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
444 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
445 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
447 #define EC_LAST_PROMFILE_ADDR 0x2f
449 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
450 * can be up to 30 characters in length
451 * and is stored as a NULL-terminated
452 * ASCII string. Any unused bytes must be
453 * filled with zeros */
454 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
457 /* Most of this stuff is pretty self-evident. According to the hardware
458 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
459 * offset problem. Weird.
461 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
465 #define EC_DEFAULT_ADC_GAIN 0xC4C4
466 #define EC_DEFAULT_SPDIF0_SEL 0x0
467 #define EC_DEFAULT_SPDIF1_SEL 0x4
469 /**************************************************************************
470 * @func Clock bits into the Ecard's control latch. The Ecard uses a
471 * control latch will is loaded bit-serially by toggling the Modem control
472 * lines from function 2 on the E8010. This function hides these details
473 * and presents the illusion that we are actually writing to a distinct
477 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
479 unsigned short count;
481 unsigned long hc_port;
482 unsigned int hc_value;
484 hc_port = emu->port + HCFG;
485 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
486 outl(hc_value, hc_port);
488 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
490 /* Set up the value */
491 data = ((value & 0x1) ? PULSEN_BIT : 0);
494 outl(hc_value | data, hc_port);
496 /* Clock the shift register */
497 outl(hc_value | data | HANDN_BIT, hc_port);
498 outl(hc_value | data, hc_port);
502 outl(hc_value | HOOKN_BIT, hc_port);
503 outl(hc_value, hc_port);
506 /**************************************************************************
507 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
508 * trim value consists of a 16bit value which is composed of two
509 * 8 bit gain/trim values, one for the left channel and one for the
510 * right channel. The following table maps from the Gain/Attenuation
511 * value in decibels into the corresponding bit pattern for a single
515 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
520 /* Enable writing to the TRIM registers */
521 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
523 /* Do it again to insure that we meet hold time requirements */
524 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
526 for (bit = (1 << 15); bit; bit >>= 1) {
529 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
532 value |= EC_TRIM_SDATA;
535 snd_emu10k1_ecard_write(emu, value);
536 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
537 snd_emu10k1_ecard_write(emu, value);
540 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
543 static int __devinit snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
545 unsigned int hc_value;
547 /* Set up the initial settings */
548 emu->ecard_ctrl = EC_RAW_RUN_MODE |
549 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
550 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
552 /* Step 0: Set the codec type in the hardware control register
553 * and enable audio output */
554 hc_value = inl(emu->port + HCFG);
555 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
556 inl(emu->port + HCFG);
558 /* Step 1: Turn off the led and deassert TRIM_CS */
559 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
561 /* Step 2: Calibrate the ADC and DAC */
562 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
564 /* Step 3: Wait for awhile; XXX We can't get away with this
565 * under a real operating system; we'll need to block and wait that
567 snd_emu10k1_wait(emu, 48000);
569 /* Step 4: Switch off the DAC and ADC calibration. Note
570 * That ADC_CAL is actually an inverted signal, so we assert
571 * it here to stop calibration. */
572 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
574 /* Step 4: Switch into run mode */
575 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
577 /* Step 5: Set the analog input gain */
578 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
583 static int __devinit snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
585 unsigned long special_port;
588 /* Special initialisation routine
589 * before the rest of the IO-Ports become active.
591 special_port = emu->port + 0x38;
592 value = inl(special_port);
593 outl(0x00d00000, special_port);
594 value = inl(special_port);
595 outl(0x00d00001, special_port);
596 value = inl(special_port);
597 outl(0x00d0005f, special_port);
598 value = inl(special_port);
599 outl(0x00d0007f, special_port);
600 value = inl(special_port);
601 outl(0x0090007f, special_port);
602 value = inl(special_port);
604 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
609 * Create the EMU10K1 instance
612 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
614 if (emu->port) { /* avoid access to already used hardware */
615 snd_emu10k1_fx8010_tram_setup(emu, 0);
616 snd_emu10k1_done(emu);
619 snd_util_memhdr_free(emu->memhdr);
620 if (emu->silent_page.area)
621 snd_dma_free_pages(&emu->silent_page);
622 if (emu->ptb_pages.area)
623 snd_dma_free_pages(&emu->ptb_pages);
624 vfree(emu->page_ptr_table);
625 vfree(emu->page_addr_table);
627 free_irq(emu->irq, (void *)emu);
629 pci_release_regions(emu->pci);
630 pci_disable_device(emu->pci);
631 if (emu->card_capabilities->ca0151_chip) /* P16V */
637 static int snd_emu10k1_dev_free(struct snd_device *device)
639 struct snd_emu10k1 *emu = device->device_data;
640 return snd_emu10k1_free(emu);
643 static struct snd_emu_chip_details emu_chip_details[] = {
644 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
645 /* Tested by James@superbug.co.uk 3rd July 2005 */
646 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
647 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
653 /* Audigy 2 ZS Notebook Cardbus card.*/
654 /* Tested by James@superbug.co.uk 30th October 2005 */
655 /* Not working yet, but progressing. */
656 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
657 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
661 .ca_cardbus_chip = 1,
663 {.vendor = 0x1102, .device = 0x0008,
664 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
669 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
670 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
671 .driver = "Audigy2", .name = "E-mu 1212m [4001]",
676 /* Tested by James@superbug.co.uk 3rd July 2005 */
677 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
678 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
686 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
687 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
688 .driver = "Audigy2", .name = "Audigy 2 [2006]",
696 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
697 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
705 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
706 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
714 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
715 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
723 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
724 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
731 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
732 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
740 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
741 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
748 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
749 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
754 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
755 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
761 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
762 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
767 {.vendor = 0x1102, .device = 0x0004,
768 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
773 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
774 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
779 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
780 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
785 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
786 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
791 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
792 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
793 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
798 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
799 .driver = "EMU10K1", .name = "SB Live 5.1",
804 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
805 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
806 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
809 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
810 * share the same IDs!
813 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
814 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
819 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
820 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
824 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
825 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
830 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
831 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
836 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
837 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
842 /* Tested by James@superbug.co.uk 3rd July 2005 */
843 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
844 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
849 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
850 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
855 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
856 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
861 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
862 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
867 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
868 .driver = "EMU10K1", .name = "E-mu APS [4001]",
872 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
873 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
878 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
879 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
884 {.vendor = 0x1102, .device = 0x0002,
885 .driver = "EMU10K1", .name = "SB Live [Unknown]",
893 int __devinit snd_emu10k1_create(struct snd_card *card,
894 struct pci_dev * pci,
895 unsigned short extin_mask,
896 unsigned short extout_mask,
897 long max_cache_bytes,
900 struct snd_emu10k1 ** remu)
902 struct snd_emu10k1 *emu;
905 unsigned char revision;
906 const struct snd_emu_chip_details *c;
907 static struct snd_device_ops ops = {
908 .dev_free = snd_emu10k1_dev_free,
913 /* enable PCI device */
914 if ((err = pci_enable_device(pci)) < 0)
917 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
919 pci_disable_device(pci);
923 spin_lock_init(&emu->reg_lock);
924 spin_lock_init(&emu->emu_lock);
925 spin_lock_init(&emu->voice_lock);
926 spin_lock_init(&emu->synth_lock);
927 spin_lock_init(&emu->memblk_lock);
928 init_MUTEX(&emu->ptb_lock);
929 init_MUTEX(&emu->fx8010.lock);
930 INIT_LIST_HEAD(&emu->mapped_link_head);
931 INIT_LIST_HEAD(&emu->mapped_order_link_head);
935 emu->get_synth_voice = NULL;
936 /* read revision & serial */
937 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
938 emu->revision = revision;
939 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
940 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
941 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
943 for (c = emu_chip_details; c->vendor; c++) {
944 if (c->vendor == pci->vendor && c->device == pci->device) {
946 if (c->subsystem && (c->subsystem == subsystem) ) {
950 if (c->subsystem && (c->subsystem != emu->serial) )
952 if (c->revision && c->revision != emu->revision)
958 if (c->vendor == 0) {
959 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
961 pci_disable_device(pci);
964 emu->card_capabilities = c;
965 if (c->subsystem && !subsystem)
966 snd_printdd("Sound card name=%s\n", c->name);
968 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
969 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
971 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
972 c->name, pci->vendor, pci->device, emu->serial);
974 if (!*card->id && c->id) {
976 strlcpy(card->id, c->id, sizeof(card->id));
978 for (i = 0; i < snd_ecards_limit; i++) {
979 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
982 if (i >= snd_ecards_limit)
985 if (n >= SNDRV_CARDS)
987 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
991 is_audigy = emu->audigy = c->emu10k2_chip;
993 /* set the DMA transfer mask */
994 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
995 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
996 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
997 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
999 pci_disable_device(pci);
1003 emu->gpr_base = A_FXGPREGBASE;
1005 emu->gpr_base = FXGPREGBASE;
1007 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1009 pci_disable_device(pci);
1012 emu->port = pci_resource_start(pci, 0);
1014 if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
1015 snd_emu10k1_free(emu);
1018 emu->irq = pci->irq;
1020 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1021 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1022 32 * 1024, &emu->ptb_pages) < 0) {
1023 snd_emu10k1_free(emu);
1027 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
1028 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
1029 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1030 snd_emu10k1_free(emu);
1034 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1035 EMUPAGESIZE, &emu->silent_page) < 0) {
1036 snd_emu10k1_free(emu);
1039 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1040 if (emu->memhdr == NULL) {
1041 snd_emu10k1_free(emu);
1044 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1045 sizeof(struct snd_util_memblk);
1047 pci_set_master(pci);
1049 emu->fx8010.fxbus_mask = 0x303f;
1050 if (extin_mask == 0)
1051 extin_mask = 0x3fcf;
1052 if (extout_mask == 0)
1053 extout_mask = 0x7fff;
1054 emu->fx8010.extin_mask = extin_mask;
1055 emu->fx8010.extout_mask = extout_mask;
1057 if (emu->card_capabilities->ecard) {
1058 if ((err = snd_emu10k1_ecard_init(emu)) < 0) {
1059 snd_emu10k1_free(emu);
1062 } else if (emu->card_capabilities->ca_cardbus_chip) {
1063 if ((err = snd_emu10k1_cardbus_init(emu)) < 0) {
1064 snd_emu10k1_free(emu);
1068 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1069 does not support this, it shouldn't do any harm */
1070 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1073 if ((err = snd_emu10k1_init(emu, enable_ir)) < 0) {
1074 snd_emu10k1_free(emu);
1078 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) {
1079 snd_emu10k1_free(emu);
1083 snd_emu10k1_proc_init(emu);
1085 snd_card_set_dev(card, &pci->dev);
1091 EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
1092 EXPORT_SYMBOL(snd_emu10k1_synth_free);
1093 EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
1094 EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
1095 EXPORT_SYMBOL(snd_emu10k1_memblk_map);
1097 EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
1098 EXPORT_SYMBOL(snd_emu10k1_voice_free);
1100 EXPORT_SYMBOL(snd_emu10k1_ptr_read);
1101 EXPORT_SYMBOL(snd_emu10k1_ptr_write);