include/linux/pci-acpi.h

   1 /*
   2  * File         pci-acpi.h
   3  *
   4  * Copyright (C) 2004 Intel
   5  * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
   6  */
   7
   8 #ifndef _PCI_ACPI_H_
   9 #define _PCI_ACPI_H_
  10
  11 #include <linux/acpi.h>
  12
  13 #define OSC_QUERY_TYPE                  0
  14 #define OSC_SUPPORT_TYPE                1
  15 #define OSC_CONTROL_TYPE                2
  16 #define OSC_SUPPORT_MASKS               0x1f
  17
  18 /*
  19  * _OSC DW0 Definition
  20  */
  21 #define OSC_QUERY_ENABLE                1
  22 #define OSC_REQUEST_ERROR               2
  23 #define OSC_INVALID_UUID_ERROR          4
  24 #define OSC_INVALID_REVISION_ERROR      8
  25 #define OSC_CAPABILITIES_MASK_ERROR     16
  26
  27 /*
  28  * _OSC DW1 Definition (OS Support Fields)
  29  */
  30 #define OSC_EXT_PCI_CONFIG_SUPPORT              1
  31 #define OSC_ACTIVE_STATE_PWR_SUPPORT            2
  32 #define OSC_CLOCK_PWR_CAPABILITY_SUPPORT        4
  33 #define OSC_PCI_SEGMENT_GROUPS_SUPPORT          8
  34 #define OSC_MSI_SUPPORT                         16
  35
  36 /*
  37  * _OSC DW1 Definition (OS Control Fields)
  38  */
  39 #define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL       1
  40 #define OSC_SHPC_NATIVE_HP_CONTROL              2
  41 #define OSC_PCI_EXPRESS_PME_CONTROL             4
  42 #define OSC_PCI_EXPRESS_AER_CONTROL             8
  43 #define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL   16
  44
  45 #define OSC_CONTROL_MASKS       (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |    \
  46                                 OSC_SHPC_NATIVE_HP_CONTROL |            \
  47                                 OSC_PCI_EXPRESS_PME_CONTROL |           \
  48                                 OSC_PCI_EXPRESS_AER_CONTROL |           \
  49                                 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
  50
  51 #ifdef CONFIG_ACPI
  52 extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags);
  53 extern acpi_status __pci_osc_support_set(u32 flags, const char *hid);
  54 int pci_acpi_osc_support(acpi_handle handle, u32 flags);
  55 static inline acpi_status pci_osc_support_set(u32 flags)
  56 {
  57         return __pci_osc_support_set(flags, PCI_ROOT_HID_STRING);
  58 }
  59 static inline acpi_status pcie_osc_support_set(u32 flags)
  60 {
  61         return __pci_osc_support_set(flags, PCI_EXPRESS_ROOT_HID_STRING);
  62 }
  63 static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
  64 {
  65         /* Find root host bridge */
  66         while (pdev->bus->self)
  67                 pdev = pdev->bus->self;
  68
  69         return acpi_get_pci_rootbridge_handle(pci_domain_nr(pdev->bus),
  70                         pdev->bus->number);
  71 }
  72 #else
  73 #if !defined(AE_ERROR)
  74 typedef u32             acpi_status;
  75 #define AE_ERROR        (acpi_status) (0x0001)
  76 #endif
  77 static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
  78 {return AE_ERROR;}
  79 static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;}
  80 static inline acpi_status pcie_osc_support_set(u32 flags) {return AE_ERROR;}
  81 static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
  82 { return NULL; }
  83 #endif
  84
  85 #endif  /* _PCI_ACPI_H_ */