43342f767112f7081b484b6ba973fe6185370ca2
[linux-2.6.git] / include / linux / mfd / wm8350 / audio.h
1 /*
2  * audio.h  --  Audio Driver for Wolfson WM8350 PMIC
3  *
4  * Copyright 2007 Wolfson Microelectronics PLC
5  *
6  *  This program is free software; you can redistribute  it and/or modify it
7  *  under  the terms of  the GNU General  Public License as published by the
8  *  Free Software Foundation;  either version 2 of the  License, or (at your
9  *  option) any later version.
10  *
11  */
12
13 #ifndef __LINUX_MFD_WM8350_AUDIO_H_
14 #define __LINUX_MFD_WM8350_AUDIO_H_
15
16 #define WM8350_CLOCK_CONTROL_1                  0x28
17 #define WM8350_CLOCK_CONTROL_2                  0x29
18 #define WM8350_FLL_CONTROL_1                    0x2A
19 #define WM8350_FLL_CONTROL_2                    0x2B
20 #define WM8350_FLL_CONTROL_3                    0x2C
21 #define WM8350_FLL_CONTROL_4                    0x2D
22 #define WM8350_DAC_CONTROL                      0x30
23 #define WM8350_DAC_DIGITAL_VOLUME_L             0x32
24 #define WM8350_DAC_DIGITAL_VOLUME_R             0x33
25 #define WM8350_DAC_LR_RATE                      0x35
26 #define WM8350_DAC_CLOCK_CONTROL                0x36
27 #define WM8350_DAC_MUTE                         0x3A
28 #define WM8350_DAC_MUTE_VOLUME                  0x3B
29 #define WM8350_DAC_SIDE                         0x3C
30 #define WM8350_ADC_CONTROL                      0x40
31 #define WM8350_ADC_DIGITAL_VOLUME_L             0x42
32 #define WM8350_ADC_DIGITAL_VOLUME_R             0x43
33 #define WM8350_ADC_DIVIDER                      0x44
34 #define WM8350_ADC_LR_RATE                      0x46
35 #define WM8350_INPUT_CONTROL                    0x48
36 #define WM8350_IN3_INPUT_CONTROL                0x49
37 #define WM8350_MIC_BIAS_CONTROL                 0x4A
38 #define WM8350_OUTPUT_CONTROL                   0x4C
39 #define WM8350_JACK_DETECT                      0x4D
40 #define WM8350_ANTI_POP_CONTROL                 0x4E
41 #define WM8350_LEFT_INPUT_VOLUME                0x50
42 #define WM8350_RIGHT_INPUT_VOLUME               0x51
43 #define WM8350_LEFT_MIXER_CONTROL               0x58
44 #define WM8350_RIGHT_MIXER_CONTROL              0x59
45 #define WM8350_OUT3_MIXER_CONTROL               0x5C
46 #define WM8350_OUT4_MIXER_CONTROL               0x5D
47 #define WM8350_OUTPUT_LEFT_MIXER_VOLUME         0x60
48 #define WM8350_OUTPUT_RIGHT_MIXER_VOLUME        0x61
49 #define WM8350_INPUT_MIXER_VOLUME_L             0x62
50 #define WM8350_INPUT_MIXER_VOLUME_R             0x63
51 #define WM8350_INPUT_MIXER_VOLUME               0x64
52 #define WM8350_LOUT1_VOLUME                     0x68
53 #define WM8350_ROUT1_VOLUME                     0x69
54 #define WM8350_LOUT2_VOLUME                     0x6A
55 #define WM8350_ROUT2_VOLUME                     0x6B
56 #define WM8350_BEEP_VOLUME                      0x6F
57 #define WM8350_AI_FORMATING                     0x70
58 #define WM8350_ADC_DAC_COMP                     0x71
59 #define WM8350_AI_ADC_CONTROL                   0x72
60 #define WM8350_AI_DAC_CONTROL                   0x73
61 #define WM8350_AIF_TEST                         0x74
62 #define WM8350_JACK_PIN_STATUS                  0xE7
63
64 /* Bit values for R08 (0x08) */
65 #define WM8350_CODEC_ISEL_1_5                   0       /* x1.5 */
66 #define WM8350_CODEC_ISEL_1_0                   1       /* x1.0 */
67 #define WM8350_CODEC_ISEL_0_75                  2       /* x0.75 */
68 #define WM8350_CODEC_ISEL_0_5                   3       /* x0.5 */
69
70 #define WM8350_VMID_OFF                         0
71 #define WM8350_VMID_500K                        1
72 #define WM8350_VMID_100K                        2
73 #define WM8350_VMID_10K                         3
74
75 /*
76  * R40 (0x28) - Clock Control 1
77  */
78 #define WM8350_TOCLK_RATE                       0x4000
79 #define WM8350_MCLK_SEL                         0x0800
80 #define WM8350_MCLK_DIV_MASK                    0x0100
81 #define WM8350_BCLK_DIV_MASK                    0x00F0
82 #define WM8350_OPCLK_DIV_MASK                   0x0007
83
84 /*
85  * R41 (0x29) - Clock Control 2
86  */
87 #define WM8350_LRC_ADC_SEL                      0x8000
88 #define WM8350_MCLK_DIR                         0x0001
89
90 /*
91  * R42 (0x2A) - FLL Control 1
92  */
93 #define WM8350_FLL_DITHER_WIDTH_MASK            0x3000
94 #define WM8350_FLL_DITHER_HP                    0x0800
95 #define WM8350_FLL_OUTDIV_MASK                  0x0700
96 #define WM8350_FLL_RSP_RATE_MASK                0x00F0
97 #define WM8350_FLL_RATE_MASK                    0x0007
98
99 /*
100  * R43 (0x2B) - FLL Control 2
101  */
102 #define WM8350_FLL_RATIO_MASK                   0xF800
103 #define WM8350_FLL_N_MASK                       0x03FF
104
105 /*
106  * R44 (0x2C) - FLL Control 3
107  */
108 #define WM8350_FLL_K_MASK                       0xFFFF
109
110 /*
111  * R45 (0x2D) - FLL Control 4
112  */
113 #define WM8350_FLL_FRAC                         0x0020
114 #define WM8350_FLL_SLOW_LOCK_REF                0x0010
115 #define WM8350_FLL_CLK_SRC_MASK                 0x0003
116
117 /*
118  * R48 (0x30) - DAC Control
119  */
120 #define WM8350_DAC_MONO                         0x2000
121 #define WM8350_AIF_LRCLKRATE                    0x1000
122 #define WM8350_DEEMP_MASK                       0x0030
123 #define WM8350_DACL_DATINV                      0x0002
124 #define WM8350_DACR_DATINV                      0x0001
125
126 /*
127  * R50 (0x32) - DAC Digital Volume L
128  */
129 #define WM8350_DAC_VU                           0x0100
130 #define WM8350_DACL_VOL_MASK                    0x00FF
131
132 /*
133  * R51 (0x33) - DAC Digital Volume R
134  */
135 #define WM8350_DAC_VU                           0x0100
136 #define WM8350_DACR_VOL_MASK                    0x00FF
137
138 /*
139  * R53 (0x35) - DAC LR Rate
140  */
141 #define WM8350_DACLRC_ENA                       0x0800
142 #define WM8350_DACLRC_RATE_MASK                 0x07FF
143
144 /*
145  * R54 (0x36) - DAC Clock Control
146  */
147 #define WM8350_DACCLK_POL                       0x0010
148 #define WM8350_DAC_CLKDIV_MASK                  0x0007
149
150 /*
151  * R58 (0x3A) - DAC Mute
152  */
153 #define WM8350_DAC_MUTE_ENA                     0x4000
154
155 /*
156  * R59 (0x3B) - DAC Mute Volume
157  */
158 #define WM8350_DAC_MUTEMODE                     0x4000
159 #define WM8350_DAC_MUTERATE                     0x2000
160 #define WM8350_DAC_SB_FILT                      0x1000
161
162 /*
163  * R60 (0x3C) - DAC Side
164  */
165 #define WM8350_ADC_TO_DACL_MASK                 0x3000
166 #define WM8350_ADC_TO_DACR_MASK                 0x0C00
167
168 /*
169  * R64 (0x40) - ADC Control
170  */
171 #define WM8350_ADC_HPF_CUT_MASK                 0x0300
172 #define WM8350_ADCL_DATINV                      0x0002
173 #define WM8350_ADCR_DATINV                      0x0001
174
175 /*
176  * R66 (0x42) - ADC Digital Volume L
177  */
178 #define WM8350_ADC_VU                           0x0100
179 #define WM8350_ADCL_VOL_MASK                    0x00FF
180
181 /*
182  * R67 (0x43) - ADC Digital Volume R
183  */
184 #define WM8350_ADC_VU                           0x0100
185 #define WM8350_ADCR_VOL_MASK                    0x00FF
186
187 /*
188  * R68 (0x44) - ADC Divider
189  */
190 #define WM8350_ADCL_DAC_SVOL_MASK               0x0F00
191 #define WM8350_ADCR_DAC_SVOL_MASK               0x00F0
192 #define WM8350_ADCCLK_POL                       0x0008
193 #define WM8350_ADC_CLKDIV_MASK                  0x0007
194
195 /*
196  * R70 (0x46) - ADC LR Rate
197  */
198 #define WM8350_ADCLRC_ENA                       0x0800
199 #define WM8350_ADCLRC_RATE_MASK                 0x07FF
200
201 /*
202  * R72 (0x48) - Input Control
203  */
204 #define WM8350_IN2R_ENA                         0x0400
205 #define WM8350_IN1RN_ENA                        0x0200
206 #define WM8350_IN1RP_ENA                        0x0100
207 #define WM8350_IN2L_ENA                         0x0004
208 #define WM8350_IN1LN_ENA                        0x0002
209 #define WM8350_IN1LP_ENA                        0x0001
210
211 /*
212  * R73 (0x49) - IN3 Input Control
213  */
214 #define WM8350_IN3R_SHORT                       0x4000
215 #define WM8350_IN3L_SHORT                       0x0040
216
217 /*
218  * R74 (0x4A) - Mic Bias Control
219  */
220 #define WM8350_MICBSEL                          0x4000
221 #define WM8350_MCDTHR_MASK                      0x001C
222 #define WM8350_MCDSCTHR_MASK                    0x0003
223
224 /*
225  * R76 (0x4C) - Output Control
226  */
227 #define WM8350_OUT4_VROI                        0x0800
228 #define WM8350_OUT3_VROI                        0x0400
229 #define WM8350_OUT2_VROI                        0x0200
230 #define WM8350_OUT1_VROI                        0x0100
231 #define WM8350_OUT2_FB                          0x0004
232 #define WM8350_OUT1_FB                          0x0001
233
234 /*
235  * R77 (0x4D) - Jack Detect
236  */
237 #define WM8350_JDL_ENA                          0x8000
238 #define WM8350_JDR_ENA                          0x4000
239
240 /*
241  * R78 (0x4E) - Anti Pop Control
242  */
243 #define WM8350_ANTI_POP_MASK                    0x0300
244 #define WM8350_DIS_OP_LN4_MASK                  0x00C0
245 #define WM8350_DIS_OP_LN3_MASK                  0x0030
246 #define WM8350_DIS_OP_OUT2_MASK                 0x000C
247 #define WM8350_DIS_OP_OUT1_MASK                 0x0003
248
249 /*
250  * R80 (0x50) - Left Input Volume
251  */
252 #define WM8350_INL_MUTE                         0x4000
253 #define WM8350_INL_ZC                           0x2000
254 #define WM8350_IN_VU                            0x0100
255 #define WM8350_INL_VOL_MASK                     0x00FC
256
257 /*
258  * R81 (0x51) - Right Input Volume
259  */
260 #define WM8350_INR_MUTE                         0x4000
261 #define WM8350_INR_ZC                           0x2000
262 #define WM8350_IN_VU                            0x0100
263 #define WM8350_INR_VOL_MASK                     0x00FC
264
265 /*
266  * R88 (0x58) - Left Mixer Control
267  */
268 #define WM8350_DACR_TO_MIXOUTL                  0x1000
269 #define WM8350_DACL_TO_MIXOUTL                  0x0800
270 #define WM8350_IN3L_TO_MIXOUTL                  0x0004
271 #define WM8350_INR_TO_MIXOUTL                   0x0002
272 #define WM8350_INL_TO_MIXOUTL                   0x0001
273
274 /*
275  * R89 (0x59) - Right Mixer Control
276  */
277 #define WM8350_DACR_TO_MIXOUTR                  0x1000
278 #define WM8350_DACL_TO_MIXOUTR                  0x0800
279 #define WM8350_IN3R_TO_MIXOUTR                  0x0008
280 #define WM8350_INR_TO_MIXOUTR                   0x0002
281 #define WM8350_INL_TO_MIXOUTR                   0x0001
282
283 /*
284  * R92 (0x5C) - OUT3 Mixer Control
285  */
286 #define WM8350_DACL_TO_OUT3                     0x0800
287 #define WM8350_MIXINL_TO_OUT3                   0x0100
288 #define WM8350_OUT4_TO_OUT3                     0x0008
289 #define WM8350_MIXOUTL_TO_OUT3                  0x0001
290
291 /*
292  * R93 (0x5D) - OUT4 Mixer Control
293  */
294 #define WM8350_DACR_TO_OUT4                     0x1000
295 #define WM8350_DACL_TO_OUT4                     0x0800
296 #define WM8350_OUT4_ATTN                        0x0400
297 #define WM8350_MIXINR_TO_OUT4                   0x0200
298 #define WM8350_OUT3_TO_OUT4                     0x0004
299 #define WM8350_MIXOUTR_TO_OUT4                  0x0002
300 #define WM8350_MIXOUTL_TO_OUT4                  0x0001
301
302 /*
303  * R96 (0x60) - Output Left Mixer Volume
304  */
305 #define WM8350_IN3L_MIXOUTL_VOL_MASK            0x0E00
306 #define WM8350_IN3L_MIXOUTL_VOL_SHIFT                9
307 #define WM8350_INR_MIXOUTL_VOL_MASK             0x00E0
308 #define WM8350_INR_MIXOUTL_VOL_SHIFT                 5
309 #define WM8350_INL_MIXOUTL_VOL_MASK             0x000E
310 #define WM8350_INL_MIXOUTL_VOL_SHIFT                 1
311
312 /* Bit values for R96 (0x60) */
313 #define WM8350_IN3L_MIXOUTL_VOL_OFF                  0
314 #define WM8350_IN3L_MIXOUTL_VOL_M12DB                1
315 #define WM8350_IN3L_MIXOUTL_VOL_M9DB                 2
316 #define WM8350_IN3L_MIXOUTL_VOL_M6DB                 3
317 #define WM8350_IN3L_MIXOUTL_VOL_M3DB                 4
318 #define WM8350_IN3L_MIXOUTL_VOL_0DB                  5
319 #define WM8350_IN3L_MIXOUTL_VOL_3DB                  6
320 #define WM8350_IN3L_MIXOUTL_VOL_6DB                  7
321
322 #define WM8350_INR_MIXOUTL_VOL_OFF                   0
323 #define WM8350_INR_MIXOUTL_VOL_M12DB                 1
324 #define WM8350_INR_MIXOUTL_VOL_M9DB                  2
325 #define WM8350_INR_MIXOUTL_VOL_M6DB                  3
326 #define WM8350_INR_MIXOUTL_VOL_M3DB                  4
327 #define WM8350_INR_MIXOUTL_VOL_0DB                   5
328 #define WM8350_INR_MIXOUTL_VOL_3DB                   6
329 #define WM8350_INR_MIXOUTL_VOL_6DB                   7
330
331 #define WM8350_INL_MIXOUTL_VOL_OFF                   0
332 #define WM8350_INL_MIXOUTL_VOL_M12DB                 1
333 #define WM8350_INL_MIXOUTL_VOL_M9DB                  2
334 #define WM8350_INL_MIXOUTL_VOL_M6DB                  3
335 #define WM8350_INL_MIXOUTL_VOL_M3DB                  4
336 #define WM8350_INL_MIXOUTL_VOL_0DB                   5
337 #define WM8350_INL_MIXOUTL_VOL_3DB                   6
338 #define WM8350_INL_MIXOUTL_VOL_6DB                   7
339
340 /*
341  * R97 (0x61) - Output Right Mixer Volume
342  */
343 #define WM8350_IN3R_MIXOUTR_VOL_MASK            0xE000
344 #define WM8350_IN3R_MIXOUTR_VOL_SHIFT               13
345 #define WM8350_INR_MIXOUTR_VOL_MASK             0x00E0
346 #define WM8350_INR_MIXOUTR_VOL_SHIFT                 5
347 #define WM8350_INL_MIXOUTR_VOL_MASK             0x000E
348 #define WM8350_INL_MIXOUTR_VOL_SHIFT                 1
349
350 /* Bit values for R96 (0x60) */
351 #define WM8350_IN3R_MIXOUTR_VOL_OFF                  0
352 #define WM8350_IN3R_MIXOUTR_VOL_M12DB                1
353 #define WM8350_IN3R_MIXOUTR_VOL_M9DB                 2
354 #define WM8350_IN3R_MIXOUTR_VOL_M6DB                 3
355 #define WM8350_IN3R_MIXOUTR_VOL_M3DB                 4
356 #define WM8350_IN3R_MIXOUTR_VOL_0DB                  5
357 #define WM8350_IN3R_MIXOUTR_VOL_3DB                  6
358 #define WM8350_IN3R_MIXOUTR_VOL_6DB                  7
359
360 #define WM8350_INR_MIXOUTR_VOL_OFF                   0
361 #define WM8350_INR_MIXOUTR_VOL_M12DB                 1
362 #define WM8350_INR_MIXOUTR_VOL_M9DB                  2
363 #define WM8350_INR_MIXOUTR_VOL_M6DB                  3
364 #define WM8350_INR_MIXOUTR_VOL_M3DB                  4
365 #define WM8350_INR_MIXOUTR_VOL_0DB                   5
366 #define WM8350_INR_MIXOUTR_VOL_3DB                   6
367 #define WM8350_INR_MIXOUTR_VOL_6DB                   7
368
369 #define WM8350_INL_MIXOUTR_VOL_OFF                   0
370 #define WM8350_INL_MIXOUTR_VOL_M12DB                 1
371 #define WM8350_INL_MIXOUTR_VOL_M9DB                  2
372 #define WM8350_INL_MIXOUTR_VOL_M6DB                  3
373 #define WM8350_INL_MIXOUTR_VOL_M3DB                  4
374 #define WM8350_INL_MIXOUTR_VOL_0DB                   5
375 #define WM8350_INL_MIXOUTR_VOL_3DB                   6
376 #define WM8350_INL_MIXOUTR_VOL_6DB                   7
377
378 /*
379  * R98 (0x62) - Input Mixer Volume L
380  */
381 #define WM8350_IN3L_MIXINL_VOL_MASK             0x0E00
382 #define WM8350_IN2L_MIXINL_VOL_MASK             0x000E
383 #define WM8350_INL_MIXINL_VOL                   0x0001
384
385 /*
386  * R99 (0x63) - Input Mixer Volume R
387  */
388 #define WM8350_IN3R_MIXINR_VOL_MASK             0xE000
389 #define WM8350_IN2R_MIXINR_VOL_MASK             0x00E0
390 #define WM8350_INR_MIXINR_VOL                   0x0001
391
392 /*
393  * R100 (0x64) - Input Mixer Volume
394  */
395 #define WM8350_OUT4_MIXIN_DST                   0x8000
396 #define WM8350_OUT4_MIXIN_VOL_MASK              0x000E
397
398 /*
399  * R104 (0x68) - LOUT1 Volume
400  */
401 #define WM8350_OUT1L_MUTE                       0x4000
402 #define WM8350_OUT1L_ZC                         0x2000
403 #define WM8350_OUT1_VU                          0x0100
404 #define WM8350_OUT1L_VOL_MASK                   0x00FC
405 #define WM8350_OUT1L_VOL_SHIFT                       2
406
407 /*
408  * R105 (0x69) - ROUT1 Volume
409  */
410 #define WM8350_OUT1R_MUTE                       0x4000
411 #define WM8350_OUT1R_ZC                         0x2000
412 #define WM8350_OUT1_VU                          0x0100
413 #define WM8350_OUT1R_VOL_MASK                   0x00FC
414 #define WM8350_OUT1R_VOL_SHIFT                       2
415
416 /*
417  * R106 (0x6A) - LOUT2 Volume
418  */
419 #define WM8350_OUT2L_MUTE                       0x4000
420 #define WM8350_OUT2L_ZC                         0x2000
421 #define WM8350_OUT2_VU                          0x0100
422 #define WM8350_OUT2L_VOL_MASK                   0x00FC
423
424 /*
425  * R107 (0x6B) - ROUT2 Volume
426  */
427 #define WM8350_OUT2R_MUTE                       0x4000
428 #define WM8350_OUT2R_ZC                         0x2000
429 #define WM8350_OUT2R_INV                        0x0400
430 #define WM8350_OUT2R_INV_MUTE                   0x0200
431 #define WM8350_OUT2_VU                          0x0100
432 #define WM8350_OUT2R_VOL_MASK                   0x00FC
433
434 /*
435  * R111 (0x6F) - BEEP Volume
436  */
437 #define WM8350_IN3R_OUT2R_VOL_MASK              0x00E0
438
439 /*
440  * R112 (0x70) - AI Formating
441  */
442 #define WM8350_AIF_BCLK_INV                     0x8000
443 #define WM8350_AIF_TRI                          0x2000
444 #define WM8350_AIF_LRCLK_INV                    0x1000
445 #define WM8350_AIF_WL_MASK                      0x0C00
446 #define WM8350_AIF_FMT_MASK                     0x0300
447
448 /*
449  * R113 (0x71) - ADC DAC COMP
450  */
451 #define WM8350_DAC_COMP                         0x0080
452 #define WM8350_DAC_COMPMODE                     0x0040
453 #define WM8350_ADC_COMP                         0x0020
454 #define WM8350_ADC_COMPMODE                     0x0010
455 #define WM8350_LOOPBACK                         0x0001
456
457 /*
458  * R114 (0x72) - AI ADC Control
459  */
460 #define WM8350_AIFADC_PD                        0x0080
461 #define WM8350_AIFADCL_SRC                      0x0040
462 #define WM8350_AIFADCR_SRC                      0x0020
463 #define WM8350_AIFADC_TDM_CHAN                  0x0010
464 #define WM8350_AIFADC_TDM                       0x0008
465
466 /*
467  * R115 (0x73) - AI DAC Control
468  */
469 #define WM8350_BCLK_MSTR                        0x4000
470 #define WM8350_AIFDAC_PD                        0x0080
471 #define WM8350_DACL_SRC                         0x0040
472 #define WM8350_DACR_SRC                         0x0020
473 #define WM8350_AIFDAC_TDM_CHAN                  0x0010
474 #define WM8350_AIFDAC_TDM                       0x0008
475 #define WM8350_DAC_BOOST_MASK                   0x0003
476
477 /*
478  * R116 (0x74) - AIF Test
479  */
480 #define WM8350_CODEC_BYP                        0x4000
481 #define WM8350_AIFADC_WR_TST                    0x2000
482 #define WM8350_AIFADC_RD_TST                    0x1000
483 #define WM8350_AIFDAC_WR_TST                    0x0800
484 #define WM8350_AIFDAC_RD_TST                    0x0400
485 #define WM8350_AIFADC_ASYN                      0x0020
486 #define WM8350_AIFDAC_ASYN                      0x0010
487
488 /*
489  * R231 (0xE7) - Jack Status
490  */
491 #define WM8350_JACK_R_LVL                       0x0400
492
493 /*
494  * WM8350 Platform setup
495  */
496 #define WM8350_S_CURVE_NONE                     0x0
497 #define WM8350_S_CURVE_FAST                     0x1
498 #define WM8350_S_CURVE_MEDIUM                   0x2
499 #define WM8350_S_CURVE_SLOW                     0x3
500
501 #define WM8350_DISCHARGE_OFF                    0x0
502 #define WM8350_DISCHARGE_FAST                   0x1
503 #define WM8350_DISCHARGE_MEDIUM                 0x2
504 #define WM8350_DISCHARGE_SLOW                   0x3
505
506 #define WM8350_TIE_OFF_500R                     0x0
507 #define WM8350_TIE_OFF_30K                      0x1
508
509 /*
510  * Clock sources & directions
511  */
512 #define WM8350_SYSCLK                           0
513
514 #define WM8350_MCLK_SEL_PLL_MCLK                0
515 #define WM8350_MCLK_SEL_PLL_DAC                 1
516 #define WM8350_MCLK_SEL_PLL_ADC                 2
517 #define WM8350_MCLK_SEL_PLL_32K                 3
518 #define WM8350_MCLK_SEL_MCLK                    5
519
520 #define WM8350_MCLK_DIR_OUT                     0
521 #define WM8350_MCLK_DIR_IN                      1
522
523 /* clock divider id's */
524 #define WM8350_ADC_CLKDIV                       0
525 #define WM8350_DAC_CLKDIV                       1
526 #define WM8350_BCLK_CLKDIV                      2
527 #define WM8350_OPCLK_CLKDIV                     3
528 #define WM8350_TO_CLKDIV                        4
529 #define WM8350_SYS_CLKDIV                       5
530 #define WM8350_DACLR_CLKDIV                     6
531 #define WM8350_ADCLR_CLKDIV                     7
532
533 /* ADC clock dividers */
534 #define WM8350_ADCDIV_1                         0x0
535 #define WM8350_ADCDIV_1_5                       0x1
536 #define WM8350_ADCDIV_2                         0x2
537 #define WM8350_ADCDIV_3                         0x3
538 #define WM8350_ADCDIV_4                         0x4
539 #define WM8350_ADCDIV_5_5                       0x5
540 #define WM8350_ADCDIV_6                         0x6
541
542 /* ADC clock dividers */
543 #define WM8350_DACDIV_1                         0x0
544 #define WM8350_DACDIV_1_5                       0x1
545 #define WM8350_DACDIV_2                         0x2
546 #define WM8350_DACDIV_3                         0x3
547 #define WM8350_DACDIV_4                         0x4
548 #define WM8350_DACDIV_5_5                       0x5
549 #define WM8350_DACDIV_6                         0x6
550
551 /* BCLK clock dividers */
552 #define WM8350_BCLK_DIV_1                       (0x0 << 4)
553 #define WM8350_BCLK_DIV_1_5                     (0x1 << 4)
554 #define WM8350_BCLK_DIV_2                       (0x2 << 4)
555 #define WM8350_BCLK_DIV_3                       (0x3 << 4)
556 #define WM8350_BCLK_DIV_4                       (0x4 << 4)
557 #define WM8350_BCLK_DIV_5_5                     (0x5 << 4)
558 #define WM8350_BCLK_DIV_6                       (0x6 << 4)
559 #define WM8350_BCLK_DIV_8                       (0x7 << 4)
560 #define WM8350_BCLK_DIV_11                      (0x8 << 4)
561 #define WM8350_BCLK_DIV_12                      (0x9 << 4)
562 #define WM8350_BCLK_DIV_16                      (0xa << 4)
563 #define WM8350_BCLK_DIV_22                      (0xb << 4)
564 #define WM8350_BCLK_DIV_24                      (0xc << 4)
565 #define WM8350_BCLK_DIV_32                      (0xd << 4)
566 #define WM8350_BCLK_DIV_44                      (0xe << 4)
567 #define WM8350_BCLK_DIV_48                      (0xf << 4)
568
569 /* Sys (MCLK) clock dividers */
570 #define WM8350_MCLK_DIV_1                       (0x0 << 8)
571 #define WM8350_MCLK_DIV_2                       (0x1 << 8)
572
573 /* OP clock dividers */
574 #define WM8350_OPCLK_DIV_1                      0x0
575 #define WM8350_OPCLK_DIV_2                      0x1
576 #define WM8350_OPCLK_DIV_3                      0x2
577 #define WM8350_OPCLK_DIV_4                      0x3
578 #define WM8350_OPCLK_DIV_5_5                    0x4
579 #define WM8350_OPCLK_DIV_6                      0x5
580
581 /* DAI ID */
582 #define WM8350_HIFI_DAI                         0
583
584 /*
585  * Audio interrupts.
586  */
587 #define WM8350_IRQ_CODEC_JCK_DET_L              39
588 #define WM8350_IRQ_CODEC_JCK_DET_R              40
589 #define WM8350_IRQ_CODEC_MICSCD                 41
590 #define WM8350_IRQ_CODEC_MICD                   42
591
592 #endif