d7fcca18223bae42a5f37eac19ac1406b966419b
[linux-2.6.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2008 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
26         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
27 #include <linux/kgdb.h>
28 #include <asm/irq_regs.h>
29 #endif
30
31 #include <asm/gpio.h>
32 #include <mach/bfin_serial_5xx.h>
33
34 #ifdef CONFIG_SERIAL_BFIN_DMA
35 #include <linux/dma-mapping.h>
36 #include <asm/io.h>
37 #include <asm/irq.h>
38 #include <asm/cacheflush.h>
39 #endif
40
41 /* UART name and device definitions */
42 #define BFIN_SERIAL_NAME        "ttyBF"
43 #define BFIN_SERIAL_MAJOR       204
44 #define BFIN_SERIAL_MINOR       64
45
46 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
47 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
48
49 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
50         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
51
52 # ifndef CONFIG_SERIAL_BFIN_PIO
53 #  error KGDB only support UART in PIO mode.
54 # endif
55
56 static int kgdboc_port_line;
57 static int kgdboc_break_enabled;
58 #endif
59 /*
60  * Setup for console. Argument comes from the menuconfig
61  */
62 #define DMA_RX_XCOUNT           512
63 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
64
65 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
66
67 #ifdef CONFIG_SERIAL_BFIN_DMA
68 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
69 #else
70 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
71 #endif
72
73 static void bfin_serial_reset_irda(struct uart_port *port);
74
75 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
76         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
77 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
78 {
79         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
80         if (uart->cts_pin < 0)
81                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
82
83         /* CTS PIN is negative assertive. */
84         if (UART_GET_CTS(uart))
85                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
86         else
87                 return TIOCM_DSR | TIOCM_CAR;
88 }
89
90 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
91 {
92         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
93         if (uart->rts_pin < 0)
94                 return;
95
96         /* RTS PIN is negative assertive. */
97         if (mctrl & TIOCM_RTS)
98                 UART_ENABLE_RTS(uart);
99         else
100                 UART_DISABLE_RTS(uart);
101 }
102
103 /*
104  * Handle any change of modem status signal.
105  */
106 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
107 {
108         struct bfin_serial_port *uart = dev_id;
109         unsigned int status;
110
111         status = bfin_serial_get_mctrl(&uart->port);
112         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
113 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
114         uart->scts = 1;
115         UART_CLEAR_SCTS(uart);
116         UART_CLEAR_IER(uart, EDSSI);
117 #endif
118
119         return IRQ_HANDLED;
120 }
121 #else
122 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
123 {
124         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
125 }
126
127 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
128 {
129 }
130 #endif
131
132 /*
133  * interrupts are disabled on entry
134  */
135 static void bfin_serial_stop_tx(struct uart_port *port)
136 {
137         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
138 #ifdef CONFIG_SERIAL_BFIN_DMA
139         struct circ_buf *xmit = &uart->port.info->xmit;
140 #endif
141
142         while (!(UART_GET_LSR(uart) & TEMT))
143                 cpu_relax();
144
145 #ifdef CONFIG_SERIAL_BFIN_DMA
146         disable_dma(uart->tx_dma_channel);
147         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
148         uart->port.icount.tx += uart->tx_count;
149         uart->tx_count = 0;
150         uart->tx_done = 1;
151 #else
152 #ifdef CONFIG_BF54x
153         /* Clear TFI bit */
154         UART_PUT_LSR(uart, TFI);
155 #endif
156         UART_CLEAR_IER(uart, ETBEI);
157 #endif
158 }
159
160 /*
161  * port is locked and interrupts are disabled
162  */
163 static void bfin_serial_start_tx(struct uart_port *port)
164 {
165         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
166         struct tty_struct *tty = uart->port.info->port.tty;
167
168 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
169         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
170                 uart->scts = 0;
171                 uart_handle_cts_change(&uart->port, uart->scts);
172         }
173 #endif
174
175         /*
176          * To avoid losting RX interrupt, we reset IR function
177          * before sending data.
178          */
179         if (tty->termios->c_line == N_IRDA)
180                 bfin_serial_reset_irda(port);
181
182 #ifdef CONFIG_SERIAL_BFIN_DMA
183         if (uart->tx_done)
184                 bfin_serial_dma_tx_chars(uart);
185 #else
186         UART_SET_IER(uart, ETBEI);
187         bfin_serial_tx_chars(uart);
188 #endif
189 }
190
191 /*
192  * Interrupts are enabled
193  */
194 static void bfin_serial_stop_rx(struct uart_port *port)
195 {
196         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
197
198         UART_CLEAR_IER(uart, ERBFI);
199 }
200
201 /*
202  * Set the modem control timer to fire immediately.
203  */
204 static void bfin_serial_enable_ms(struct uart_port *port)
205 {
206 }
207
208
209 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
210 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
211 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
212 #else
213 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
214 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
215 #endif
216
217 #ifdef CONFIG_SERIAL_BFIN_PIO
218 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
219 {
220         struct tty_struct *tty = NULL;
221         unsigned int status, ch, flg;
222         static struct timeval anomaly_start = { .tv_sec = 0 };
223
224         status = UART_GET_LSR(uart);
225         UART_CLEAR_LSR(uart);
226
227         ch = UART_GET_CHAR(uart);
228         uart->port.icount.rx++;
229
230 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
231         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
232         if (kgdb_connected && kgdboc_port_line == uart->port.line)
233                 if (ch == 0x3) {/* Ctrl + C */
234                         kgdb_breakpoint();
235                         return;
236                 }
237
238         if (!uart->port.info || !uart->port.info->port.tty)
239                 return;
240 #endif
241         tty = uart->port.info->port.tty;
242
243         if (ANOMALY_05000363) {
244                 /* The BF533 (and BF561) family of processors have a nice anomaly
245                  * where they continuously generate characters for a "single" break.
246                  * We have to basically ignore this flood until the "next" valid
247                  * character comes across.  Due to the nature of the flood, it is
248                  * not possible to reliably catch bytes that are sent too quickly
249                  * after this break.  So application code talking to the Blackfin
250                  * which sends a break signal must allow at least 1.5 character
251                  * times after the end of the break for things to stabilize.  This
252                  * timeout was picked as it must absolutely be larger than 1
253                  * character time +/- some percent.  So 1.5 sounds good.  All other
254                  * Blackfin families operate properly.  Woo.
255                  */
256                 if (anomaly_start.tv_sec) {
257                         struct timeval curr;
258                         suseconds_t usecs;
259
260                         if ((~ch & (~ch + 1)) & 0xff)
261                                 goto known_good_char;
262
263                         do_gettimeofday(&curr);
264                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
265                                 goto known_good_char;
266
267                         usecs = 0;
268                         if (curr.tv_sec != anomaly_start.tv_sec)
269                                 usecs += USEC_PER_SEC;
270                         usecs += curr.tv_usec - anomaly_start.tv_usec;
271
272                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273                                 goto known_good_char;
274
275                         if (ch)
276                                 anomaly_start.tv_sec = 0;
277                         else
278                                 anomaly_start = curr;
279
280                         return;
281
282  known_good_char:
283                         status &= ~BI;
284                         anomaly_start.tv_sec = 0;
285                 }
286         }
287
288         if (status & BI) {
289                 if (ANOMALY_05000363)
290                         if (bfin_revid() < 5)
291                                 do_gettimeofday(&anomaly_start);
292                 uart->port.icount.brk++;
293                 if (uart_handle_break(&uart->port))
294                         goto ignore_char;
295                 status &= ~(PE | FE);
296         }
297         if (status & PE)
298                 uart->port.icount.parity++;
299         if (status & OE)
300                 uart->port.icount.overrun++;
301         if (status & FE)
302                 uart->port.icount.frame++;
303
304         status &= uart->port.read_status_mask;
305
306         if (status & BI)
307                 flg = TTY_BREAK;
308         else if (status & PE)
309                 flg = TTY_PARITY;
310         else if (status & FE)
311                 flg = TTY_FRAME;
312         else
313                 flg = TTY_NORMAL;
314
315         if (uart_handle_sysrq_char(&uart->port, ch))
316                 goto ignore_char;
317
318         uart_insert_char(&uart->port, status, OE, ch, flg);
319
320  ignore_char:
321         tty_flip_buffer_push(tty);
322 }
323
324 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
325 {
326         struct circ_buf *xmit = &uart->port.info->xmit;
327
328         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
329 #ifdef CONFIG_BF54x
330                 /* Clear TFI bit */
331                 UART_PUT_LSR(uart, TFI);
332 #endif
333                 /* Anomaly notes:
334                  *  05000215 -  we always clear ETBEI within last UART TX
335                  *              interrupt to end a string. It is always set
336                  *              when start a new tx.
337                  */
338                 UART_CLEAR_IER(uart, ETBEI);
339                 return;
340         }
341
342         if (uart->port.x_char) {
343                 UART_PUT_CHAR(uart, uart->port.x_char);
344                 uart->port.icount.tx++;
345                 uart->port.x_char = 0;
346         }
347
348         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
349                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
350                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
351                 uart->port.icount.tx++;
352                 SSYNC();
353         }
354
355         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
356                 uart_write_wakeup(&uart->port);
357 }
358
359 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
360 {
361         struct bfin_serial_port *uart = dev_id;
362
363         spin_lock(&uart->port.lock);
364         while (UART_GET_LSR(uart) & DR)
365                 bfin_serial_rx_chars(uart);
366         spin_unlock(&uart->port.lock);
367
368         return IRQ_HANDLED;
369 }
370
371 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
372 {
373         struct bfin_serial_port *uart = dev_id;
374
375 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
376         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
377                 uart->scts = 0;
378                 uart_handle_cts_change(&uart->port, uart->scts);
379         }
380 #endif
381         spin_lock(&uart->port.lock);
382         if (UART_GET_LSR(uart) & THRE)
383                 bfin_serial_tx_chars(uart);
384         spin_unlock(&uart->port.lock);
385
386         return IRQ_HANDLED;
387 }
388 #endif
389
390 #ifdef CONFIG_SERIAL_BFIN_DMA
391 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
392 {
393         struct circ_buf *xmit = &uart->port.info->xmit;
394
395         uart->tx_done = 0;
396
397         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
398                 uart->tx_count = 0;
399                 uart->tx_done = 1;
400                 return;
401         }
402
403         if (uart->port.x_char) {
404                 UART_PUT_CHAR(uart, uart->port.x_char);
405                 uart->port.icount.tx++;
406                 uart->port.x_char = 0;
407         }
408
409         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
410         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
411                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
412         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
413                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
414         set_dma_config(uart->tx_dma_channel,
415                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
416                         INTR_ON_BUF,
417                         DIMENSION_LINEAR,
418                         DATA_SIZE_8,
419                         DMA_SYNC_RESTART));
420         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
421         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
422         set_dma_x_modify(uart->tx_dma_channel, 1);
423         SSYNC();
424         enable_dma(uart->tx_dma_channel);
425
426         UART_SET_IER(uart, ETBEI);
427 }
428
429 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
430 {
431         struct tty_struct *tty = uart->port.info->port.tty;
432         int i, flg, status;
433
434         status = UART_GET_LSR(uart);
435         UART_CLEAR_LSR(uart);
436
437         uart->port.icount.rx +=
438                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
439                 UART_XMIT_SIZE);
440
441         if (status & BI) {
442                 uart->port.icount.brk++;
443                 if (uart_handle_break(&uart->port))
444                         goto dma_ignore_char;
445                 status &= ~(PE | FE);
446         }
447         if (status & PE)
448                 uart->port.icount.parity++;
449         if (status & OE)
450                 uart->port.icount.overrun++;
451         if (status & FE)
452                 uart->port.icount.frame++;
453
454         status &= uart->port.read_status_mask;
455
456         if (status & BI)
457                 flg = TTY_BREAK;
458         else if (status & PE)
459                 flg = TTY_PARITY;
460         else if (status & FE)
461                 flg = TTY_FRAME;
462         else
463                 flg = TTY_NORMAL;
464
465         for (i = uart->rx_dma_buf.tail; ; i++) {
466                 if (i >= UART_XMIT_SIZE)
467                         i = 0;
468                 if (i == uart->rx_dma_buf.head)
469                         break;
470                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
471                         uart_insert_char(&uart->port, status, OE,
472                                 uart->rx_dma_buf.buf[i], flg);
473         }
474
475  dma_ignore_char:
476         tty_flip_buffer_push(tty);
477 }
478
479 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
480 {
481         int x_pos, pos;
482
483         dma_disable_irq(uart->rx_dma_channel);
484         spin_lock_bh(&uart->port.lock);
485
486         /* 2D DMA RX buffer ring is used. Because curr_y_count and
487          * curr_x_count can't be read as an atomic operation,
488          * curr_y_count should be read before curr_x_count. When
489          * curr_x_count is read, curr_y_count may already indicate
490          * next buffer line. But, the position calculated here is
491          * still indicate the old line. The wrong position data may
492          * be smaller than current buffer tail, which cause garbages
493          * are received if it is not prohibit.
494          */
495         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
496         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
497         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
498         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
499                 uart->rx_dma_nrows = 0;
500         x_pos = DMA_RX_XCOUNT - x_pos;
501         if (x_pos == DMA_RX_XCOUNT)
502                 x_pos = 0;
503
504         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
505         /* Ignore receiving data if new position is in the same line of
506          * current buffer tail and small.
507          */
508         if (pos > uart->rx_dma_buf.tail ||
509                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
510                 uart->rx_dma_buf.head = pos;
511                 bfin_serial_dma_rx_chars(uart);
512                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
513         }
514
515         spin_unlock_bh(&uart->port.lock);
516         dma_enable_irq(uart->rx_dma_channel);
517
518         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
519 }
520
521 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
522 {
523         struct bfin_serial_port *uart = dev_id;
524         struct circ_buf *xmit = &uart->port.info->xmit;
525
526 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
527         if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
528                 uart->scts = 0;
529                 uart_handle_cts_change(&uart->port, uart->scts);
530         }
531 #endif
532
533         spin_lock(&uart->port.lock);
534         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
535                 disable_dma(uart->tx_dma_channel);
536                 clear_dma_irqstat(uart->tx_dma_channel);
537                 /* Anomaly notes:
538                  *  05000215 -  we always clear ETBEI within last UART TX
539                  *              interrupt to end a string. It is always set
540                  *              when start a new tx.
541                  */
542                 UART_CLEAR_IER(uart, ETBEI);
543                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
544                 uart->port.icount.tx += uart->tx_count;
545
546                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
547                         uart_write_wakeup(&uart->port);
548
549                 bfin_serial_dma_tx_chars(uart);
550         }
551
552         spin_unlock(&uart->port.lock);
553         return IRQ_HANDLED;
554 }
555
556 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
557 {
558         struct bfin_serial_port *uart = dev_id;
559         unsigned short irqstat;
560         int x_pos, pos;
561
562         spin_lock(&uart->port.lock);
563         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
564         clear_dma_irqstat(uart->rx_dma_channel);
565
566         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
567         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
568         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
569         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
570                 uart->rx_dma_nrows = 0;
571
572         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
573         if (pos > uart->rx_dma_buf.tail ||
574                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
575                 uart->rx_dma_buf.head = pos;
576                 bfin_serial_dma_rx_chars(uart);
577                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
578         }
579
580         spin_unlock(&uart->port.lock);
581
582         return IRQ_HANDLED;
583 }
584 #endif
585
586 /*
587  * Return TIOCSER_TEMT when transmitter is not busy.
588  */
589 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
590 {
591         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
592         unsigned short lsr;
593
594         lsr = UART_GET_LSR(uart);
595         if (lsr & TEMT)
596                 return TIOCSER_TEMT;
597         else
598                 return 0;
599 }
600
601 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
602 {
603         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
604         u16 lcr = UART_GET_LCR(uart);
605         if (break_state)
606                 lcr |= SB;
607         else
608                 lcr &= ~SB;
609         UART_PUT_LCR(uart, lcr);
610         SSYNC();
611 }
612
613 static int bfin_serial_startup(struct uart_port *port)
614 {
615         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
616
617 #ifdef CONFIG_SERIAL_BFIN_DMA
618         dma_addr_t dma_handle;
619
620         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
621                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
622                 return -EBUSY;
623         }
624
625         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
626                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
627                 free_dma(uart->rx_dma_channel);
628                 return -EBUSY;
629         }
630
631         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
632         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
633
634         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
635         uart->rx_dma_buf.head = 0;
636         uart->rx_dma_buf.tail = 0;
637         uart->rx_dma_nrows = 0;
638
639         set_dma_config(uart->rx_dma_channel,
640                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
641                                 INTR_ON_ROW, DIMENSION_2D,
642                                 DATA_SIZE_8,
643                                 DMA_SYNC_RESTART));
644         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
645         set_dma_x_modify(uart->rx_dma_channel, 1);
646         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
647         set_dma_y_modify(uart->rx_dma_channel, 1);
648         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
649         enable_dma(uart->rx_dma_channel);
650
651         uart->rx_dma_timer.data = (unsigned long)(uart);
652         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
653         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
654         add_timer(&(uart->rx_dma_timer));
655 #else
656 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
657         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
658         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
659                 kgdboc_break_enabled = 0;
660         else {
661 # endif
662         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
663              "BFIN_UART_RX", uart)) {
664                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
665                 return -EBUSY;
666         }
667
668         if (request_irq
669             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
670              "BFIN_UART_TX", uart)) {
671                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
672                 free_irq(uart->port.irq, uart);
673                 return -EBUSY;
674         }
675
676 # ifdef CONFIG_BF54x
677         {
678                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
679
680                 switch (uart->port.irq) {
681                 case IRQ_UART3_RX:
682                         uart_dma_ch_rx = CH_UART3_RX;
683                         uart_dma_ch_tx = CH_UART3_TX;
684                         break;
685                 case IRQ_UART2_RX:
686                         uart_dma_ch_rx = CH_UART2_RX;
687                         uart_dma_ch_tx = CH_UART2_TX;
688                         break;
689                 default:
690                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
691                         break;
692                 };
693
694                 if (uart_dma_ch_rx &&
695                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
696                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
697                         free_irq(uart->port.irq, uart);
698                         free_irq(uart->port.irq + 1, uart);
699                         return -EBUSY;
700                 }
701                 if (uart_dma_ch_tx &&
702                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
703                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
704                         free_dma(uart_dma_ch_rx);
705                         free_irq(uart->port.irq, uart);
706                         free_irq(uart->port.irq + 1, uart);
707                         return -EBUSY;
708                 }
709         }
710 # endif
711 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
712         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
713         }
714 # endif
715 #endif
716
717 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
718         if (uart->cts_pin >= 0) {
719                 if (request_irq(gpio_to_irq(uart->cts_pin),
720                         bfin_serial_mctrl_cts_int,
721                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
722                         IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
723                         uart->cts_pin = -1;
724                         pr_info("Unable to attach BlackFin UART CTS interrupt.\
725                                  So, disable it.\n");
726                 }
727         }
728         if (uart->rts_pin >= 0) {
729                 gpio_request(uart->rts_pin, DRIVER_NAME);
730                 gpio_direction_output(uart->rts_pin, 0);
731         }
732 #endif
733 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
734         if (request_irq(uart->status_irq,
735                 bfin_serial_mctrl_cts_int,
736                 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
737                 pr_info("Unable to attach BlackFin UART Modem \
738                         Status interrupt.\n");
739         }
740
741         if (uart->cts_pin >= 0) {
742                 gpio_request(uart->cts_pin, DRIVER_NAME);
743                 gpio_direction_output(uart->cts_pin, 1);
744         }
745         if (uart->rts_pin >= 0) {
746                 gpio_request(uart->rts_pin, DRIVER_NAME);
747                 gpio_direction_output(uart->rts_pin, 0);
748         }
749
750         /* CTS RTS PINs are negative assertive. */
751         UART_PUT_MCR(uart, ACTS);
752         UART_SET_IER(uart, EDSSI);
753 #endif
754
755         UART_SET_IER(uart, ERBFI);
756         return 0;
757 }
758
759 static void bfin_serial_shutdown(struct uart_port *port)
760 {
761         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
762
763 #ifdef CONFIG_SERIAL_BFIN_DMA
764         disable_dma(uart->tx_dma_channel);
765         free_dma(uart->tx_dma_channel);
766         disable_dma(uart->rx_dma_channel);
767         free_dma(uart->rx_dma_channel);
768         del_timer(&(uart->rx_dma_timer));
769         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
770 #else
771 #ifdef CONFIG_BF54x
772         switch (uart->port.irq) {
773         case IRQ_UART3_RX:
774                 free_dma(CH_UART3_RX);
775                 free_dma(CH_UART3_TX);
776                 break;
777         case IRQ_UART2_RX:
778                 free_dma(CH_UART2_RX);
779                 free_dma(CH_UART2_TX);
780                 break;
781         default:
782                 break;
783         };
784 #endif
785         free_irq(uart->port.irq, uart);
786         free_irq(uart->port.irq+1, uart);
787 #endif
788
789 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
790         if (uart->cts_pin >= 0)
791                 free_irq(gpio_to_irq(uart->cts_pin), uart);
792         if (uart->rts_pin >= 0)
793                 gpio_free(uart->rts_pin);
794 #endif
795 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
796         if (uart->cts_pin >= 0)
797                 gpio_free(uart->cts_pin);
798         if (uart->rts_pin >= 0)
799                 gpio_free(uart->rts_pin);
800         if (UART_GET_IER(uart) && EDSSI)
801                 free_irq(uart->status_irq, uart);
802 #endif
803 }
804
805 static void
806 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
807                    struct ktermios *old)
808 {
809         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
810         unsigned long flags;
811         unsigned int baud, quot;
812         unsigned short val, ier, lcr = 0;
813
814         switch (termios->c_cflag & CSIZE) {
815         case CS8:
816                 lcr = WLS(8);
817                 break;
818         case CS7:
819                 lcr = WLS(7);
820                 break;
821         case CS6:
822                 lcr = WLS(6);
823                 break;
824         case CS5:
825                 lcr = WLS(5);
826                 break;
827         default:
828                 printk(KERN_ERR "%s: word lengh not supported\n",
829                         __func__);
830         }
831
832         /* Anomaly notes:
833          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
834          */
835         if (termios->c_cflag & CSTOPB) {
836                 if (ANOMALY_05000231)
837                         printk(KERN_WARNING "STOP bits other than 1 is not "
838                                 "supported in case of anomaly 05000231.\n");
839                 else
840                         lcr |= STB;
841         }
842         if (termios->c_cflag & PARENB)
843                 lcr |= PEN;
844         if (!(termios->c_cflag & PARODD))
845                 lcr |= EPS;
846         if (termios->c_cflag & CMSPAR)
847                 lcr |= STP;
848
849         port->read_status_mask = OE;
850         if (termios->c_iflag & INPCK)
851                 port->read_status_mask |= (FE | PE);
852         if (termios->c_iflag & (BRKINT | PARMRK))
853                 port->read_status_mask |= BI;
854
855         /*
856          * Characters to ignore
857          */
858         port->ignore_status_mask = 0;
859         if (termios->c_iflag & IGNPAR)
860                 port->ignore_status_mask |= FE | PE;
861         if (termios->c_iflag & IGNBRK) {
862                 port->ignore_status_mask |= BI;
863                 /*
864                  * If we're ignoring parity and break indicators,
865                  * ignore overruns too (for real raw support).
866                  */
867                 if (termios->c_iflag & IGNPAR)
868                         port->ignore_status_mask |= OE;
869         }
870
871         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
872         quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
873         spin_lock_irqsave(&uart->port.lock, flags);
874
875         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
876
877         /* Disable UART */
878         ier = UART_GET_IER(uart);
879         UART_DISABLE_INTS(uart);
880
881         /* Set DLAB in LCR to Access DLL and DLH */
882         UART_SET_DLAB(uart);
883
884         UART_PUT_DLL(uart, quot & 0xFF);
885         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
886         SSYNC();
887
888         /* Clear DLAB in LCR to Access THR RBR IER */
889         UART_CLEAR_DLAB(uart);
890
891         UART_PUT_LCR(uart, lcr);
892
893         /* Enable UART */
894         UART_ENABLE_INTS(uart, ier);
895
896         val = UART_GET_GCTL(uart);
897         val |= UCEN;
898         UART_PUT_GCTL(uart, val);
899
900         /* Port speed changed, update the per-port timeout. */
901         uart_update_timeout(port, termios->c_cflag, baud);
902
903         spin_unlock_irqrestore(&uart->port.lock, flags);
904 }
905
906 static const char *bfin_serial_type(struct uart_port *port)
907 {
908         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
909
910         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
911 }
912
913 /*
914  * Release the memory region(s) being used by 'port'.
915  */
916 static void bfin_serial_release_port(struct uart_port *port)
917 {
918 }
919
920 /*
921  * Request the memory region(s) being used by 'port'.
922  */
923 static int bfin_serial_request_port(struct uart_port *port)
924 {
925         return 0;
926 }
927
928 /*
929  * Configure/autoconfigure the port.
930  */
931 static void bfin_serial_config_port(struct uart_port *port, int flags)
932 {
933         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
934
935         if (flags & UART_CONFIG_TYPE &&
936             bfin_serial_request_port(&uart->port) == 0)
937                 uart->port.type = PORT_BFIN;
938 }
939
940 /*
941  * Verify the new serial_struct (for TIOCSSERIAL).
942  * The only change we allow are to the flags and type, and
943  * even then only between PORT_BFIN and PORT_UNKNOWN
944  */
945 static int
946 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
947 {
948         return 0;
949 }
950
951 /*
952  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
953  * In other cases, disable IrDA function.
954  */
955 static void bfin_serial_set_ldisc(struct uart_port *port)
956 {
957         int line = port->line;
958         unsigned short val;
959
960         if (line >= port->info->port.tty->driver->num)
961                 return;
962
963         switch (port->info->port.tty->termios->c_line) {
964         case N_IRDA:
965                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
966                 val |= (IREN | RPOLC);
967                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
968                 break;
969         default:
970                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
971                 val &= ~(IREN | RPOLC);
972                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
973         }
974 }
975
976 static void bfin_serial_reset_irda(struct uart_port *port)
977 {
978         int line = port->line;
979         unsigned short val;
980
981         val = UART_GET_GCTL(&bfin_serial_ports[line]);
982         val &= ~(IREN | RPOLC);
983         UART_PUT_GCTL(&bfin_serial_ports[line], val);
984         SSYNC();
985         val |= (IREN | RPOLC);
986         UART_PUT_GCTL(&bfin_serial_ports[line], val);
987         SSYNC();
988 }
989
990 #ifdef CONFIG_CONSOLE_POLL
991 /* Anomaly notes:
992  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
993  *              losing other bits of UART_LSR is not a problem here.
994  */
995 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
996 {
997         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
998
999         while (!(UART_GET_LSR(uart) & THRE))
1000                 cpu_relax();
1001
1002         UART_CLEAR_DLAB(uart);
1003         UART_PUT_CHAR(uart, (unsigned char)chr);
1004 }
1005
1006 static int bfin_serial_poll_get_char(struct uart_port *port)
1007 {
1008         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1009         unsigned char chr;
1010
1011         while (!(UART_GET_LSR(uart) & DR))
1012                 cpu_relax();
1013
1014         UART_CLEAR_DLAB(uart);
1015         chr = UART_GET_CHAR(uart);
1016
1017         return chr;
1018 }
1019 #endif
1020
1021 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1022         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1023 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1024 {
1025         if (kgdboc_break_enabled) {
1026                 kgdboc_break_enabled = 0;
1027                 bfin_serial_shutdown(port);
1028         }
1029 }
1030
1031 static int bfin_kgdboc_port_startup(struct uart_port *port)
1032 {
1033         kgdboc_port_line = port->line;
1034         kgdboc_break_enabled = !bfin_serial_startup(port);
1035         return 0;
1036 }
1037 #endif
1038
1039 static struct uart_ops bfin_serial_pops = {
1040         .tx_empty       = bfin_serial_tx_empty,
1041         .set_mctrl      = bfin_serial_set_mctrl,
1042         .get_mctrl      = bfin_serial_get_mctrl,
1043         .stop_tx        = bfin_serial_stop_tx,
1044         .start_tx       = bfin_serial_start_tx,
1045         .stop_rx        = bfin_serial_stop_rx,
1046         .enable_ms      = bfin_serial_enable_ms,
1047         .break_ctl      = bfin_serial_break_ctl,
1048         .startup        = bfin_serial_startup,
1049         .shutdown       = bfin_serial_shutdown,
1050         .set_termios    = bfin_serial_set_termios,
1051         .set_ldisc      = bfin_serial_set_ldisc,
1052         .type           = bfin_serial_type,
1053         .release_port   = bfin_serial_release_port,
1054         .request_port   = bfin_serial_request_port,
1055         .config_port    = bfin_serial_config_port,
1056         .verify_port    = bfin_serial_verify_port,
1057 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1058         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1059         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1060         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1061 #endif
1062 #ifdef CONFIG_CONSOLE_POLL
1063         .poll_put_char  = bfin_serial_poll_put_char,
1064         .poll_get_char  = bfin_serial_poll_get_char,
1065 #endif
1066 };
1067
1068 static void __init bfin_serial_hw_init(void)
1069 {
1070 #ifdef CONFIG_SERIAL_BFIN_UART0
1071         peripheral_request(P_UART0_TX, DRIVER_NAME);
1072         peripheral_request(P_UART0_RX, DRIVER_NAME);
1073 #endif
1074
1075 #ifdef CONFIG_SERIAL_BFIN_UART1
1076         peripheral_request(P_UART1_TX, DRIVER_NAME);
1077         peripheral_request(P_UART1_RX, DRIVER_NAME);
1078
1079 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
1080         peripheral_request(P_UART1_RTS, DRIVER_NAME);
1081         peripheral_request(P_UART1_CTS, DRIVER_NAME);
1082 # endif
1083 #endif
1084
1085 #ifdef CONFIG_SERIAL_BFIN_UART2
1086         peripheral_request(P_UART2_TX, DRIVER_NAME);
1087         peripheral_request(P_UART2_RX, DRIVER_NAME);
1088 #endif
1089
1090 #ifdef CONFIG_SERIAL_BFIN_UART3
1091         peripheral_request(P_UART3_TX, DRIVER_NAME);
1092         peripheral_request(P_UART3_RX, DRIVER_NAME);
1093
1094 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
1095         peripheral_request(P_UART3_RTS, DRIVER_NAME);
1096         peripheral_request(P_UART3_CTS, DRIVER_NAME);
1097 # endif
1098 #endif
1099 }
1100
1101 static void __init bfin_serial_init_ports(void)
1102 {
1103         static int first = 1;
1104         int i;
1105
1106         if (!first)
1107                 return;
1108         first = 0;
1109
1110         bfin_serial_hw_init();
1111
1112         for (i = 0; i < nr_active_ports; i++) {
1113                 spin_lock_init(&bfin_serial_ports[i].port.lock);
1114                 bfin_serial_ports[i].port.uartclk   = get_sclk();
1115                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1116                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
1117                 bfin_serial_ports[i].port.line      = i;
1118                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
1119                 bfin_serial_ports[i].port.membase   =
1120                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1121                 bfin_serial_ports[i].port.mapbase   =
1122                         bfin_serial_resource[i].uart_base_addr;
1123                 bfin_serial_ports[i].port.irq       =
1124                         bfin_serial_resource[i].uart_irq;
1125                 bfin_serial_ports[i].status_irq     =
1126                         bfin_serial_resource[i].uart_status_irq;
1127                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
1128 #ifdef CONFIG_SERIAL_BFIN_DMA
1129                 bfin_serial_ports[i].tx_done        = 1;
1130                 bfin_serial_ports[i].tx_count       = 0;
1131                 bfin_serial_ports[i].tx_dma_channel =
1132                         bfin_serial_resource[i].uart_tx_dma_channel;
1133                 bfin_serial_ports[i].rx_dma_channel =
1134                         bfin_serial_resource[i].uart_rx_dma_channel;
1135                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1136 #endif
1137 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1138         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1139                 bfin_serial_ports[i].cts_pin        =
1140                         bfin_serial_resource[i].uart_cts_pin;
1141                 bfin_serial_ports[i].rts_pin        =
1142                         bfin_serial_resource[i].uart_rts_pin;
1143 #endif
1144         }
1145 }
1146
1147 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1148 /*
1149  * If the port was already initialised (eg, by a boot loader),
1150  * try to determine the current setup.
1151  */
1152 static void __init
1153 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1154                            int *parity, int *bits)
1155 {
1156         unsigned short status;
1157
1158         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1159         if (status == (ERBFI | ETBEI)) {
1160                 /* ok, the port was enabled */
1161                 u16 lcr, dlh, dll;
1162
1163                 lcr = UART_GET_LCR(uart);
1164
1165                 *parity = 'n';
1166                 if (lcr & PEN) {
1167                         if (lcr & EPS)
1168                                 *parity = 'e';
1169                         else
1170                                 *parity = 'o';
1171                 }
1172                 switch (lcr & 0x03) {
1173                         case 0: *bits = 5; break;
1174                         case 1: *bits = 6; break;
1175                         case 2: *bits = 7; break;
1176                         case 3: *bits = 8; break;
1177                 }
1178                 /* Set DLAB in LCR to Access DLL and DLH */
1179                 UART_SET_DLAB(uart);
1180
1181                 dll = UART_GET_DLL(uart);
1182                 dlh = UART_GET_DLH(uart);
1183
1184                 /* Clear DLAB in LCR to Access THR RBR IER */
1185                 UART_CLEAR_DLAB(uart);
1186
1187                 *baud = get_sclk() / (16*(dll | dlh << 8));
1188         }
1189         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1190 }
1191
1192 static struct uart_driver bfin_serial_reg;
1193
1194 static int __init
1195 bfin_serial_console_setup(struct console *co, char *options)
1196 {
1197         struct bfin_serial_port *uart;
1198         int baud = 57600;
1199         int bits = 8;
1200         int parity = 'n';
1201 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1202         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1203         int flow = 'r';
1204 # else
1205         int flow = 'n';
1206 # endif
1207
1208         /*
1209          * Check whether an invalid uart number has been specified, and
1210          * if so, search for the first available port that does have
1211          * console support.
1212          */
1213         if (co->index == -1 || co->index >= nr_active_ports)
1214                 co->index = 0;
1215         uart = &bfin_serial_ports[co->index];
1216
1217         if (options)
1218                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1219         else
1220                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1221
1222         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1223 }
1224 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1225                                  defined (CONFIG_EARLY_PRINTK) */
1226
1227 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1228 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1229 {
1230         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1231         while (!(UART_GET_LSR(uart) & THRE))
1232                 barrier();
1233         UART_PUT_CHAR(uart, ch);
1234         SSYNC();
1235 }
1236
1237 /*
1238  * Interrupts are disabled on entering
1239  */
1240 static void
1241 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1242 {
1243         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1244         unsigned long flags;
1245
1246         spin_lock_irqsave(&uart->port.lock, flags);
1247         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1248         spin_unlock_irqrestore(&uart->port.lock, flags);
1249
1250 }
1251
1252 static struct console bfin_serial_console = {
1253         .name           = BFIN_SERIAL_NAME,
1254         .write          = bfin_serial_console_write,
1255         .device         = uart_console_device,
1256         .setup          = bfin_serial_console_setup,
1257         .flags          = CON_PRINTBUFFER,
1258         .index          = -1,
1259         .data           = &bfin_serial_reg,
1260 };
1261
1262 static int __init bfin_serial_rs_console_init(void)
1263 {
1264         bfin_serial_init_ports();
1265         register_console(&bfin_serial_console);
1266
1267         return 0;
1268 }
1269 console_initcall(bfin_serial_rs_console_init);
1270
1271 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1272 #else
1273 #define BFIN_SERIAL_CONSOLE     NULL
1274 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1275
1276
1277 #ifdef CONFIG_EARLY_PRINTK
1278 static __init void early_serial_putc(struct uart_port *port, int ch)
1279 {
1280         unsigned timeout = 0xffff;
1281         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1282
1283         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1284                 cpu_relax();
1285         UART_PUT_CHAR(uart, ch);
1286 }
1287
1288 static __init void early_serial_write(struct console *con, const char *s,
1289                                         unsigned int n)
1290 {
1291         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1292         unsigned int i;
1293
1294         for (i = 0; i < n; i++, s++) {
1295                 if (*s == '\n')
1296                         early_serial_putc(&uart->port, '\r');
1297                 early_serial_putc(&uart->port, *s);
1298         }
1299 }
1300
1301 /*
1302  * This should have a .setup or .early_setup in it, but then things get called
1303  * without the command line options, and the baud rate gets messed up - so
1304  * don't let the common infrastructure play with things. (see calls to setup
1305  * & earlysetup in ./kernel/printk.c:register_console()
1306  */
1307 static struct __initdata console bfin_early_serial_console = {
1308         .name = "early_BFuart",
1309         .write = early_serial_write,
1310         .device = uart_console_device,
1311         .flags = CON_PRINTBUFFER,
1312         .index = -1,
1313         .data  = &bfin_serial_reg,
1314 };
1315
1316 struct console __init *bfin_earlyserial_init(unsigned int port,
1317                                                 unsigned int cflag)
1318 {
1319         struct bfin_serial_port *uart;
1320         struct ktermios t;
1321
1322         if (port == -1 || port >= nr_active_ports)
1323                 port = 0;
1324         bfin_serial_init_ports();
1325         bfin_early_serial_console.index = port;
1326         uart = &bfin_serial_ports[port];
1327         t.c_cflag = cflag;
1328         t.c_iflag = 0;
1329         t.c_oflag = 0;
1330         t.c_lflag = ICANON;
1331         t.c_line = port;
1332         bfin_serial_set_termios(&uart->port, &t, &t);
1333         return &bfin_early_serial_console;
1334 }
1335
1336 #endif /* CONFIG_EARLY_PRINTK */
1337
1338 static struct uart_driver bfin_serial_reg = {
1339         .owner                  = THIS_MODULE,
1340         .driver_name            = "bfin-uart",
1341         .dev_name               = BFIN_SERIAL_NAME,
1342         .major                  = BFIN_SERIAL_MAJOR,
1343         .minor                  = BFIN_SERIAL_MINOR,
1344         .nr                     = BFIN_UART_NR_PORTS,
1345         .cons                   = BFIN_SERIAL_CONSOLE,
1346 };
1347
1348 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1349 {
1350         int i;
1351
1352         for (i = 0; i < nr_active_ports; i++) {
1353                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1354                         continue;
1355                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1356         }
1357
1358         return 0;
1359 }
1360
1361 static int bfin_serial_resume(struct platform_device *dev)
1362 {
1363         int i;
1364
1365         for (i = 0; i < nr_active_ports; i++) {
1366                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1367                         continue;
1368                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1369         }
1370
1371         return 0;
1372 }
1373
1374 static int bfin_serial_probe(struct platform_device *dev)
1375 {
1376         struct resource *res = dev->resource;
1377         int i;
1378
1379         for (i = 0; i < dev->num_resources; i++, res++)
1380                 if (res->flags & IORESOURCE_MEM)
1381                         break;
1382
1383         if (i < dev->num_resources) {
1384                 for (i = 0; i < nr_active_ports; i++, res++) {
1385                         if (bfin_serial_ports[i].port.mapbase != res->start)
1386                                 continue;
1387                         bfin_serial_ports[i].port.dev = &dev->dev;
1388                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1389                 }
1390         }
1391
1392         return 0;
1393 }
1394
1395 static int bfin_serial_remove(struct platform_device *dev)
1396 {
1397         int i;
1398
1399         for (i = 0; i < nr_active_ports; i++) {
1400                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1401                         continue;
1402                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1403                 bfin_serial_ports[i].port.dev = NULL;
1404 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1405         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1406                 gpio_free(bfin_serial_ports[i].cts_pin);
1407                 gpio_free(bfin_serial_ports[i].rts_pin);
1408 #endif
1409         }
1410
1411         return 0;
1412 }
1413
1414 static struct platform_driver bfin_serial_driver = {
1415         .probe          = bfin_serial_probe,
1416         .remove         = bfin_serial_remove,
1417         .suspend        = bfin_serial_suspend,
1418         .resume         = bfin_serial_resume,
1419         .driver         = {
1420                 .name   = "bfin-uart",
1421                 .owner  = THIS_MODULE,
1422         },
1423 };
1424
1425 static int __init bfin_serial_init(void)
1426 {
1427         int ret;
1428
1429         pr_info("Serial: Blackfin serial driver\n");
1430
1431         bfin_serial_init_ports();
1432
1433         ret = uart_register_driver(&bfin_serial_reg);
1434         if (ret == 0) {
1435                 ret = platform_driver_register(&bfin_serial_driver);
1436                 if (ret) {
1437                         pr_debug("uart register failed\n");
1438                         uart_unregister_driver(&bfin_serial_reg);
1439                 }
1440         }
1441         return ret;
1442 }
1443
1444 static void __exit bfin_serial_exit(void)
1445 {
1446         platform_driver_unregister(&bfin_serial_driver);
1447         uart_unregister_driver(&bfin_serial_reg);
1448 }
1449
1450
1451 module_init(bfin_serial_init);
1452 module_exit(bfin_serial_exit);
1453
1454 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1455 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1456 MODULE_LICENSE("GPL");
1457 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1458 MODULE_ALIAS("platform:bfin-uart");