976de91307c3389c8ce1ce7f1bb0c102859fa4cc
[linux-2.6.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2008 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
52 #define CTS_CHECK_JIFFIES       (HZ / 50)
53
54 #ifdef CONFIG_SERIAL_BFIN_DMA
55 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
56 #else
57 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
58 #endif
59
60 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
61
62 /*
63  * interrupts are disabled on entry
64  */
65 static void bfin_serial_stop_tx(struct uart_port *port)
66 {
67         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
68         struct circ_buf *xmit = &uart->port.info->xmit;
69
70         while (!(UART_GET_LSR(uart) & TEMT))
71                 cpu_relax();
72
73 #ifdef CONFIG_SERIAL_BFIN_DMA
74         disable_dma(uart->tx_dma_channel);
75         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
76         uart->port.icount.tx += uart->tx_count;
77         uart->tx_count = 0;
78         uart->tx_done = 1;
79 #else
80 #ifdef CONFIG_BF54x
81         /* Clear TFI bit */
82         UART_PUT_LSR(uart, TFI);
83 #endif
84         UART_CLEAR_IER(uart, ETBEI);
85 #endif
86 }
87
88 /*
89  * port is locked and interrupts are disabled
90  */
91 static void bfin_serial_start_tx(struct uart_port *port)
92 {
93         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
94
95 #ifdef CONFIG_SERIAL_BFIN_DMA
96         if (uart->tx_done)
97                 bfin_serial_dma_tx_chars(uart);
98 #else
99         UART_SET_IER(uart, ETBEI);
100         bfin_serial_tx_chars(uart);
101 #endif
102 }
103
104 /*
105  * Interrupts are enabled
106  */
107 static void bfin_serial_stop_rx(struct uart_port *port)
108 {
109         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
110 #ifdef CONFIG_KGDB_UART
111         if (uart->port.line != CONFIG_KGDB_UART_PORT)
112 #endif
113         UART_CLEAR_IER(uart, ERBFI);
114 }
115
116 /*
117  * Set the modem control timer to fire immediately.
118  */
119 static void bfin_serial_enable_ms(struct uart_port *port)
120 {
121 }
122
123 #ifdef CONFIG_KGDB_UART
124 static int kgdb_entry_state;
125
126 void kgdb_put_debug_char(int chr)
127 {
128         struct bfin_serial_port *uart;
129
130         if (CONFIG_KGDB_UART_PORT < 0
131                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
132                 uart = &bfin_serial_ports[0];
133         else
134                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
135
136         while (!(UART_GET_LSR(uart) & THRE)) {
137                 SSYNC();
138         }
139
140         UART_CLEAR_DLAB(uart);
141         UART_PUT_CHAR(uart, (unsigned char)chr);
142         SSYNC();
143 }
144
145 int kgdb_get_debug_char(void)
146 {
147         struct bfin_serial_port *uart;
148         unsigned char chr;
149
150         if (CONFIG_KGDB_UART_PORT < 0
151                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
152                 uart = &bfin_serial_ports[0];
153         else
154                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
155
156         while(!(UART_GET_LSR(uart) & DR)) {
157                 SSYNC();
158         }
159         UART_CLEAR_DLAB(uart);
160         chr = UART_GET_CHAR(uart);
161         SSYNC();
162
163         return chr;
164 }
165 #endif
166
167 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
168 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
169 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
170 #else
171 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
172 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
173 #endif
174
175 #ifdef CONFIG_SERIAL_BFIN_PIO
176 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
177 {
178         struct tty_struct *tty = uart->port.info->port.tty;
179         unsigned int status, ch, flg;
180         static struct timeval anomaly_start = { .tv_sec = 0 };
181
182         status = UART_GET_LSR(uart);
183         UART_CLEAR_LSR(uart);
184
185         ch = UART_GET_CHAR(uart);
186         uart->port.icount.rx++;
187
188 #ifdef CONFIG_KGDB_UART
189         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
190                 struct pt_regs *regs = get_irq_regs();
191                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
192                         kgdb_breakkey_pressed(regs);
193                         return;
194                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
195                         kgdb_entry_state = 1;
196                 } else if (kgdb_entry_state == 1 && ch == 'q') {
197                         kgdb_entry_state = 0;
198                         kgdb_breakkey_pressed(regs);
199                         return;
200                 } else if (ch == 0x3) {/* Ctrl + C */
201                         kgdb_entry_state = 0;
202                         kgdb_breakkey_pressed(regs);
203                         return;
204                 } else {
205                         kgdb_entry_state = 0;
206                 }
207         }
208 #endif
209
210         if (ANOMALY_05000363) {
211                 /* The BF533 (and BF561) family of processors have a nice anomaly
212                  * where they continuously generate characters for a "single" break.
213                  * We have to basically ignore this flood until the "next" valid
214                  * character comes across.  Due to the nature of the flood, it is
215                  * not possible to reliably catch bytes that are sent too quickly
216                  * after this break.  So application code talking to the Blackfin
217                  * which sends a break signal must allow at least 1.5 character
218                  * times after the end of the break for things to stabilize.  This
219                  * timeout was picked as it must absolutely be larger than 1
220                  * character time +/- some percent.  So 1.5 sounds good.  All other
221                  * Blackfin families operate properly.  Woo.
222                  */
223                 if (anomaly_start.tv_sec) {
224                         struct timeval curr;
225                         suseconds_t usecs;
226
227                         if ((~ch & (~ch + 1)) & 0xff)
228                                 goto known_good_char;
229
230                         do_gettimeofday(&curr);
231                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
232                                 goto known_good_char;
233
234                         usecs = 0;
235                         if (curr.tv_sec != anomaly_start.tv_sec)
236                                 usecs += USEC_PER_SEC;
237                         usecs += curr.tv_usec - anomaly_start.tv_usec;
238
239                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
240                                 goto known_good_char;
241
242                         if (ch)
243                                 anomaly_start.tv_sec = 0;
244                         else
245                                 anomaly_start = curr;
246
247                         return;
248
249  known_good_char:
250                         anomaly_start.tv_sec = 0;
251                 }
252         }
253
254         if (status & BI) {
255                 if (ANOMALY_05000363)
256                         if (bfin_revid() < 5)
257                                 do_gettimeofday(&anomaly_start);
258                 uart->port.icount.brk++;
259                 if (uart_handle_break(&uart->port))
260                         goto ignore_char;
261                 status &= ~(PE | FE);
262         }
263         if (status & PE)
264                 uart->port.icount.parity++;
265         if (status & OE)
266                 uart->port.icount.overrun++;
267         if (status & FE)
268                 uart->port.icount.frame++;
269
270         status &= uart->port.read_status_mask;
271
272         if (status & BI)
273                 flg = TTY_BREAK;
274         else if (status & PE)
275                 flg = TTY_PARITY;
276         else if (status & FE)
277                 flg = TTY_FRAME;
278         else
279                 flg = TTY_NORMAL;
280
281         if (uart_handle_sysrq_char(&uart->port, ch))
282                 goto ignore_char;
283
284         uart_insert_char(&uart->port, status, OE, ch, flg);
285
286  ignore_char:
287         tty_flip_buffer_push(tty);
288 }
289
290 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
291 {
292         struct circ_buf *xmit = &uart->port.info->xmit;
293
294         /*
295          * Check the modem control lines before
296          * transmitting anything.
297          */
298         bfin_serial_mctrl_check(uart);
299
300         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
301                 bfin_serial_stop_tx(&uart->port);
302                 return;
303         }
304
305         if (uart->port.x_char) {
306                 UART_PUT_CHAR(uart, uart->port.x_char);
307                 uart->port.icount.tx++;
308                 uart->port.x_char = 0;
309         }
310
311         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
312                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
313                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
314                 uart->port.icount.tx++;
315                 SSYNC();
316         }
317
318         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
319                 uart_write_wakeup(&uart->port);
320
321         if (uart_circ_empty(xmit))
322                 bfin_serial_stop_tx(&uart->port);
323 }
324
325 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
326 {
327         struct bfin_serial_port *uart = dev_id;
328
329         spin_lock(&uart->port.lock);
330         while (UART_GET_LSR(uart) & DR)
331                 bfin_serial_rx_chars(uart);
332         spin_unlock(&uart->port.lock);
333
334         return IRQ_HANDLED;
335 }
336
337 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
338 {
339         struct bfin_serial_port *uart = dev_id;
340
341         spin_lock(&uart->port.lock);
342         if (UART_GET_LSR(uart) & THRE)
343                 bfin_serial_tx_chars(uart);
344         spin_unlock(&uart->port.lock);
345
346         return IRQ_HANDLED;
347 }
348 #endif
349
350 #ifdef CONFIG_SERIAL_BFIN_DMA
351 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
352 {
353         struct circ_buf *xmit = &uart->port.info->xmit;
354
355         uart->tx_done = 0;
356
357         /*
358          * Check the modem control lines before
359          * transmitting anything.
360          */
361         bfin_serial_mctrl_check(uart);
362
363         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
364                 uart->tx_count = 0;
365                 uart->tx_done = 1;
366                 return;
367         }
368
369         if (uart->port.x_char) {
370                 UART_PUT_CHAR(uart, uart->port.x_char);
371                 uart->port.icount.tx++;
372                 uart->port.x_char = 0;
373         }
374
375         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
376         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
377                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
378         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
379                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
380         set_dma_config(uart->tx_dma_channel,
381                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
382                         INTR_ON_BUF,
383                         DIMENSION_LINEAR,
384                         DATA_SIZE_8,
385                         DMA_SYNC_RESTART));
386         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
387         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
388         set_dma_x_modify(uart->tx_dma_channel, 1);
389         enable_dma(uart->tx_dma_channel);
390
391         UART_SET_IER(uart, ETBEI);
392 }
393
394 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
395 {
396         struct tty_struct *tty = uart->port.info->port.tty;
397         int i, flg, status;
398
399         status = UART_GET_LSR(uart);
400         UART_CLEAR_LSR(uart);
401
402         uart->port.icount.rx +=
403                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
404                 UART_XMIT_SIZE);
405
406         if (status & BI) {
407                 uart->port.icount.brk++;
408                 if (uart_handle_break(&uart->port))
409                         goto dma_ignore_char;
410                 status &= ~(PE | FE);
411         }
412         if (status & PE)
413                 uart->port.icount.parity++;
414         if (status & OE)
415                 uart->port.icount.overrun++;
416         if (status & FE)
417                 uart->port.icount.frame++;
418
419         status &= uart->port.read_status_mask;
420
421         if (status & BI)
422                 flg = TTY_BREAK;
423         else if (status & PE)
424                 flg = TTY_PARITY;
425         else if (status & FE)
426                 flg = TTY_FRAME;
427         else
428                 flg = TTY_NORMAL;
429
430         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
431                 if (i >= UART_XMIT_SIZE)
432                         i = 0;
433                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
434                         uart_insert_char(&uart->port, status, OE,
435                                 uart->rx_dma_buf.buf[i], flg);
436         }
437
438  dma_ignore_char:
439         tty_flip_buffer_push(tty);
440 }
441
442 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
443 {
444         int x_pos, pos;
445
446         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
447         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
448         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
449         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
450                 uart->rx_dma_nrows = 0;
451         x_pos = DMA_RX_XCOUNT - x_pos;
452         if (x_pos == DMA_RX_XCOUNT)
453                 x_pos = 0;
454
455         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
456         if (pos != uart->rx_dma_buf.tail) {
457                 uart->rx_dma_buf.head = pos;
458                 bfin_serial_dma_rx_chars(uart);
459                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
460         }
461
462         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
463 }
464
465 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
466 {
467         struct bfin_serial_port *uart = dev_id;
468         struct circ_buf *xmit = &uart->port.info->xmit;
469
470         spin_lock(&uart->port.lock);
471         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
472                 disable_dma(uart->tx_dma_channel);
473                 clear_dma_irqstat(uart->tx_dma_channel);
474                 UART_CLEAR_IER(uart, ETBEI);
475                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
476                 uart->port.icount.tx += uart->tx_count;
477
478                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
479                         uart_write_wakeup(&uart->port);
480
481                 bfin_serial_dma_tx_chars(uart);
482         }
483
484         spin_unlock(&uart->port.lock);
485         return IRQ_HANDLED;
486 }
487
488 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
489 {
490         struct bfin_serial_port *uart = dev_id;
491         unsigned short irqstat;
492
493         spin_lock(&uart->port.lock);
494         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
495         clear_dma_irqstat(uart->rx_dma_channel);
496         spin_unlock(&uart->port.lock);
497
498         mod_timer(&(uart->rx_dma_timer), jiffies);
499
500         return IRQ_HANDLED;
501 }
502 #endif
503
504 /*
505  * Return TIOCSER_TEMT when transmitter is not busy.
506  */
507 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
508 {
509         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
510         unsigned short lsr;
511
512         lsr = UART_GET_LSR(uart);
513         if (lsr & TEMT)
514                 return TIOCSER_TEMT;
515         else
516                 return 0;
517 }
518
519 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
520 {
521 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
522         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
523         if (uart->cts_pin < 0)
524                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
525
526         if (UART_GET_CTS(uart))
527                 return TIOCM_DSR | TIOCM_CAR;
528         else
529 #endif
530                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
531 }
532
533 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
534 {
535 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
536         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
537         if (uart->rts_pin < 0)
538                 return;
539
540         if (mctrl & TIOCM_RTS)
541                 UART_CLEAR_RTS(uart);
542         else
543                 UART_SET_RTS(uart);
544 #endif
545 }
546
547 /*
548  * Handle any change of modem status signal since we were last called.
549  */
550 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
551 {
552 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
553         unsigned int status;
554         struct uart_info *info = uart->port.info;
555         struct tty_struct *tty = info->port.tty;
556
557         status = bfin_serial_get_mctrl(&uart->port);
558         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
559         if (!(status & TIOCM_CTS)) {
560                 tty->hw_stopped = 1;
561                 uart->cts_timer.data = (unsigned long)(uart);
562                 uart->cts_timer.function = (void *)bfin_serial_mctrl_check;
563                 uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES;
564                 add_timer(&(uart->cts_timer));
565         } else {
566                 tty->hw_stopped = 0;
567         }
568 #endif
569 }
570
571 /*
572  * Interrupts are always disabled.
573  */
574 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
575 {
576         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
577         u16 lcr = UART_GET_LCR(uart);
578         if (break_state)
579                 lcr |= SB;
580         else
581                 lcr &= ~SB;
582         UART_PUT_LCR(uart, lcr);
583         SSYNC();
584 }
585
586 static int bfin_serial_startup(struct uart_port *port)
587 {
588         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
589
590 #ifdef CONFIG_SERIAL_BFIN_DMA
591         dma_addr_t dma_handle;
592
593         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
594                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
595                 return -EBUSY;
596         }
597
598         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
599                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
600                 free_dma(uart->rx_dma_channel);
601                 return -EBUSY;
602         }
603
604         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
605         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
606
607         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
608         uart->rx_dma_buf.head = 0;
609         uart->rx_dma_buf.tail = 0;
610         uart->rx_dma_nrows = 0;
611
612         set_dma_config(uart->rx_dma_channel,
613                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
614                                 INTR_ON_ROW, DIMENSION_2D,
615                                 DATA_SIZE_8,
616                                 DMA_SYNC_RESTART));
617         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
618         set_dma_x_modify(uart->rx_dma_channel, 1);
619         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
620         set_dma_y_modify(uart->rx_dma_channel, 1);
621         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
622         enable_dma(uart->rx_dma_channel);
623
624         uart->rx_dma_timer.data = (unsigned long)(uart);
625         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
626         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
627         add_timer(&(uart->rx_dma_timer));
628 #else
629         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
630              "BFIN_UART_RX", uart)) {
631 # ifdef CONFIG_KGDB_UART
632                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
633 # endif
634                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
635                 return -EBUSY;
636 # ifdef CONFIG_KGDB_UART
637                 }
638 # endif
639         }
640
641         if (request_irq
642             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
643              "BFIN_UART_TX", uart)) {
644                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
645                 free_irq(uart->port.irq, uart);
646                 return -EBUSY;
647         }
648 #endif
649         UART_SET_IER(uart, ERBFI);
650         return 0;
651 }
652
653 static void bfin_serial_shutdown(struct uart_port *port)
654 {
655         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
656
657 #ifdef CONFIG_SERIAL_BFIN_DMA
658         disable_dma(uart->tx_dma_channel);
659         free_dma(uart->tx_dma_channel);
660         disable_dma(uart->rx_dma_channel);
661         free_dma(uart->rx_dma_channel);
662         del_timer(&(uart->rx_dma_timer));
663         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
664 #else
665 #ifdef  CONFIG_KGDB_UART
666         if (uart->port.line != CONFIG_KGDB_UART_PORT)
667 #endif
668         free_irq(uart->port.irq, uart);
669         free_irq(uart->port.irq+1, uart);
670 #endif
671 }
672
673 static void
674 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
675                    struct ktermios *old)
676 {
677         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
678         unsigned long flags;
679         unsigned int baud, quot;
680         unsigned short val, ier, lcr = 0;
681
682         switch (termios->c_cflag & CSIZE) {
683         case CS8:
684                 lcr = WLS(8);
685                 break;
686         case CS7:
687                 lcr = WLS(7);
688                 break;
689         case CS6:
690                 lcr = WLS(6);
691                 break;
692         case CS5:
693                 lcr = WLS(5);
694                 break;
695         default:
696                 printk(KERN_ERR "%s: word lengh not supported\n",
697                         __func__);
698         }
699
700         if (termios->c_cflag & CSTOPB)
701                 lcr |= STB;
702         if (termios->c_cflag & PARENB)
703                 lcr |= PEN;
704         if (!(termios->c_cflag & PARODD))
705                 lcr |= EPS;
706         if (termios->c_cflag & CMSPAR)
707                 lcr |= STP;
708
709         port->read_status_mask = OE;
710         if (termios->c_iflag & INPCK)
711                 port->read_status_mask |= (FE | PE);
712         if (termios->c_iflag & (BRKINT | PARMRK))
713                 port->read_status_mask |= BI;
714
715         /*
716          * Characters to ignore
717          */
718         port->ignore_status_mask = 0;
719         if (termios->c_iflag & IGNPAR)
720                 port->ignore_status_mask |= FE | PE;
721         if (termios->c_iflag & IGNBRK) {
722                 port->ignore_status_mask |= BI;
723                 /*
724                  * If we're ignoring parity and break indicators,
725                  * ignore overruns too (for real raw support).
726                  */
727                 if (termios->c_iflag & IGNPAR)
728                         port->ignore_status_mask |= OE;
729         }
730
731         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
732         quot = uart_get_divisor(port, baud);
733         spin_lock_irqsave(&uart->port.lock, flags);
734
735         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
736
737         /* Disable UART */
738         ier = UART_GET_IER(uart);
739         UART_DISABLE_INTS(uart);
740
741         /* Set DLAB in LCR to Access DLL and DLH */
742         UART_SET_DLAB(uart);
743
744         UART_PUT_DLL(uart, quot & 0xFF);
745         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
746         SSYNC();
747
748         /* Clear DLAB in LCR to Access THR RBR IER */
749         UART_CLEAR_DLAB(uart);
750
751         UART_PUT_LCR(uart, lcr);
752
753         /* Enable UART */
754         UART_ENABLE_INTS(uart, ier);
755
756         val = UART_GET_GCTL(uart);
757         val |= UCEN;
758         UART_PUT_GCTL(uart, val);
759
760         spin_unlock_irqrestore(&uart->port.lock, flags);
761 }
762
763 static const char *bfin_serial_type(struct uart_port *port)
764 {
765         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
766
767         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
768 }
769
770 /*
771  * Release the memory region(s) being used by 'port'.
772  */
773 static void bfin_serial_release_port(struct uart_port *port)
774 {
775 }
776
777 /*
778  * Request the memory region(s) being used by 'port'.
779  */
780 static int bfin_serial_request_port(struct uart_port *port)
781 {
782         return 0;
783 }
784
785 /*
786  * Configure/autoconfigure the port.
787  */
788 static void bfin_serial_config_port(struct uart_port *port, int flags)
789 {
790         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
791
792         if (flags & UART_CONFIG_TYPE &&
793             bfin_serial_request_port(&uart->port) == 0)
794                 uart->port.type = PORT_BFIN;
795 }
796
797 /*
798  * Verify the new serial_struct (for TIOCSSERIAL).
799  * The only change we allow are to the flags and type, and
800  * even then only between PORT_BFIN and PORT_UNKNOWN
801  */
802 static int
803 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
804 {
805         return 0;
806 }
807
808 /*
809  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
810  * In other cases, disable IrDA function.
811  */
812 static void bfin_serial_set_ldisc(struct uart_port *port)
813 {
814         int line = port->line;
815         unsigned short val;
816
817         if (line >= port->info->port.tty->driver->num)
818                 return;
819
820         switch (port->info->port.tty->termios->c_line) {
821         case N_IRDA:
822                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
823                 val |= (IREN | RPOLC);
824                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
825                 break;
826         default:
827                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
828                 val &= ~(IREN | RPOLC);
829                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
830         }
831 }
832
833 static struct uart_ops bfin_serial_pops = {
834         .tx_empty       = bfin_serial_tx_empty,
835         .set_mctrl      = bfin_serial_set_mctrl,
836         .get_mctrl      = bfin_serial_get_mctrl,
837         .stop_tx        = bfin_serial_stop_tx,
838         .start_tx       = bfin_serial_start_tx,
839         .stop_rx        = bfin_serial_stop_rx,
840         .enable_ms      = bfin_serial_enable_ms,
841         .break_ctl      = bfin_serial_break_ctl,
842         .startup        = bfin_serial_startup,
843         .shutdown       = bfin_serial_shutdown,
844         .set_termios    = bfin_serial_set_termios,
845         .set_ldisc      = bfin_serial_set_ldisc,
846         .type           = bfin_serial_type,
847         .release_port   = bfin_serial_release_port,
848         .request_port   = bfin_serial_request_port,
849         .config_port    = bfin_serial_config_port,
850         .verify_port    = bfin_serial_verify_port,
851 };
852
853 static void __init bfin_serial_init_ports(void)
854 {
855         static int first = 1;
856         int i;
857
858         if (!first)
859                 return;
860         first = 0;
861
862         for (i = 0; i < nr_ports; i++) {
863                 bfin_serial_ports[i].port.uartclk   = get_sclk();
864                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
865                 bfin_serial_ports[i].port.line      = i;
866                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
867                 bfin_serial_ports[i].port.membase   =
868                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
869                 bfin_serial_ports[i].port.mapbase   =
870                         bfin_serial_resource[i].uart_base_addr;
871                 bfin_serial_ports[i].port.irq       =
872                         bfin_serial_resource[i].uart_irq;
873                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
874 #ifdef CONFIG_SERIAL_BFIN_DMA
875                 bfin_serial_ports[i].tx_done        = 1;
876                 bfin_serial_ports[i].tx_count       = 0;
877                 bfin_serial_ports[i].tx_dma_channel =
878                         bfin_serial_resource[i].uart_tx_dma_channel;
879                 bfin_serial_ports[i].rx_dma_channel =
880                         bfin_serial_resource[i].uart_rx_dma_channel;
881                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
882 #endif
883 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
884                 init_timer(&(bfin_serial_ports[i].cts_timer));
885                 bfin_serial_ports[i].cts_pin        =
886                         bfin_serial_resource[i].uart_cts_pin;
887                 bfin_serial_ports[i].rts_pin        =
888                         bfin_serial_resource[i].uart_rts_pin;
889 #endif
890                 bfin_serial_hw_init(&bfin_serial_ports[i]);
891         }
892
893 }
894
895 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
896 /*
897  * If the port was already initialised (eg, by a boot loader),
898  * try to determine the current setup.
899  */
900 static void __init
901 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
902                            int *parity, int *bits)
903 {
904         unsigned short status;
905
906         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
907         if (status == (ERBFI | ETBEI)) {
908                 /* ok, the port was enabled */
909                 u16 lcr, dlh, dll;
910
911                 lcr = UART_GET_LCR(uart);
912
913                 *parity = 'n';
914                 if (lcr & PEN) {
915                         if (lcr & EPS)
916                                 *parity = 'e';
917                         else
918                                 *parity = 'o';
919                 }
920                 switch (lcr & 0x03) {
921                         case 0: *bits = 5; break;
922                         case 1: *bits = 6; break;
923                         case 2: *bits = 7; break;
924                         case 3: *bits = 8; break;
925                 }
926                 /* Set DLAB in LCR to Access DLL and DLH */
927                 UART_SET_DLAB(uart);
928
929                 dll = UART_GET_DLL(uart);
930                 dlh = UART_GET_DLH(uart);
931
932                 /* Clear DLAB in LCR to Access THR RBR IER */
933                 UART_CLEAR_DLAB(uart);
934
935                 *baud = get_sclk() / (16*(dll | dlh << 8));
936         }
937         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
938 }
939 #endif
940
941 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
942 static struct uart_driver bfin_serial_reg;
943
944 static int __init
945 bfin_serial_console_setup(struct console *co, char *options)
946 {
947         struct bfin_serial_port *uart;
948 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
949         int baud = 57600;
950         int bits = 8;
951         int parity = 'n';
952 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
953         int flow = 'r';
954 #  else
955         int flow = 'n';
956 #  endif
957 # endif
958
959         /*
960          * Check whether an invalid uart number has been specified, and
961          * if so, search for the first available port that does have
962          * console support.
963          */
964         if (co->index == -1 || co->index >= nr_ports)
965                 co->index = 0;
966         uart = &bfin_serial_ports[co->index];
967
968 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
969         if (options)
970                 uart_parse_options(options, &baud, &parity, &bits, &flow);
971         else
972                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
973
974         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
975 # else
976         return 0;
977 # endif
978 }
979 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
980                                  defined (CONFIG_EARLY_PRINTK) */
981
982 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
983 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
984 {
985         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
986         while (!(UART_GET_LSR(uart) & THRE))
987                 barrier();
988         UART_PUT_CHAR(uart, ch);
989         SSYNC();
990 }
991
992 /*
993  * Interrupts are disabled on entering
994  */
995 static void
996 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
997 {
998         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
999         int flags = 0;
1000
1001         spin_lock_irqsave(&uart->port.lock, flags);
1002         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1003         spin_unlock_irqrestore(&uart->port.lock, flags);
1004
1005 }
1006
1007 static struct console bfin_serial_console = {
1008         .name           = BFIN_SERIAL_NAME,
1009         .write          = bfin_serial_console_write,
1010         .device         = uart_console_device,
1011         .setup          = bfin_serial_console_setup,
1012         .flags          = CON_PRINTBUFFER,
1013         .index          = -1,
1014         .data           = &bfin_serial_reg,
1015 };
1016
1017 static int __init bfin_serial_rs_console_init(void)
1018 {
1019         bfin_serial_init_ports();
1020         register_console(&bfin_serial_console);
1021 #ifdef CONFIG_KGDB_UART
1022         kgdb_entry_state = 0;
1023         init_kgdb_uart();
1024 #endif
1025         return 0;
1026 }
1027 console_initcall(bfin_serial_rs_console_init);
1028
1029 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1030 #else
1031 #define BFIN_SERIAL_CONSOLE     NULL
1032 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1033
1034
1035 #ifdef CONFIG_EARLY_PRINTK
1036 static __init void early_serial_putc(struct uart_port *port, int ch)
1037 {
1038         unsigned timeout = 0xffff;
1039         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1040
1041         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1042                 cpu_relax();
1043         UART_PUT_CHAR(uart, ch);
1044 }
1045
1046 static __init void early_serial_write(struct console *con, const char *s,
1047                                         unsigned int n)
1048 {
1049         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1050         unsigned int i;
1051
1052         for (i = 0; i < n; i++, s++) {
1053                 if (*s == '\n')
1054                         early_serial_putc(&uart->port, '\r');
1055                 early_serial_putc(&uart->port, *s);
1056         }
1057 }
1058
1059 static struct __initdata console bfin_early_serial_console = {
1060         .name = "early_BFuart",
1061         .write = early_serial_write,
1062         .device = uart_console_device,
1063         .flags = CON_PRINTBUFFER,
1064         .setup = bfin_serial_console_setup,
1065         .index = -1,
1066         .data  = &bfin_serial_reg,
1067 };
1068
1069 struct console __init *bfin_earlyserial_init(unsigned int port,
1070                                                 unsigned int cflag)
1071 {
1072         struct bfin_serial_port *uart;
1073         struct ktermios t;
1074
1075         if (port == -1 || port >= nr_ports)
1076                 port = 0;
1077         bfin_serial_init_ports();
1078         bfin_early_serial_console.index = port;
1079         uart = &bfin_serial_ports[port];
1080         t.c_cflag = cflag;
1081         t.c_iflag = 0;
1082         t.c_oflag = 0;
1083         t.c_lflag = ICANON;
1084         t.c_line = port;
1085         bfin_serial_set_termios(&uart->port, &t, &t);
1086         return &bfin_early_serial_console;
1087 }
1088
1089 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1090
1091 static struct uart_driver bfin_serial_reg = {
1092         .owner                  = THIS_MODULE,
1093         .driver_name            = "bfin-uart",
1094         .dev_name               = BFIN_SERIAL_NAME,
1095         .major                  = BFIN_SERIAL_MAJOR,
1096         .minor                  = BFIN_SERIAL_MINOR,
1097         .nr                     = BFIN_UART_NR_PORTS,
1098         .cons                   = BFIN_SERIAL_CONSOLE,
1099 };
1100
1101 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1102 {
1103         int i;
1104
1105         for (i = 0; i < nr_ports; i++) {
1106                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1107                         continue;
1108                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1109         }
1110
1111         return 0;
1112 }
1113
1114 static int bfin_serial_resume(struct platform_device *dev)
1115 {
1116         int i;
1117
1118         for (i = 0; i < nr_ports; i++) {
1119                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1120                         continue;
1121                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1122         }
1123
1124         return 0;
1125 }
1126
1127 static int bfin_serial_probe(struct platform_device *dev)
1128 {
1129         struct resource *res = dev->resource;
1130         int i;
1131
1132         for (i = 0; i < dev->num_resources; i++, res++)
1133                 if (res->flags & IORESOURCE_MEM)
1134                         break;
1135
1136         if (i < dev->num_resources) {
1137                 for (i = 0; i < nr_ports; i++, res++) {
1138                         if (bfin_serial_ports[i].port.mapbase != res->start)
1139                                 continue;
1140                         bfin_serial_ports[i].port.dev = &dev->dev;
1141                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1142                 }
1143         }
1144
1145         return 0;
1146 }
1147
1148 static int bfin_serial_remove(struct platform_device *dev)
1149 {
1150         int i;
1151
1152         for (i = 0; i < nr_ports; i++) {
1153                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1154                         continue;
1155                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1156                 bfin_serial_ports[i].port.dev = NULL;
1157 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1158                 gpio_free(bfin_serial_ports[i].cts_pin);
1159                 gpio_free(bfin_serial_ports[i].rts_pin);
1160 #endif
1161         }
1162
1163         return 0;
1164 }
1165
1166 static struct platform_driver bfin_serial_driver = {
1167         .probe          = bfin_serial_probe,
1168         .remove         = bfin_serial_remove,
1169         .suspend        = bfin_serial_suspend,
1170         .resume         = bfin_serial_resume,
1171         .driver         = {
1172                 .name   = "bfin-uart",
1173                 .owner  = THIS_MODULE,
1174         },
1175 };
1176
1177 static int __init bfin_serial_init(void)
1178 {
1179         int ret;
1180 #ifdef CONFIG_KGDB_UART
1181         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1182         struct ktermios t;
1183 #endif
1184
1185         pr_info("Serial: Blackfin serial driver\n");
1186
1187         bfin_serial_init_ports();
1188
1189         ret = uart_register_driver(&bfin_serial_reg);
1190         if (ret == 0) {
1191                 ret = platform_driver_register(&bfin_serial_driver);
1192                 if (ret) {
1193                         pr_debug("uart register failed\n");
1194                         uart_unregister_driver(&bfin_serial_reg);
1195                 }
1196         }
1197 #ifdef CONFIG_KGDB_UART
1198         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1199                 request_irq(uart->port.irq, bfin_serial_rx_int,
1200                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1201                 pr_info("Request irq for kgdb uart port\n");
1202                 UART_SET_IER(uart, ERBFI);
1203                 SSYNC();
1204                 t.c_cflag = CS8|B57600;
1205                 t.c_iflag = 0;
1206                 t.c_oflag = 0;
1207                 t.c_lflag = ICANON;
1208                 t.c_line = CONFIG_KGDB_UART_PORT;
1209                 bfin_serial_set_termios(&uart->port, &t, &t);
1210         }
1211 #endif
1212         return ret;
1213 }
1214
1215 static void __exit bfin_serial_exit(void)
1216 {
1217         platform_driver_unregister(&bfin_serial_driver);
1218         uart_unregister_driver(&bfin_serial_reg);
1219 }
1220
1221 module_init(bfin_serial_init);
1222 module_exit(bfin_serial_exit);
1223
1224 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1225 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1226 MODULE_LICENSE("GPL");
1227 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1228 MODULE_ALIAS("platform:bfin-uart");