2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
39 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
40 #include <asm-generic/rtc.h>
43 struct rtc_device *rtc;
46 struct resource *iomem;
48 void (*wake_on)(struct device *);
49 void (*wake_off)(struct device *);
54 /* newer hardware extends the original register set */
60 /* both platform and pnp busses use negative numbers for invalid irqs */
61 #define is_valid_irq(n) ((n) >= 0)
63 static const char driver_name[] = "rtc_cmos";
65 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
66 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
67 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
69 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
71 static inline int is_intr(u8 rtc_intr)
73 if (!(rtc_intr & RTC_IRQF))
75 return rtc_intr & RTC_IRQMASK;
78 /*----------------------------------------------------------------*/
80 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
81 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
82 * used in a broken "legacy replacement" mode. The breakage includes
83 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
86 * When that broken mode is in use, platform glue provides a partial
87 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
88 * want to use HPET for anything except those IRQs though...
90 #ifdef CONFIG_HPET_EMULATE_RTC
94 static inline int is_hpet_enabled(void)
99 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
104 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
110 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
115 static inline int hpet_set_periodic_freq(unsigned long freq)
120 static inline int hpet_rtc_dropped_irq(void)
125 static inline int hpet_rtc_timer_init(void)
130 extern irq_handler_t hpet_rtc_interrupt;
132 static inline int hpet_register_irq_handler(irq_handler_t handler)
137 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
144 /*----------------------------------------------------------------*/
148 /* Most newer x86 systems have two register banks, the first used
149 * for RTC and NVRAM and the second only for NVRAM. Caller must
150 * own rtc_lock ... and we won't worry about access during NMI.
152 #define can_bank2 true
154 static inline unsigned char cmos_read_bank2(unsigned char addr)
156 outb(addr, RTC_PORT(2));
157 return inb(RTC_PORT(3));
160 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
162 outb(addr, RTC_PORT(2));
163 outb(val, RTC_PORT(2));
168 #define can_bank2 false
170 static inline unsigned char cmos_read_bank2(unsigned char addr)
175 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
181 /*----------------------------------------------------------------*/
183 static int cmos_read_time(struct device *dev, struct rtc_time *t)
185 /* REVISIT: if the clock has a "century" register, use
186 * that instead of the heuristic in get_rtc_time().
187 * That'll make Y3K compatility (year > 2070) easy!
193 static int cmos_set_time(struct device *dev, struct rtc_time *t)
195 /* REVISIT: set the "century" register if available
197 * NOTE: this ignores the issue whereby updating the seconds
198 * takes effect exactly 500ms after we write the register.
199 * (Also queueing and other delays before we get this far.)
201 return set_rtc_time(t);
204 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
206 struct cmos_rtc *cmos = dev_get_drvdata(dev);
207 unsigned char rtc_control;
209 if (!is_valid_irq(cmos->irq))
212 /* Basic alarms only support hour, minute, and seconds fields.
213 * Some also support day and month, for alarms up to a year in
216 t->time.tm_mday = -1;
219 spin_lock_irq(&rtc_lock);
220 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
221 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
222 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
224 if (cmos->day_alrm) {
225 /* ignore upper bits on readback per ACPI spec */
226 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
227 if (!t->time.tm_mday)
228 t->time.tm_mday = -1;
230 if (cmos->mon_alrm) {
231 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
237 rtc_control = CMOS_READ(RTC_CONTROL);
238 spin_unlock_irq(&rtc_lock);
240 /* REVISIT this assumes PC style usage: always BCD */
242 if (((unsigned)t->time.tm_sec) < 0x60)
243 t->time.tm_sec = bcd2bin(t->time.tm_sec);
246 if (((unsigned)t->time.tm_min) < 0x60)
247 t->time.tm_min = bcd2bin(t->time.tm_min);
250 if (((unsigned)t->time.tm_hour) < 0x24)
251 t->time.tm_hour = bcd2bin(t->time.tm_hour);
253 t->time.tm_hour = -1;
255 if (cmos->day_alrm) {
256 if (((unsigned)t->time.tm_mday) <= 0x31)
257 t->time.tm_mday = bcd2bin(t->time.tm_mday);
259 t->time.tm_mday = -1;
260 if (cmos->mon_alrm) {
261 if (((unsigned)t->time.tm_mon) <= 0x12)
262 t->time.tm_mon = bcd2bin(t->time.tm_mon) - 1;
267 t->time.tm_year = -1;
269 t->enabled = !!(rtc_control & RTC_AIE);
275 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
277 unsigned char rtc_intr;
279 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
280 * allegedly some older rtcs need that to handle irqs properly
282 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
284 if (is_hpet_enabled())
287 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
288 if (is_intr(rtc_intr))
289 rtc_update_irq(cmos->rtc, 1, rtc_intr);
292 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
294 unsigned char rtc_control;
296 /* flush any pending IRQ status, notably for update irqs,
297 * before we enable new IRQs
299 rtc_control = CMOS_READ(RTC_CONTROL);
300 cmos_checkintr(cmos, rtc_control);
303 CMOS_WRITE(rtc_control, RTC_CONTROL);
304 hpet_set_rtc_irq_bit(mask);
306 cmos_checkintr(cmos, rtc_control);
309 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
311 unsigned char rtc_control;
313 rtc_control = CMOS_READ(RTC_CONTROL);
314 rtc_control &= ~mask;
315 CMOS_WRITE(rtc_control, RTC_CONTROL);
316 hpet_mask_rtc_irq_bit(mask);
318 cmos_checkintr(cmos, rtc_control);
321 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
323 struct cmos_rtc *cmos = dev_get_drvdata(dev);
324 unsigned char mon, mday, hrs, min, sec;
326 if (!is_valid_irq(cmos->irq))
329 /* REVISIT this assumes PC style usage: always BCD */
331 /* Writing 0xff means "don't care" or "match all". */
333 mon = t->time.tm_mon + 1;
334 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
336 mday = t->time.tm_mday;
337 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
339 hrs = t->time.tm_hour;
340 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
342 min = t->time.tm_min;
343 min = (min < 60) ? bin2bcd(min) : 0xff;
345 sec = t->time.tm_sec;
346 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
348 spin_lock_irq(&rtc_lock);
350 /* next rtc irq must not be from previous alarm setting */
351 cmos_irq_disable(cmos, RTC_AIE);
354 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
355 CMOS_WRITE(min, RTC_MINUTES_ALARM);
356 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
358 /* the system may support an "enhanced" alarm */
359 if (cmos->day_alrm) {
360 CMOS_WRITE(mday, cmos->day_alrm);
362 CMOS_WRITE(mon, cmos->mon_alrm);
365 /* FIXME the HPET alarm glue currently ignores day_alrm
368 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
371 cmos_irq_enable(cmos, RTC_AIE);
373 spin_unlock_irq(&rtc_lock);
378 static int cmos_irq_set_freq(struct device *dev, int freq)
380 struct cmos_rtc *cmos = dev_get_drvdata(dev);
384 if (!is_valid_irq(cmos->irq))
387 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
393 spin_lock_irqsave(&rtc_lock, flags);
394 hpet_set_periodic_freq(freq);
395 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
396 spin_unlock_irqrestore(&rtc_lock, flags);
401 static int cmos_irq_set_state(struct device *dev, int enabled)
403 struct cmos_rtc *cmos = dev_get_drvdata(dev);
406 if (!is_valid_irq(cmos->irq))
409 spin_lock_irqsave(&rtc_lock, flags);
412 cmos_irq_enable(cmos, RTC_PIE);
414 cmos_irq_disable(cmos, RTC_PIE);
416 spin_unlock_irqrestore(&rtc_lock, flags);
420 #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
423 cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
425 struct cmos_rtc *cmos = dev_get_drvdata(dev);
433 if (!is_valid_irq(cmos->irq))
436 /* PIE ON/OFF is handled by cmos_irq_set_state() */
441 spin_lock_irqsave(&rtc_lock, flags);
443 case RTC_AIE_OFF: /* alarm off */
444 cmos_irq_disable(cmos, RTC_AIE);
446 case RTC_AIE_ON: /* alarm on */
447 cmos_irq_enable(cmos, RTC_AIE);
449 case RTC_UIE_OFF: /* update off */
450 cmos_irq_disable(cmos, RTC_UIE);
452 case RTC_UIE_ON: /* update on */
453 cmos_irq_enable(cmos, RTC_UIE);
456 spin_unlock_irqrestore(&rtc_lock, flags);
461 #define cmos_rtc_ioctl NULL
464 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
466 static int cmos_procfs(struct device *dev, struct seq_file *seq)
468 struct cmos_rtc *cmos = dev_get_drvdata(dev);
469 unsigned char rtc_control, valid;
471 spin_lock_irq(&rtc_lock);
472 rtc_control = CMOS_READ(RTC_CONTROL);
473 valid = CMOS_READ(RTC_VALID);
474 spin_unlock_irq(&rtc_lock);
476 /* NOTE: at least ICH6 reports battery status using a different
477 * (non-RTC) bit; and SQWE is ignored on many current systems.
479 return seq_printf(seq,
480 "periodic_IRQ\t: %s\n"
482 "HPET_emulated\t: %s\n"
483 // "square_wave\t: %s\n"
486 "periodic_freq\t: %d\n"
487 "batt_status\t: %s\n",
488 (rtc_control & RTC_PIE) ? "yes" : "no",
489 (rtc_control & RTC_UIE) ? "yes" : "no",
490 is_hpet_enabled() ? "yes" : "no",
491 // (rtc_control & RTC_SQWE) ? "yes" : "no",
492 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
493 (rtc_control & RTC_DST_EN) ? "yes" : "no",
495 (valid & RTC_VRT) ? "okay" : "dead");
499 #define cmos_procfs NULL
502 static const struct rtc_class_ops cmos_rtc_ops = {
503 .ioctl = cmos_rtc_ioctl,
504 .read_time = cmos_read_time,
505 .set_time = cmos_set_time,
506 .read_alarm = cmos_read_alarm,
507 .set_alarm = cmos_set_alarm,
509 .irq_set_freq = cmos_irq_set_freq,
510 .irq_set_state = cmos_irq_set_state,
513 /*----------------------------------------------------------------*/
516 * All these chips have at least 64 bytes of address space, shared by
517 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
518 * by boot firmware. Modern chips have 128 or 256 bytes.
521 #define NVRAM_OFFSET (RTC_REG_D + 1)
524 cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
525 char *buf, loff_t off, size_t count)
529 if (unlikely(off >= attr->size))
531 if (unlikely(off < 0))
533 if ((off + count) > attr->size)
534 count = attr->size - off;
537 spin_lock_irq(&rtc_lock);
538 for (retval = 0; count; count--, off++, retval++) {
540 *buf++ = CMOS_READ(off);
542 *buf++ = cmos_read_bank2(off);
546 spin_unlock_irq(&rtc_lock);
552 cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
553 char *buf, loff_t off, size_t count)
555 struct cmos_rtc *cmos;
558 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
559 if (unlikely(off >= attr->size))
561 if (unlikely(off < 0))
563 if ((off + count) > attr->size)
564 count = attr->size - off;
566 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
567 * checksum on part of the NVRAM data. That's currently ignored
568 * here. If userspace is smart enough to know what fields of
569 * NVRAM to update, updating checksums is also part of its job.
572 spin_lock_irq(&rtc_lock);
573 for (retval = 0; count; count--, off++, retval++) {
574 /* don't trash RTC registers */
575 if (off == cmos->day_alrm
576 || off == cmos->mon_alrm
577 || off == cmos->century)
580 CMOS_WRITE(*buf++, off);
582 cmos_write_bank2(*buf++, off);
586 spin_unlock_irq(&rtc_lock);
591 static struct bin_attribute nvram = {
594 .mode = S_IRUGO | S_IWUSR,
595 .owner = THIS_MODULE,
598 .read = cmos_nvram_read,
599 .write = cmos_nvram_write,
600 /* size gets set up later */
603 /*----------------------------------------------------------------*/
605 static struct cmos_rtc cmos_rtc;
607 static irqreturn_t cmos_interrupt(int irq, void *p)
612 spin_lock(&rtc_lock);
614 /* When the HPET interrupt handler calls us, the interrupt
615 * status is passed as arg1 instead of the irq number. But
616 * always clear irq status, even when HPET is in the way.
618 * Note that HPET and RTC are almost certainly out of phase,
619 * giving different IRQ status ...
621 irqstat = CMOS_READ(RTC_INTR_FLAGS);
622 rtc_control = CMOS_READ(RTC_CONTROL);
623 if (is_hpet_enabled())
624 irqstat = (unsigned long)irq & 0xF0;
625 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
627 /* All Linux RTC alarms should be treated as if they were oneshot.
628 * Similar code may be needed in system wakeup paths, in case the
629 * alarm woke the system.
631 if (irqstat & RTC_AIE) {
632 rtc_control &= ~RTC_AIE;
633 CMOS_WRITE(rtc_control, RTC_CONTROL);
634 hpet_mask_rtc_irq_bit(RTC_AIE);
636 CMOS_READ(RTC_INTR_FLAGS);
638 spin_unlock(&rtc_lock);
640 if (is_intr(irqstat)) {
641 rtc_update_irq(p, 1, irqstat);
651 #define INITSECTION __init
654 static int INITSECTION
655 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
657 struct cmos_rtc_board_info *info = dev->platform_data;
659 unsigned char rtc_control;
660 unsigned address_space;
662 /* there can be only one ... */
669 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
671 * REVISIT non-x86 systems may instead use memory space resources
672 * (needing ioremap etc), not i/o space resources like this ...
674 ports = request_region(ports->start,
675 ports->end + 1 - ports->start,
678 dev_dbg(dev, "i/o registers already in use\n");
682 cmos_rtc.irq = rtc_irq;
683 cmos_rtc.iomem = ports;
685 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
686 * driver did, but don't reject unknown configs. Old hardware
687 * won't address 128 bytes. Newer chips have multiple banks,
688 * though they may not be listed in one I/O resource.
690 #if defined(CONFIG_ATARI)
692 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__)
695 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
698 if (can_bank2 && ports->end > (ports->start + 1))
701 /* For ACPI systems extension info comes from the FADT. On others,
702 * board specific setup provides it as appropriate. Systems where
703 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
704 * some almost-clones) can provide hooks to make that behave.
706 * Note that ACPI doesn't preclude putting these registers into
707 * "extended" areas of the chip, including some that we won't yet
708 * expect CMOS_READ and friends to handle.
711 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
712 cmos_rtc.day_alrm = info->rtc_day_alarm;
713 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
714 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
715 if (info->rtc_century && info->rtc_century < 128)
716 cmos_rtc.century = info->rtc_century;
718 if (info->wake_on && info->wake_off) {
719 cmos_rtc.wake_on = info->wake_on;
720 cmos_rtc.wake_off = info->wake_off;
724 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
725 &cmos_rtc_ops, THIS_MODULE);
726 if (IS_ERR(cmos_rtc.rtc)) {
727 retval = PTR_ERR(cmos_rtc.rtc);
732 dev_set_drvdata(dev, &cmos_rtc);
733 rename_region(ports, cmos_rtc.rtc->dev.bus_id);
735 spin_lock_irq(&rtc_lock);
737 /* force periodic irq to CMOS reset default of 1024Hz;
739 * REVISIT it's been reported that at least one x86_64 ALI mobo
740 * doesn't use 32KHz here ... for portability we might need to
741 * do something about other clock frequencies.
743 cmos_rtc.rtc->irq_freq = 1024;
744 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
745 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
748 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
750 rtc_control = CMOS_READ(RTC_CONTROL);
752 spin_unlock_irq(&rtc_lock);
754 /* FIXME teach the alarm code how to handle binary mode;
755 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
757 if (is_valid_irq(rtc_irq) &&
758 (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) {
759 dev_dbg(dev, "only 24-hr BCD mode supported\n");
764 if (is_valid_irq(rtc_irq)) {
765 irq_handler_t rtc_cmos_int_handler;
767 if (is_hpet_enabled()) {
770 rtc_cmos_int_handler = hpet_rtc_interrupt;
771 err = hpet_register_irq_handler(cmos_interrupt);
773 printk(KERN_WARNING "hpet_register_irq_handler "
774 " failed in rtc_init().");
778 rtc_cmos_int_handler = cmos_interrupt;
780 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
781 IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
784 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
788 hpet_rtc_timer_init();
790 /* export at least the first block of NVRAM */
791 nvram.size = address_space - NVRAM_OFFSET;
792 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
794 dev_dbg(dev, "can't create nvram file? %d\n", retval);
798 pr_info("%s: alarms up to one %s%s, %zd bytes nvram, %s irqs\n",
799 cmos_rtc.rtc->dev.bus_id,
800 is_valid_irq(rtc_irq)
806 cmos_rtc.century ? ", y3k" : "",
808 is_hpet_enabled() ? ", hpet irqs" : "");
813 if (is_valid_irq(rtc_irq))
814 free_irq(rtc_irq, cmos_rtc.rtc);
817 rtc_device_unregister(cmos_rtc.rtc);
819 release_region(ports->start, ports->end + 1 - ports->start);
823 static void cmos_do_shutdown(void)
825 spin_lock_irq(&rtc_lock);
826 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
827 spin_unlock_irq(&rtc_lock);
830 static void __exit cmos_do_remove(struct device *dev)
832 struct cmos_rtc *cmos = dev_get_drvdata(dev);
833 struct resource *ports;
837 sysfs_remove_bin_file(&dev->kobj, &nvram);
839 if (is_valid_irq(cmos->irq)) {
840 free_irq(cmos->irq, cmos->rtc);
841 hpet_unregister_irq_handler(cmos_interrupt);
844 rtc_device_unregister(cmos->rtc);
848 release_region(ports->start, ports->end + 1 - ports->start);
852 dev_set_drvdata(dev, NULL);
857 static int cmos_suspend(struct device *dev, pm_message_t mesg)
859 struct cmos_rtc *cmos = dev_get_drvdata(dev);
862 /* only the alarm might be a wakeup event source */
863 spin_lock_irq(&rtc_lock);
864 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
865 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
868 if (device_may_wakeup(dev))
869 mask = RTC_IRQMASK & ~RTC_AIE;
873 CMOS_WRITE(tmp, RTC_CONTROL);
874 hpet_mask_rtc_irq_bit(mask);
876 cmos_checkintr(cmos, tmp);
878 spin_unlock_irq(&rtc_lock);
881 cmos->enabled_wake = 1;
885 enable_irq_wake(cmos->irq);
888 pr_debug("%s: suspend%s, ctrl %02x\n",
889 cmos_rtc.rtc->dev.bus_id,
890 (tmp & RTC_AIE) ? ", alarm may wake" : "",
896 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
897 * after a detour through G3 "mechanical off", although the ACPI spec
898 * says wakeup should only work from G1/S4 "hibernate". To most users,
899 * distinctions between S4 and S5 are pointless. So when the hardware
900 * allows, don't draw that distinction.
902 static inline int cmos_poweroff(struct device *dev)
904 return cmos_suspend(dev, PMSG_HIBERNATE);
907 static int cmos_resume(struct device *dev)
909 struct cmos_rtc *cmos = dev_get_drvdata(dev);
910 unsigned char tmp = cmos->suspend_ctrl;
912 /* re-enable any irqs previously active */
913 if (tmp & RTC_IRQMASK) {
916 if (cmos->enabled_wake) {
920 disable_irq_wake(cmos->irq);
921 cmos->enabled_wake = 0;
924 spin_lock_irq(&rtc_lock);
926 CMOS_WRITE(tmp, RTC_CONTROL);
927 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
929 mask = CMOS_READ(RTC_INTR_FLAGS);
930 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
931 if (!is_hpet_enabled() || !is_intr(mask))
934 /* force one-shot behavior if HPET blocked
935 * the wake alarm's irq
937 rtc_update_irq(cmos->rtc, 1, mask);
939 hpet_mask_rtc_irq_bit(RTC_AIE);
940 } while (mask & RTC_AIE);
941 spin_unlock_irq(&rtc_lock);
944 pr_debug("%s: resume, ctrl %02x\n",
945 cmos_rtc.rtc->dev.bus_id,
952 #define cmos_suspend NULL
953 #define cmos_resume NULL
955 static inline int cmos_poweroff(struct device *dev)
962 /*----------------------------------------------------------------*/
964 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
965 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
966 * probably list them in similar PNPBIOS tables; so PNP is more common.
968 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
969 * predate even PNPBIOS should set up platform_bus devices.
974 #include <linux/acpi.h>
977 static u32 rtc_handler(void *context)
979 acpi_clear_event(ACPI_EVENT_RTC);
980 acpi_disable_event(ACPI_EVENT_RTC, 0);
981 return ACPI_INTERRUPT_HANDLED;
984 static inline void rtc_wake_setup(void)
986 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
988 * After the RTC handler is installed, the Fixed_RTC event should
989 * be disabled. Only when the RTC alarm is set will it be enabled.
991 acpi_clear_event(ACPI_EVENT_RTC);
992 acpi_disable_event(ACPI_EVENT_RTC, 0);
995 static void rtc_wake_on(struct device *dev)
997 acpi_clear_event(ACPI_EVENT_RTC);
998 acpi_enable_event(ACPI_EVENT_RTC, 0);
1001 static void rtc_wake_off(struct device *dev)
1003 acpi_disable_event(ACPI_EVENT_RTC, 0);
1006 #define rtc_wake_setup() do{}while(0)
1007 #define rtc_wake_on NULL
1008 #define rtc_wake_off NULL
1011 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1012 * its device node and pass extra config data. This helps its driver use
1013 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1014 * that this board's RTC is wakeup-capable (per ACPI spec).
1016 static struct cmos_rtc_board_info acpi_rtc_info;
1018 static void __devinit
1019 cmos_wake_setup(struct device *dev)
1025 acpi_rtc_info.wake_on = rtc_wake_on;
1026 acpi_rtc_info.wake_off = rtc_wake_off;
1028 /* workaround bug in some ACPI tables */
1029 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1030 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1031 acpi_gbl_FADT.month_alarm);
1032 acpi_gbl_FADT.month_alarm = 0;
1035 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1036 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1037 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1039 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1040 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1041 dev_info(dev, "RTC can wake from S4\n");
1043 dev->platform_data = &acpi_rtc_info;
1045 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1046 device_init_wakeup(dev, 1);
1051 static void __devinit
1052 cmos_wake_setup(struct device *dev)
1060 #include <linux/pnp.h>
1062 static int __devinit
1063 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1065 cmos_wake_setup(&pnp->dev);
1067 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
1068 /* Some machines contain a PNP entry for the RTC, but
1069 * don't define the IRQ. It should always be safe to
1070 * hardcode it in these cases
1072 return cmos_do_probe(&pnp->dev,
1073 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1075 return cmos_do_probe(&pnp->dev,
1076 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1080 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1082 cmos_do_remove(&pnp->dev);
1087 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1089 return cmos_suspend(&pnp->dev, mesg);
1092 static int cmos_pnp_resume(struct pnp_dev *pnp)
1094 return cmos_resume(&pnp->dev);
1098 #define cmos_pnp_suspend NULL
1099 #define cmos_pnp_resume NULL
1102 static void cmos_pnp_shutdown(struct device *pdev)
1104 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(pdev))
1110 static const struct pnp_device_id rtc_ids[] = {
1111 { .id = "PNP0b00", },
1112 { .id = "PNP0b01", },
1113 { .id = "PNP0b02", },
1116 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1118 static struct pnp_driver cmos_pnp_driver = {
1119 .name = (char *) driver_name,
1120 .id_table = rtc_ids,
1121 .probe = cmos_pnp_probe,
1122 .remove = __exit_p(cmos_pnp_remove),
1124 /* flag ensures resume() gets called, and stops syslog spam */
1125 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1126 .suspend = cmos_pnp_suspend,
1127 .resume = cmos_pnp_resume,
1129 .name = (char *)driver_name,
1130 .shutdown = cmos_pnp_shutdown,
1134 #endif /* CONFIG_PNP */
1136 /*----------------------------------------------------------------*/
1138 /* Platform setup should have set up an RTC device, when PNP is
1139 * unavailable ... this could happen even on (older) PCs.
1142 static int __init cmos_platform_probe(struct platform_device *pdev)
1144 cmos_wake_setup(&pdev->dev);
1145 return cmos_do_probe(&pdev->dev,
1146 platform_get_resource(pdev, IORESOURCE_IO, 0),
1147 platform_get_irq(pdev, 0));
1150 static int __exit cmos_platform_remove(struct platform_device *pdev)
1152 cmos_do_remove(&pdev->dev);
1156 static void cmos_platform_shutdown(struct platform_device *pdev)
1158 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1164 /* work with hotplug and coldplug */
1165 MODULE_ALIAS("platform:rtc_cmos");
1167 static struct platform_driver cmos_platform_driver = {
1168 .remove = __exit_p(cmos_platform_remove),
1169 .shutdown = cmos_platform_shutdown,
1171 .name = (char *) driver_name,
1172 .suspend = cmos_suspend,
1173 .resume = cmos_resume,
1177 static int __init cmos_init(void)
1182 pnp_register_driver(&cmos_pnp_driver);
1186 retval = platform_driver_probe(&cmos_platform_driver,
1187 cmos_platform_probe);
1193 pnp_unregister_driver(&cmos_pnp_driver);
1197 module_init(cmos_init);
1199 static void __exit cmos_exit(void)
1202 pnp_unregister_driver(&cmos_pnp_driver);
1204 platform_driver_unregister(&cmos_platform_driver);
1206 module_exit(cmos_exit);
1209 MODULE_AUTHOR("David Brownell");
1210 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1211 MODULE_LICENSE("GPL");