ACPI, APEI, PCIE AER, use general HEST table parsing in AER firmware_first setup
[linux-2.6.git] / drivers / pci / pcie / aer / aerdrv.h
1 /*
2  * Copyright (C) 2006 Intel Corp.
3  *      Tom Long Nguyen (tom.l.nguyen@intel.com)
4  *      Zhang Yanmin (yanmin.zhang@intel.com)
5  *
6  */
7
8 #ifndef _AERDRV_H_
9 #define _AERDRV_H_
10
11 #include <linux/workqueue.h>
12 #include <linux/pcieport_if.h>
13 #include <linux/aer.h>
14 #include <linux/interrupt.h>
15
16 #define AER_NONFATAL                    0
17 #define AER_FATAL                       1
18 #define AER_CORRECTABLE                 2
19
20 /* Root Error Status Register Bits */
21 #define ROOT_ERR_STATUS_MASKS           0x0f
22
23 #define SYSTEM_ERROR_INTR_ON_MESG_MASK  (PCI_EXP_RTCTL_SECEE|   \
24                                         PCI_EXP_RTCTL_SENFEE|   \
25                                         PCI_EXP_RTCTL_SEFEE)
26 #define ROOT_PORT_INTR_ON_MESG_MASK     (PCI_ERR_ROOT_CMD_COR_EN|       \
27                                         PCI_ERR_ROOT_CMD_NONFATAL_EN|   \
28                                         PCI_ERR_ROOT_CMD_FATAL_EN)
29 #define ERR_COR_ID(d)                   (d & 0xffff)
30 #define ERR_UNCOR_ID(d)                 (d >> 16)
31
32 #define AER_ERROR_SOURCES_MAX           100
33
34 #define AER_LOG_TLP_MASKS               (PCI_ERR_UNC_POISON_TLP|        \
35                                         PCI_ERR_UNC_ECRC|               \
36                                         PCI_ERR_UNC_UNSUP|              \
37                                         PCI_ERR_UNC_COMP_ABORT|         \
38                                         PCI_ERR_UNC_UNX_COMP|           \
39                                         PCI_ERR_UNC_MALF_TLP)
40
41 struct header_log_regs {
42         unsigned int dw0;
43         unsigned int dw1;
44         unsigned int dw2;
45         unsigned int dw3;
46 };
47
48 #define AER_MAX_MULTI_ERR_DEVICES       5       /* Not likely to have more */
49 struct aer_err_info {
50         struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
51         int error_dev_num;
52
53         unsigned int id:16;
54
55         unsigned int severity:2;        /* 0:NONFATAL | 1:FATAL | 2:COR */
56         unsigned int __pad1:5;
57         unsigned int multi_error_valid:1;
58
59         unsigned int first_error:5;
60         unsigned int __pad2:2;
61         unsigned int tlp_header_valid:1;
62
63         unsigned int status;            /* COR/UNCOR Error Status */
64         unsigned int mask;              /* COR/UNCOR Error Mask */
65         struct header_log_regs tlp;     /* TLP Header */
66 };
67
68 struct aer_err_source {
69         unsigned int status;
70         unsigned int id;
71 };
72
73 struct aer_rpc {
74         struct pcie_device *rpd;        /* Root Port device */
75         struct work_struct dpc_handler;
76         struct aer_err_source e_sources[AER_ERROR_SOURCES_MAX];
77         unsigned short prod_idx;        /* Error Producer Index */
78         unsigned short cons_idx;        /* Error Consumer Index */
79         int isr;
80         spinlock_t e_lock;              /*
81                                          * Lock access to Error Status/ID Regs
82                                          * and error producer/consumer index
83                                          */
84         struct mutex rpc_mutex;         /*
85                                          * only one thread could do
86                                          * recovery on the same
87                                          * root port hierarchy
88                                          */
89         wait_queue_head_t wait_release;
90 };
91
92 struct aer_broadcast_data {
93         enum pci_channel_state state;
94         enum pci_ers_result result;
95 };
96
97 static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
98                 enum pci_ers_result new)
99 {
100         if (new == PCI_ERS_RESULT_NONE)
101                 return orig;
102
103         switch (orig) {
104         case PCI_ERS_RESULT_CAN_RECOVER:
105         case PCI_ERS_RESULT_RECOVERED:
106                 orig = new;
107                 break;
108         case PCI_ERS_RESULT_DISCONNECT:
109                 if (new == PCI_ERS_RESULT_NEED_RESET)
110                         orig = new;
111                 break;
112         default:
113                 break;
114         }
115
116         return orig;
117 }
118
119 extern struct bus_type pcie_port_bus_type;
120 extern void aer_enable_rootport(struct aer_rpc *rpc);
121 extern void aer_delete_rootport(struct aer_rpc *rpc);
122 extern int aer_init(struct pcie_device *dev);
123 extern void aer_isr(struct work_struct *work);
124 extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
125 extern void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info);
126 extern irqreturn_t aer_irq(int irq, void *context);
127
128 #ifdef CONFIG_ACPI
129 extern int aer_osc_setup(struct pcie_device *pciedev);
130 #else
131 static inline int aer_osc_setup(struct pcie_device *pciedev)
132 {
133         return 0;
134 }
135 #endif
136
137 #ifdef CONFIG_ACPI_APEI
138 extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
139 #else
140 static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
141 {
142         if (pci_dev->__aer_firmware_first_valid)
143                 return pci_dev->__aer_firmware_first;
144         return 0;
145 }
146 #endif
147
148 static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev,
149                                                  int enable)
150 {
151         pci_dev->__aer_firmware_first = !!enable;
152         pci_dev->__aer_firmware_first_valid = 1;
153 }
154 #endif /* _AERDRV_H_ */