84e609ea5fbbc1a5e1a25d72a60b9aa369ea9a73
[linux-2.6.git] / drivers / net / irda / via-ircc.c
1 /********************************************************************
2  Filename:      via-ircc.c
3  Version:       1.0 
4  Description:   Driver for the VIA VT8231/VT8233 IrDA chipsets
5  Author:        VIA Technologies,inc
6  Date  :        08/06/2003
7
8 Copyright (c) 1998-2003 VIA Technologies, Inc.
9
10 This program is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free Software
12 Foundation; either version 2, or (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17 See the GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
25  Comment :
26        jul/09/2002 : only implement two kind of dongle currently.
27        Oct/02/2002 : work on VT8231 and VT8233 .
28        Aug/06/2003 : change driver format to pci driver .
29
30 2004-02-16: <sda@bdit.de>
31 - Removed unneeded 'legacy' pci stuff.
32 - Make sure SIR mode is set (hw_init()) before calling mode-dependant stuff.
33 - On speed change from core, don't send SIR frame with new speed. 
34   Use current speed and change speeds later.
35 - Make module-param dongle_id actually work.
36 - New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only. 
37   Tested with home-grown PCB on EPIA boards.
38 - Code cleanup.
39        
40  ********************************************************************/
41 #include <linux/module.h>
42 #include <linux/kernel.h>
43 #include <linux/types.h>
44 #include <linux/skbuff.h>
45 #include <linux/netdevice.h>
46 #include <linux/ioport.h>
47 #include <linux/delay.h>
48 #include <linux/slab.h>
49 #include <linux/init.h>
50 #include <linux/rtnetlink.h>
51 #include <linux/pci.h>
52 #include <linux/dma-mapping.h>
53
54 #include <asm/io.h>
55 #include <asm/dma.h>
56 #include <asm/byteorder.h>
57
58 #include <linux/pm.h>
59
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda.h>
62 #include <net/irda/irda_device.h>
63
64 #include "via-ircc.h"
65
66 #define VIA_MODULE_NAME "via-ircc"
67 #define CHIP_IO_EXTENT 0x40
68
69 static char *driver_name = VIA_MODULE_NAME;
70
71 /* Module parameters */
72 static int qos_mtt_bits = 0x07; /* 1 ms or more */
73 static int dongle_id = 0;       /* default: probe */
74
75 /* We can't guess the type of connected dongle, user *must* supply it. */
76 module_param(dongle_id, int, 0);
77
78 /* FIXME : we should not need this, because instances should be automatically
79  * managed by the PCI layer. Especially that we seem to only be using the
80  * first entry. Jean II */
81 /* Max 4 instances for now */
82 static struct via_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
83
84 /* Some prototypes */
85 static int via_ircc_open(int i, chipio_t * info, unsigned int id);
86 static int via_ircc_close(struct via_ircc_cb *self);
87 static int via_ircc_dma_receive(struct via_ircc_cb *self);
88 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
89                                          int iobase);
90 static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
91                                   struct net_device *dev);
92 static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
93                                   struct net_device *dev);
94 static void via_hw_init(struct via_ircc_cb *self);
95 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
96 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id);
97 static int via_ircc_is_receiving(struct via_ircc_cb *self);
98 static int via_ircc_read_dongle_id(int iobase);
99
100 static int via_ircc_net_open(struct net_device *dev);
101 static int via_ircc_net_close(struct net_device *dev);
102 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
103                               int cmd);
104 static struct net_device_stats *via_ircc_net_get_stats(struct net_device
105                                                        *dev);
106 static void via_ircc_change_dongle_speed(int iobase, int speed,
107                                          int dongle_id);
108 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
109 static void hwreset(struct via_ircc_cb *self);
110 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
111 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
112 static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
113 static void __devexit via_remove_one (struct pci_dev *pdev);
114
115 /* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
116 static void iodelay(int udelay)
117 {
118         u8 data;
119         int i;
120
121         for (i = 0; i < udelay; i++) {
122                 data = inb(0x80);
123         }
124 }
125
126 static struct pci_device_id via_pci_tbl[] = {
127         { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
128         { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
129         { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
130         { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
131         { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
132         { 0, }
133 };
134
135 MODULE_DEVICE_TABLE(pci,via_pci_tbl);
136
137
138 static struct pci_driver via_driver = {
139         .name           = VIA_MODULE_NAME,
140         .id_table       = via_pci_tbl,
141         .probe          = via_init_one,
142         .remove         = __devexit_p(via_remove_one),
143 };
144
145
146 /*
147  * Function via_ircc_init ()
148  *
149  *    Initialize chip. Just find out chip type and resource.
150  */
151 static int __init via_ircc_init(void)
152 {
153         int rc;
154
155         IRDA_DEBUG(3, "%s()\n", __func__);
156
157         rc = pci_register_driver(&via_driver);
158         if (rc < 0) {
159                 IRDA_DEBUG(0, "%s(): error rc = %d, returning  -ENODEV...\n",
160                            __func__, rc);
161                 return -ENODEV;
162         }
163         return 0;
164 }
165
166 static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
167 {
168         int rc;
169         u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
170         u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
171         chipio_t info;
172
173         IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __func__, id->device);
174
175         rc = pci_enable_device (pcidev);
176         if (rc) {
177                 IRDA_DEBUG(0, "%s(): error rc = %d\n", __func__, rc);
178                 return -ENODEV;
179         }
180
181         // South Bridge exist
182         if ( ReadLPCReg(0x20) != 0x3C )
183                 Chipset=0x3096;
184         else
185                 Chipset=0x3076;
186
187         if (Chipset==0x3076) {
188                 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __func__);
189
190                 WriteLPCReg(7,0x0c );
191                 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
192                 if((temp&0x01)==1) {   // BIOS close or no FIR
193                         WriteLPCReg(0x1d, 0x82 );
194                         WriteLPCReg(0x23,0x18);
195                         temp=ReadLPCReg(0xF0);
196                         if((temp&0x01)==0) {
197                                 temp=(ReadLPCReg(0x74)&0x03);    //DMA
198                                 FirDRQ0=temp + 4;
199                                 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
200                                 FirDRQ1=temp + 4;
201                         } else {
202                                 temp=(ReadLPCReg(0x74)&0x0C) >> 2;    //DMA
203                                 FirDRQ0=temp + 4;
204                                 FirDRQ1=FirDRQ0;
205                         }
206                         FirIRQ=(ReadLPCReg(0x70)&0x0f);         //IRQ
207                         FirIOBase=ReadLPCReg(0x60 ) << 8;       //IO Space :high byte
208                         FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
209                         FirIOBase=FirIOBase  ;
210                         info.fir_base=FirIOBase;
211                         info.irq=FirIRQ;
212                         info.dma=FirDRQ1;
213                         info.dma2=FirDRQ0;
214                         pci_read_config_byte(pcidev,0x40,&bTmp);
215                         pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
216                         pci_read_config_byte(pcidev,0x42,&bTmp);
217                         pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
218                         pci_write_config_byte(pcidev,0x5a,0xc0);
219                         WriteLPCReg(0x28, 0x70 );
220                         if (via_ircc_open(0, &info,0x3076) == 0)
221                                 rc=0;
222                 } else
223                         rc = -ENODEV; //IR not turn on   
224         } else { //Not VT1211
225                 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __func__);
226
227                 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
228                 if((bTmp&0x01)==1) {  // BIOS enable FIR
229                         //Enable Double DMA clock
230                         pci_read_config_byte(pcidev,0x42,&oldPCI_40);
231                         pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
232                         pci_read_config_byte(pcidev,0x40,&oldPCI_40);
233                         pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
234                         pci_read_config_byte(pcidev,0x44,&oldPCI_44);
235                         pci_write_config_byte(pcidev,0x44,0x4e);
236   //---------- read configuration from Function0 of south bridge
237                         if((bTmp&0x02)==0) {
238                                 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
239                                 FirDRQ0 = (bTmp1 & 0x30) >> 4;
240                                 pci_read_config_byte(pcidev,0x44,&bTmp1);
241                                 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
242                         } else  {
243                                 pci_read_config_byte(pcidev,0x44,&bTmp1);    //DMA
244                                 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
245                                 FirDRQ1=0;
246                         }
247                         pci_read_config_byte(pcidev,0x47,&bTmp1);  //IRQ
248                         FirIRQ = bTmp1 & 0x0f;
249
250                         pci_read_config_byte(pcidev,0x69,&bTmp);
251                         FirIOBase = bTmp << 8;//hight byte
252                         pci_read_config_byte(pcidev,0x68,&bTmp);
253                         FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
254   //-------------------------
255                         info.fir_base=FirIOBase;
256                         info.irq=FirIRQ;
257                         info.dma=FirDRQ1;
258                         info.dma2=FirDRQ0;
259                         if (via_ircc_open(0, &info,0x3096) == 0)
260                                 rc=0;
261                 } else
262                         rc = -ENODEV; //IR not turn on !!!!!
263         }//Not VT1211
264
265         IRDA_DEBUG(2, "%s(): End - rc = %d\n", __func__, rc);
266         return rc;
267 }
268
269 /*
270  * Function via_ircc_clean ()
271  *
272  *    Close all configured chips
273  *
274  */
275 static void via_ircc_clean(void)
276 {
277         int i;
278
279         IRDA_DEBUG(3, "%s()\n", __func__);
280
281         for (i=0; i < ARRAY_SIZE(dev_self); i++) {
282                 if (dev_self[i])
283                         via_ircc_close(dev_self[i]);
284         }
285 }
286
287 static void __devexit via_remove_one (struct pci_dev *pdev)
288 {
289         IRDA_DEBUG(3, "%s()\n", __func__);
290
291         /* FIXME : This is ugly. We should use pci_get_drvdata(pdev);
292          * to get our driver instance and call directly via_ircc_close().
293          * See vlsi_ir for details...
294          * Jean II */
295         via_ircc_clean();
296
297         /* FIXME : This should be in via_ircc_close(), because here we may
298          * theoritically disable still configured devices :-( - Jean II */
299         pci_disable_device(pdev);
300 }
301
302 static void __exit via_ircc_cleanup(void)
303 {
304         IRDA_DEBUG(3, "%s()\n", __func__);
305
306         /* FIXME : This should be redundant, as pci_unregister_driver()
307          * should call via_remove_one() on each device.
308          * Jean II */
309         via_ircc_clean();
310
311         /* Cleanup all instances of the driver */
312         pci_unregister_driver (&via_driver); 
313 }
314
315 /*
316  * Function via_ircc_open (iobase, irq)
317  *
318  *    Open driver instance
319  *
320  */
321 static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id)
322 {
323         struct net_device *dev;
324         struct via_ircc_cb *self;
325         int err;
326
327         IRDA_DEBUG(3, "%s()\n", __func__);
328
329         if (i >= ARRAY_SIZE(dev_self))
330                 return -ENOMEM;
331
332         /* Allocate new instance of the driver */
333         dev = alloc_irdadev(sizeof(struct via_ircc_cb));
334         if (dev == NULL) 
335                 return -ENOMEM;
336
337         self = dev->priv;
338         self->netdev = dev;
339         spin_lock_init(&self->lock);
340
341         /* FIXME : We should store our driver instance in the PCI layer,
342          * using pci_set_drvdata(), not in this array.
343          * See vlsi_ir for details... - Jean II */
344         /* FIXME : 'i' is always 0 (see via_init_one()) :-( - Jean II */
345         /* Need to store self somewhere */
346         dev_self[i] = self;
347         self->index = i;
348         /* Initialize Resource */
349         self->io.cfg_base = info->cfg_base;
350         self->io.fir_base = info->fir_base;
351         self->io.irq = info->irq;
352         self->io.fir_ext = CHIP_IO_EXTENT;
353         self->io.dma = info->dma;
354         self->io.dma2 = info->dma2;
355         self->io.fifo_size = 32;
356         self->chip_id = id;
357         self->st_fifo.len = 0;
358         self->RxDataReady = 0;
359
360         /* Reserve the ioports that we need */
361         if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
362                 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
363                            __func__, self->io.fir_base);
364                 err = -ENODEV;
365                 goto err_out1;
366         }
367         
368         /* Initialize QoS for this device */
369         irda_init_max_qos_capabilies(&self->qos);
370
371         /* Check if user has supplied the dongle id or not */
372         if (!dongle_id)
373                 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
374         self->io.dongle_id = dongle_id;
375
376         /* The only value we must override it the baudrate */
377         /* Maximum speeds and capabilities are dongle-dependant. */
378         switch( self->io.dongle_id ){
379         case 0x0d:
380                 self->qos.baud_rate.bits =
381                     IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
382                     IR_576000 | IR_1152000 | (IR_4000000 << 8);
383                 break;
384         default:
385                 self->qos.baud_rate.bits =
386                     IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
387                 break;
388         }
389
390         /* Following was used for testing:
391          *
392          *   self->qos.baud_rate.bits = IR_9600;
393          *
394          * Is is no good, as it prohibits (error-prone) speed-changes.
395          */
396
397         self->qos.min_turn_time.bits = qos_mtt_bits;
398         irda_qos_bits_to_value(&self->qos);
399
400         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
401         self->rx_buff.truesize = 14384 + 2048;
402         self->tx_buff.truesize = 14384 + 2048;
403
404         /* Allocate memory if needed */
405         self->rx_buff.head =
406                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
407                                    &self->rx_buff_dma, GFP_KERNEL);
408         if (self->rx_buff.head == NULL) {
409                 err = -ENOMEM;
410                 goto err_out2;
411         }
412         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
413
414         self->tx_buff.head =
415                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
416                                    &self->tx_buff_dma, GFP_KERNEL);
417         if (self->tx_buff.head == NULL) {
418                 err = -ENOMEM;
419                 goto err_out3;
420         }
421         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
422
423         self->rx_buff.in_frame = FALSE;
424         self->rx_buff.state = OUTSIDE_FRAME;
425         self->tx_buff.data = self->tx_buff.head;
426         self->rx_buff.data = self->rx_buff.head;
427
428         /* Reset Tx queue info */
429         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
430         self->tx_fifo.tail = self->tx_buff.head;
431
432         /* Override the network functions we need to use */
433         dev->hard_start_xmit = via_ircc_hard_xmit_sir;
434         dev->open = via_ircc_net_open;
435         dev->stop = via_ircc_net_close;
436         dev->do_ioctl = via_ircc_net_ioctl;
437         dev->get_stats = via_ircc_net_get_stats;
438
439         err = register_netdev(dev);
440         if (err)
441                 goto err_out4;
442
443         IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
444
445         /* Initialise the hardware..
446         */
447         self->io.speed = 9600;
448         via_hw_init(self);
449         return 0;
450  err_out4:
451         dma_free_coherent(NULL, self->tx_buff.truesize,
452                           self->tx_buff.head, self->tx_buff_dma);
453  err_out3:
454         dma_free_coherent(NULL, self->rx_buff.truesize,
455                           self->rx_buff.head, self->rx_buff_dma);
456  err_out2:
457         release_region(self->io.fir_base, self->io.fir_ext);
458  err_out1:
459         free_netdev(dev);
460         dev_self[i] = NULL;
461         return err;
462 }
463
464 /*
465  * Function via_ircc_close (self)
466  *
467  *    Close driver instance
468  *
469  */
470 static int via_ircc_close(struct via_ircc_cb *self)
471 {
472         int iobase;
473
474         IRDA_DEBUG(3, "%s()\n", __func__);
475
476         IRDA_ASSERT(self != NULL, return -1;);
477
478         iobase = self->io.fir_base;
479
480         ResetChip(iobase, 5);   //hardware reset.
481         /* Remove netdevice */
482         unregister_netdev(self->netdev);
483
484         /* Release the PORT that this driver is using */
485         IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
486                    __func__, self->io.fir_base);
487         release_region(self->io.fir_base, self->io.fir_ext);
488         if (self->tx_buff.head)
489                 dma_free_coherent(NULL, self->tx_buff.truesize,
490                                   self->tx_buff.head, self->tx_buff_dma);
491         if (self->rx_buff.head)
492                 dma_free_coherent(NULL, self->rx_buff.truesize,
493                                   self->rx_buff.head, self->rx_buff_dma);
494         dev_self[self->index] = NULL;
495
496         free_netdev(self->netdev);
497
498         return 0;
499 }
500
501 /*
502  * Function via_hw_init(self)
503  *
504  *    Returns non-negative on success.
505  *
506  * Formerly via_ircc_setup 
507  */
508 static void via_hw_init(struct via_ircc_cb *self)
509 {
510         int iobase = self->io.fir_base;
511
512         IRDA_DEBUG(3, "%s()\n", __func__);
513
514         SetMaxRxPacketSize(iobase, 0x0fff);     //set to max:4095
515         // FIFO Init
516         EnRXFIFOReadyInt(iobase, OFF);
517         EnRXFIFOHalfLevelInt(iobase, OFF);
518         EnTXFIFOHalfLevelInt(iobase, OFF);
519         EnTXFIFOUnderrunEOMInt(iobase, ON);
520         EnTXFIFOReadyInt(iobase, OFF);
521         InvertTX(iobase, OFF);
522         InvertRX(iobase, OFF);
523
524         if (ReadLPCReg(0x20) == 0x3c)
525                 WriteLPCReg(0xF0, 0);   // for VT1211
526         /* Int Init */
527         EnRXSpecInt(iobase, ON);
528
529         /* The following is basically hwreset */
530         /* If this is the case, why not just call hwreset() ? Jean II */
531         ResetChip(iobase, 5);
532         EnableDMA(iobase, OFF);
533         EnableTX(iobase, OFF);
534         EnableRX(iobase, OFF);
535         EnRXDMA(iobase, OFF);
536         EnTXDMA(iobase, OFF);
537         RXStart(iobase, OFF);
538         TXStart(iobase, OFF);
539         InitCard(iobase);
540         CommonInit(iobase);
541         SIRFilter(iobase, ON);
542         SetSIR(iobase, ON);
543         CRC16(iobase, ON);
544         EnTXCRC(iobase, 0);
545         WriteReg(iobase, I_ST_CT_0, 0x00);
546         SetBaudRate(iobase, 9600);
547         SetPulseWidth(iobase, 12);
548         SetSendPreambleCount(iobase, 0);
549
550         self->io.speed = 9600;
551         self->st_fifo.len = 0;
552
553         via_ircc_change_dongle_speed(iobase, self->io.speed,
554                                      self->io.dongle_id);
555
556         WriteReg(iobase, I_ST_CT_0, 0x80);
557 }
558
559 /*
560  * Function via_ircc_read_dongle_id (void)
561  *
562  */
563 static int via_ircc_read_dongle_id(int iobase)
564 {
565         int dongle_id = 9;      /* Default to IBM */
566
567         IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
568         return dongle_id;
569 }
570
571 /*
572  * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
573  *    Change speed of the attach dongle
574  *    only implement two type of dongle currently.
575  */
576 static void via_ircc_change_dongle_speed(int iobase, int speed,
577                                          int dongle_id)
578 {
579         u8 mode = 0;
580
581         /* speed is unused, as we use IsSIROn()/IsMIROn() */
582         speed = speed;
583
584         IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
585                    __func__, speed, iobase, dongle_id);
586
587         switch (dongle_id) {
588
589                 /* Note: The dongle_id's listed here are derived from
590                  * nsc-ircc.c */ 
591
592         case 0x08:              /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
593                 UseOneRX(iobase, ON);   // use one RX pin   RX1,RX2
594                 InvertTX(iobase, OFF);
595                 InvertRX(iobase, OFF);
596
597                 EnRX2(iobase, ON);      //sir to rx2
598                 EnGPIOtoRX2(iobase, OFF);
599
600                 if (IsSIROn(iobase)) {  //sir
601                         // Mode select Off
602                         SlowIRRXLowActive(iobase, ON);
603                         udelay(1000);
604                         SlowIRRXLowActive(iobase, OFF);
605                 } else {
606                         if (IsMIROn(iobase)) {  //mir
607                                 // Mode select On
608                                 SlowIRRXLowActive(iobase, OFF);
609                                 udelay(20);
610                         } else {        // fir
611                                 if (IsFIROn(iobase)) {  //fir
612                                         // Mode select On
613                                         SlowIRRXLowActive(iobase, OFF);
614                                         udelay(20);
615                                 }
616                         }
617                 }
618                 break;
619
620         case 0x09:              /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
621                 UseOneRX(iobase, ON);   //use ONE RX....RX1
622                 InvertTX(iobase, OFF);
623                 InvertRX(iobase, OFF);  // invert RX pin
624
625                 EnRX2(iobase, ON);
626                 EnGPIOtoRX2(iobase, OFF);
627                 if (IsSIROn(iobase)) {  //sir
628                         // Mode select On
629                         SlowIRRXLowActive(iobase, ON);
630                         udelay(20);
631                         // Mode select Off
632                         SlowIRRXLowActive(iobase, OFF);
633                 }
634                 if (IsMIROn(iobase)) {  //mir
635                         // Mode select On
636                         SlowIRRXLowActive(iobase, OFF);
637                         udelay(20);
638                         // Mode select Off
639                         SlowIRRXLowActive(iobase, ON);
640                 } else {        // fir
641                         if (IsFIROn(iobase)) {  //fir
642                                 // Mode select On
643                                 SlowIRRXLowActive(iobase, OFF);
644                                 // TX On
645                                 WriteTX(iobase, ON);
646                                 udelay(20);
647                                 // Mode select OFF
648                                 SlowIRRXLowActive(iobase, ON);
649                                 udelay(20);
650                                 // TX Off
651                                 WriteTX(iobase, OFF);
652                         }
653                 }
654                 break;
655
656         case 0x0d:
657                 UseOneRX(iobase, OFF);  // use two RX pin   RX1,RX2
658                 InvertTX(iobase, OFF);
659                 InvertRX(iobase, OFF);
660                 SlowIRRXLowActive(iobase, OFF);
661                 if (IsSIROn(iobase)) {  //sir
662                         EnGPIOtoRX2(iobase, OFF);
663                         WriteGIO(iobase, OFF);
664                         EnRX2(iobase, OFF);     //sir to rx2
665                 } else {        // fir mir
666                         EnGPIOtoRX2(iobase, OFF);
667                         WriteGIO(iobase, OFF);
668                         EnRX2(iobase, OFF);     //fir to rx
669                 }
670                 break;
671
672         case 0x11:              /* Temic TFDS4500 */
673
674                 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __func__);
675
676                 UseOneRX(iobase, ON);   //use ONE RX....RX1
677                 InvertTX(iobase, OFF);
678                 InvertRX(iobase, ON);   // invert RX pin
679         
680                 EnRX2(iobase, ON);      //sir to rx2
681                 EnGPIOtoRX2(iobase, OFF);
682
683                 if( IsSIROn(iobase) ){  //sir
684
685                         // Mode select On
686                         SlowIRRXLowActive(iobase, ON);
687                         udelay(20);
688                         // Mode select Off
689                         SlowIRRXLowActive(iobase, OFF);
690
691                 } else{
692                         IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __func__);
693                 }
694                 break;
695
696         case 0x0ff:             /* Vishay */
697                 if (IsSIROn(iobase))
698                         mode = 0;
699                 else if (IsMIROn(iobase))
700                         mode = 1;
701                 else if (IsFIROn(iobase))
702                         mode = 2;
703                 else if (IsVFIROn(iobase))
704                         mode = 5;       //VFIR-16
705                 SI_SetMode(iobase, mode);
706                 break;
707
708         default:
709                 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
710                            __func__, dongle_id);
711         }
712 }
713
714 /*
715  * Function via_ircc_change_speed (self, baud)
716  *
717  *    Change the speed of the device
718  *
719  */
720 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
721 {
722         struct net_device *dev = self->netdev;
723         u16 iobase;
724         u8 value = 0, bTmp;
725
726         iobase = self->io.fir_base;
727         /* Update accounting for new speed */
728         self->io.speed = speed;
729         IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __func__, speed);
730
731         WriteReg(iobase, I_ST_CT_0, 0x0);
732
733         /* Controller mode sellection */
734         switch (speed) {
735         case 2400:
736         case 9600:
737         case 19200:
738         case 38400:
739         case 57600:
740         case 115200:
741                 value = (115200/speed)-1;
742                 SetSIR(iobase, ON);
743                 CRC16(iobase, ON);
744                 break;
745         case 576000:
746                 /* FIXME: this can't be right, as it's the same as 115200,
747                  * and 576000 is MIR, not SIR. */
748                 value = 0;
749                 SetSIR(iobase, ON);
750                 CRC16(iobase, ON);
751                 break;
752         case 1152000:
753                 value = 0;
754                 SetMIR(iobase, ON);
755                 /* FIXME: CRC ??? */
756                 break;
757         case 4000000:
758                 value = 0;
759                 SetFIR(iobase, ON);
760                 SetPulseWidth(iobase, 0);
761                 SetSendPreambleCount(iobase, 14);
762                 CRC16(iobase, OFF);
763                 EnTXCRC(iobase, ON);
764                 break;
765         case 16000000:
766                 value = 0;
767                 SetVFIR(iobase, ON);
768                 /* FIXME: CRC ??? */
769                 break;
770         default:
771                 value = 0;
772                 break;
773         }
774
775         /* Set baudrate to 0x19[2..7] */
776         bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
777         bTmp |= value << 2;
778         WriteReg(iobase, I_CF_H_1, bTmp);
779
780         /* Some dongles may need to be informed about speed changes. */
781         via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
782
783         /* Set FIFO size to 64 */
784         SetFIFO(iobase, 64);
785
786         /* Enable IR */
787         WriteReg(iobase, I_ST_CT_0, 0x80);
788
789         // EnTXFIFOHalfLevelInt(iobase,ON);
790
791         /* Enable some interrupts so we can receive frames */
792         //EnAllInt(iobase,ON);
793
794         if (IsSIROn(iobase)) {
795                 SIRFilter(iobase, ON);
796                 SIRRecvAny(iobase, ON);
797         } else {
798                 SIRFilter(iobase, OFF);
799                 SIRRecvAny(iobase, OFF);
800         }
801
802         if (speed > 115200) {
803                 /* Install FIR xmit handler */
804                 dev->hard_start_xmit = via_ircc_hard_xmit_fir;
805                 via_ircc_dma_receive(self);
806         } else {
807                 /* Install SIR xmit handler */
808                 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
809         }
810         netif_wake_queue(dev);
811 }
812
813 /*
814  * Function via_ircc_hard_xmit (skb, dev)
815  *
816  *    Transmit the frame!
817  *
818  */
819 static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
820                                   struct net_device *dev)
821 {
822         struct via_ircc_cb *self;
823         unsigned long flags;
824         u16 iobase;
825         __u32 speed;
826
827         self = (struct via_ircc_cb *) dev->priv;
828         IRDA_ASSERT(self != NULL, return 0;);
829         iobase = self->io.fir_base;
830
831         netif_stop_queue(dev);
832         /* Check if we need to change the speed */
833         speed = irda_get_next_speed(skb);
834         if ((speed != self->io.speed) && (speed != -1)) {
835                 /* Check for empty frame */
836                 if (!skb->len) {
837                         via_ircc_change_speed(self, speed);
838                         dev->trans_start = jiffies;
839                         dev_kfree_skb(skb);
840                         return 0;
841                 } else
842                         self->new_speed = speed;
843         }
844         InitCard(iobase);
845         CommonInit(iobase);
846         SIRFilter(iobase, ON);
847         SetSIR(iobase, ON);
848         CRC16(iobase, ON);
849         EnTXCRC(iobase, 0);
850         WriteReg(iobase, I_ST_CT_0, 0x00);
851
852         spin_lock_irqsave(&self->lock, flags);
853         self->tx_buff.data = self->tx_buff.head;
854         self->tx_buff.len =
855             async_wrap_skb(skb, self->tx_buff.data,
856                            self->tx_buff.truesize);
857
858         self->stats.tx_bytes += self->tx_buff.len;
859         /* Send this frame with old speed */
860         SetBaudRate(iobase, self->io.speed);
861         SetPulseWidth(iobase, 12);
862         SetSendPreambleCount(iobase, 0);
863         WriteReg(iobase, I_ST_CT_0, 0x80);
864
865         EnableTX(iobase, ON);
866         EnableRX(iobase, OFF);
867
868         ResetChip(iobase, 0);
869         ResetChip(iobase, 1);
870         ResetChip(iobase, 2);
871         ResetChip(iobase, 3);
872         ResetChip(iobase, 4);
873
874         EnAllInt(iobase, ON);
875         EnTXDMA(iobase, ON);
876         EnRXDMA(iobase, OFF);
877
878         irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
879                        DMA_TX_MODE);
880
881         SetSendByte(iobase, self->tx_buff.len);
882         RXStart(iobase, OFF);
883         TXStart(iobase, ON);
884
885         dev->trans_start = jiffies;
886         spin_unlock_irqrestore(&self->lock, flags);
887         dev_kfree_skb(skb);
888         return 0;
889 }
890
891 static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
892                                   struct net_device *dev)
893 {
894         struct via_ircc_cb *self;
895         u16 iobase;
896         __u32 speed;
897         unsigned long flags;
898
899         self = (struct via_ircc_cb *) dev->priv;
900         iobase = self->io.fir_base;
901
902         if (self->st_fifo.len)
903                 return 0;
904         if (self->chip_id == 0x3076)
905                 iodelay(1500);
906         else
907                 udelay(1500);
908         netif_stop_queue(dev);
909         speed = irda_get_next_speed(skb);
910         if ((speed != self->io.speed) && (speed != -1)) {
911                 if (!skb->len) {
912                         via_ircc_change_speed(self, speed);
913                         dev->trans_start = jiffies;
914                         dev_kfree_skb(skb);
915                         return 0;
916                 } else
917                         self->new_speed = speed;
918         }
919         spin_lock_irqsave(&self->lock, flags);
920         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
921         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
922
923         self->tx_fifo.tail += skb->len;
924         self->stats.tx_bytes += skb->len;
925         skb_copy_from_linear_data(skb,
926                       self->tx_fifo.queue[self->tx_fifo.free].start, skb->len);
927         self->tx_fifo.len++;
928         self->tx_fifo.free++;
929 //F01   if (self->tx_fifo.len == 1) {
930         via_ircc_dma_xmit(self, iobase);
931 //F01   }
932 //F01   if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
933         dev->trans_start = jiffies;
934         dev_kfree_skb(skb);
935         spin_unlock_irqrestore(&self->lock, flags);
936         return 0;
937
938 }
939
940 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
941 {
942         EnTXDMA(iobase, OFF);
943         self->io.direction = IO_XMIT;
944         EnPhys(iobase, ON);
945         EnableTX(iobase, ON);
946         EnableRX(iobase, OFF);
947         ResetChip(iobase, 0);
948         ResetChip(iobase, 1);
949         ResetChip(iobase, 2);
950         ResetChip(iobase, 3);
951         ResetChip(iobase, 4);
952         EnAllInt(iobase, ON);
953         EnTXDMA(iobase, ON);
954         EnRXDMA(iobase, OFF);
955         irda_setup_dma(self->io.dma,
956                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
957                         self->tx_buff.head) + self->tx_buff_dma,
958                        self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
959         IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
960                    __func__, self->tx_fifo.ptr,
961                    self->tx_fifo.queue[self->tx_fifo.ptr].len,
962                    self->tx_fifo.len);
963
964         SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
965         RXStart(iobase, OFF);
966         TXStart(iobase, ON);
967         return 0;
968
969 }
970
971 /*
972  * Function via_ircc_dma_xmit_complete (self)
973  *
974  *    The transfer of a frame in finished. This function will only be called 
975  *    by the interrupt handler
976  *
977  */
978 static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
979 {
980         int iobase;
981         int ret = TRUE;
982         u8 Tx_status;
983
984         IRDA_DEBUG(3, "%s()\n", __func__);
985
986         iobase = self->io.fir_base;
987         /* Disable DMA */
988 //      DisableDmaChannel(self->io.dma);
989         /* Check for underrrun! */
990         /* Clear bit, by writing 1 into it */
991         Tx_status = GetTXStatus(iobase);
992         if (Tx_status & 0x08) {
993                 self->stats.tx_errors++;
994                 self->stats.tx_fifo_errors++;
995                 hwreset(self);
996 // how to clear underrrun ?
997         } else {
998                 self->stats.tx_packets++;
999                 ResetChip(iobase, 3);
1000                 ResetChip(iobase, 4);
1001         }
1002         /* Check if we need to change the speed */
1003         if (self->new_speed) {
1004                 via_ircc_change_speed(self, self->new_speed);
1005                 self->new_speed = 0;
1006         }
1007
1008         /* Finished with this frame, so prepare for next */
1009         if (IsFIROn(iobase)) {
1010                 if (self->tx_fifo.len) {
1011                         self->tx_fifo.len--;
1012                         self->tx_fifo.ptr++;
1013                 }
1014         }
1015         IRDA_DEBUG(1,
1016                    "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
1017                    __func__,
1018                    self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
1019 /* F01_S
1020         // Any frames to be sent back-to-back? 
1021         if (self->tx_fifo.len) {
1022                 // Not finished yet! 
1023                 via_ircc_dma_xmit(self, iobase);
1024                 ret = FALSE;
1025         } else { 
1026 F01_E*/
1027         // Reset Tx FIFO info 
1028         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1029         self->tx_fifo.tail = self->tx_buff.head;
1030 //F01   }
1031
1032         // Make sure we have room for more frames 
1033 //F01   if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
1034         // Not busy transmitting anymore 
1035         // Tell the network layer, that we can accept more frames 
1036         netif_wake_queue(self->netdev);
1037 //F01   }
1038         return ret;
1039 }
1040
1041 /*
1042  * Function via_ircc_dma_receive (self)
1043  *
1044  *    Set configuration for receive a frame.
1045  *
1046  */
1047 static int via_ircc_dma_receive(struct via_ircc_cb *self)
1048 {
1049         int iobase;
1050
1051         iobase = self->io.fir_base;
1052
1053         IRDA_DEBUG(3, "%s()\n", __func__);
1054
1055         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1056         self->tx_fifo.tail = self->tx_buff.head;
1057         self->RxDataReady = 0;
1058         self->io.direction = IO_RECV;
1059         self->rx_buff.data = self->rx_buff.head;
1060         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1061         self->st_fifo.tail = self->st_fifo.head = 0;
1062
1063         EnPhys(iobase, ON);
1064         EnableTX(iobase, OFF);
1065         EnableRX(iobase, ON);
1066
1067         ResetChip(iobase, 0);
1068         ResetChip(iobase, 1);
1069         ResetChip(iobase, 2);
1070         ResetChip(iobase, 3);
1071         ResetChip(iobase, 4);
1072
1073         EnAllInt(iobase, ON);
1074         EnTXDMA(iobase, OFF);
1075         EnRXDMA(iobase, ON);
1076         irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1077                   self->rx_buff.truesize, DMA_RX_MODE);
1078         TXStart(iobase, OFF);
1079         RXStart(iobase, ON);
1080
1081         return 0;
1082 }
1083
1084 /*
1085  * Function via_ircc_dma_receive_complete (self)
1086  *
1087  *    Controller Finished with receiving frames,
1088  *    and this routine is call by ISR
1089  *    
1090  */
1091 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1092                                          int iobase)
1093 {
1094         struct st_fifo *st_fifo;
1095         struct sk_buff *skb;
1096         int len, i;
1097         u8 status = 0;
1098
1099         iobase = self->io.fir_base;
1100         st_fifo = &self->st_fifo;
1101
1102         if (self->io.speed < 4000000) { //Speed below FIR
1103                 len = GetRecvByte(iobase, self);
1104                 skb = dev_alloc_skb(len + 1);
1105                 if (skb == NULL)
1106                         return FALSE;
1107                 // Make sure IP header gets aligned 
1108                 skb_reserve(skb, 1);
1109                 skb_put(skb, len - 2);
1110                 if (self->chip_id == 0x3076) {
1111                         for (i = 0; i < len - 2; i++)
1112                                 skb->data[i] = self->rx_buff.data[i * 2];
1113                 } else {
1114                         if (self->chip_id == 0x3096) {
1115                                 for (i = 0; i < len - 2; i++)
1116                                         skb->data[i] =
1117                                             self->rx_buff.data[i];
1118                         }
1119                 }
1120                 // Move to next frame 
1121                 self->rx_buff.data += len;
1122                 self->stats.rx_bytes += len;
1123                 self->stats.rx_packets++;
1124                 skb->dev = self->netdev;
1125                 skb_reset_mac_header(skb);
1126                 skb->protocol = htons(ETH_P_IRDA);
1127                 netif_rx(skb);
1128                 return TRUE;
1129         }
1130
1131         else {                  //FIR mode
1132                 len = GetRecvByte(iobase, self);
1133                 if (len == 0)
1134                         return TRUE;    //interrupt only, data maybe move by RxT  
1135                 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1136                         IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1137                                    __func__, len, RxCurCount(iobase, self),
1138                                    self->RxLastCount);
1139                         hwreset(self);
1140                         return FALSE;
1141                 }
1142                 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1143                            __func__,
1144                            st_fifo->len, len - 4, RxCurCount(iobase, self));
1145
1146                 st_fifo->entries[st_fifo->tail].status = status;
1147                 st_fifo->entries[st_fifo->tail].len = len;
1148                 st_fifo->pending_bytes += len;
1149                 st_fifo->tail++;
1150                 st_fifo->len++;
1151                 if (st_fifo->tail > MAX_RX_WINDOW)
1152                         st_fifo->tail = 0;
1153                 self->RxDataReady = 0;
1154
1155                 // It maybe have MAX_RX_WINDOW package receive by
1156                 // receive_complete before Timer IRQ
1157 /* F01_S
1158           if (st_fifo->len < (MAX_RX_WINDOW+2 )) { 
1159                   RXStart(iobase,ON);
1160                   SetTimer(iobase,4);
1161           }
1162           else    { 
1163 F01_E */
1164                 EnableRX(iobase, OFF);
1165                 EnRXDMA(iobase, OFF);
1166                 RXStart(iobase, OFF);
1167 //F01_S
1168                 // Put this entry back in fifo 
1169                 if (st_fifo->head > MAX_RX_WINDOW)
1170                         st_fifo->head = 0;
1171                 status = st_fifo->entries[st_fifo->head].status;
1172                 len = st_fifo->entries[st_fifo->head].len;
1173                 st_fifo->head++;
1174                 st_fifo->len--;
1175
1176                 skb = dev_alloc_skb(len + 1 - 4);
1177                 /*
1178                  * if frame size,data ptr,or skb ptr are wrong ,the get next
1179                  * entry.
1180                  */
1181                 if ((skb == NULL) || (skb->data == NULL)
1182                     || (self->rx_buff.data == NULL) || (len < 6)) {
1183                         self->stats.rx_dropped++;
1184                         return TRUE;
1185                 }
1186                 skb_reserve(skb, 1);
1187                 skb_put(skb, len - 4);
1188
1189                 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1190                 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __func__,
1191                            len - 4, self->rx_buff.data);
1192
1193                 // Move to next frame 
1194                 self->rx_buff.data += len;
1195                 self->stats.rx_bytes += len;
1196                 self->stats.rx_packets++;
1197                 skb->dev = self->netdev;
1198                 skb_reset_mac_header(skb);
1199                 skb->protocol = htons(ETH_P_IRDA);
1200                 netif_rx(skb);
1201
1202 //F01_E
1203         }                       //FIR
1204         return TRUE;
1205
1206 }
1207
1208 /*
1209  * if frame is received , but no INT ,then use this routine to upload frame.
1210  */
1211 static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1212 {
1213         struct sk_buff *skb;
1214         int len;
1215         struct st_fifo *st_fifo;
1216         st_fifo = &self->st_fifo;
1217
1218         len = GetRecvByte(iobase, self);
1219
1220         IRDA_DEBUG(2, "%s(): len=%x\n", __func__, len);
1221
1222         if ((len - 4) < 2) {
1223                 self->stats.rx_dropped++;
1224                 return FALSE;
1225         }
1226
1227         skb = dev_alloc_skb(len + 1);
1228         if (skb == NULL) {
1229                 self->stats.rx_dropped++;
1230                 return FALSE;
1231         }
1232         skb_reserve(skb, 1);
1233         skb_put(skb, len - 4 + 1);
1234         skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4 + 1);
1235         st_fifo->tail++;
1236         st_fifo->len++;
1237         if (st_fifo->tail > MAX_RX_WINDOW)
1238                 st_fifo->tail = 0;
1239         // Move to next frame 
1240         self->rx_buff.data += len;
1241         self->stats.rx_bytes += len;
1242         self->stats.rx_packets++;
1243         skb->dev = self->netdev;
1244         skb_reset_mac_header(skb);
1245         skb->protocol = htons(ETH_P_IRDA);
1246         netif_rx(skb);
1247         if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1248                 RXStart(iobase, ON);
1249         } else {
1250                 EnableRX(iobase, OFF);
1251                 EnRXDMA(iobase, OFF);
1252                 RXStart(iobase, OFF);
1253         }
1254         return TRUE;
1255 }
1256
1257 /*
1258  * Implement back to back receive , use this routine to upload data.
1259  */
1260
1261 static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1262 {
1263         struct st_fifo *st_fifo;
1264         struct sk_buff *skb;
1265         int len;
1266         u8 status;
1267
1268         st_fifo = &self->st_fifo;
1269
1270         if (CkRxRecv(iobase, self)) {
1271                 // if still receiving ,then return ,don't upload frame 
1272                 self->RetryCount = 0;
1273                 SetTimer(iobase, 20);
1274                 self->RxDataReady++;
1275                 return FALSE;
1276         } else
1277                 self->RetryCount++;
1278
1279         if ((self->RetryCount >= 1) ||
1280             ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize)
1281             || (st_fifo->len >= (MAX_RX_WINDOW))) {
1282                 while (st_fifo->len > 0) {      //upload frame
1283                         // Put this entry back in fifo 
1284                         if (st_fifo->head > MAX_RX_WINDOW)
1285                                 st_fifo->head = 0;
1286                         status = st_fifo->entries[st_fifo->head].status;
1287                         len = st_fifo->entries[st_fifo->head].len;
1288                         st_fifo->head++;
1289                         st_fifo->len--;
1290
1291                         skb = dev_alloc_skb(len + 1 - 4);
1292                         /*
1293                          * if frame size, data ptr, or skb ptr are wrong,
1294                          * then get next entry.
1295                          */
1296                         if ((skb == NULL) || (skb->data == NULL)
1297                             || (self->rx_buff.data == NULL) || (len < 6)) {
1298                                 self->stats.rx_dropped++;
1299                                 continue;
1300                         }
1301                         skb_reserve(skb, 1);
1302                         skb_put(skb, len - 4);
1303                         skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1304
1305                         IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __func__,
1306                                    len - 4, st_fifo->head);
1307
1308                         // Move to next frame 
1309                         self->rx_buff.data += len;
1310                         self->stats.rx_bytes += len;
1311                         self->stats.rx_packets++;
1312                         skb->dev = self->netdev;
1313                         skb_reset_mac_header(skb);
1314                         skb->protocol = htons(ETH_P_IRDA);
1315                         netif_rx(skb);
1316                 }               //while
1317                 self->RetryCount = 0;
1318
1319                 IRDA_DEBUG(2,
1320                            "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1321                            __func__,
1322                            GetHostStatus(iobase), GetRXStatus(iobase));
1323
1324                 /*
1325                  * if frame is receive complete at this routine ,then upload
1326                  * frame.
1327                  */
1328                 if ((GetRXStatus(iobase) & 0x10)
1329                     && (RxCurCount(iobase, self) != self->RxLastCount)) {
1330                         upload_rxdata(self, iobase);
1331                         if (irda_device_txqueue_empty(self->netdev))
1332                                 via_ircc_dma_receive(self);
1333                 }
1334         }                       // timer detect complete
1335         else
1336                 SetTimer(iobase, 4);
1337         return TRUE;
1338
1339 }
1340
1341
1342
1343 /*
1344  * Function via_ircc_interrupt (irq, dev_id)
1345  *
1346  *    An interrupt from the chip has arrived. Time to do some work
1347  *
1348  */
1349 static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id)
1350 {
1351         struct net_device *dev = dev_id;
1352         struct via_ircc_cb *self = dev->priv;
1353         int iobase;
1354         u8 iHostIntType, iRxIntType, iTxIntType;
1355
1356         iobase = self->io.fir_base;
1357         spin_lock(&self->lock);
1358         iHostIntType = GetHostStatus(iobase);
1359
1360         IRDA_DEBUG(4, "%s(): iHostIntType %02x:  %s %s %s  %02x\n",
1361                    __func__, iHostIntType,
1362                    (iHostIntType & 0x40) ? "Timer" : "",
1363                    (iHostIntType & 0x20) ? "Tx" : "",
1364                    (iHostIntType & 0x10) ? "Rx" : "",
1365                    (iHostIntType & 0x0e) >> 1);
1366
1367         if ((iHostIntType & 0x40) != 0) {       //Timer Event
1368                 self->EventFlag.TimeOut++;
1369                 ClearTimerInt(iobase, 1);
1370                 if (self->io.direction == IO_XMIT) {
1371                         via_ircc_dma_xmit(self, iobase);
1372                 }
1373                 if (self->io.direction == IO_RECV) {
1374                         /*
1375                          * frame ready hold too long, must reset.
1376                          */
1377                         if (self->RxDataReady > 30) {
1378                                 hwreset(self);
1379                                 if (irda_device_txqueue_empty(self->netdev)) {
1380                                         via_ircc_dma_receive(self);
1381                                 }
1382                         } else {        // call this to upload frame.
1383                                 RxTimerHandler(self, iobase);
1384                         }
1385                 }               //RECV
1386         }                       //Timer Event
1387         if ((iHostIntType & 0x20) != 0) {       //Tx Event
1388                 iTxIntType = GetTXStatus(iobase);
1389
1390                 IRDA_DEBUG(4, "%s(): iTxIntType %02x:  %s %s %s %s\n",
1391                            __func__, iTxIntType,
1392                            (iTxIntType & 0x08) ? "FIFO underr." : "",
1393                            (iTxIntType & 0x04) ? "EOM" : "",
1394                            (iTxIntType & 0x02) ? "FIFO ready" : "",
1395                            (iTxIntType & 0x01) ? "Early EOM" : "");
1396
1397                 if (iTxIntType & 0x4) {
1398                         self->EventFlag.EOMessage++;    // read and will auto clean
1399                         if (via_ircc_dma_xmit_complete(self)) {
1400                                 if (irda_device_txqueue_empty
1401                                     (self->netdev)) {
1402                                         via_ircc_dma_receive(self);
1403                                 }
1404                         } else {
1405                                 self->EventFlag.Unknown++;
1406                         }
1407                 }               //EOP
1408         }                       //Tx Event
1409         //----------------------------------------
1410         if ((iHostIntType & 0x10) != 0) {       //Rx Event
1411                 /* Check if DMA has finished */
1412                 iRxIntType = GetRXStatus(iobase);
1413
1414                 IRDA_DEBUG(4, "%s(): iRxIntType %02x:  %s %s %s %s %s %s %s\n",
1415                            __func__, iRxIntType,
1416                            (iRxIntType & 0x80) ? "PHY err."     : "",
1417                            (iRxIntType & 0x40) ? "CRC err"      : "",
1418                            (iRxIntType & 0x20) ? "FIFO overr."  : "",
1419                            (iRxIntType & 0x10) ? "EOF"          : "",
1420                            (iRxIntType & 0x08) ? "RxData"       : "",
1421                            (iRxIntType & 0x02) ? "RxMaxLen"     : "",
1422                            (iRxIntType & 0x01) ? "SIR bad"      : "");
1423                 if (!iRxIntType)
1424                         IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __func__);
1425
1426                 if (iRxIntType & 0x10) {
1427                         if (via_ircc_dma_receive_complete(self, iobase)) {
1428 //F01       if(!(IsFIROn(iobase)))  via_ircc_dma_receive(self);
1429                                 via_ircc_dma_receive(self);
1430                         }
1431                 }               // No ERR     
1432                 else {          //ERR
1433                         IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1434                                    __func__, iRxIntType, iHostIntType,
1435                                    RxCurCount(iobase, self),
1436                                    self->RxLastCount);
1437
1438                         if (iRxIntType & 0x20) {        //FIFO OverRun ERR
1439                                 ResetChip(iobase, 0);
1440                                 ResetChip(iobase, 1);
1441                         } else {        //PHY,CRC ERR
1442
1443                                 if (iRxIntType != 0x08)
1444                                         hwreset(self);  //F01
1445                         }
1446                         via_ircc_dma_receive(self);
1447                 }               //ERR
1448
1449         }                       //Rx Event
1450         spin_unlock(&self->lock);
1451         return IRQ_RETVAL(iHostIntType);
1452 }
1453
1454 static void hwreset(struct via_ircc_cb *self)
1455 {
1456         int iobase;
1457         iobase = self->io.fir_base;
1458
1459         IRDA_DEBUG(3, "%s()\n", __func__);
1460
1461         ResetChip(iobase, 5);
1462         EnableDMA(iobase, OFF);
1463         EnableTX(iobase, OFF);
1464         EnableRX(iobase, OFF);
1465         EnRXDMA(iobase, OFF);
1466         EnTXDMA(iobase, OFF);
1467         RXStart(iobase, OFF);
1468         TXStart(iobase, OFF);
1469         InitCard(iobase);
1470         CommonInit(iobase);
1471         SIRFilter(iobase, ON);
1472         SetSIR(iobase, ON);
1473         CRC16(iobase, ON);
1474         EnTXCRC(iobase, 0);
1475         WriteReg(iobase, I_ST_CT_0, 0x00);
1476         SetBaudRate(iobase, 9600);
1477         SetPulseWidth(iobase, 12);
1478         SetSendPreambleCount(iobase, 0);
1479         WriteReg(iobase, I_ST_CT_0, 0x80);
1480
1481         /* Restore speed. */
1482         via_ircc_change_speed(self, self->io.speed);
1483
1484         self->st_fifo.len = 0;
1485 }
1486
1487 /*
1488  * Function via_ircc_is_receiving (self)
1489  *
1490  *    Return TRUE is we are currently receiving a frame
1491  *
1492  */
1493 static int via_ircc_is_receiving(struct via_ircc_cb *self)
1494 {
1495         int status = FALSE;
1496         int iobase;
1497
1498         IRDA_ASSERT(self != NULL, return FALSE;);
1499
1500         iobase = self->io.fir_base;
1501         if (CkRxRecv(iobase, self))
1502                 status = TRUE;
1503
1504         IRDA_DEBUG(2, "%s(): status=%x....\n", __func__, status);
1505
1506         return status;
1507 }
1508
1509
1510 /*
1511  * Function via_ircc_net_open (dev)
1512  *
1513  *    Start the device
1514  *
1515  */
1516 static int via_ircc_net_open(struct net_device *dev)
1517 {
1518         struct via_ircc_cb *self;
1519         int iobase;
1520         char hwname[32];
1521
1522         IRDA_DEBUG(3, "%s()\n", __func__);
1523
1524         IRDA_ASSERT(dev != NULL, return -1;);
1525         self = (struct via_ircc_cb *) dev->priv;
1526         self->stats.rx_packets = 0;
1527         IRDA_ASSERT(self != NULL, return 0;);
1528         iobase = self->io.fir_base;
1529         if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1530                 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
1531                              self->io.irq);
1532                 return -EAGAIN;
1533         }
1534         /*
1535          * Always allocate the DMA channel after the IRQ, and clean up on 
1536          * failure.
1537          */
1538         if (request_dma(self->io.dma, dev->name)) {
1539                 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
1540                              self->io.dma);
1541                 free_irq(self->io.irq, self);
1542                 return -EAGAIN;
1543         }
1544         if (self->io.dma2 != self->io.dma) {
1545                 if (request_dma(self->io.dma2, dev->name)) {
1546                         IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1547                                      driver_name, self->io.dma2);
1548                         free_irq(self->io.irq, self);
1549                         free_dma(self->io.dma);
1550                         return -EAGAIN;
1551                 }
1552         }
1553
1554
1555         /* turn on interrupts */
1556         EnAllInt(iobase, ON);
1557         EnInternalLoop(iobase, OFF);
1558         EnExternalLoop(iobase, OFF);
1559
1560         /* */
1561         via_ircc_dma_receive(self);
1562
1563         /* Ready to play! */
1564         netif_start_queue(dev);
1565
1566         /* 
1567          * Open new IrLAP layer instance, now that everything should be
1568          * initialized properly 
1569          */
1570         sprintf(hwname, "VIA @ 0x%x", iobase);
1571         self->irlap = irlap_open(dev, &self->qos, hwname);
1572
1573         self->RxLastCount = 0;
1574
1575         return 0;
1576 }
1577
1578 /*
1579  * Function via_ircc_net_close (dev)
1580  *
1581  *    Stop the device
1582  *
1583  */
1584 static int via_ircc_net_close(struct net_device *dev)
1585 {
1586         struct via_ircc_cb *self;
1587         int iobase;
1588
1589         IRDA_DEBUG(3, "%s()\n", __func__);
1590
1591         IRDA_ASSERT(dev != NULL, return -1;);
1592         self = (struct via_ircc_cb *) dev->priv;
1593         IRDA_ASSERT(self != NULL, return 0;);
1594
1595         /* Stop device */
1596         netif_stop_queue(dev);
1597         /* Stop and remove instance of IrLAP */
1598         if (self->irlap)
1599                 irlap_close(self->irlap);
1600         self->irlap = NULL;
1601         iobase = self->io.fir_base;
1602         EnTXDMA(iobase, OFF);
1603         EnRXDMA(iobase, OFF);
1604         DisableDmaChannel(self->io.dma);
1605
1606         /* Disable interrupts */
1607         EnAllInt(iobase, OFF);
1608         free_irq(self->io.irq, dev);
1609         free_dma(self->io.dma);
1610         if (self->io.dma2 != self->io.dma)
1611                 free_dma(self->io.dma2);
1612
1613         return 0;
1614 }
1615
1616 /*
1617  * Function via_ircc_net_ioctl (dev, rq, cmd)
1618  *
1619  *    Process IOCTL commands for this device
1620  *
1621  */
1622 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1623                               int cmd)
1624 {
1625         struct if_irda_req *irq = (struct if_irda_req *) rq;
1626         struct via_ircc_cb *self;
1627         unsigned long flags;
1628         int ret = 0;
1629
1630         IRDA_ASSERT(dev != NULL, return -1;);
1631         self = dev->priv;
1632         IRDA_ASSERT(self != NULL, return -1;);
1633         IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name,
1634                    cmd);
1635         /* Disable interrupts & save flags */
1636         spin_lock_irqsave(&self->lock, flags);
1637         switch (cmd) {
1638         case SIOCSBANDWIDTH:    /* Set bandwidth */
1639                 if (!capable(CAP_NET_ADMIN)) {
1640                         ret = -EPERM;
1641                         goto out;
1642                 }
1643                 via_ircc_change_speed(self, irq->ifr_baudrate);
1644                 break;
1645         case SIOCSMEDIABUSY:    /* Set media busy */
1646                 if (!capable(CAP_NET_ADMIN)) {
1647                         ret = -EPERM;
1648                         goto out;
1649                 }
1650                 irda_device_set_media_busy(self->netdev, TRUE);
1651                 break;
1652         case SIOCGRECEIVING:    /* Check if we are receiving right now */
1653                 irq->ifr_receiving = via_ircc_is_receiving(self);
1654                 break;
1655         default:
1656                 ret = -EOPNOTSUPP;
1657         }
1658       out:
1659         spin_unlock_irqrestore(&self->lock, flags);
1660         return ret;
1661 }
1662
1663 static struct net_device_stats *via_ircc_net_get_stats(struct net_device
1664                                                        *dev)
1665 {
1666         struct via_ircc_cb *self = (struct via_ircc_cb *) dev->priv;
1667
1668         return &self->stats;
1669 }
1670
1671 MODULE_AUTHOR("VIA Technologies,inc");
1672 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1673 MODULE_LICENSE("GPL");
1674
1675 module_init(via_ircc_init);
1676 module_exit(via_ircc_cleanup);