1 /*********************************************************************
2 * $Id: smsc-ircc2.c,v 1.19.2.5 2002/10/27 11:34:26 dip Exp $
4 * Description: Driver for the SMC Infrared Communications Controller
5 * Status: Experimental.
6 * Author: Daniele Peri (peri@csai.unipa.it)
11 * Copyright (c) 2002 Daniele Peri
12 * All Rights Reserved.
13 * Copyright (c) 2002 Jean Tourrilhes
16 * Based on smc-ircc.c:
18 * Copyright (c) 2001 Stefani Seibold
19 * Copyright (c) 1999-2001 Dag Brattli
20 * Copyright (c) 1998-1999 Thomas Davis,
24 * Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
27 * This program is free software; you can redistribute it and/or
28 * modify it under the terms of the GNU General Public License as
29 * published by the Free Software Foundation; either version 2 of
30 * the License, or (at your option) any later version.
32 * This program is distributed in the hope that it will be useful,
33 * but WITHOUT ANY WARRANTY; without even the implied warranty of
34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35 * GNU General Public License for more details.
37 * You should have received a copy of the GNU General Public License
38 * along with this program; if not, write to the Free Software
39 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
42 ********************************************************************/
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/types.h>
47 #include <linux/skbuff.h>
48 #include <linux/netdevice.h>
49 #include <linux/ioport.h>
50 #include <linux/delay.h>
51 #include <linux/slab.h>
52 #include <linux/init.h>
53 #include <linux/rtnetlink.h>
54 #include <linux/serial_reg.h>
55 #include <linux/dma-mapping.h>
59 #include <asm/byteorder.h>
61 #include <linux/spinlock.h>
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
68 #include "smsc-ircc2.h"
72 MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
73 MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
74 MODULE_LICENSE("GPL");
77 static int ircc_dma = 255;
78 module_param(ircc_dma, int, 0);
79 MODULE_PARM_DESC(ircc_dma, "DMA channel");
81 static int ircc_irq = 255;
82 module_param(ircc_irq, int, 0);
83 MODULE_PARM_DESC(ircc_irq, "IRQ line");
86 module_param(ircc_fir, int, 0);
87 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
90 module_param(ircc_sir, int, 0);
91 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
94 module_param(ircc_cfg, int, 0);
95 MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
97 static int ircc_transceiver;
98 module_param(ircc_transceiver, int, 0);
99 MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
103 struct smsc_transceiver {
105 void (*set_for_speed)(int fir_base, u32 speed);
106 int (*probe)(int fir_base);
108 typedef struct smsc_transceiver smsc_transceiver_t;
117 typedef struct smc_chip smc_chip_t;
129 typedef struct smsc_chip smsc_chip_t;
131 struct smsc_chip_address {
132 unsigned int cfg_base;
135 typedef struct smsc_chip_address smsc_chip_address_t;
137 /* Private data for each instance */
138 struct smsc_ircc_cb {
139 struct net_device *netdev; /* Yes! we are some kind of netdevice */
140 struct net_device_stats stats;
141 struct irlap_cb *irlap; /* The link layer we are binded to */
143 chipio_t io; /* IrDA controller information */
144 iobuff_t tx_buff; /* Transmit buffer */
145 iobuff_t rx_buff; /* Receive buffer */
146 dma_addr_t tx_buff_dma;
147 dma_addr_t rx_buff_dma;
149 struct qos_info qos; /* QoS capabilities for this device */
151 spinlock_t lock; /* For serializing operations */
154 __u32 flags; /* Interface flags */
156 int tx_buff_offsets[10]; /* Offsets between frames in tx_buff */
157 int tx_len; /* Number of frames in tx_buff */
160 struct pm_dev *pmdev;
165 static const char *driver_name = "smsc-ircc2";
166 #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED 9600
167 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER 1
168 #define SMSC_IRCC2_C_NET_TIMEOUT 0
169 #define SMSC_IRCC2_C_SIR_STOP 0
173 static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
174 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
175 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
176 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
177 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
178 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
179 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase);
180 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase);
181 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
182 static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
183 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
184 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs);
185 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase);
186 static void smsc_ircc_change_speed(void *priv, u32 speed);
187 static void smsc_ircc_set_sir_speed(void *priv, u32 speed);
188 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
189 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
190 static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
191 #if SMSC_IRCC2_C_SIR_STOP
192 static void smsc_ircc_sir_stop(struct smsc_ircc_cb *self);
194 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self);
195 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
196 static int smsc_ircc_net_open(struct net_device *dev);
197 static int smsc_ircc_net_close(struct net_device *dev);
198 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
199 #if SMSC_IRCC2_C_NET_TIMEOUT
200 static void smsc_ircc_timeout(struct net_device *dev);
202 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
203 static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
204 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
205 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
206 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
207 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
210 static int __init smsc_ircc_look_for_chips(void);
211 static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const smsc_chip_t *chip, char *type);
212 static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg_base, char *type);
213 static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cfg_base, char *type);
214 static int __init smsc_superio_fdc(unsigned short cfg_base);
215 static int __init smsc_superio_lpc(unsigned short cfg_base);
217 /* Transceivers specific functions */
219 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
220 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
221 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
222 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
223 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
224 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
226 /* Power Management */
228 static void smsc_ircc_suspend(struct smsc_ircc_cb *self);
229 static void smsc_ircc_wakeup(struct smsc_ircc_cb *self);
230 static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
233 /* Transceivers for SMSC-ircc */
235 static smsc_transceiver_t smsc_transceivers[] =
237 { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
238 { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
239 { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
242 #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
244 /* SMC SuperIO chipsets definitions */
246 #define KEY55_1 0 /* SuperIO Configuration mode with Key <0x55> */
247 #define KEY55_2 1 /* SuperIO Configuration mode with Key <0x55,0x55> */
248 #define NoIRDA 2 /* SuperIO Chip has no IRDA Port */
249 #define SIR 0 /* SuperIO Chip has only slow IRDA */
250 #define FIR 4 /* SuperIO Chip has fast IRDA */
251 #define SERx4 8 /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
253 static smsc_chip_t __initdata fdc_chips_flat[] =
255 /* Base address 0x3f0 or 0x370 */
256 { "37C44", KEY55_1|NoIRDA, 0x00, 0x00 }, /* This chip cannot be detected */
257 { "37C665GT", KEY55_2|NoIRDA, 0x65, 0x01 },
258 { "37C665GT", KEY55_2|NoIRDA, 0x66, 0x01 },
259 { "37C669", KEY55_2|SIR|SERx4, 0x03, 0x02 },
260 { "37C669", KEY55_2|SIR|SERx4, 0x04, 0x02 }, /* ID? */
261 { "37C78", KEY55_2|NoIRDA, 0x78, 0x00 },
262 { "37N769", KEY55_1|FIR|SERx4, 0x28, 0x00 },
263 { "37N869", KEY55_1|FIR|SERx4, 0x29, 0x00 },
267 static smsc_chip_t __initdata fdc_chips_paged[] =
269 /* Base address 0x3f0 or 0x370 */
270 { "37B72X", KEY55_1|SIR|SERx4, 0x4c, 0x00 },
271 { "37B77X", KEY55_1|SIR|SERx4, 0x43, 0x00 },
272 { "37B78X", KEY55_1|SIR|SERx4, 0x44, 0x00 },
273 { "37B80X", KEY55_1|SIR|SERx4, 0x42, 0x00 },
274 { "37C67X", KEY55_1|FIR|SERx4, 0x40, 0x00 },
275 { "37C93X", KEY55_2|SIR|SERx4, 0x02, 0x01 },
276 { "37C93XAPM", KEY55_1|SIR|SERx4, 0x30, 0x01 },
277 { "37C93XFR", KEY55_2|FIR|SERx4, 0x03, 0x01 },
278 { "37M707", KEY55_1|SIR|SERx4, 0x42, 0x00 },
279 { "37M81X", KEY55_1|SIR|SERx4, 0x4d, 0x00 },
280 { "37N958FR", KEY55_1|FIR|SERx4, 0x09, 0x04 },
281 { "37N971", KEY55_1|FIR|SERx4, 0x0a, 0x00 },
282 { "37N972", KEY55_1|FIR|SERx4, 0x0b, 0x00 },
286 static smsc_chip_t __initdata lpc_chips_flat[] =
288 /* Base address 0x2E or 0x4E */
289 { "47N227", KEY55_1|FIR|SERx4, 0x5a, 0x00 },
290 { "47N267", KEY55_1|FIR|SERx4, 0x5e, 0x00 },
294 static smsc_chip_t __initdata lpc_chips_paged[] =
296 /* Base address 0x2E or 0x4E */
297 { "47B27X", KEY55_1|SIR|SERx4, 0x51, 0x00 },
298 { "47B37X", KEY55_1|SIR|SERx4, 0x52, 0x00 },
299 { "47M10X", KEY55_1|SIR|SERx4, 0x59, 0x00 },
300 { "47M120", KEY55_1|NoIRDA|SERx4, 0x5c, 0x00 },
301 { "47M13X", KEY55_1|SIR|SERx4, 0x59, 0x00 },
302 { "47M14X", KEY55_1|SIR|SERx4, 0x5f, 0x00 },
303 { "47N252", KEY55_1|FIR|SERx4, 0x0e, 0x00 },
304 { "47S42X", KEY55_1|SIR|SERx4, 0x57, 0x00 },
308 #define SMSCSIO_TYPE_FDC 1
309 #define SMSCSIO_TYPE_LPC 2
310 #define SMSCSIO_TYPE_FLAT 4
311 #define SMSCSIO_TYPE_PAGED 8
313 static smsc_chip_address_t __initdata possible_addresses[] =
315 { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
316 { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
317 { 0xe0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
318 { 0x2e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
319 { 0x4e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
325 static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
326 static unsigned short dev_count;
328 static inline void register_bank(int iobase, int bank)
330 outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
331 iobase + IRCC_MASTER);
335 /*******************************************************************************
341 *******************************************************************************/
344 * Function smsc_ircc_init ()
346 * Initialize chip. Just try to find out how many chips we are dealing with
349 static int __init smsc_ircc_init(void)
353 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
357 if (ircc_fir > 0 && ircc_sir > 0) {
358 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
359 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
361 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq) == 0)
367 /* try user provided configuration register base address */
369 IRDA_MESSAGE(" Overriding configuration address 0x%04x\n",
371 if (!smsc_superio_fdc(ircc_cfg))
373 if (!smsc_superio_lpc(ircc_cfg))
377 if (smsc_ircc_look_for_chips() > 0)
384 * Function smsc_ircc_open (firbase, sirbase, dma, irq)
386 * Try to open driver instance
389 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
391 struct smsc_ircc_cb *self;
392 struct net_device *dev;
395 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
397 err = smsc_ircc_present(fir_base, sir_base);
402 if (dev_count >= ARRAY_SIZE(dev_self)) {
403 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
408 * Allocate new instance of the driver
410 dev = alloc_irdadev(sizeof(struct smsc_ircc_cb));
412 IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__);
416 SET_MODULE_OWNER(dev);
418 dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
419 #if SMSC_IRCC2_C_NET_TIMEOUT
420 dev->tx_timeout = smsc_ircc_timeout;
421 dev->watchdog_timeo = HZ * 2; /* Allow enough time for speed change */
423 dev->open = smsc_ircc_net_open;
424 dev->stop = smsc_ircc_net_close;
425 dev->do_ioctl = smsc_ircc_net_ioctl;
426 dev->get_stats = smsc_ircc_net_get_stats;
431 /* Make ifconfig display some details */
432 dev->base_addr = self->io.fir_base = fir_base;
433 dev->irq = self->io.irq = irq;
435 /* Need to store self somewhere */
436 dev_self[dev_count++] = self;
437 spin_lock_init(&self->lock);
439 self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
440 self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
443 dma_alloc_coherent(NULL, self->rx_buff.truesize,
444 &self->rx_buff_dma, GFP_KERNEL);
445 if (self->rx_buff.head == NULL) {
446 IRDA_ERROR("%s, Can't allocate memory for receive buffer!\n",
452 dma_alloc_coherent(NULL, self->tx_buff.truesize,
453 &self->tx_buff_dma, GFP_KERNEL);
454 if (self->tx_buff.head == NULL) {
455 IRDA_ERROR("%s, Can't allocate memory for transmit buffer!\n",
460 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
461 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
463 self->rx_buff.in_frame = FALSE;
464 self->rx_buff.state = OUTSIDE_FRAME;
465 self->tx_buff.data = self->tx_buff.head;
466 self->rx_buff.data = self->rx_buff.head;
468 smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
469 smsc_ircc_setup_qos(self);
470 smsc_ircc_init_chip(self);
472 if (ircc_transceiver > 0 &&
473 ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
474 self->transceiver = ircc_transceiver;
476 smsc_ircc_probe_transceiver(self);
478 err = register_netdev(self->netdev);
480 IRDA_ERROR("%s, Network device registration failed!\n",
485 self->pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, smsc_ircc_pmproc);
487 self->pmdev->data = self;
489 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
494 dma_free_coherent(NULL, self->tx_buff.truesize,
495 self->tx_buff.head, self->tx_buff_dma);
497 dma_free_coherent(NULL, self->rx_buff.truesize,
498 self->rx_buff.head, self->rx_buff_dma);
500 free_netdev(self->netdev);
501 dev_self[--dev_count] = NULL;
503 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
504 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
510 * Function smsc_ircc_present(fir_base, sir_base)
512 * Check the smsc-ircc chip presence
515 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
517 unsigned char low, high, chip, config, dma, irq, version;
519 if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
521 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
522 __FUNCTION__, fir_base);
526 if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT,
528 IRDA_WARNING("%s: can't get sir_base of 0x%03x\n",
529 __FUNCTION__, sir_base);
533 register_bank(fir_base, 3);
535 high = inb(fir_base + IRCC_ID_HIGH);
536 low = inb(fir_base + IRCC_ID_LOW);
537 chip = inb(fir_base + IRCC_CHIP_ID);
538 version = inb(fir_base + IRCC_VERSION);
539 config = inb(fir_base + IRCC_INTERFACE);
540 dma = config & IRCC_INTERFACE_DMA_MASK;
541 irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
543 if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
544 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
545 __FUNCTION__, fir_base);
548 IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, "
549 "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
550 chip & 0x0f, version, fir_base, sir_base, dma, irq);
555 release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
557 release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
563 * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
568 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
569 unsigned int fir_base, unsigned int sir_base,
572 unsigned char config, chip_dma, chip_irq;
574 register_bank(fir_base, 3);
575 config = inb(fir_base + IRCC_INTERFACE);
576 chip_dma = config & IRCC_INTERFACE_DMA_MASK;
577 chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
579 self->io.fir_base = fir_base;
580 self->io.sir_base = sir_base;
581 self->io.fir_ext = SMSC_IRCC2_FIR_CHIP_IO_EXTENT;
582 self->io.sir_ext = SMSC_IRCC2_SIR_CHIP_IO_EXTENT;
583 self->io.fifo_size = SMSC_IRCC2_FIFO_SIZE;
584 self->io.speed = SMSC_IRCC2_C_IRDA_FALLBACK_SPEED;
588 IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
589 driver_name, chip_irq, irq);
592 self->io.irq = chip_irq;
596 IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
597 driver_name, chip_dma, dma);
600 self->io.dma = chip_dma;
605 * Function smsc_ircc_setup_qos(self)
610 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
612 /* Initialize QoS for this device */
613 irda_init_max_qos_capabilies(&self->qos);
615 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
616 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
618 self->qos.min_turn_time.bits = SMSC_IRCC2_MIN_TURN_TIME;
619 self->qos.window_size.bits = SMSC_IRCC2_WINDOW_SIZE;
620 irda_qos_bits_to_value(&self->qos);
624 * Function smsc_ircc_init_chip(self)
629 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
631 int iobase, ir_mode, ctrl, fast;
633 IRDA_ASSERT(self != NULL, return;);
635 iobase = self->io.fir_base;
636 ir_mode = IRCC_CFGA_IRDA_SIR_A;
640 register_bank(iobase, 0);
641 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
642 outb(0x00, iobase + IRCC_MASTER);
644 register_bank(iobase, 1);
645 outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | ir_mode),
646 iobase + IRCC_SCE_CFGA);
648 #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
649 outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
650 iobase + IRCC_SCE_CFGB);
652 outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
653 iobase + IRCC_SCE_CFGB);
655 (void) inb(iobase + IRCC_FIFO_THRESHOLD);
656 outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
658 register_bank(iobase, 4);
659 outb((inb(iobase + IRCC_CONTROL) & 0x30) | ctrl, iobase + IRCC_CONTROL);
661 register_bank(iobase, 0);
662 outb(fast, iobase + IRCC_LCR_A);
664 smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
666 /* Power on device */
667 outb(0x00, iobase + IRCC_MASTER);
671 * Function smsc_ircc_net_ioctl (dev, rq, cmd)
673 * Process IOCTL commands for this device
676 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
678 struct if_irda_req *irq = (struct if_irda_req *) rq;
679 struct smsc_ircc_cb *self;
683 IRDA_ASSERT(dev != NULL, return -1;);
687 IRDA_ASSERT(self != NULL, return -1;);
689 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
692 case SIOCSBANDWIDTH: /* Set bandwidth */
693 if (!capable(CAP_NET_ADMIN))
696 /* Make sure we are the only one touching
697 * self->io.speed and the hardware - Jean II */
698 spin_lock_irqsave(&self->lock, flags);
699 smsc_ircc_change_speed(self, irq->ifr_baudrate);
700 spin_unlock_irqrestore(&self->lock, flags);
703 case SIOCSMEDIABUSY: /* Set media busy */
704 if (!capable(CAP_NET_ADMIN)) {
709 irda_device_set_media_busy(self->netdev, TRUE);
711 case SIOCGRECEIVING: /* Check if we are receiving right now */
712 irq->ifr_receiving = smsc_ircc_is_receiving(self);
716 if (!capable(CAP_NET_ADMIN)) {
720 smsc_ircc_sir_set_dtr_rts(dev, irq->ifr_dtr, irq->ifr_rts);
730 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
732 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) dev->priv;
737 #if SMSC_IRCC2_C_NET_TIMEOUT
739 * Function smsc_ircc_timeout (struct net_device *dev)
741 * The networking timeout management.
745 static void smsc_ircc_timeout(struct net_device *dev)
747 struct smsc_ircc_cb *self;
750 self = (struct smsc_ircc_cb *) dev->priv;
752 IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
753 dev->name, self->io.speed);
754 spin_lock_irqsave(&self->lock, flags);
755 smsc_ircc_sir_start(self);
756 smsc_ircc_change_speed(self, self->io.speed);
757 dev->trans_start = jiffies;
758 netif_wake_queue(dev);
759 spin_unlock_irqrestore(&self->lock, flags);
764 * Function smsc_ircc_hard_xmit_sir (struct sk_buff *skb, struct net_device *dev)
766 * Transmits the current frame until FIFO is full, then
767 * waits until the next transmit interrupt, and continues until the
768 * frame is transmitted.
770 int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
772 struct smsc_ircc_cb *self;
777 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
779 IRDA_ASSERT(dev != NULL, return 0;);
781 self = (struct smsc_ircc_cb *) dev->priv;
782 IRDA_ASSERT(self != NULL, return 0;);
784 iobase = self->io.sir_base;
786 netif_stop_queue(dev);
788 /* Make sure test of self->io.speed & speed change are atomic */
789 spin_lock_irqsave(&self->lock, flags);
791 /* Check if we need to change the speed */
792 speed = irda_get_next_speed(skb);
793 if (speed != self->io.speed && speed != -1) {
794 /* Check for empty frame */
797 * We send frames one by one in SIR mode (no
798 * pipelining), so at this point, if we were sending
799 * a previous frame, we just received the interrupt
800 * telling us it is finished (UART_IIR_THRI).
801 * Therefore, waiting for the transmitter to really
802 * finish draining the fifo won't take too long.
803 * And the interrupt handler is not expected to run.
805 smsc_ircc_sir_wait_hw_transmitter_finish(self);
806 smsc_ircc_change_speed(self, speed);
807 spin_unlock_irqrestore(&self->lock, flags);
811 self->new_speed = speed;
815 self->tx_buff.data = self->tx_buff.head;
817 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
818 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
819 self->tx_buff.truesize);
821 self->stats.tx_bytes += self->tx_buff.len;
823 /* Turn on transmit finished interrupt. Will fire immediately! */
824 outb(UART_IER_THRI, iobase + UART_IER);
826 spin_unlock_irqrestore(&self->lock, flags);
834 * Function smsc_ircc_set_fir_speed (self, baud)
836 * Change the speed of the device
839 static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
841 int fir_base, ir_mode, ctrl, fast;
843 IRDA_ASSERT(self != NULL, return;);
844 fir_base = self->io.fir_base;
846 self->io.speed = speed;
851 ir_mode = IRCC_CFGA_IRDA_HDLC;
854 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
857 ir_mode = IRCC_CFGA_IRDA_HDLC;
858 ctrl = IRCC_1152 | IRCC_CRC;
859 fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA;
860 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n",
864 ir_mode = IRCC_CFGA_IRDA_4PPM;
866 fast = IRCC_LCR_A_FAST;
867 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n",
873 /* This causes an interrupt */
874 register_bank(fir_base, 0);
875 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast, fir_base + IRCC_LCR_A);
878 register_bank(fir_base, 1);
879 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
881 register_bank(fir_base, 4);
882 outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
886 * Function smsc_ircc_fir_start(self)
888 * Change the speed of the device
891 static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
893 struct net_device *dev;
896 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
898 IRDA_ASSERT(self != NULL, return;);
900 IRDA_ASSERT(dev != NULL, return;);
902 fir_base = self->io.fir_base;
904 /* Reset everything */
906 /* Install FIR transmit handler */
907 dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
910 outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
912 /* Enable interrupt */
913 /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
915 register_bank(fir_base, 1);
917 /* Select the TX/RX interface */
918 #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
919 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
920 fir_base + IRCC_SCE_CFGB);
922 outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
923 fir_base + IRCC_SCE_CFGB);
925 (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
927 /* Enable SCE interrupts */
928 outb(0, fir_base + IRCC_MASTER);
929 register_bank(fir_base, 0);
930 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
931 outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
935 * Function smsc_ircc_fir_stop(self, baud)
937 * Change the speed of the device
940 static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
944 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
946 IRDA_ASSERT(self != NULL, return;);
948 fir_base = self->io.fir_base;
949 register_bank(fir_base, 0);
950 /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
951 outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
956 * Function smsc_ircc_change_speed(self, baud)
958 * Change the speed of the device
960 * This function *must* be called with spinlock held, because it may
961 * be called from the irq handler. - Jean II
963 static void smsc_ircc_change_speed(void *priv, u32 speed)
965 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
966 struct net_device *dev;
968 int last_speed_was_sir;
970 IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
972 IRDA_ASSERT(self != NULL, return;);
974 iobase = self->io.fir_base;
976 last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
981 self->io.speed = speed;
982 last_speed_was_sir = 0;
983 smsc_ircc_fir_start(self);
986 if (self->io.speed == 0)
987 smsc_ircc_sir_start(self);
990 if (!last_speed_was_sir) speed = self->io.speed;
993 if (self->io.speed != speed)
994 smsc_ircc_set_transceiver_for_speed(self, speed);
996 self->io.speed = speed;
998 if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
999 if (!last_speed_was_sir) {
1000 smsc_ircc_fir_stop(self);
1001 smsc_ircc_sir_start(self);
1003 smsc_ircc_set_sir_speed(self, speed);
1005 if (last_speed_was_sir) {
1006 #if SMSC_IRCC2_C_SIR_STOP
1007 smsc_ircc_sir_stop(self);
1009 smsc_ircc_fir_start(self);
1011 smsc_ircc_set_fir_speed(self, speed);
1014 self->tx_buff.len = 10;
1015 self->tx_buff.data = self->tx_buff.head;
1017 smsc_ircc_dma_xmit(self, iobase, 4000);
1019 /* Be ready for incoming frames */
1020 smsc_ircc_dma_receive(self, iobase);
1023 netif_wake_queue(dev);
1027 * Function smsc_ircc_set_sir_speed (self, speed)
1029 * Set speed of IrDA port to specified baudrate
1032 void smsc_ircc_set_sir_speed(void *priv, __u32 speed)
1034 struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
1036 int fcr; /* FIFO control reg */
1037 int lcr; /* Line control reg */
1040 IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed);
1042 IRDA_ASSERT(self != NULL, return;);
1043 iobase = self->io.sir_base;
1045 /* Update accounting for new speed */
1046 self->io.speed = speed;
1048 /* Turn off interrupts */
1049 outb(0, iobase + UART_IER);
1051 divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1053 fcr = UART_FCR_ENABLE_FIFO;
1056 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1057 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1058 * about this timeout since it will always be fast enough.
1060 fcr |= self->io.speed < 38400 ?
1061 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1063 /* IrDA ports use 8N1 */
1064 lcr = UART_LCR_WLEN8;
1066 outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1067 outb(divisor & 0xff, iobase + UART_DLL); /* Set speed */
1068 outb(divisor >> 8, iobase + UART_DLM);
1069 outb(lcr, iobase + UART_LCR); /* Set 8N1 */
1070 outb(fcr, iobase + UART_FCR); /* Enable FIFO's */
1072 /* Turn on interrups */
1073 outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1075 IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1080 * Function smsc_ircc_hard_xmit_fir (skb, dev)
1082 * Transmit the frame!
1085 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1087 struct smsc_ircc_cb *self;
1088 unsigned long flags;
1093 IRDA_ASSERT(dev != NULL, return 0;);
1094 self = (struct smsc_ircc_cb *) dev->priv;
1095 IRDA_ASSERT(self != NULL, return 0;);
1097 iobase = self->io.fir_base;
1099 netif_stop_queue(dev);
1101 /* Make sure test of self->io.speed & speed change are atomic */
1102 spin_lock_irqsave(&self->lock, flags);
1104 /* Check if we need to change the speed after this frame */
1105 speed = irda_get_next_speed(skb);
1106 if (speed != self->io.speed && speed != -1) {
1107 /* Check for empty frame */
1109 /* Note : you should make sure that speed changes
1110 * are not going to corrupt any outgoing frame.
1111 * Look at nsc-ircc for the gory details - Jean II */
1112 smsc_ircc_change_speed(self, speed);
1113 spin_unlock_irqrestore(&self->lock, flags);
1118 self->new_speed = speed;
1121 memcpy(self->tx_buff.head, skb->data, skb->len);
1123 self->tx_buff.len = skb->len;
1124 self->tx_buff.data = self->tx_buff.head;
1126 mtt = irda_get_mtt(skb);
1131 * Compute how many BOFs (STA or PA's) we need to waste the
1132 * min turn time given the speed of the link.
1134 bofs = mtt * (self->io.speed / 1000) / 8000;
1138 smsc_ircc_dma_xmit(self, iobase, bofs);
1140 /* Transmit frame */
1141 smsc_ircc_dma_xmit(self, iobase, 0);
1144 spin_unlock_irqrestore(&self->lock, flags);
1151 * Function smsc_ircc_dma_xmit (self, iobase)
1153 * Transmit data using DMA
1156 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs)
1160 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1163 register_bank(iobase, 0);
1164 outb(0x00, iobase + IRCC_LCR_B);
1166 register_bank(iobase, 1);
1167 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1168 iobase + IRCC_SCE_CFGB);
1170 self->io.direction = IO_XMIT;
1172 /* Set BOF additional count for generating the min turn time */
1173 register_bank(iobase, 4);
1174 outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1175 ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1176 outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1178 /* Set max Tx frame size */
1179 outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1180 outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1182 /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1184 /* Enable burst mode chip Tx DMA */
1185 register_bank(iobase, 1);
1186 outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1187 IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1189 /* Setup DMA controller (must be done after enabling chip DMA) */
1190 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
1193 /* Enable interrupt */
1195 register_bank(iobase, 0);
1196 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1197 outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1199 /* Enable transmit */
1200 outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1204 * Function smsc_ircc_dma_xmit_complete (self)
1206 * The transfer of a frame in finished. This function will only be called
1207 * by the interrupt handler
1210 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase)
1212 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1215 register_bank(iobase, 0);
1216 outb(0x00, iobase + IRCC_LCR_B);
1218 register_bank(self->io.fir_base, 1);
1219 outb(inb(self->io.fir_base + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1220 self->io.fir_base + IRCC_SCE_CFGB);
1222 /* Check for underrun! */
1223 register_bank(iobase, 0);
1224 if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1225 self->stats.tx_errors++;
1226 self->stats.tx_fifo_errors++;
1228 /* Reset error condition */
1229 register_bank(iobase, 0);
1230 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1231 outb(0x00, iobase + IRCC_MASTER);
1233 self->stats.tx_packets++;
1234 self->stats.tx_bytes += self->tx_buff.len;
1237 /* Check if it's time to change the speed */
1238 if (self->new_speed) {
1239 smsc_ircc_change_speed(self, self->new_speed);
1240 self->new_speed = 0;
1243 netif_wake_queue(self->netdev);
1247 * Function smsc_ircc_dma_receive(self)
1249 * Get ready for receiving a frame. The device will initiate a DMA
1250 * if it starts to receive a frame.
1253 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
1256 /* Turn off chip DMA */
1257 register_bank(iobase, 1);
1258 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1259 iobase + IRCC_SCE_CFGB);
1263 register_bank(iobase, 0);
1264 outb(0x00, iobase + IRCC_LCR_B);
1266 /* Turn off chip DMA */
1267 register_bank(iobase, 1);
1268 outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1269 iobase + IRCC_SCE_CFGB);
1271 self->io.direction = IO_RECV;
1272 self->rx_buff.data = self->rx_buff.head;
1274 /* Set max Rx frame size */
1275 register_bank(iobase, 4);
1276 outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1277 outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1279 /* Setup DMA controller */
1280 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1283 /* Enable burst mode chip Rx DMA */
1284 register_bank(iobase, 1);
1285 outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1286 IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1288 /* Enable interrupt */
1289 register_bank(iobase, 0);
1290 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1291 outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1293 /* Enable receiver */
1294 register_bank(iobase, 0);
1295 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1296 iobase + IRCC_LCR_B);
1302 * Function smsc_ircc_dma_receive_complete(self, iobase)
1304 * Finished with receiving frames
1307 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase)
1309 struct sk_buff *skb;
1310 int len, msgcnt, lsr;
1312 register_bank(iobase, 0);
1314 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1317 register_bank(iobase, 0);
1318 outb(0x00, iobase + IRCC_LCR_B);
1320 register_bank(iobase, 0);
1321 outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1322 lsr= inb(iobase + IRCC_LSR);
1323 msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1325 IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1326 get_dma_residue(self->io.dma));
1328 len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1330 /* Look for errors */
1331 if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1332 self->stats.rx_errors++;
1333 if (lsr & IRCC_LSR_FRAME_ERROR)
1334 self->stats.rx_frame_errors++;
1335 if (lsr & IRCC_LSR_CRC_ERROR)
1336 self->stats.rx_crc_errors++;
1337 if (lsr & IRCC_LSR_SIZE_ERROR)
1338 self->stats.rx_length_errors++;
1339 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1340 self->stats.rx_length_errors++;
1345 len -= self->io.speed < 4000000 ? 2 : 4;
1347 if (len < 2 || len > 2050) {
1348 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1351 IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1353 skb = dev_alloc_skb(len + 1);
1355 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1359 /* Make sure IP header gets aligned */
1360 skb_reserve(skb, 1);
1362 memcpy(skb_put(skb, len), self->rx_buff.data, len);
1363 self->stats.rx_packets++;
1364 self->stats.rx_bytes += len;
1366 skb->dev = self->netdev;
1367 skb->mac.raw = skb->data;
1368 skb->protocol = htons(ETH_P_IRDA);
1373 * Function smsc_ircc_sir_receive (self)
1375 * Receive one frame from the infrared port
1378 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1383 IRDA_ASSERT(self != NULL, return;);
1385 iobase = self->io.sir_base;
1388 * Receive all characters in Rx FIFO, unwrap and unstuff them.
1389 * async_unwrap_char will deliver all found frames
1392 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1393 inb(iobase + UART_RX));
1395 /* Make sure we don't stay here to long */
1396 if (boguscount++ > 32) {
1397 IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1400 } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1405 * Function smsc_ircc_interrupt (irq, dev_id, regs)
1407 * An interrupt from the chip has arrived. Time to do some work
1410 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1412 struct net_device *dev = (struct net_device *) dev_id;
1413 struct smsc_ircc_cb *self;
1414 int iobase, iir, lcra, lsr;
1415 irqreturn_t ret = IRQ_NONE;
1418 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1422 self = (struct smsc_ircc_cb *) dev->priv;
1423 IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1425 /* Serialise the interrupt handler in various CPUs, stop Tx path */
1426 spin_lock(&self->lock);
1428 /* Check if we should use the SIR interrupt handler */
1429 if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1430 ret = smsc_ircc_interrupt_sir(dev);
1431 goto irq_ret_unlock;
1434 iobase = self->io.fir_base;
1436 register_bank(iobase, 0);
1437 iir = inb(iobase + IRCC_IIR);
1439 goto irq_ret_unlock;
1442 /* Disable interrupts */
1443 outb(0, iobase + IRCC_IER);
1444 lcra = inb(iobase + IRCC_LCR_A);
1445 lsr = inb(iobase + IRCC_LSR);
1447 IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1449 if (iir & IRCC_IIR_EOM) {
1450 if (self->io.direction == IO_RECV)
1451 smsc_ircc_dma_receive_complete(self, iobase);
1453 smsc_ircc_dma_xmit_complete(self, iobase);
1455 smsc_ircc_dma_receive(self, iobase);
1458 if (iir & IRCC_IIR_ACTIVE_FRAME) {
1459 /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/
1462 /* Enable interrupts again */
1464 register_bank(iobase, 0);
1465 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1468 spin_unlock(&self->lock);
1474 * Function irport_interrupt_sir (irq, dev_id, regs)
1476 * Interrupt handler for SIR modes
1478 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1480 struct smsc_ircc_cb *self = dev->priv;
1485 /* Already locked comming here in smsc_ircc_interrupt() */
1486 /*spin_lock(&self->lock);*/
1488 iobase = self->io.sir_base;
1490 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1494 /* Clear interrupt */
1495 lsr = inb(iobase + UART_LSR);
1497 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1498 __FUNCTION__, iir, lsr, iobase);
1502 IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__);
1505 /* Receive interrupt */
1506 smsc_ircc_sir_receive(self);
1509 if (lsr & UART_LSR_THRE)
1510 /* Transmitter ready for data */
1511 smsc_ircc_sir_write_wakeup(self);
1514 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1519 /* Make sure we don't stay here to long */
1520 if (boguscount++ > 100)
1523 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1525 /*spin_unlock(&self->lock);*/
1532 * Function ircc_is_receiving (self)
1534 * Return TRUE is we are currently receiving a frame
1537 static int ircc_is_receiving(struct smsc_ircc_cb *self)
1542 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1544 IRDA_ASSERT(self != NULL, return FALSE;);
1546 IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__,
1547 get_dma_residue(self->io.dma));
1549 status = (self->rx_buff.state != OUTSIDE_FRAME);
1557 * Function smsc_ircc_net_open (dev)
1562 static int smsc_ircc_net_open(struct net_device *dev)
1564 struct smsc_ircc_cb *self;
1567 unsigned long flags;
1569 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1571 IRDA_ASSERT(dev != NULL, return -1;);
1572 self = (struct smsc_ircc_cb *) dev->priv;
1573 IRDA_ASSERT(self != NULL, return 0;);
1575 iobase = self->io.fir_base;
1577 if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1579 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1580 __FUNCTION__, self->io.irq);
1584 spin_lock_irqsave(&self->lock, flags);
1585 /*smsc_ircc_sir_start(self);*/
1587 smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1588 spin_unlock_irqrestore(&self->lock, flags);
1590 /* Give self a hardware name */
1591 /* It would be cool to offer the chip revision here - Jean II */
1592 sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1595 * Open new IrLAP layer instance, now that everything should be
1596 * initialized properly
1598 self->irlap = irlap_open(dev, &self->qos, hwname);
1601 * Always allocate the DMA channel after the IRQ,
1602 * and clean up on failure.
1604 if (request_dma(self->io.dma, dev->name)) {
1605 smsc_ircc_net_close(dev);
1607 IRDA_WARNING("%s(), unable to allocate DMA=%d\n",
1608 __FUNCTION__, self->io.dma);
1612 netif_start_queue(dev);
1618 * Function smsc_ircc_net_close (dev)
1623 static int smsc_ircc_net_close(struct net_device *dev)
1625 struct smsc_ircc_cb *self;
1628 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1630 IRDA_ASSERT(dev != NULL, return -1;);
1631 self = (struct smsc_ircc_cb *) dev->priv;
1632 IRDA_ASSERT(self != NULL, return 0;);
1634 iobase = self->io.fir_base;
1637 netif_stop_queue(dev);
1639 /* Stop and remove instance of IrLAP */
1641 irlap_close(self->irlap);
1644 free_irq(self->io.irq, dev);
1645 disable_dma(self->io.dma);
1646 free_dma(self->io.dma);
1652 static void smsc_ircc_suspend(struct smsc_ircc_cb *self)
1654 IRDA_MESSAGE("%s, Suspending\n", driver_name);
1656 if (!self->io.suspended) {
1657 smsc_ircc_net_close(self->netdev);
1658 self->io.suspended = 1;
1662 static void smsc_ircc_wakeup(struct smsc_ircc_cb *self)
1664 if (!self->io.suspended)
1667 /* The code was doing a "cli()" here, but this can't be right.
1668 * If you need protection, do it in net_open with a spinlock
1669 * or give a good reason. - Jean II */
1671 smsc_ircc_net_open(self->netdev);
1673 IRDA_MESSAGE("%s, Waking up\n", driver_name);
1676 static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
1678 struct smsc_ircc_cb *self = (struct smsc_ircc_cb*) dev->data;
1682 smsc_ircc_suspend(self);
1685 smsc_ircc_wakeup(self);
1693 * Function smsc_ircc_close (self)
1695 * Close driver instance
1698 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1701 unsigned long flags;
1703 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1705 IRDA_ASSERT(self != NULL, return -1;);
1707 iobase = self->io.fir_base;
1710 pm_unregister(self->pmdev);
1712 /* Remove netdevice */
1713 unregister_netdev(self->netdev);
1715 /* Make sure the irq handler is not exectuting */
1716 spin_lock_irqsave(&self->lock, flags);
1718 /* Stop interrupts */
1719 register_bank(iobase, 0);
1720 outb(0, iobase + IRCC_IER);
1721 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1722 outb(0x00, iobase + IRCC_MASTER);
1724 /* Reset to SIR mode */
1725 register_bank(iobase, 1);
1726 outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase + IRCC_SCE_CFGA);
1727 outb(IRCC_CFGB_IR, iobase + IRCC_SCE_CFGB);
1729 spin_unlock_irqrestore(&self->lock, flags);
1731 /* Release the PORTS that this driver is using */
1732 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1735 release_region(self->io.fir_base, self->io.fir_ext);
1737 IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1740 release_region(self->io.sir_base, self->io.sir_ext);
1742 if (self->tx_buff.head)
1743 dma_free_coherent(NULL, self->tx_buff.truesize,
1744 self->tx_buff.head, self->tx_buff_dma);
1746 if (self->rx_buff.head)
1747 dma_free_coherent(NULL, self->rx_buff.truesize,
1748 self->rx_buff.head, self->rx_buff_dma);
1750 free_netdev(self->netdev);
1755 static void __exit smsc_ircc_cleanup(void)
1759 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1761 for (i = 0; i < 2; i++) {
1763 smsc_ircc_close(dev_self[i]);
1768 * Start SIR operations
1770 * This function *must* be called with spinlock held, because it may
1771 * be called from the irq handler (via smsc_ircc_change_speed()). - Jean II
1773 void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1775 struct net_device *dev;
1776 int fir_base, sir_base;
1778 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1780 IRDA_ASSERT(self != NULL, return;);
1782 IRDA_ASSERT(dev != NULL, return;);
1783 dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1785 fir_base = self->io.fir_base;
1786 sir_base = self->io.sir_base;
1788 /* Reset everything */
1789 outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1791 #if SMSC_IRCC2_C_SIR_STOP
1792 /*smsc_ircc_sir_stop(self);*/
1795 register_bank(fir_base, 1);
1796 outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1798 /* Initialize UART */
1799 outb(UART_LCR_WLEN8, sir_base + UART_LCR); /* Reset DLAB */
1800 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1802 /* Turn on interrups */
1803 outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1805 IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1807 outb(0x00, fir_base + IRCC_MASTER);
1810 #if SMSC_IRCC2_C_SIR_STOP
1811 void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1815 IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1816 iobase = self->io.sir_base;
1819 outb(0, iobase + UART_MCR);
1821 /* Turn off interrupts */
1822 outb(0, iobase + UART_IER);
1827 * Function smsc_sir_write_wakeup (self)
1829 * Called by the SIR interrupt handler when there's room for more data.
1830 * If we have more packets to send, we send them here.
1833 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1839 IRDA_ASSERT(self != NULL, return;);
1841 IRDA_DEBUG(4, "%s\n", __FUNCTION__);
1843 iobase = self->io.sir_base;
1845 /* Finished with frame? */
1846 if (self->tx_buff.len > 0) {
1847 /* Write data left in transmit buffer */
1848 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1849 self->tx_buff.data, self->tx_buff.len);
1850 self->tx_buff.data += actual;
1851 self->tx_buff.len -= actual;
1854 /*if (self->tx_buff.len ==0) {*/
1857 * Now serial buffer is almost free & we can start
1858 * transmission of another packet. But first we must check
1859 * if we need to change the speed of the hardware
1861 if (self->new_speed) {
1862 IRDA_DEBUG(5, "%s(), Changing speed to %d.\n",
1863 __FUNCTION__, self->new_speed);
1864 smsc_ircc_sir_wait_hw_transmitter_finish(self);
1865 smsc_ircc_change_speed(self, self->new_speed);
1866 self->new_speed = 0;
1868 /* Tell network layer that we want more frames */
1869 netif_wake_queue(self->netdev);
1871 self->stats.tx_packets++;
1873 if (self->io.speed <= 115200) {
1875 * Reset Rx FIFO to make sure that all reflected transmit data
1876 * is discarded. This is needed for half duplex operation
1878 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1879 fcr |= self->io.speed < 38400 ?
1880 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1882 outb(fcr, iobase + UART_FCR);
1884 /* Turn on receive interrupts */
1885 outb(UART_IER_RDI, iobase + UART_IER);
1891 * Function smsc_ircc_sir_write (iobase, fifo_size, buf, len)
1893 * Fill Tx FIFO with transmit data
1896 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1900 /* Tx FIFO should be empty! */
1901 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1902 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1906 /* Fill FIFO with current frame */
1907 while (fifo_size-- > 0 && actual < len) {
1908 /* Transmit next byte */
1909 outb(buf[actual], iobase + UART_TX);
1916 * Function smsc_ircc_is_receiving (self)
1918 * Returns true is we are currently receiving data
1921 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1923 return (self->rx_buff.state != OUTSIDE_FRAME);
1928 * Function smsc_ircc_probe_transceiver(self)
1930 * Tries to find the used Transceiver
1933 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1937 IRDA_ASSERT(self != NULL, return;);
1939 for (i = 0; smsc_transceivers[i].name != NULL; i++)
1940 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1941 IRDA_MESSAGE(" %s transceiver found\n",
1942 smsc_transceivers[i].name);
1943 self->transceiver= i + 1;
1947 IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1948 smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1950 self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1955 * Function smsc_ircc_set_transceiver_for_speed(self, speed)
1957 * Set the transceiver according to the speed
1960 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1964 trx = self->transceiver;
1966 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1970 * Function smsc_ircc_wait_hw_transmitter_finish ()
1972 * Wait for the real end of HW transmission
1974 * The UART is a strict FIFO, and we get called only when we have finished
1975 * pushing data to the FIFO, so the maximum amount of time we must wait
1976 * is only for the FIFO to drain out.
1978 * We use a simple calibrated loop. We may need to adjust the loop
1979 * delay (udelay) to balance I/O traffic and latency. And we also need to
1980 * adjust the maximum timeout.
1981 * It would probably be better to wait for the proper interrupt,
1982 * but it doesn't seem to be available.
1984 * We can't use jiffies or kernel timers because :
1985 * 1) We are called from the interrupt handler, which disable softirqs,
1986 * so jiffies won't be increased
1987 * 2) Jiffies granularity is usually very coarse (10ms), and we don't
1988 * want to wait that long to detect stuck hardware.
1992 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
1994 int iobase = self->io.sir_base;
1995 int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
1997 /* Calibrated busy loop */
1998 while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
2002 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
2011 static int __init smsc_ircc_look_for_chips(void)
2013 smsc_chip_address_t *address;
2015 unsigned int cfg_base, found;
2018 address = possible_addresses;
2020 while (address->cfg_base) {
2021 cfg_base = address->cfg_base;
2023 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2025 if (address->type & SMSCSIO_TYPE_FDC) {
2027 if (address->type & SMSCSIO_TYPE_FLAT)
2028 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2031 if (address->type & SMSCSIO_TYPE_PAGED)
2032 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2035 if (address->type & SMSCSIO_TYPE_LPC) {
2037 if (address->type & SMSCSIO_TYPE_FLAT)
2038 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2041 if (address->type & SMSCSIO_TYPE_PAGED)
2042 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2051 * Function smsc_superio_flat (chip, base, type)
2053 * Try to get configuration of a smc SuperIO chip with flat register model
2056 static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfgbase, char *type)
2058 unsigned short firbase, sirbase;
2062 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2064 if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2067 outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2068 mode = inb(cfgbase + 1);
2070 /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2072 if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2073 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2075 outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2076 sirbase = inb(cfgbase + 1) << 2;
2079 outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2080 firbase = inb(cfgbase + 1) << 3;
2083 outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2084 dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2087 outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2088 irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2090 IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2092 if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2095 /* Exit configuration */
2096 outb(SMSCSIO_CFGEXITKEY, cfgbase);
2102 * Function smsc_superio_paged (chip, base, type)
2104 * Try to get configuration of a smc SuperIO chip with paged register model
2107 static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cfg_base, char *type)
2109 unsigned short fir_io, sir_io;
2112 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2114 if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2117 /* Select logical device (UART2) */
2118 outb(0x07, cfg_base);
2119 outb(0x05, cfg_base + 1);
2122 outb(0x60, cfg_base);
2123 sir_io = inb(cfg_base + 1) << 8;
2124 outb(0x61, cfg_base);
2125 sir_io |= inb(cfg_base + 1);
2128 outb(0x62, cfg_base);
2129 fir_io = inb(cfg_base + 1) << 8;
2130 outb(0x63, cfg_base);
2131 fir_io |= inb(cfg_base + 1);
2132 outb(0x2b, cfg_base); /* ??? */
2134 if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2137 /* Exit configuration */
2138 outb(SMSCSIO_CFGEXITKEY, cfg_base);
2144 static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2146 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2148 outb(reg, cfg_base);
2149 return inb(cfg_base) != reg ? -1 : 0;
2152 static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const smsc_chip_t *chip, char *type)
2154 u8 devid, xdevid, rev;
2156 IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2158 /* Leave configuration */
2160 outb(SMSCSIO_CFGEXITKEY, cfg_base);
2162 if (inb(cfg_base) == SMSCSIO_CFGEXITKEY) /* not a smc superio chip */
2165 outb(reg, cfg_base);
2167 xdevid = inb(cfg_base + 1);
2169 /* Enter configuration */
2171 outb(SMSCSIO_CFGACCESSKEY, cfg_base);
2174 if (smsc_access(cfg_base,0x55)) /* send second key and check */
2178 /* probe device ID */
2180 if (smsc_access(cfg_base, reg))
2183 devid = inb(cfg_base + 1);
2185 if (devid == 0 || devid == 0xff) /* typical values for unused port */
2188 /* probe revision ID */
2190 if (smsc_access(cfg_base, reg + 1))
2193 rev = inb(cfg_base + 1);
2195 if (rev >= 128) /* i think this will make no sense */
2198 if (devid == xdevid) /* protection against false positives */
2201 /* Check for expected device ID; are there others? */
2203 while (chip->devid != devid) {
2207 if (chip->name == NULL)
2211 IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2212 devid, rev, cfg_base, type, chip->name);
2214 if (chip->rev > rev) {
2215 IRDA_MESSAGE("Revision higher than expected\n");
2219 if (chip->flags & NoIRDA)
2220 IRDA_MESSAGE("chipset does not support IRDA\n");
2225 static int __init smsc_superio_fdc(unsigned short cfg_base)
2229 if (!request_region(cfg_base, 2, driver_name)) {
2230 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2231 __FUNCTION__, cfg_base);
2233 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2234 !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2237 release_region(cfg_base, 2);
2243 static int __init smsc_superio_lpc(unsigned short cfg_base)
2247 if (!request_region(cfg_base, 2, driver_name)) {
2248 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2249 __FUNCTION__, cfg_base);
2251 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2252 !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2255 release_region(cfg_base, 2);
2260 /************************************************
2262 * Transceivers specific functions
2264 ************************************************/
2268 * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2270 * Program transceiver through smsc-ircc ATC circuitry
2274 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2276 unsigned long jiffies_now, jiffies_timeout;
2279 jiffies_now = jiffies;
2280 jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2283 register_bank(fir_base, 4);
2284 outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2285 fir_base + IRCC_ATC);
2287 while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2288 !time_after(jiffies, jiffies_timeout))
2292 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2293 inb(fir_base + IRCC_ATC));
2297 * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2299 * Probe transceiver smsc-ircc ATC circuitry
2303 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2309 * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2315 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2326 fast_mode = IRCC_LCR_A_FAST;
2329 register_bank(fir_base, 0);
2330 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2334 * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2340 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2346 * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2352 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2363 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2367 /* This causes an interrupt */
2368 register_bank(fir_base, 0);
2369 outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2373 * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2379 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2385 module_init(smsc_ircc_init);
2386 module_exit(smsc_ircc_cleanup);