igb: use dev_printk instead of printk
[linux-2.6.git] / drivers / net / igb / igb_main.c
1 /*******************************************************************************
2
3   Intel(R) Gigabit Ethernet Linux driver
4   Copyright(c) 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45 #ifdef CONFIG_IGB_DCA
46 #include <linux/dca.h>
47 #endif
48 #include "igb.h"
49
50 #define DRV_VERSION "1.2.45-k2"
51 char igb_driver_name[] = "igb";
52 char igb_driver_version[] = DRV_VERSION;
53 static const char igb_driver_string[] =
54                                 "Intel(R) Gigabit Ethernet Network Driver";
55 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
56
57 static const struct e1000_info *igb_info_tbl[] = {
58         [board_82575] = &e1000_82575_info,
59 };
60
61 static struct pci_device_id igb_pci_tbl[] = {
62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
68         /* required last entry */
69         {0, }
70 };
71
72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
73
74 void igb_reset(struct igb_adapter *);
75 static int igb_setup_all_tx_resources(struct igb_adapter *);
76 static int igb_setup_all_rx_resources(struct igb_adapter *);
77 static void igb_free_all_tx_resources(struct igb_adapter *);
78 static void igb_free_all_rx_resources(struct igb_adapter *);
79 static void igb_free_tx_resources(struct igb_ring *);
80 static void igb_free_rx_resources(struct igb_ring *);
81 void igb_update_stats(struct igb_adapter *);
82 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
83 static void __devexit igb_remove(struct pci_dev *pdev);
84 static int igb_sw_init(struct igb_adapter *);
85 static int igb_open(struct net_device *);
86 static int igb_close(struct net_device *);
87 static void igb_configure_tx(struct igb_adapter *);
88 static void igb_configure_rx(struct igb_adapter *);
89 static void igb_setup_rctl(struct igb_adapter *);
90 static void igb_clean_all_tx_rings(struct igb_adapter *);
91 static void igb_clean_all_rx_rings(struct igb_adapter *);
92 static void igb_clean_tx_ring(struct igb_ring *);
93 static void igb_clean_rx_ring(struct igb_ring *);
94 static void igb_set_multi(struct net_device *);
95 static void igb_update_phy_info(unsigned long);
96 static void igb_watchdog(unsigned long);
97 static void igb_watchdog_task(struct work_struct *);
98 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
99                                   struct igb_ring *);
100 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
101 static struct net_device_stats *igb_get_stats(struct net_device *);
102 static int igb_change_mtu(struct net_device *, int);
103 static int igb_set_mac(struct net_device *, void *);
104 static irqreturn_t igb_intr(int irq, void *);
105 static irqreturn_t igb_intr_msi(int irq, void *);
106 static irqreturn_t igb_msix_other(int irq, void *);
107 static irqreturn_t igb_msix_rx(int irq, void *);
108 static irqreturn_t igb_msix_tx(int irq, void *);
109 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
110 #ifdef CONFIG_IGB_DCA
111 static void igb_update_rx_dca(struct igb_ring *);
112 static void igb_update_tx_dca(struct igb_ring *);
113 static void igb_setup_dca(struct igb_adapter *);
114 #endif /* CONFIG_IGB_DCA */
115 static bool igb_clean_tx_irq(struct igb_ring *);
116 static int igb_poll(struct napi_struct *, int);
117 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
118 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
119 #ifdef CONFIG_IGB_LRO
120 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
121 #endif
122 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
123 static void igb_tx_timeout(struct net_device *);
124 static void igb_reset_task(struct work_struct *);
125 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
126 static void igb_vlan_rx_add_vid(struct net_device *, u16);
127 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
128 static void igb_restore_vlan(struct igb_adapter *);
129
130 static int igb_suspend(struct pci_dev *, pm_message_t);
131 #ifdef CONFIG_PM
132 static int igb_resume(struct pci_dev *);
133 #endif
134 static void igb_shutdown(struct pci_dev *);
135 #ifdef CONFIG_IGB_DCA
136 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
137 static struct notifier_block dca_notifier = {
138         .notifier_call  = igb_notify_dca,
139         .next           = NULL,
140         .priority       = 0
141 };
142 #endif
143
144 #ifdef CONFIG_NET_POLL_CONTROLLER
145 /* for netdump / net console */
146 static void igb_netpoll(struct net_device *);
147 #endif
148
149 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
150                      pci_channel_state_t);
151 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
152 static void igb_io_resume(struct pci_dev *);
153
154 static struct pci_error_handlers igb_err_handler = {
155         .error_detected = igb_io_error_detected,
156         .slot_reset = igb_io_slot_reset,
157         .resume = igb_io_resume,
158 };
159
160
161 static struct pci_driver igb_driver = {
162         .name     = igb_driver_name,
163         .id_table = igb_pci_tbl,
164         .probe    = igb_probe,
165         .remove   = __devexit_p(igb_remove),
166 #ifdef CONFIG_PM
167         /* Power Managment Hooks */
168         .suspend  = igb_suspend,
169         .resume   = igb_resume,
170 #endif
171         .shutdown = igb_shutdown,
172         .err_handler = &igb_err_handler
173 };
174
175 static int global_quad_port_a; /* global quad port a indication */
176
177 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
178 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
179 MODULE_LICENSE("GPL");
180 MODULE_VERSION(DRV_VERSION);
181
182 #ifdef DEBUG
183 /**
184  * igb_get_hw_dev_name - return device name string
185  * used by hardware layer to print debugging information
186  **/
187 char *igb_get_hw_dev_name(struct e1000_hw *hw)
188 {
189         struct igb_adapter *adapter = hw->back;
190         return adapter->netdev->name;
191 }
192 #endif
193
194 /**
195  * igb_init_module - Driver Registration Routine
196  *
197  * igb_init_module is the first routine called when the driver is
198  * loaded. All it does is register with the PCI subsystem.
199  **/
200 static int __init igb_init_module(void)
201 {
202         int ret;
203         printk(KERN_INFO "%s - version %s\n",
204                igb_driver_string, igb_driver_version);
205
206         printk(KERN_INFO "%s\n", igb_copyright);
207
208         global_quad_port_a = 0;
209
210         ret = pci_register_driver(&igb_driver);
211 #ifdef CONFIG_IGB_DCA
212         dca_register_notify(&dca_notifier);
213 #endif
214         return ret;
215 }
216
217 module_init(igb_init_module);
218
219 /**
220  * igb_exit_module - Driver Exit Cleanup Routine
221  *
222  * igb_exit_module is called just before the driver is removed
223  * from memory.
224  **/
225 static void __exit igb_exit_module(void)
226 {
227 #ifdef CONFIG_IGB_DCA
228         dca_unregister_notify(&dca_notifier);
229 #endif
230         pci_unregister_driver(&igb_driver);
231 }
232
233 module_exit(igb_exit_module);
234
235 /**
236  * igb_alloc_queues - Allocate memory for all rings
237  * @adapter: board private structure to initialize
238  *
239  * We allocate one ring per queue at run-time since we don't know the
240  * number of queues at compile-time.
241  **/
242 static int igb_alloc_queues(struct igb_adapter *adapter)
243 {
244         int i;
245
246         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
247                                    sizeof(struct igb_ring), GFP_KERNEL);
248         if (!adapter->tx_ring)
249                 return -ENOMEM;
250
251         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
252                                    sizeof(struct igb_ring), GFP_KERNEL);
253         if (!adapter->rx_ring) {
254                 kfree(adapter->tx_ring);
255                 return -ENOMEM;
256         }
257
258         adapter->rx_ring->buddy = adapter->tx_ring;
259
260         for (i = 0; i < adapter->num_tx_queues; i++) {
261                 struct igb_ring *ring = &(adapter->tx_ring[i]);
262                 ring->adapter = adapter;
263                 ring->queue_index = i;
264         }
265         for (i = 0; i < adapter->num_rx_queues; i++) {
266                 struct igb_ring *ring = &(adapter->rx_ring[i]);
267                 ring->adapter = adapter;
268                 ring->queue_index = i;
269                 ring->itr_register = E1000_ITR;
270
271                 /* set a default napi handler for each rx_ring */
272                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
273         }
274         return 0;
275 }
276
277 static void igb_free_queues(struct igb_adapter *adapter)
278 {
279         int i;
280
281         for (i = 0; i < adapter->num_rx_queues; i++)
282                 netif_napi_del(&adapter->rx_ring[i].napi);
283
284         kfree(adapter->tx_ring);
285         kfree(adapter->rx_ring);
286 }
287
288 #define IGB_N0_QUEUE -1
289 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
290                               int tx_queue, int msix_vector)
291 {
292         u32 msixbm = 0;
293         struct e1000_hw *hw = &adapter->hw;
294         u32 ivar, index;
295
296         switch (hw->mac.type) {
297         case e1000_82575:
298                 /* The 82575 assigns vectors using a bitmask, which matches the
299                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
300                    or more queues to a vector, we write the appropriate bits
301                    into the MSIXBM register for that vector. */
302                 if (rx_queue > IGB_N0_QUEUE) {
303                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
304                         adapter->rx_ring[rx_queue].eims_value = msixbm;
305                 }
306                 if (tx_queue > IGB_N0_QUEUE) {
307                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
308                         adapter->tx_ring[tx_queue].eims_value =
309                                   E1000_EICR_TX_QUEUE0 << tx_queue;
310                 }
311                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
312                 break;
313         case e1000_82576:
314                 /* The 82576 uses a table-based method for assigning vectors.
315                    Each queue has a single entry in the table to which we write
316                    a vector number along with a "valid" bit.  Sadly, the layout
317                    of the table is somewhat counterintuitive. */
318                 if (rx_queue > IGB_N0_QUEUE) {
319                         index = (rx_queue & 0x7);
320                         ivar = array_rd32(E1000_IVAR0, index);
321                         if (rx_queue < 8) {
322                                 /* vector goes into low byte of register */
323                                 ivar = ivar & 0xFFFFFF00;
324                                 ivar |= msix_vector | E1000_IVAR_VALID;
325                         } else {
326                                 /* vector goes into third byte of register */
327                                 ivar = ivar & 0xFF00FFFF;
328                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
329                         }
330                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
331                         array_wr32(E1000_IVAR0, index, ivar);
332                 }
333                 if (tx_queue > IGB_N0_QUEUE) {
334                         index = (tx_queue & 0x7);
335                         ivar = array_rd32(E1000_IVAR0, index);
336                         if (tx_queue < 8) {
337                                 /* vector goes into second byte of register */
338                                 ivar = ivar & 0xFFFF00FF;
339                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
340                         } else {
341                                 /* vector goes into high byte of register */
342                                 ivar = ivar & 0x00FFFFFF;
343                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
344                         }
345                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
346                         array_wr32(E1000_IVAR0, index, ivar);
347                 }
348                 break;
349         default:
350                 BUG();
351                 break;
352         }
353 }
354
355 /**
356  * igb_configure_msix - Configure MSI-X hardware
357  *
358  * igb_configure_msix sets up the hardware to properly
359  * generate MSI-X interrupts.
360  **/
361 static void igb_configure_msix(struct igb_adapter *adapter)
362 {
363         u32 tmp;
364         int i, vector = 0;
365         struct e1000_hw *hw = &adapter->hw;
366
367         adapter->eims_enable_mask = 0;
368         if (hw->mac.type == e1000_82576)
369                 /* Turn on MSI-X capability first, or our settings
370                  * won't stick.  And it will take days to debug. */
371                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
372                                    E1000_GPIE_PBA | E1000_GPIE_EIAME | 
373                                    E1000_GPIE_NSICR);
374
375         for (i = 0; i < adapter->num_tx_queues; i++) {
376                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
377                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
378                 adapter->eims_enable_mask |= tx_ring->eims_value;
379                 if (tx_ring->itr_val)
380                         writel(tx_ring->itr_val,
381                                hw->hw_addr + tx_ring->itr_register);
382                 else
383                         writel(1, hw->hw_addr + tx_ring->itr_register);
384         }
385
386         for (i = 0; i < adapter->num_rx_queues; i++) {
387                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
388                 rx_ring->buddy = NULL;
389                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
390                 adapter->eims_enable_mask |= rx_ring->eims_value;
391                 if (rx_ring->itr_val)
392                         writel(rx_ring->itr_val,
393                                hw->hw_addr + rx_ring->itr_register);
394                 else
395                         writel(1, hw->hw_addr + rx_ring->itr_register);
396         }
397
398
399         /* set vector for other causes, i.e. link changes */
400         switch (hw->mac.type) {
401         case e1000_82575:
402                 array_wr32(E1000_MSIXBM(0), vector++,
403                                       E1000_EIMS_OTHER);
404
405                 tmp = rd32(E1000_CTRL_EXT);
406                 /* enable MSI-X PBA support*/
407                 tmp |= E1000_CTRL_EXT_PBA_CLR;
408
409                 /* Auto-Mask interrupts upon ICR read. */
410                 tmp |= E1000_CTRL_EXT_EIAME;
411                 tmp |= E1000_CTRL_EXT_IRCA;
412
413                 wr32(E1000_CTRL_EXT, tmp);
414                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
415                 adapter->eims_other = E1000_EIMS_OTHER;
416
417                 break;
418
419         case e1000_82576:
420                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
421                 wr32(E1000_IVAR_MISC, tmp);
422
423                 adapter->eims_enable_mask = (1 << (vector)) - 1;
424                 adapter->eims_other = 1 << (vector - 1);
425                 break;
426         default:
427                 /* do nothing, since nothing else supports MSI-X */
428                 break;
429         } /* switch (hw->mac.type) */
430         wrfl();
431 }
432
433 /**
434  * igb_request_msix - Initialize MSI-X interrupts
435  *
436  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
437  * kernel.
438  **/
439 static int igb_request_msix(struct igb_adapter *adapter)
440 {
441         struct net_device *netdev = adapter->netdev;
442         int i, err = 0, vector = 0;
443
444         vector = 0;
445
446         for (i = 0; i < adapter->num_tx_queues; i++) {
447                 struct igb_ring *ring = &(adapter->tx_ring[i]);
448                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
449                 err = request_irq(adapter->msix_entries[vector].vector,
450                                   &igb_msix_tx, 0, ring->name,
451                                   &(adapter->tx_ring[i]));
452                 if (err)
453                         goto out;
454                 ring->itr_register = E1000_EITR(0) + (vector << 2);
455                 ring->itr_val = 976; /* ~4000 ints/sec */
456                 vector++;
457         }
458         for (i = 0; i < adapter->num_rx_queues; i++) {
459                 struct igb_ring *ring = &(adapter->rx_ring[i]);
460                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
461                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
462                 else
463                         memcpy(ring->name, netdev->name, IFNAMSIZ);
464                 err = request_irq(adapter->msix_entries[vector].vector,
465                                   &igb_msix_rx, 0, ring->name,
466                                   &(adapter->rx_ring[i]));
467                 if (err)
468                         goto out;
469                 ring->itr_register = E1000_EITR(0) + (vector << 2);
470                 ring->itr_val = adapter->itr;
471                 /* overwrite the poll routine for MSIX, we've already done
472                  * netif_napi_add */
473                 ring->napi.poll = &igb_clean_rx_ring_msix;
474                 vector++;
475         }
476
477         err = request_irq(adapter->msix_entries[vector].vector,
478                           &igb_msix_other, 0, netdev->name, netdev);
479         if (err)
480                 goto out;
481
482         igb_configure_msix(adapter);
483         return 0;
484 out:
485         return err;
486 }
487
488 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
489 {
490         if (adapter->msix_entries) {
491                 pci_disable_msix(adapter->pdev);
492                 kfree(adapter->msix_entries);
493                 adapter->msix_entries = NULL;
494         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
495                 pci_disable_msi(adapter->pdev);
496         return;
497 }
498
499
500 /**
501  * igb_set_interrupt_capability - set MSI or MSI-X if supported
502  *
503  * Attempt to configure interrupts using the best available
504  * capabilities of the hardware and kernel.
505  **/
506 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
507 {
508         int err;
509         int numvecs, i;
510
511         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
512         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
513                                         GFP_KERNEL);
514         if (!adapter->msix_entries)
515                 goto msi_only;
516
517         for (i = 0; i < numvecs; i++)
518                 adapter->msix_entries[i].entry = i;
519
520         err = pci_enable_msix(adapter->pdev,
521                               adapter->msix_entries,
522                               numvecs);
523         if (err == 0)
524                 goto out;
525
526         igb_reset_interrupt_capability(adapter);
527
528         /* If we can't do MSI-X, try MSI */
529 msi_only:
530         adapter->num_rx_queues = 1;
531         adapter->num_tx_queues = 1;
532         if (!pci_enable_msi(adapter->pdev))
533                 adapter->flags |= IGB_FLAG_HAS_MSI;
534 out:
535         /* Notify the stack of the (possibly) reduced Tx Queue count. */
536         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
537         return;
538 }
539
540 /**
541  * igb_request_irq - initialize interrupts
542  *
543  * Attempts to configure interrupts using the best available
544  * capabilities of the hardware and kernel.
545  **/
546 static int igb_request_irq(struct igb_adapter *adapter)
547 {
548         struct net_device *netdev = adapter->netdev;
549         struct e1000_hw *hw = &adapter->hw;
550         int err = 0;
551
552         if (adapter->msix_entries) {
553                 err = igb_request_msix(adapter);
554                 if (!err)
555                         goto request_done;
556                 /* fall back to MSI */
557                 igb_reset_interrupt_capability(adapter);
558                 if (!pci_enable_msi(adapter->pdev))
559                         adapter->flags |= IGB_FLAG_HAS_MSI;
560                 igb_free_all_tx_resources(adapter);
561                 igb_free_all_rx_resources(adapter);
562                 adapter->num_rx_queues = 1;
563                 igb_alloc_queues(adapter);
564         } else {
565                 switch (hw->mac.type) {
566                 case e1000_82575:
567                         wr32(E1000_MSIXBM(0),
568                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
569                         break;
570                 case e1000_82576:
571                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
572                         break;
573                 default:
574                         break;
575                 }
576         }
577
578         if (adapter->flags & IGB_FLAG_HAS_MSI) {
579                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
580                                   netdev->name, netdev);
581                 if (!err)
582                         goto request_done;
583                 /* fall back to legacy interrupts */
584                 igb_reset_interrupt_capability(adapter);
585                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
586         }
587
588         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
589                           netdev->name, netdev);
590
591         if (err)
592                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
593                         err);
594
595 request_done:
596         return err;
597 }
598
599 static void igb_free_irq(struct igb_adapter *adapter)
600 {
601         struct net_device *netdev = adapter->netdev;
602
603         if (adapter->msix_entries) {
604                 int vector = 0, i;
605
606                 for (i = 0; i < adapter->num_tx_queues; i++)
607                         free_irq(adapter->msix_entries[vector++].vector,
608                                 &(adapter->tx_ring[i]));
609                 for (i = 0; i < adapter->num_rx_queues; i++)
610                         free_irq(adapter->msix_entries[vector++].vector,
611                                 &(adapter->rx_ring[i]));
612
613                 free_irq(adapter->msix_entries[vector++].vector, netdev);
614                 return;
615         }
616
617         free_irq(adapter->pdev->irq, netdev);
618 }
619
620 /**
621  * igb_irq_disable - Mask off interrupt generation on the NIC
622  * @adapter: board private structure
623  **/
624 static void igb_irq_disable(struct igb_adapter *adapter)
625 {
626         struct e1000_hw *hw = &adapter->hw;
627
628         if (adapter->msix_entries) {
629                 wr32(E1000_EIAM, 0);
630                 wr32(E1000_EIMC, ~0);
631                 wr32(E1000_EIAC, 0);
632         }
633
634         wr32(E1000_IAM, 0);
635         wr32(E1000_IMC, ~0);
636         wrfl();
637         synchronize_irq(adapter->pdev->irq);
638 }
639
640 /**
641  * igb_irq_enable - Enable default interrupt generation settings
642  * @adapter: board private structure
643  **/
644 static void igb_irq_enable(struct igb_adapter *adapter)
645 {
646         struct e1000_hw *hw = &adapter->hw;
647
648         if (adapter->msix_entries) {
649                 wr32(E1000_EIAC, adapter->eims_enable_mask);
650                 wr32(E1000_EIAM, adapter->eims_enable_mask);
651                 wr32(E1000_EIMS, adapter->eims_enable_mask);
652                 wr32(E1000_IMS, E1000_IMS_LSC);
653         } else {
654                 wr32(E1000_IMS, IMS_ENABLE_MASK);
655                 wr32(E1000_IAM, IMS_ENABLE_MASK);
656         }
657 }
658
659 static void igb_update_mng_vlan(struct igb_adapter *adapter)
660 {
661         struct net_device *netdev = adapter->netdev;
662         u16 vid = adapter->hw.mng_cookie.vlan_id;
663         u16 old_vid = adapter->mng_vlan_id;
664         if (adapter->vlgrp) {
665                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
666                         if (adapter->hw.mng_cookie.status &
667                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
668                                 igb_vlan_rx_add_vid(netdev, vid);
669                                 adapter->mng_vlan_id = vid;
670                         } else
671                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
672
673                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
674                                         (vid != old_vid) &&
675                             !vlan_group_get_device(adapter->vlgrp, old_vid))
676                                 igb_vlan_rx_kill_vid(netdev, old_vid);
677                 } else
678                         adapter->mng_vlan_id = vid;
679         }
680 }
681
682 /**
683  * igb_release_hw_control - release control of the h/w to f/w
684  * @adapter: address of board private structure
685  *
686  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
687  * For ASF and Pass Through versions of f/w this means that the
688  * driver is no longer loaded.
689  *
690  **/
691 static void igb_release_hw_control(struct igb_adapter *adapter)
692 {
693         struct e1000_hw *hw = &adapter->hw;
694         u32 ctrl_ext;
695
696         /* Let firmware take over control of h/w */
697         ctrl_ext = rd32(E1000_CTRL_EXT);
698         wr32(E1000_CTRL_EXT,
699                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
700 }
701
702
703 /**
704  * igb_get_hw_control - get control of the h/w from f/w
705  * @adapter: address of board private structure
706  *
707  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
708  * For ASF and Pass Through versions of f/w this means that
709  * the driver is loaded.
710  *
711  **/
712 static void igb_get_hw_control(struct igb_adapter *adapter)
713 {
714         struct e1000_hw *hw = &adapter->hw;
715         u32 ctrl_ext;
716
717         /* Let firmware know the driver has taken over */
718         ctrl_ext = rd32(E1000_CTRL_EXT);
719         wr32(E1000_CTRL_EXT,
720                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
721 }
722
723 /**
724  * igb_configure - configure the hardware for RX and TX
725  * @adapter: private board structure
726  **/
727 static void igb_configure(struct igb_adapter *adapter)
728 {
729         struct net_device *netdev = adapter->netdev;
730         int i;
731
732         igb_get_hw_control(adapter);
733         igb_set_multi(netdev);
734
735         igb_restore_vlan(adapter);
736
737         igb_configure_tx(adapter);
738         igb_setup_rctl(adapter);
739         igb_configure_rx(adapter);
740
741         igb_rx_fifo_flush_82575(&adapter->hw);
742
743         /* call IGB_DESC_UNUSED which always leaves
744          * at least 1 descriptor unused to make sure
745          * next_to_use != next_to_clean */
746         for (i = 0; i < adapter->num_rx_queues; i++) {
747                 struct igb_ring *ring = &adapter->rx_ring[i];
748                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
749         }
750
751
752         adapter->tx_queue_len = netdev->tx_queue_len;
753 }
754
755
756 /**
757  * igb_up - Open the interface and prepare it to handle traffic
758  * @adapter: board private structure
759  **/
760
761 int igb_up(struct igb_adapter *adapter)
762 {
763         struct e1000_hw *hw = &adapter->hw;
764         int i;
765
766         /* hardware has been reset, we need to reload some things */
767         igb_configure(adapter);
768
769         clear_bit(__IGB_DOWN, &adapter->state);
770
771         for (i = 0; i < adapter->num_rx_queues; i++)
772                 napi_enable(&adapter->rx_ring[i].napi);
773         if (adapter->msix_entries)
774                 igb_configure_msix(adapter);
775
776         /* Clear any pending interrupts. */
777         rd32(E1000_ICR);
778         igb_irq_enable(adapter);
779
780         /* Fire a link change interrupt to start the watchdog. */
781         wr32(E1000_ICS, E1000_ICS_LSC);
782         return 0;
783 }
784
785 void igb_down(struct igb_adapter *adapter)
786 {
787         struct e1000_hw *hw = &adapter->hw;
788         struct net_device *netdev = adapter->netdev;
789         u32 tctl, rctl;
790         int i;
791
792         /* signal that we're down so the interrupt handler does not
793          * reschedule our watchdog timer */
794         set_bit(__IGB_DOWN, &adapter->state);
795
796         /* disable receives in the hardware */
797         rctl = rd32(E1000_RCTL);
798         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
799         /* flush and sleep below */
800
801         netif_tx_stop_all_queues(netdev);
802
803         /* disable transmits in the hardware */
804         tctl = rd32(E1000_TCTL);
805         tctl &= ~E1000_TCTL_EN;
806         wr32(E1000_TCTL, tctl);
807         /* flush both disables and wait for them to finish */
808         wrfl();
809         msleep(10);
810
811         for (i = 0; i < adapter->num_rx_queues; i++)
812                 napi_disable(&adapter->rx_ring[i].napi);
813
814         igb_irq_disable(adapter);
815
816         del_timer_sync(&adapter->watchdog_timer);
817         del_timer_sync(&adapter->phy_info_timer);
818
819         netdev->tx_queue_len = adapter->tx_queue_len;
820         netif_carrier_off(netdev);
821         adapter->link_speed = 0;
822         adapter->link_duplex = 0;
823
824         if (!pci_channel_offline(adapter->pdev))
825                 igb_reset(adapter);
826         igb_clean_all_tx_rings(adapter);
827         igb_clean_all_rx_rings(adapter);
828 }
829
830 void igb_reinit_locked(struct igb_adapter *adapter)
831 {
832         WARN_ON(in_interrupt());
833         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
834                 msleep(1);
835         igb_down(adapter);
836         igb_up(adapter);
837         clear_bit(__IGB_RESETTING, &adapter->state);
838 }
839
840 void igb_reset(struct igb_adapter *adapter)
841 {
842         struct e1000_hw *hw = &adapter->hw;
843         struct e1000_mac_info *mac = &hw->mac;
844         struct e1000_fc_info *fc = &hw->fc;
845         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
846         u16 hwm;
847
848         /* Repartition Pba for greater than 9k mtu
849          * To take effect CTRL.RST is required.
850          */
851         if (mac->type != e1000_82576) {
852         pba = E1000_PBA_34K;
853         }
854         else {
855                 pba = E1000_PBA_64K;
856         }
857
858         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
859             (mac->type < e1000_82576)) {
860                 /* adjust PBA for jumbo frames */
861                 wr32(E1000_PBA, pba);
862
863                 /* To maintain wire speed transmits, the Tx FIFO should be
864                  * large enough to accommodate two full transmit packets,
865                  * rounded up to the next 1KB and expressed in KB.  Likewise,
866                  * the Rx FIFO should be large enough to accommodate at least
867                  * one full receive packet and is similarly rounded up and
868                  * expressed in KB. */
869                 pba = rd32(E1000_PBA);
870                 /* upper 16 bits has Tx packet buffer allocation size in KB */
871                 tx_space = pba >> 16;
872                 /* lower 16 bits has Rx packet buffer allocation size in KB */
873                 pba &= 0xffff;
874                 /* the tx fifo also stores 16 bytes of information about the tx
875                  * but don't include ethernet FCS because hardware appends it */
876                 min_tx_space = (adapter->max_frame_size +
877                                 sizeof(struct e1000_tx_desc) -
878                                 ETH_FCS_LEN) * 2;
879                 min_tx_space = ALIGN(min_tx_space, 1024);
880                 min_tx_space >>= 10;
881                 /* software strips receive CRC, so leave room for it */
882                 min_rx_space = adapter->max_frame_size;
883                 min_rx_space = ALIGN(min_rx_space, 1024);
884                 min_rx_space >>= 10;
885
886                 /* If current Tx allocation is less than the min Tx FIFO size,
887                  * and the min Tx FIFO size is less than the current Rx FIFO
888                  * allocation, take space away from current Rx allocation */
889                 if (tx_space < min_tx_space &&
890                     ((min_tx_space - tx_space) < pba)) {
891                         pba = pba - (min_tx_space - tx_space);
892
893                         /* if short on rx space, rx wins and must trump tx
894                          * adjustment */
895                         if (pba < min_rx_space)
896                                 pba = min_rx_space;
897                 }
898                 wr32(E1000_PBA, pba);
899         }
900
901         /* flow control settings */
902         /* The high water mark must be low enough to fit one full frame
903          * (or the size used for early receive) above it in the Rx FIFO.
904          * Set it to the lower of:
905          * - 90% of the Rx FIFO size, or
906          * - the full Rx FIFO size minus one full frame */
907         hwm = min(((pba << 10) * 9 / 10),
908                         ((pba << 10) - 2 * adapter->max_frame_size));
909
910         if (mac->type < e1000_82576) {
911                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
912                 fc->low_water = fc->high_water - 8;
913         } else {
914                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
915                 fc->low_water = fc->high_water - 16;
916         }
917         fc->pause_time = 0xFFFF;
918         fc->send_xon = 1;
919         fc->type = fc->original_type;
920
921         /* Allow time for pending master requests to run */
922         adapter->hw.mac.ops.reset_hw(&adapter->hw);
923         wr32(E1000_WUC, 0);
924
925         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
926                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
927
928         igb_update_mng_vlan(adapter);
929
930         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
931         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
932
933         igb_reset_adaptive(&adapter->hw);
934         if (adapter->hw.phy.ops.get_phy_info)
935                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
936 }
937
938 /**
939  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
940  * @pdev: PCI device information struct
941  *
942  * Returns true if an adapter needs ioport resources
943  **/
944 static int igb_is_need_ioport(struct pci_dev *pdev)
945 {
946         switch (pdev->device) {
947         /* Currently there are no adapters that need ioport resources */
948         default:
949                 return false;
950         }
951 }
952
953 /**
954  * igb_probe - Device Initialization Routine
955  * @pdev: PCI device information struct
956  * @ent: entry in igb_pci_tbl
957  *
958  * Returns 0 on success, negative on failure
959  *
960  * igb_probe initializes an adapter identified by a pci_dev structure.
961  * The OS initialization, configuring of the adapter private structure,
962  * and a hardware reset occur.
963  **/
964 static int __devinit igb_probe(struct pci_dev *pdev,
965                                const struct pci_device_id *ent)
966 {
967         struct net_device *netdev;
968         struct igb_adapter *adapter;
969         struct e1000_hw *hw;
970         struct pci_dev *us_dev;
971         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
972         unsigned long mmio_start, mmio_len;
973         int i, err, pci_using_dac, pos;
974         u16 eeprom_data = 0, state = 0;
975         u16 eeprom_apme_mask = IGB_EEPROM_APME;
976         u32 part_num;
977         int bars, need_ioport;
978
979         /* do not allocate ioport bars when not needed */
980         need_ioport = igb_is_need_ioport(pdev);
981         if (need_ioport) {
982                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
983                 err = pci_enable_device(pdev);
984         } else {
985                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
986                 err = pci_enable_device_mem(pdev);
987         }
988         if (err)
989                 return err;
990
991         pci_using_dac = 0;
992         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
993         if (!err) {
994                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
995                 if (!err)
996                         pci_using_dac = 1;
997         } else {
998                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
999                 if (err) {
1000                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1001                         if (err) {
1002                                 dev_err(&pdev->dev, "No usable DMA "
1003                                         "configuration, aborting\n");
1004                                 goto err_dma;
1005                         }
1006                 }
1007         }
1008
1009         /* 82575 requires that the pci-e link partner disable the L0s state */
1010         switch (pdev->device) {
1011         case E1000_DEV_ID_82575EB_COPPER:
1012         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1013         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1014                 us_dev = pdev->bus->self;
1015                 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1016                 if (pos) {
1017                         pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1018                                              &state);
1019                         state &= ~PCIE_LINK_STATE_L0S;
1020                         pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1021                                               state);
1022                         dev_info(&pdev->dev,
1023                                  "Disabling ASPM L0s upstream switch port %s\n",
1024                                  pci_name(us_dev));
1025                 }
1026         default:
1027                 break;
1028         }
1029
1030         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1031         if (err)
1032                 goto err_pci_reg;
1033
1034         pci_set_master(pdev);
1035         pci_save_state(pdev);
1036
1037         err = -ENOMEM;
1038         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1039         if (!netdev)
1040                 goto err_alloc_etherdev;
1041
1042         SET_NETDEV_DEV(netdev, &pdev->dev);
1043
1044         pci_set_drvdata(pdev, netdev);
1045         adapter = netdev_priv(netdev);
1046         adapter->netdev = netdev;
1047         adapter->pdev = pdev;
1048         hw = &adapter->hw;
1049         hw->back = adapter;
1050         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1051         adapter->bars = bars;
1052         adapter->need_ioport = need_ioport;
1053
1054         mmio_start = pci_resource_start(pdev, 0);
1055         mmio_len = pci_resource_len(pdev, 0);
1056
1057         err = -EIO;
1058         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1059         if (!adapter->hw.hw_addr)
1060                 goto err_ioremap;
1061
1062         netdev->open = &igb_open;
1063         netdev->stop = &igb_close;
1064         netdev->get_stats = &igb_get_stats;
1065         netdev->set_multicast_list = &igb_set_multi;
1066         netdev->set_mac_address = &igb_set_mac;
1067         netdev->change_mtu = &igb_change_mtu;
1068         netdev->do_ioctl = &igb_ioctl;
1069         igb_set_ethtool_ops(netdev);
1070         netdev->tx_timeout = &igb_tx_timeout;
1071         netdev->watchdog_timeo = 5 * HZ;
1072         netdev->vlan_rx_register = igb_vlan_rx_register;
1073         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1074         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1075 #ifdef CONFIG_NET_POLL_CONTROLLER
1076         netdev->poll_controller = igb_netpoll;
1077 #endif
1078         netdev->hard_start_xmit = &igb_xmit_frame_adv;
1079
1080         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1081
1082         netdev->mem_start = mmio_start;
1083         netdev->mem_end = mmio_start + mmio_len;
1084
1085         /* PCI config space info */
1086         hw->vendor_id = pdev->vendor;
1087         hw->device_id = pdev->device;
1088         hw->revision_id = pdev->revision;
1089         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1090         hw->subsystem_device_id = pdev->subsystem_device;
1091
1092         /* setup the private structure */
1093         hw->back = adapter;
1094         /* Copy the default MAC, PHY and NVM function pointers */
1095         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1096         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1097         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1098         /* Initialize skew-specific constants */
1099         err = ei->get_invariants(hw);
1100         if (err)
1101                 goto err_hw_init;
1102
1103         err = igb_sw_init(adapter);
1104         if (err)
1105                 goto err_sw_init;
1106
1107         igb_get_bus_info_pcie(hw);
1108
1109         /* set flags */
1110         switch (hw->mac.type) {
1111         case e1000_82576:
1112         case e1000_82575:
1113                 adapter->flags |= IGB_FLAG_HAS_DCA;
1114                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1115                 break;
1116         default:
1117                 break;
1118         }
1119
1120         hw->phy.autoneg_wait_to_complete = false;
1121         hw->mac.adaptive_ifs = true;
1122
1123         /* Copper options */
1124         if (hw->phy.media_type == e1000_media_type_copper) {
1125                 hw->phy.mdix = AUTO_ALL_MODES;
1126                 hw->phy.disable_polarity_correction = false;
1127                 hw->phy.ms_type = e1000_ms_hw_default;
1128         }
1129
1130         if (igb_check_reset_block(hw))
1131                 dev_info(&pdev->dev,
1132                         "PHY reset is blocked due to SOL/IDER session.\n");
1133
1134         netdev->features = NETIF_F_SG |
1135                            NETIF_F_HW_CSUM |
1136                            NETIF_F_HW_VLAN_TX |
1137                            NETIF_F_HW_VLAN_RX |
1138                            NETIF_F_HW_VLAN_FILTER;
1139
1140         netdev->features |= NETIF_F_TSO;
1141         netdev->features |= NETIF_F_TSO6;
1142
1143 #ifdef CONFIG_IGB_LRO
1144         netdev->features |= NETIF_F_LRO;
1145 #endif
1146
1147         netdev->vlan_features |= NETIF_F_TSO;
1148         netdev->vlan_features |= NETIF_F_TSO6;
1149         netdev->vlan_features |= NETIF_F_HW_CSUM;
1150         netdev->vlan_features |= NETIF_F_SG;
1151
1152         if (pci_using_dac)
1153                 netdev->features |= NETIF_F_HIGHDMA;
1154
1155         netdev->features |= NETIF_F_LLTX;
1156         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1157
1158         /* before reading the NVM, reset the controller to put the device in a
1159          * known good starting state */
1160         hw->mac.ops.reset_hw(hw);
1161
1162         /* make sure the NVM is good */
1163         if (igb_validate_nvm_checksum(hw) < 0) {
1164                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1165                 err = -EIO;
1166                 goto err_eeprom;
1167         }
1168
1169         /* copy the MAC address out of the NVM */
1170         if (hw->mac.ops.read_mac_addr(hw))
1171                 dev_err(&pdev->dev, "NVM Read Error\n");
1172
1173         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1174         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1175
1176         if (!is_valid_ether_addr(netdev->perm_addr)) {
1177                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1178                 err = -EIO;
1179                 goto err_eeprom;
1180         }
1181
1182         init_timer(&adapter->watchdog_timer);
1183         adapter->watchdog_timer.function = &igb_watchdog;
1184         adapter->watchdog_timer.data = (unsigned long) adapter;
1185
1186         init_timer(&adapter->phy_info_timer);
1187         adapter->phy_info_timer.function = &igb_update_phy_info;
1188         adapter->phy_info_timer.data = (unsigned long) adapter;
1189
1190         INIT_WORK(&adapter->reset_task, igb_reset_task);
1191         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1192
1193         /* Initialize link & ring properties that are user-changeable */
1194         adapter->tx_ring->count = 256;
1195         for (i = 0; i < adapter->num_tx_queues; i++)
1196                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1197         adapter->rx_ring->count = 256;
1198         for (i = 0; i < adapter->num_rx_queues; i++)
1199                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1200
1201         adapter->fc_autoneg = true;
1202         hw->mac.autoneg = true;
1203         hw->phy.autoneg_advertised = 0x2f;
1204
1205         hw->fc.original_type = e1000_fc_default;
1206         hw->fc.type = e1000_fc_default;
1207
1208         adapter->itr_setting = 3;
1209         adapter->itr = IGB_START_ITR;
1210
1211         igb_validate_mdi_setting(hw);
1212
1213         adapter->rx_csum = 1;
1214
1215         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1216          * enable the ACPI Magic Packet filter
1217          */
1218
1219         if (hw->bus.func == 0 ||
1220             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1221                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1222                                      &eeprom_data);
1223
1224         if (eeprom_data & eeprom_apme_mask)
1225                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1226
1227         /* now that we have the eeprom settings, apply the special cases where
1228          * the eeprom may be wrong or the board simply won't support wake on
1229          * lan on a particular port */
1230         switch (pdev->device) {
1231         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1232                 adapter->eeprom_wol = 0;
1233                 break;
1234         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1235         case E1000_DEV_ID_82576_FIBER:
1236         case E1000_DEV_ID_82576_SERDES:
1237                 /* Wake events only supported on port A for dual fiber
1238                  * regardless of eeprom setting */
1239                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1240                         adapter->eeprom_wol = 0;
1241                 break;
1242         }
1243
1244         /* initialize the wol settings based on the eeprom settings */
1245         adapter->wol = adapter->eeprom_wol;
1246         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1247
1248         /* reset the hardware with the new settings */
1249         igb_reset(adapter);
1250
1251         /* let the f/w know that the h/w is now under the control of the
1252          * driver. */
1253         igb_get_hw_control(adapter);
1254
1255         /* tell the stack to leave us alone until igb_open() is called */
1256         netif_carrier_off(netdev);
1257         netif_tx_stop_all_queues(netdev);
1258
1259         strcpy(netdev->name, "eth%d");
1260         err = register_netdev(netdev);
1261         if (err)
1262                 goto err_register;
1263
1264 #ifdef CONFIG_IGB_DCA
1265         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1266             (dca_add_requester(&pdev->dev) == 0)) {
1267                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1268                 dev_info(&pdev->dev, "DCA enabled\n");
1269                 /* Always use CB2 mode, difference is masked
1270                  * in the CB driver. */
1271                 wr32(E1000_DCA_CTRL, 2);
1272                 igb_setup_dca(adapter);
1273         }
1274 #endif
1275
1276         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1277         /* print bus type/speed/width info */
1278         dev_info(&pdev->dev,
1279                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1280                  netdev->name,
1281                  ((hw->bus.speed == e1000_bus_speed_2500)
1282                   ? "2.5Gb/s" : "unknown"),
1283                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1284                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1285                   ? "Width x1" : "unknown"),
1286                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1287                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1288
1289         igb_read_part_num(hw, &part_num);
1290         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1291                 (part_num >> 8), (part_num & 0xff));
1292
1293         dev_info(&pdev->dev,
1294                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1295                 adapter->msix_entries ? "MSI-X" :
1296                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1297                 adapter->num_rx_queues, adapter->num_tx_queues);
1298
1299         return 0;
1300
1301 err_register:
1302         igb_release_hw_control(adapter);
1303 err_eeprom:
1304         if (!igb_check_reset_block(hw))
1305                 hw->phy.ops.reset_phy(hw);
1306
1307         if (hw->flash_address)
1308                 iounmap(hw->flash_address);
1309
1310         igb_remove_device(hw);
1311         igb_free_queues(adapter);
1312 err_sw_init:
1313 err_hw_init:
1314         iounmap(hw->hw_addr);
1315 err_ioremap:
1316         free_netdev(netdev);
1317 err_alloc_etherdev:
1318         pci_release_selected_regions(pdev, bars);
1319 err_pci_reg:
1320 err_dma:
1321         pci_disable_device(pdev);
1322         return err;
1323 }
1324
1325 /**
1326  * igb_remove - Device Removal Routine
1327  * @pdev: PCI device information struct
1328  *
1329  * igb_remove is called by the PCI subsystem to alert the driver
1330  * that it should release a PCI device.  The could be caused by a
1331  * Hot-Plug event, or because the driver is going to be removed from
1332  * memory.
1333  **/
1334 static void __devexit igb_remove(struct pci_dev *pdev)
1335 {
1336         struct net_device *netdev = pci_get_drvdata(pdev);
1337         struct igb_adapter *adapter = netdev_priv(netdev);
1338 #ifdef CONFIG_IGB_DCA
1339         struct e1000_hw *hw = &adapter->hw;
1340 #endif
1341
1342         /* flush_scheduled work may reschedule our watchdog task, so
1343          * explicitly disable watchdog tasks from being rescheduled  */
1344         set_bit(__IGB_DOWN, &adapter->state);
1345         del_timer_sync(&adapter->watchdog_timer);
1346         del_timer_sync(&adapter->phy_info_timer);
1347
1348         flush_scheduled_work();
1349
1350 #ifdef CONFIG_IGB_DCA
1351         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1352                 dev_info(&pdev->dev, "DCA disabled\n");
1353                 dca_remove_requester(&pdev->dev);
1354                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1355                 wr32(E1000_DCA_CTRL, 1);
1356         }
1357 #endif
1358
1359         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1360          * would have already happened in close and is redundant. */
1361         igb_release_hw_control(adapter);
1362
1363         unregister_netdev(netdev);
1364
1365         if (adapter->hw.phy.ops.reset_phy &&
1366             !igb_check_reset_block(&adapter->hw))
1367                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1368
1369         igb_remove_device(&adapter->hw);
1370         igb_reset_interrupt_capability(adapter);
1371
1372         igb_free_queues(adapter);
1373
1374         iounmap(adapter->hw.hw_addr);
1375         if (adapter->hw.flash_address)
1376                 iounmap(adapter->hw.flash_address);
1377         pci_release_selected_regions(pdev, adapter->bars);
1378
1379         free_netdev(netdev);
1380
1381         pci_disable_device(pdev);
1382 }
1383
1384 /**
1385  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1386  * @adapter: board private structure to initialize
1387  *
1388  * igb_sw_init initializes the Adapter private data structure.
1389  * Fields are initialized based on PCI device information and
1390  * OS network device settings (MTU size).
1391  **/
1392 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1393 {
1394         struct e1000_hw *hw = &adapter->hw;
1395         struct net_device *netdev = adapter->netdev;
1396         struct pci_dev *pdev = adapter->pdev;
1397
1398         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1399
1400         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1401         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1402         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1403         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1404
1405         /* Number of supported queues. */
1406         /* Having more queues than CPUs doesn't make sense. */
1407         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1408         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1409
1410         /* This call may decrease the number of queues depending on
1411          * interrupt mode. */
1412         igb_set_interrupt_capability(adapter);
1413
1414         if (igb_alloc_queues(adapter)) {
1415                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1416                 return -ENOMEM;
1417         }
1418
1419         /* Explicitly disable IRQ since the NIC can be in any state. */
1420         igb_irq_disable(adapter);
1421
1422         set_bit(__IGB_DOWN, &adapter->state);
1423         return 0;
1424 }
1425
1426 /**
1427  * igb_open - Called when a network interface is made active
1428  * @netdev: network interface device structure
1429  *
1430  * Returns 0 on success, negative value on failure
1431  *
1432  * The open entry point is called when a network interface is made
1433  * active by the system (IFF_UP).  At this point all resources needed
1434  * for transmit and receive operations are allocated, the interrupt
1435  * handler is registered with the OS, the watchdog timer is started,
1436  * and the stack is notified that the interface is ready.
1437  **/
1438 static int igb_open(struct net_device *netdev)
1439 {
1440         struct igb_adapter *adapter = netdev_priv(netdev);
1441         struct e1000_hw *hw = &adapter->hw;
1442         int err;
1443         int i;
1444
1445         /* disallow open during test */
1446         if (test_bit(__IGB_TESTING, &adapter->state))
1447                 return -EBUSY;
1448
1449         /* allocate transmit descriptors */
1450         err = igb_setup_all_tx_resources(adapter);
1451         if (err)
1452                 goto err_setup_tx;
1453
1454         /* allocate receive descriptors */
1455         err = igb_setup_all_rx_resources(adapter);
1456         if (err)
1457                 goto err_setup_rx;
1458
1459         /* e1000_power_up_phy(adapter); */
1460
1461         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1462         if ((adapter->hw.mng_cookie.status &
1463              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1464                 igb_update_mng_vlan(adapter);
1465
1466         /* before we allocate an interrupt, we must be ready to handle it.
1467          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1468          * as soon as we call pci_request_irq, so we have to setup our
1469          * clean_rx handler before we do so.  */
1470         igb_configure(adapter);
1471
1472         err = igb_request_irq(adapter);
1473         if (err)
1474                 goto err_req_irq;
1475
1476         /* From here on the code is the same as igb_up() */
1477         clear_bit(__IGB_DOWN, &adapter->state);
1478
1479         for (i = 0; i < adapter->num_rx_queues; i++)
1480                 napi_enable(&adapter->rx_ring[i].napi);
1481
1482         /* Clear any pending interrupts. */
1483         rd32(E1000_ICR);
1484
1485         igb_irq_enable(adapter);
1486
1487         netif_tx_start_all_queues(netdev);
1488
1489         /* Fire a link status change interrupt to start the watchdog. */
1490         wr32(E1000_ICS, E1000_ICS_LSC);
1491
1492         return 0;
1493
1494 err_req_irq:
1495         igb_release_hw_control(adapter);
1496         /* e1000_power_down_phy(adapter); */
1497         igb_free_all_rx_resources(adapter);
1498 err_setup_rx:
1499         igb_free_all_tx_resources(adapter);
1500 err_setup_tx:
1501         igb_reset(adapter);
1502
1503         return err;
1504 }
1505
1506 /**
1507  * igb_close - Disables a network interface
1508  * @netdev: network interface device structure
1509  *
1510  * Returns 0, this is not allowed to fail
1511  *
1512  * The close entry point is called when an interface is de-activated
1513  * by the OS.  The hardware is still under the driver's control, but
1514  * needs to be disabled.  A global MAC reset is issued to stop the
1515  * hardware, and all transmit and receive resources are freed.
1516  **/
1517 static int igb_close(struct net_device *netdev)
1518 {
1519         struct igb_adapter *adapter = netdev_priv(netdev);
1520
1521         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1522         igb_down(adapter);
1523
1524         igb_free_irq(adapter);
1525
1526         igb_free_all_tx_resources(adapter);
1527         igb_free_all_rx_resources(adapter);
1528
1529         /* kill manageability vlan ID if supported, but not if a vlan with
1530          * the same ID is registered on the host OS (let 8021q kill it) */
1531         if ((adapter->hw.mng_cookie.status &
1532                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1533              !(adapter->vlgrp &&
1534                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1535                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1536
1537         return 0;
1538 }
1539
1540 /**
1541  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1542  * @adapter: board private structure
1543  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1544  *
1545  * Return 0 on success, negative on failure
1546  **/
1547
1548 int igb_setup_tx_resources(struct igb_adapter *adapter,
1549                            struct igb_ring *tx_ring)
1550 {
1551         struct pci_dev *pdev = adapter->pdev;
1552         int size;
1553
1554         size = sizeof(struct igb_buffer) * tx_ring->count;
1555         tx_ring->buffer_info = vmalloc(size);
1556         if (!tx_ring->buffer_info)
1557                 goto err;
1558         memset(tx_ring->buffer_info, 0, size);
1559
1560         /* round up to nearest 4K */
1561         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1562                         + sizeof(u32);
1563         tx_ring->size = ALIGN(tx_ring->size, 4096);
1564
1565         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1566                                              &tx_ring->dma);
1567
1568         if (!tx_ring->desc)
1569                 goto err;
1570
1571         tx_ring->adapter = adapter;
1572         tx_ring->next_to_use = 0;
1573         tx_ring->next_to_clean = 0;
1574         return 0;
1575
1576 err:
1577         vfree(tx_ring->buffer_info);
1578         dev_err(&adapter->pdev->dev,
1579                 "Unable to allocate memory for the transmit descriptor ring\n");
1580         return -ENOMEM;
1581 }
1582
1583 /**
1584  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1585  *                                (Descriptors) for all queues
1586  * @adapter: board private structure
1587  *
1588  * Return 0 on success, negative on failure
1589  **/
1590 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1591 {
1592         int i, err = 0;
1593         int r_idx;
1594
1595         for (i = 0; i < adapter->num_tx_queues; i++) {
1596                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1597                 if (err) {
1598                         dev_err(&adapter->pdev->dev,
1599                                 "Allocation for Tx Queue %u failed\n", i);
1600                         for (i--; i >= 0; i--)
1601                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1602                         break;
1603                 }
1604         }
1605
1606         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1607                 r_idx = i % adapter->num_tx_queues;
1608                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1609         }       
1610         return err;
1611 }
1612
1613 /**
1614  * igb_configure_tx - Configure transmit Unit after Reset
1615  * @adapter: board private structure
1616  *
1617  * Configure the Tx unit of the MAC after a reset.
1618  **/
1619 static void igb_configure_tx(struct igb_adapter *adapter)
1620 {
1621         u64 tdba, tdwba;
1622         struct e1000_hw *hw = &adapter->hw;
1623         u32 tctl;
1624         u32 txdctl, txctrl;
1625         int i;
1626
1627         for (i = 0; i < adapter->num_tx_queues; i++) {
1628                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1629
1630                 wr32(E1000_TDLEN(i),
1631                                 ring->count * sizeof(struct e1000_tx_desc));
1632                 tdba = ring->dma;
1633                 wr32(E1000_TDBAL(i),
1634                                 tdba & 0x00000000ffffffffULL);
1635                 wr32(E1000_TDBAH(i), tdba >> 32);
1636
1637                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1638                 tdwba |= 1; /* enable head wb */
1639                 wr32(E1000_TDWBAL(i),
1640                                 tdwba & 0x00000000ffffffffULL);
1641                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1642
1643                 ring->head = E1000_TDH(i);
1644                 ring->tail = E1000_TDT(i);
1645                 writel(0, hw->hw_addr + ring->tail);
1646                 writel(0, hw->hw_addr + ring->head);
1647                 txdctl = rd32(E1000_TXDCTL(i));
1648                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1649                 wr32(E1000_TXDCTL(i), txdctl);
1650
1651                 /* Turn off Relaxed Ordering on head write-backs.  The
1652                  * writebacks MUST be delivered in order or it will
1653                  * completely screw up our bookeeping.
1654                  */
1655                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1656                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1657                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1658         }
1659
1660
1661
1662         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1663
1664         /* Program the Transmit Control Register */
1665
1666         tctl = rd32(E1000_TCTL);
1667         tctl &= ~E1000_TCTL_CT;
1668         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1669                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1670
1671         igb_config_collision_dist(hw);
1672
1673         /* Setup Transmit Descriptor Settings for eop descriptor */
1674         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1675
1676         /* Enable transmits */
1677         tctl |= E1000_TCTL_EN;
1678
1679         wr32(E1000_TCTL, tctl);
1680 }
1681
1682 /**
1683  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1684  * @adapter: board private structure
1685  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1686  *
1687  * Returns 0 on success, negative on failure
1688  **/
1689
1690 int igb_setup_rx_resources(struct igb_adapter *adapter,
1691                            struct igb_ring *rx_ring)
1692 {
1693         struct pci_dev *pdev = adapter->pdev;
1694         int size, desc_len;
1695
1696 #ifdef CONFIG_IGB_LRO
1697         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1698         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1699         if (!rx_ring->lro_mgr.lro_arr)
1700                 goto err;
1701         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1702 #endif
1703
1704         size = sizeof(struct igb_buffer) * rx_ring->count;
1705         rx_ring->buffer_info = vmalloc(size);
1706         if (!rx_ring->buffer_info)
1707                 goto err;
1708         memset(rx_ring->buffer_info, 0, size);
1709
1710         desc_len = sizeof(union e1000_adv_rx_desc);
1711
1712         /* Round up to nearest 4K */
1713         rx_ring->size = rx_ring->count * desc_len;
1714         rx_ring->size = ALIGN(rx_ring->size, 4096);
1715
1716         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1717                                              &rx_ring->dma);
1718
1719         if (!rx_ring->desc)
1720                 goto err;
1721
1722         rx_ring->next_to_clean = 0;
1723         rx_ring->next_to_use = 0;
1724
1725         rx_ring->adapter = adapter;
1726
1727         return 0;
1728
1729 err:
1730 #ifdef CONFIG_IGB_LRO
1731         vfree(rx_ring->lro_mgr.lro_arr);
1732         rx_ring->lro_mgr.lro_arr = NULL;
1733 #endif
1734         vfree(rx_ring->buffer_info);
1735         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1736                 "the receive descriptor ring\n");
1737         return -ENOMEM;
1738 }
1739
1740 /**
1741  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1742  *                                (Descriptors) for all queues
1743  * @adapter: board private structure
1744  *
1745  * Return 0 on success, negative on failure
1746  **/
1747 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1748 {
1749         int i, err = 0;
1750
1751         for (i = 0; i < adapter->num_rx_queues; i++) {
1752                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1753                 if (err) {
1754                         dev_err(&adapter->pdev->dev,
1755                                 "Allocation for Rx Queue %u failed\n", i);
1756                         for (i--; i >= 0; i--)
1757                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1758                         break;
1759                 }
1760         }
1761
1762         return err;
1763 }
1764
1765 /**
1766  * igb_setup_rctl - configure the receive control registers
1767  * @adapter: Board private structure
1768  **/
1769 static void igb_setup_rctl(struct igb_adapter *adapter)
1770 {
1771         struct e1000_hw *hw = &adapter->hw;
1772         u32 rctl;
1773         u32 srrctl = 0;
1774         int i;
1775
1776         rctl = rd32(E1000_RCTL);
1777
1778         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1779
1780         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1781                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1782                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1783
1784         /*
1785          * enable stripping of CRC. It's unlikely this will break BMC
1786          * redirection as it did with e1000. Newer features require
1787          * that the HW strips the CRC.
1788         */
1789         rctl |= E1000_RCTL_SECRC;
1790
1791         rctl &= ~E1000_RCTL_SBP;
1792
1793         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1794                 rctl &= ~E1000_RCTL_LPE;
1795         else
1796                 rctl |= E1000_RCTL_LPE;
1797         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1798                 /* Setup buffer sizes */
1799                 rctl &= ~E1000_RCTL_SZ_4096;
1800                 rctl |= E1000_RCTL_BSEX;
1801                 switch (adapter->rx_buffer_len) {
1802                 case IGB_RXBUFFER_256:
1803                         rctl |= E1000_RCTL_SZ_256;
1804                         rctl &= ~E1000_RCTL_BSEX;
1805                         break;
1806                 case IGB_RXBUFFER_512:
1807                         rctl |= E1000_RCTL_SZ_512;
1808                         rctl &= ~E1000_RCTL_BSEX;
1809                         break;
1810                 case IGB_RXBUFFER_1024:
1811                         rctl |= E1000_RCTL_SZ_1024;
1812                         rctl &= ~E1000_RCTL_BSEX;
1813                         break;
1814                 case IGB_RXBUFFER_2048:
1815                 default:
1816                         rctl |= E1000_RCTL_SZ_2048;
1817                         rctl &= ~E1000_RCTL_BSEX;
1818                         break;
1819                 }
1820         } else {
1821                 rctl &= ~E1000_RCTL_BSEX;
1822                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1823         }
1824
1825         /* 82575 and greater support packet-split where the protocol
1826          * header is placed in skb->data and the packet data is
1827          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1828          * In the case of a non-split, skb->data is linearly filled,
1829          * followed by the page buffers.  Therefore, skb->data is
1830          * sized to hold the largest protocol header.
1831          */
1832         /* allocations using alloc_page take too long for regular MTU
1833          * so only enable packet split for jumbo frames */
1834         if (rctl & E1000_RCTL_LPE) {
1835                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1836                 srrctl |= adapter->rx_ps_hdr_size <<
1837                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1838                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1839         } else {
1840                 adapter->rx_ps_hdr_size = 0;
1841                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1842         }
1843
1844         for (i = 0; i < adapter->num_rx_queues; i++)
1845                 wr32(E1000_SRRCTL(i), srrctl);
1846
1847         wr32(E1000_RCTL, rctl);
1848 }
1849
1850 /**
1851  * igb_configure_rx - Configure receive Unit after Reset
1852  * @adapter: board private structure
1853  *
1854  * Configure the Rx unit of the MAC after a reset.
1855  **/
1856 static void igb_configure_rx(struct igb_adapter *adapter)
1857 {
1858         u64 rdba;
1859         struct e1000_hw *hw = &adapter->hw;
1860         u32 rctl, rxcsum;
1861         u32 rxdctl;
1862         int i;
1863
1864         /* disable receives while setting up the descriptors */
1865         rctl = rd32(E1000_RCTL);
1866         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1867         wrfl();
1868         mdelay(10);
1869
1870         if (adapter->itr_setting > 3)
1871                 wr32(E1000_ITR, adapter->itr);
1872
1873         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1874          * the Base and Length of the Rx Descriptor Ring */
1875         for (i = 0; i < adapter->num_rx_queues; i++) {
1876                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1877                 rdba = ring->dma;
1878                 wr32(E1000_RDBAL(i),
1879                                 rdba & 0x00000000ffffffffULL);
1880                 wr32(E1000_RDBAH(i), rdba >> 32);
1881                 wr32(E1000_RDLEN(i),
1882                                ring->count * sizeof(union e1000_adv_rx_desc));
1883
1884                 ring->head = E1000_RDH(i);
1885                 ring->tail = E1000_RDT(i);
1886                 writel(0, hw->hw_addr + ring->tail);
1887                 writel(0, hw->hw_addr + ring->head);
1888
1889                 rxdctl = rd32(E1000_RXDCTL(i));
1890                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1891                 rxdctl &= 0xFFF00000;
1892                 rxdctl |= IGB_RX_PTHRESH;
1893                 rxdctl |= IGB_RX_HTHRESH << 8;
1894                 rxdctl |= IGB_RX_WTHRESH << 16;
1895                 wr32(E1000_RXDCTL(i), rxdctl);
1896 #ifdef CONFIG_IGB_LRO
1897                 /* Intitial LRO Settings */
1898                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1899                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1900                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1901                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1902                 ring->lro_mgr.dev = adapter->netdev;
1903                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1904                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1905 #endif
1906         }
1907
1908         if (adapter->num_rx_queues > 1) {
1909                 u32 random[10];
1910                 u32 mrqc;
1911                 u32 j, shift;
1912                 union e1000_reta {
1913                         u32 dword;
1914                         u8  bytes[4];
1915                 } reta;
1916
1917                 get_random_bytes(&random[0], 40);
1918
1919                 if (hw->mac.type >= e1000_82576)
1920                         shift = 0;
1921                 else
1922                         shift = 6;
1923                 for (j = 0; j < (32 * 4); j++) {
1924                         reta.bytes[j & 3] =
1925                                 (j % adapter->num_rx_queues) << shift;
1926                         if ((j & 3) == 3)
1927                                 writel(reta.dword,
1928                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1929                 }
1930                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1931
1932                 /* Fill out hash function seeds */
1933                 for (j = 0; j < 10; j++)
1934                         array_wr32(E1000_RSSRK(0), j, random[j]);
1935
1936                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1937                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1938                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1939                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1940                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1941                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1942                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1943                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1944
1945
1946                 wr32(E1000_MRQC, mrqc);
1947
1948                 /* Multiqueue and raw packet checksumming are mutually
1949                  * exclusive.  Note that this not the same as TCP/IP
1950                  * checksumming, which works fine. */
1951                 rxcsum = rd32(E1000_RXCSUM);
1952                 rxcsum |= E1000_RXCSUM_PCSD;
1953                 wr32(E1000_RXCSUM, rxcsum);
1954         } else {
1955                 /* Enable Receive Checksum Offload for TCP and UDP */
1956                 rxcsum = rd32(E1000_RXCSUM);
1957                 if (adapter->rx_csum) {
1958                         rxcsum |= E1000_RXCSUM_TUOFL;
1959
1960                         /* Enable IPv4 payload checksum for UDP fragments
1961                          * Must be used in conjunction with packet-split. */
1962                         if (adapter->rx_ps_hdr_size)
1963                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1964                 } else {
1965                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1966                         /* don't need to clear IPPCSE as it defaults to 0 */
1967                 }
1968                 wr32(E1000_RXCSUM, rxcsum);
1969         }
1970
1971         if (adapter->vlgrp)
1972                 wr32(E1000_RLPML,
1973                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1974         else
1975                 wr32(E1000_RLPML, adapter->max_frame_size);
1976
1977         /* Enable Receives */
1978         wr32(E1000_RCTL, rctl);
1979 }
1980
1981 /**
1982  * igb_free_tx_resources - Free Tx Resources per Queue
1983  * @adapter: board private structure
1984  * @tx_ring: Tx descriptor ring for a specific queue
1985  *
1986  * Free all transmit software resources
1987  **/
1988 static void igb_free_tx_resources(struct igb_ring *tx_ring)
1989 {
1990         struct pci_dev *pdev = tx_ring->adapter->pdev;
1991
1992         igb_clean_tx_ring(tx_ring);
1993
1994         vfree(tx_ring->buffer_info);
1995         tx_ring->buffer_info = NULL;
1996
1997         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1998
1999         tx_ring->desc = NULL;
2000 }
2001
2002 /**
2003  * igb_free_all_tx_resources - Free Tx Resources for All Queues
2004  * @adapter: board private structure
2005  *
2006  * Free all transmit software resources
2007  **/
2008 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2009 {
2010         int i;
2011
2012         for (i = 0; i < adapter->num_tx_queues; i++)
2013                 igb_free_tx_resources(&adapter->tx_ring[i]);
2014 }
2015
2016 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2017                                            struct igb_buffer *buffer_info)
2018 {
2019         if (buffer_info->dma) {
2020                 pci_unmap_page(adapter->pdev,
2021                                 buffer_info->dma,
2022                                 buffer_info->length,
2023                                 PCI_DMA_TODEVICE);
2024                 buffer_info->dma = 0;
2025         }
2026         if (buffer_info->skb) {
2027                 dev_kfree_skb_any(buffer_info->skb);
2028                 buffer_info->skb = NULL;
2029         }
2030         buffer_info->time_stamp = 0;
2031         /* buffer_info must be completely set up in the transmit path */
2032 }
2033
2034 /**
2035  * igb_clean_tx_ring - Free Tx Buffers
2036  * @adapter: board private structure
2037  * @tx_ring: ring to be cleaned
2038  **/
2039 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2040 {
2041         struct igb_adapter *adapter = tx_ring->adapter;
2042         struct igb_buffer *buffer_info;
2043         unsigned long size;
2044         unsigned int i;
2045
2046         if (!tx_ring->buffer_info)
2047                 return;
2048         /* Free all the Tx ring sk_buffs */
2049
2050         for (i = 0; i < tx_ring->count; i++) {
2051                 buffer_info = &tx_ring->buffer_info[i];
2052                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2053         }
2054
2055         size = sizeof(struct igb_buffer) * tx_ring->count;
2056         memset(tx_ring->buffer_info, 0, size);
2057
2058         /* Zero out the descriptor ring */
2059
2060         memset(tx_ring->desc, 0, tx_ring->size);
2061
2062         tx_ring->next_to_use = 0;
2063         tx_ring->next_to_clean = 0;
2064
2065         writel(0, adapter->hw.hw_addr + tx_ring->head);
2066         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2067 }
2068
2069 /**
2070  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2071  * @adapter: board private structure
2072  **/
2073 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2074 {
2075         int i;
2076
2077         for (i = 0; i < adapter->num_tx_queues; i++)
2078                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2079 }
2080
2081 /**
2082  * igb_free_rx_resources - Free Rx Resources
2083  * @adapter: board private structure
2084  * @rx_ring: ring to clean the resources from
2085  *
2086  * Free all receive software resources
2087  **/
2088 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2089 {
2090         struct pci_dev *pdev = rx_ring->adapter->pdev;
2091
2092         igb_clean_rx_ring(rx_ring);
2093
2094         vfree(rx_ring->buffer_info);
2095         rx_ring->buffer_info = NULL;
2096
2097 #ifdef CONFIG_IGB_LRO
2098         vfree(rx_ring->lro_mgr.lro_arr);
2099         rx_ring->lro_mgr.lro_arr = NULL;
2100 #endif 
2101
2102         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2103
2104         rx_ring->desc = NULL;
2105 }
2106
2107 /**
2108  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2109  * @adapter: board private structure
2110  *
2111  * Free all receive software resources
2112  **/
2113 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2114 {
2115         int i;
2116
2117         for (i = 0; i < adapter->num_rx_queues; i++)
2118                 igb_free_rx_resources(&adapter->rx_ring[i]);
2119 }
2120
2121 /**
2122  * igb_clean_rx_ring - Free Rx Buffers per Queue
2123  * @adapter: board private structure
2124  * @rx_ring: ring to free buffers from
2125  **/
2126 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2127 {
2128         struct igb_adapter *adapter = rx_ring->adapter;
2129         struct igb_buffer *buffer_info;
2130         struct pci_dev *pdev = adapter->pdev;
2131         unsigned long size;
2132         unsigned int i;
2133
2134         if (!rx_ring->buffer_info)
2135                 return;
2136         /* Free all the Rx ring sk_buffs */
2137         for (i = 0; i < rx_ring->count; i++) {
2138                 buffer_info = &rx_ring->buffer_info[i];
2139                 if (buffer_info->dma) {
2140                         if (adapter->rx_ps_hdr_size)
2141                                 pci_unmap_single(pdev, buffer_info->dma,
2142                                                  adapter->rx_ps_hdr_size,
2143                                                  PCI_DMA_FROMDEVICE);
2144                         else
2145                                 pci_unmap_single(pdev, buffer_info->dma,
2146                                                  adapter->rx_buffer_len,
2147                                                  PCI_DMA_FROMDEVICE);
2148                         buffer_info->dma = 0;
2149                 }
2150
2151                 if (buffer_info->skb) {
2152                         dev_kfree_skb(buffer_info->skb);
2153                         buffer_info->skb = NULL;
2154                 }
2155                 if (buffer_info->page) {
2156                         if (buffer_info->page_dma)
2157                                 pci_unmap_page(pdev, buffer_info->page_dma,
2158                                                PAGE_SIZE / 2,
2159                                                PCI_DMA_FROMDEVICE);
2160                         put_page(buffer_info->page);
2161                         buffer_info->page = NULL;
2162                         buffer_info->page_dma = 0;
2163                         buffer_info->page_offset = 0;
2164                 }
2165         }
2166
2167         size = sizeof(struct igb_buffer) * rx_ring->count;
2168         memset(rx_ring->buffer_info, 0, size);
2169
2170         /* Zero out the descriptor ring */
2171         memset(rx_ring->desc, 0, rx_ring->size);
2172
2173         rx_ring->next_to_clean = 0;
2174         rx_ring->next_to_use = 0;
2175
2176         writel(0, adapter->hw.hw_addr + rx_ring->head);
2177         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2178 }
2179
2180 /**
2181  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2182  * @adapter: board private structure
2183  **/
2184 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2185 {
2186         int i;
2187
2188         for (i = 0; i < adapter->num_rx_queues; i++)
2189                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2190 }
2191
2192 /**
2193  * igb_set_mac - Change the Ethernet Address of the NIC
2194  * @netdev: network interface device structure
2195  * @p: pointer to an address structure
2196  *
2197  * Returns 0 on success, negative on failure
2198  **/
2199 static int igb_set_mac(struct net_device *netdev, void *p)
2200 {
2201         struct igb_adapter *adapter = netdev_priv(netdev);
2202         struct sockaddr *addr = p;
2203
2204         if (!is_valid_ether_addr(addr->sa_data))
2205                 return -EADDRNOTAVAIL;
2206
2207         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2208         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2209
2210         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2211
2212         return 0;
2213 }
2214
2215 /**
2216  * igb_set_multi - Multicast and Promiscuous mode set
2217  * @netdev: network interface device structure
2218  *
2219  * The set_multi entry point is called whenever the multicast address
2220  * list or the network interface flags are updated.  This routine is
2221  * responsible for configuring the hardware for proper multicast,
2222  * promiscuous mode, and all-multi behavior.
2223  **/
2224 static void igb_set_multi(struct net_device *netdev)
2225 {
2226         struct igb_adapter *adapter = netdev_priv(netdev);
2227         struct e1000_hw *hw = &adapter->hw;
2228         struct e1000_mac_info *mac = &hw->mac;
2229         struct dev_mc_list *mc_ptr;
2230         u8  *mta_list;
2231         u32 rctl;
2232         int i;
2233
2234         /* Check for Promiscuous and All Multicast modes */
2235
2236         rctl = rd32(E1000_RCTL);
2237
2238         if (netdev->flags & IFF_PROMISC) {
2239                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2240                 rctl &= ~E1000_RCTL_VFE;
2241         } else {
2242                 if (netdev->flags & IFF_ALLMULTI) {
2243                         rctl |= E1000_RCTL_MPE;
2244                         rctl &= ~E1000_RCTL_UPE;
2245                 } else
2246                         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2247                 rctl |= E1000_RCTL_VFE;
2248         }
2249         wr32(E1000_RCTL, rctl);
2250
2251         if (!netdev->mc_count) {
2252                 /* nothing to program, so clear mc list */
2253                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2254                                           mac->rar_entry_count);
2255                 return;
2256         }
2257
2258         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2259         if (!mta_list)
2260                 return;
2261
2262         /* The shared function expects a packed array of only addresses. */
2263         mc_ptr = netdev->mc_list;
2264
2265         for (i = 0; i < netdev->mc_count; i++) {
2266                 if (!mc_ptr)
2267                         break;
2268                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2269                 mc_ptr = mc_ptr->next;
2270         }
2271         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2272                                       mac->rar_entry_count);
2273         kfree(mta_list);
2274 }
2275
2276 /* Need to wait a few seconds after link up to get diagnostic information from
2277  * the phy */
2278 static void igb_update_phy_info(unsigned long data)
2279 {
2280         struct igb_adapter *adapter = (struct igb_adapter *) data;
2281         if (adapter->hw.phy.ops.get_phy_info)
2282                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2283 }
2284
2285 /**
2286  * igb_watchdog - Timer Call-back
2287  * @data: pointer to adapter cast into an unsigned long
2288  **/
2289 static void igb_watchdog(unsigned long data)
2290 {
2291         struct igb_adapter *adapter = (struct igb_adapter *)data;
2292         /* Do the rest outside of interrupt context */
2293         schedule_work(&adapter->watchdog_task);
2294 }
2295
2296 static void igb_watchdog_task(struct work_struct *work)
2297 {
2298         struct igb_adapter *adapter = container_of(work,
2299                                         struct igb_adapter, watchdog_task);
2300         struct e1000_hw *hw = &adapter->hw;
2301
2302         struct net_device *netdev = adapter->netdev;
2303         struct igb_ring *tx_ring = adapter->tx_ring;
2304         struct e1000_mac_info *mac = &adapter->hw.mac;
2305         u32 link;
2306         u32 eics = 0;
2307         s32 ret_val;
2308         int i;
2309
2310         if ((netif_carrier_ok(netdev)) &&
2311             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2312                 goto link_up;
2313
2314         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2315         if ((ret_val == E1000_ERR_PHY) &&
2316             (hw->phy.type == e1000_phy_igp_3) &&
2317             (rd32(E1000_CTRL) &
2318              E1000_PHY_CTRL_GBE_DISABLE))
2319                 dev_info(&adapter->pdev->dev,
2320                          "Gigabit has been disabled, downgrading speed\n");
2321
2322         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2323             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2324                 link = mac->serdes_has_link;
2325         else
2326                 link = rd32(E1000_STATUS) &
2327                                       E1000_STATUS_LU;
2328
2329         if (link) {
2330                 if (!netif_carrier_ok(netdev)) {
2331                         u32 ctrl;
2332                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2333                                                    &adapter->link_speed,
2334                                                    &adapter->link_duplex);
2335
2336                         ctrl = rd32(E1000_CTRL);
2337                         dev_info(&adapter->pdev->dev,
2338                                  "NIC Link is Up %d Mbps %s, "
2339                                  "Flow Control: %s\n",
2340                                  adapter->link_speed,
2341                                  adapter->link_duplex == FULL_DUPLEX ?
2342                                  "Full Duplex" : "Half Duplex",
2343                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2344                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2345                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2346                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2347
2348                         /* tweak tx_queue_len according to speed/duplex and
2349                          * adjust the timeout factor */
2350                         netdev->tx_queue_len = adapter->tx_queue_len;
2351                         adapter->tx_timeout_factor = 1;
2352                         switch (adapter->link_speed) {
2353                         case SPEED_10:
2354                                 netdev->tx_queue_len = 10;
2355                                 adapter->tx_timeout_factor = 14;
2356                                 break;
2357                         case SPEED_100:
2358                                 netdev->tx_queue_len = 100;
2359                                 /* maybe add some timeout factor ? */
2360                                 break;
2361                         }
2362
2363                         netif_carrier_on(netdev);
2364                         netif_tx_wake_all_queues(netdev);
2365
2366                         if (!test_bit(__IGB_DOWN, &adapter->state))
2367                                 mod_timer(&adapter->phy_info_timer,
2368                                           round_jiffies(jiffies + 2 * HZ));
2369                 }
2370         } else {
2371                 if (netif_carrier_ok(netdev)) {
2372                         adapter->link_speed = 0;
2373                         adapter->link_duplex = 0;
2374                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2375                         netif_carrier_off(netdev);
2376                         netif_tx_stop_all_queues(netdev);
2377                         if (!test_bit(__IGB_DOWN, &adapter->state))
2378                                 mod_timer(&adapter->phy_info_timer,
2379                                           round_jiffies(jiffies + 2 * HZ));
2380                 }
2381         }
2382
2383 link_up:
2384         igb_update_stats(adapter);
2385
2386         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2387         adapter->tpt_old = adapter->stats.tpt;
2388         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2389         adapter->colc_old = adapter->stats.colc;
2390
2391         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2392         adapter->gorc_old = adapter->stats.gorc;
2393         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2394         adapter->gotc_old = adapter->stats.gotc;
2395
2396         igb_update_adaptive(&adapter->hw);
2397
2398         if (!netif_carrier_ok(netdev)) {
2399                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2400                         /* We've lost link, so the controller stops DMA,
2401                          * but we've got queued Tx work that's never going
2402                          * to get done, so reset controller to flush Tx.
2403                          * (Do the reset outside of interrupt context). */
2404                         adapter->tx_timeout_count++;
2405                         schedule_work(&adapter->reset_task);
2406                 }
2407         }
2408
2409         /* Cause software interrupt to ensure rx ring is cleaned */
2410         if (adapter->msix_entries) {
2411                 for (i = 0; i < adapter->num_rx_queues; i++)
2412                         eics |= adapter->rx_ring[i].eims_value;
2413                 wr32(E1000_EICS, eics);
2414         } else {
2415                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2416         }
2417
2418         /* Force detection of hung controller every watchdog period */
2419         tx_ring->detect_tx_hung = true;
2420
2421         /* Reset the timer */
2422         if (!test_bit(__IGB_DOWN, &adapter->state))
2423                 mod_timer(&adapter->watchdog_timer,
2424                           round_jiffies(jiffies + 2 * HZ));
2425 }
2426
2427 enum latency_range {
2428         lowest_latency = 0,
2429         low_latency = 1,
2430         bulk_latency = 2,
2431         latency_invalid = 255
2432 };
2433
2434
2435 /**
2436  * igb_update_ring_itr - update the dynamic ITR value based on packet size
2437  *
2438  *      Stores a new ITR value based on strictly on packet size.  This
2439  *      algorithm is less sophisticated than that used in igb_update_itr,
2440  *      due to the difficulty of synchronizing statistics across multiple
2441  *      receive rings.  The divisors and thresholds used by this fuction
2442  *      were determined based on theoretical maximum wire speed and testing
2443  *      data, in order to minimize response time while increasing bulk
2444  *      throughput.
2445  *      This functionality is controlled by the InterruptThrottleRate module
2446  *      parameter (see igb_param.c)
2447  *      NOTE:  This function is called only when operating in a multiqueue
2448  *             receive environment.
2449  * @rx_ring: pointer to ring
2450  **/
2451 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2452 {
2453         int new_val = rx_ring->itr_val;
2454         int avg_wire_size = 0;
2455         struct igb_adapter *adapter = rx_ring->adapter;
2456
2457         if (!rx_ring->total_packets)
2458                 goto clear_counts; /* no packets, so don't do anything */
2459
2460         /* For non-gigabit speeds, just fix the interrupt rate at 4000
2461          * ints/sec - ITR timer value of 120 ticks.
2462          */
2463         if (adapter->link_speed != SPEED_1000) {
2464                 new_val = 120;
2465                 goto set_itr_val;
2466         }
2467         avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2468
2469         /* Add 24 bytes to size to account for CRC, preamble, and gap */
2470         avg_wire_size += 24;
2471
2472         /* Don't starve jumbo frames */
2473         avg_wire_size = min(avg_wire_size, 3000);
2474
2475         /* Give a little boost to mid-size frames */
2476         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2477                 new_val = avg_wire_size / 3;
2478         else
2479                 new_val = avg_wire_size / 2;
2480
2481 set_itr_val:
2482         if (new_val != rx_ring->itr_val) {
2483                 rx_ring->itr_val = new_val;
2484                 rx_ring->set_itr = 1;
2485         }
2486 clear_counts:
2487         rx_ring->total_bytes = 0;
2488         rx_ring->total_packets = 0;
2489 }
2490
2491 /**
2492  * igb_update_itr - update the dynamic ITR value based on statistics
2493  *      Stores a new ITR value based on packets and byte
2494  *      counts during the last interrupt.  The advantage of per interrupt
2495  *      computation is faster updates and more accurate ITR for the current
2496  *      traffic pattern.  Constants in this function were computed
2497  *      based on theoretical maximum wire speed and thresholds were set based
2498  *      on testing data as well as attempting to minimize response time
2499  *      while increasing bulk throughput.
2500  *      this functionality is controlled by the InterruptThrottleRate module
2501  *      parameter (see igb_param.c)
2502  *      NOTE:  These calculations are only valid when operating in a single-
2503  *             queue environment.
2504  * @adapter: pointer to adapter
2505  * @itr_setting: current adapter->itr
2506  * @packets: the number of packets during this measurement interval
2507  * @bytes: the number of bytes during this measurement interval
2508  **/
2509 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2510                                    int packets, int bytes)
2511 {
2512         unsigned int retval = itr_setting;
2513
2514         if (packets == 0)
2515                 goto update_itr_done;
2516
2517         switch (itr_setting) {
2518         case lowest_latency:
2519                 /* handle TSO and jumbo frames */
2520                 if (bytes/packets > 8000)
2521                         retval = bulk_latency;
2522                 else if ((packets < 5) && (bytes > 512))
2523                         retval = low_latency;
2524                 break;
2525         case low_latency:  /* 50 usec aka 20000 ints/s */
2526                 if (bytes > 10000) {
2527                         /* this if handles the TSO accounting */
2528                         if (bytes/packets > 8000) {
2529                                 retval = bulk_latency;
2530                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2531                                 retval = bulk_latency;
2532                         } else if ((packets > 35)) {
2533                                 retval = lowest_latency;
2534                         }
2535                 } else if (bytes/packets > 2000) {
2536                         retval = bulk_latency;
2537                 } else if (packets <= 2 && bytes < 512) {
2538                         retval = lowest_latency;
2539                 }
2540                 break;
2541         case bulk_latency: /* 250 usec aka 4000 ints/s */
2542                 if (bytes > 25000) {
2543                         if (packets > 35)
2544                                 retval = low_latency;
2545                 } else if (bytes < 6000) {
2546                         retval = low_latency;
2547                 }
2548                 break;
2549         }
2550
2551 update_itr_done:
2552         return retval;
2553 }
2554
2555 static void igb_set_itr(struct igb_adapter *adapter)
2556 {
2557         u16 current_itr;
2558         u32 new_itr = adapter->itr;
2559
2560         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2561         if (adapter->link_speed != SPEED_1000) {
2562                 current_itr = 0;
2563                 new_itr = 4000;
2564                 goto set_itr_now;
2565         }
2566
2567         adapter->rx_itr = igb_update_itr(adapter,
2568                                     adapter->rx_itr,
2569                                     adapter->rx_ring->total_packets,
2570                                     adapter->rx_ring->total_bytes);
2571
2572         if (adapter->rx_ring->buddy) {
2573                 adapter->tx_itr = igb_update_itr(adapter,
2574                                             adapter->tx_itr,
2575                                             adapter->tx_ring->total_packets,
2576                                             adapter->tx_ring->total_bytes);
2577
2578                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2579         } else {
2580                 current_itr = adapter->rx_itr;
2581         }
2582
2583         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2584         if (adapter->itr_setting == 3 &&
2585             current_itr == lowest_latency)
2586                 current_itr = low_latency;
2587
2588         switch (current_itr) {
2589         /* counts and packets in update_itr are dependent on these numbers */
2590         case lowest_latency:
2591                 new_itr = 70000;
2592                 break;
2593         case low_latency:
2594                 new_itr = 20000; /* aka hwitr = ~200 */
2595                 break;
2596         case bulk_latency:
2597                 new_itr = 4000;
2598                 break;
2599         default:
2600                 break;
2601         }
2602
2603 set_itr_now:
2604         adapter->rx_ring->total_bytes = 0;
2605         adapter->rx_ring->total_packets = 0;
2606         if (adapter->rx_ring->buddy) {
2607                 adapter->rx_ring->buddy->total_bytes = 0;
2608                 adapter->rx_ring->buddy->total_packets = 0;
2609         }
2610
2611         if (new_itr != adapter->itr) {
2612                 /* this attempts to bias the interrupt rate towards Bulk
2613                  * by adding intermediate steps when interrupt rate is
2614                  * increasing */
2615                 new_itr = new_itr > adapter->itr ?
2616                              min(adapter->itr + (new_itr >> 2), new_itr) :
2617                              new_itr;
2618                 /* Don't write the value here; it resets the adapter's
2619                  * internal timer, and causes us to delay far longer than
2620                  * we should between interrupts.  Instead, we write the ITR
2621                  * value at the beginning of the next interrupt so the timing
2622                  * ends up being correct.
2623                  */
2624                 adapter->itr = new_itr;
2625                 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2626                 adapter->rx_ring->set_itr = 1;
2627         }
2628
2629         return;
2630 }
2631
2632
2633 #define IGB_TX_FLAGS_CSUM               0x00000001
2634 #define IGB_TX_FLAGS_VLAN               0x00000002
2635 #define IGB_TX_FLAGS_TSO                0x00000004
2636 #define IGB_TX_FLAGS_IPV4               0x00000008
2637 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2638 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2639
2640 static inline int igb_tso_adv(struct igb_adapter *adapter,
2641                               struct igb_ring *tx_ring,
2642                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2643 {
2644         struct e1000_adv_tx_context_desc *context_desc;
2645         unsigned int i;
2646         int err;
2647         struct igb_buffer *buffer_info;
2648         u32 info = 0, tu_cmd = 0;
2649         u32 mss_l4len_idx, l4len;
2650         *hdr_len = 0;
2651
2652         if (skb_header_cloned(skb)) {
2653                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2654                 if (err)
2655                         return err;
2656         }
2657
2658         l4len = tcp_hdrlen(skb);
2659         *hdr_len += l4len;
2660
2661         if (skb->protocol == htons(ETH_P_IP)) {
2662                 struct iphdr *iph = ip_hdr(skb);
2663                 iph->tot_len = 0;
2664                 iph->check = 0;
2665                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2666                                                          iph->daddr, 0,
2667                                                          IPPROTO_TCP,
2668                                                          0);
2669         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2670                 ipv6_hdr(skb)->payload_len = 0;
2671                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2672                                                        &ipv6_hdr(skb)->daddr,
2673                                                        0, IPPROTO_TCP, 0);
2674         }
2675
2676         i = tx_ring->next_to_use;
2677
2678         buffer_info = &tx_ring->buffer_info[i];
2679         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2680         /* VLAN MACLEN IPLEN */
2681         if (tx_flags & IGB_TX_FLAGS_VLAN)
2682                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2683         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2684         *hdr_len += skb_network_offset(skb);
2685         info |= skb_network_header_len(skb);
2686         *hdr_len += skb_network_header_len(skb);
2687         context_desc->vlan_macip_lens = cpu_to_le32(info);
2688
2689         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2690         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2691
2692         if (skb->protocol == htons(ETH_P_IP))
2693                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2694         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2695
2696         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2697
2698         /* MSS L4LEN IDX */
2699         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2700         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2701
2702         /* Context index must be unique per ring. */
2703         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2704                 mss_l4len_idx |= tx_ring->queue_index << 4;
2705
2706         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2707         context_desc->seqnum_seed = 0;
2708
2709         buffer_info->time_stamp = jiffies;
2710         buffer_info->dma = 0;
2711         i++;
2712         if (i == tx_ring->count)
2713                 i = 0;
2714
2715         tx_ring->next_to_use = i;
2716
2717         return true;
2718 }
2719
2720 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2721                                         struct igb_ring *tx_ring,
2722                                         struct sk_buff *skb, u32 tx_flags)
2723 {
2724         struct e1000_adv_tx_context_desc *context_desc;
2725         unsigned int i;
2726         struct igb_buffer *buffer_info;
2727         u32 info = 0, tu_cmd = 0;
2728
2729         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2730             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2731                 i = tx_ring->next_to_use;
2732                 buffer_info = &tx_ring->buffer_info[i];
2733                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2734
2735                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2736                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2737                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2738                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2739                         info |= skb_network_header_len(skb);
2740
2741                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2742
2743                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2744
2745                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2746                         switch (skb->protocol) {
2747                         case __constant_htons(ETH_P_IP):
2748                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2749                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2750                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2751                                 break;
2752                         case __constant_htons(ETH_P_IPV6):
2753                                 /* XXX what about other V6 headers?? */
2754                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2755                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2756                                 break;
2757                         default:
2758                                 if (unlikely(net_ratelimit()))
2759                                         dev_warn(&adapter->pdev->dev,
2760                                             "partial checksum but proto=%x!\n",
2761                                             skb->protocol);
2762                                 break;
2763                         }
2764                 }
2765
2766                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2767                 context_desc->seqnum_seed = 0;
2768                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2769                         context_desc->mss_l4len_idx =
2770                                 cpu_to_le32(tx_ring->queue_index << 4);
2771
2772                 buffer_info->time_stamp = jiffies;
2773                 buffer_info->dma = 0;
2774
2775                 i++;
2776                 if (i == tx_ring->count)
2777                         i = 0;
2778                 tx_ring->next_to_use = i;
2779
2780                 return true;
2781         }
2782
2783
2784         return false;
2785 }
2786
2787 #define IGB_MAX_TXD_PWR 16
2788 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2789
2790 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2791                                  struct igb_ring *tx_ring,
2792                                  struct sk_buff *skb)
2793 {
2794         struct igb_buffer *buffer_info;
2795         unsigned int len = skb_headlen(skb);
2796         unsigned int count = 0, i;
2797         unsigned int f;
2798
2799         i = tx_ring->next_to_use;
2800
2801         buffer_info = &tx_ring->buffer_info[i];
2802         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2803         buffer_info->length = len;
2804         /* set time_stamp *before* dma to help avoid a possible race */
2805         buffer_info->time_stamp = jiffies;
2806         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2807                                           PCI_DMA_TODEVICE);
2808         count++;
2809         i++;
2810         if (i == tx_ring->count)
2811                 i = 0;
2812
2813         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2814                 struct skb_frag_struct *frag;
2815
2816                 frag = &skb_shinfo(skb)->frags[f];
2817                 len = frag->size;
2818
2819                 buffer_info = &tx_ring->buffer_info[i];
2820                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2821                 buffer_info->length = len;
2822                 buffer_info->time_stamp = jiffies;
2823                 buffer_info->dma = pci_map_page(adapter->pdev,
2824                                                 frag->page,
2825                                                 frag->page_offset,
2826                                                 len,
2827                                                 PCI_DMA_TODEVICE);
2828
2829                 count++;
2830                 i++;
2831                 if (i == tx_ring->count)
2832                         i = 0;
2833         }
2834
2835         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2836         tx_ring->buffer_info[i].skb = skb;
2837
2838         return count;
2839 }
2840
2841 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2842                                     struct igb_ring *tx_ring,
2843                                     int tx_flags, int count, u32 paylen,
2844                                     u8 hdr_len)
2845 {
2846         union e1000_adv_tx_desc *tx_desc = NULL;
2847         struct igb_buffer *buffer_info;
2848         u32 olinfo_status = 0, cmd_type_len;
2849         unsigned int i;
2850
2851         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2852                         E1000_ADVTXD_DCMD_DEXT);
2853
2854         if (tx_flags & IGB_TX_FLAGS_VLAN)
2855                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2856
2857         if (tx_flags & IGB_TX_FLAGS_TSO) {
2858                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2859
2860                 /* insert tcp checksum */
2861                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2862
2863                 /* insert ip checksum */
2864                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2865                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2866
2867         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2868                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2869         }
2870
2871         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2872             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2873                          IGB_TX_FLAGS_VLAN)))
2874                 olinfo_status |= tx_ring->queue_index << 4;
2875
2876         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2877
2878         i = tx_ring->next_to_use;
2879         while (count--) {
2880                 buffer_info = &tx_ring->buffer_info[i];
2881                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2882                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2883                 tx_desc->read.cmd_type_len =
2884                         cpu_to_le32(cmd_type_len | buffer_info->length);
2885                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2886                 i++;
2887                 if (i == tx_ring->count)
2888                         i = 0;
2889         }
2890
2891         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2892         /* Force memory writes to complete before letting h/w
2893          * know there are new descriptors to fetch.  (Only
2894          * applicable for weak-ordered memory model archs,
2895          * such as IA-64). */
2896         wmb();
2897
2898         tx_ring->next_to_use = i;
2899         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2900         /* we need this if more than one processor can write to our tail
2901          * at a time, it syncronizes IO on IA64/Altix systems */
2902         mmiowb();
2903 }
2904
2905 static int __igb_maybe_stop_tx(struct net_device *netdev,
2906                                struct igb_ring *tx_ring, int size)
2907 {
2908         struct igb_adapter *adapter = netdev_priv(netdev);
2909
2910         netif_stop_subqueue(netdev, tx_ring->queue_index);
2911
2912         /* Herbert's original patch had:
2913          *  smp_mb__after_netif_stop_queue();
2914          * but since that doesn't exist yet, just open code it. */
2915         smp_mb();
2916
2917         /* We need to check again in a case another CPU has just
2918          * made room available. */
2919         if (IGB_DESC_UNUSED(tx_ring) < size)
2920                 return -EBUSY;
2921
2922         /* A reprieve! */
2923         netif_wake_subqueue(netdev, tx_ring->queue_index);
2924         ++adapter->restart_queue;
2925         return 0;
2926 }
2927
2928 static int igb_maybe_stop_tx(struct net_device *netdev,
2929                              struct igb_ring *tx_ring, int size)
2930 {
2931         if (IGB_DESC_UNUSED(tx_ring) >= size)
2932                 return 0;
2933         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2934 }
2935
2936 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2937
2938 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2939                                    struct net_device *netdev,
2940                                    struct igb_ring *tx_ring)
2941 {
2942         struct igb_adapter *adapter = netdev_priv(netdev);
2943         unsigned int tx_flags = 0;
2944         unsigned int len;
2945         u8 hdr_len = 0;
2946         int tso = 0;
2947
2948         len = skb_headlen(skb);
2949
2950         if (test_bit(__IGB_DOWN, &adapter->state)) {
2951                 dev_kfree_skb_any(skb);
2952                 return NETDEV_TX_OK;
2953         }
2954
2955         if (skb->len <= 0) {
2956                 dev_kfree_skb_any(skb);
2957                 return NETDEV_TX_OK;
2958         }
2959
2960         /* need: 1 descriptor per page,
2961          *       + 2 desc gap to keep tail from touching head,
2962          *       + 1 desc for skb->data,
2963          *       + 1 desc for context descriptor,
2964          * otherwise try next time */
2965         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2966                 /* this is a hard error */
2967                 return NETDEV_TX_BUSY;
2968         }
2969         skb_orphan(skb);
2970
2971         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2972                 tx_flags |= IGB_TX_FLAGS_VLAN;
2973                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2974         }
2975
2976         if (skb->protocol == htons(ETH_P_IP))
2977                 tx_flags |= IGB_TX_FLAGS_IPV4;
2978
2979         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2980                                               &hdr_len) : 0;
2981
2982         if (tso < 0) {
2983                 dev_kfree_skb_any(skb);
2984                 return NETDEV_TX_OK;
2985         }
2986
2987         if (tso)
2988                 tx_flags |= IGB_TX_FLAGS_TSO;
2989         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2990                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2991                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2992
2993         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2994                          igb_tx_map_adv(adapter, tx_ring, skb),
2995                          skb->len, hdr_len);
2996
2997         netdev->trans_start = jiffies;
2998
2999         /* Make sure there is space in the ring for the next send. */
3000         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3001
3002         return NETDEV_TX_OK;
3003 }
3004
3005 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3006 {
3007         struct igb_adapter *adapter = netdev_priv(netdev);
3008         struct igb_ring *tx_ring;
3009
3010         int r_idx = 0;
3011         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3012         tx_ring = adapter->multi_tx_table[r_idx];
3013
3014         /* This goes back to the question of how to logically map a tx queue
3015          * to a flow.  Right now, performance is impacted slightly negatively
3016          * if using multiple tx queues.  If the stack breaks away from a
3017          * single qdisc implementation, we can look at this again. */
3018         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3019 }
3020
3021 /**
3022  * igb_tx_timeout - Respond to a Tx Hang
3023  * @netdev: network interface device structure
3024  **/
3025 static void igb_tx_timeout(struct net_device *netdev)
3026 {
3027         struct igb_adapter *adapter = netdev_priv(netdev);
3028         struct e1000_hw *hw = &adapter->hw;
3029
3030         /* Do the reset outside of interrupt context */
3031         adapter->tx_timeout_count++;
3032         schedule_work(&adapter->reset_task);
3033         wr32(E1000_EICS, adapter->eims_enable_mask &
3034                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3035 }
3036
3037 static void igb_reset_task(struct work_struct *work)
3038 {
3039         struct igb_adapter *adapter;
3040         adapter = container_of(work, struct igb_adapter, reset_task);
3041
3042         igb_reinit_locked(adapter);
3043 }
3044
3045 /**
3046  * igb_get_stats - Get System Network Statistics
3047  * @netdev: network interface device structure
3048  *
3049  * Returns the address of the device statistics structure.
3050  * The statistics are actually updated from the timer callback.
3051  **/
3052 static struct net_device_stats *
3053 igb_get_stats(struct net_device *netdev)
3054 {
3055         struct igb_adapter *adapter = netdev_priv(netdev);
3056
3057         /* only return the current stats */
3058         return &adapter->net_stats;
3059 }
3060
3061 /**
3062  * igb_change_mtu - Change the Maximum Transfer Unit
3063  * @netdev: network interface device structure
3064  * @new_mtu: new value for maximum frame size
3065  *
3066  * Returns 0 on success, negative on failure
3067  **/
3068 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3069 {
3070         struct igb_adapter *adapter = netdev_priv(netdev);
3071         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3072
3073         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3074             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3075                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3076                 return -EINVAL;
3077         }
3078
3079 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3080         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3081                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3082                 return -EINVAL;
3083         }
3084
3085         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3086                 msleep(1);
3087         /* igb_down has a dependency on max_frame_size */
3088         adapter->max_frame_size = max_frame;
3089         if (netif_running(netdev))
3090                 igb_down(adapter);
3091
3092         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3093          * means we reserve 2 more, this pushes us to allocate from the next
3094          * larger slab size.
3095          * i.e. RXBUFFER_2048 --> size-4096 slab
3096          */
3097
3098         if (max_frame <= IGB_RXBUFFER_256)
3099                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3100         else if (max_frame <= IGB_RXBUFFER_512)
3101                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3102         else if (max_frame <= IGB_RXBUFFER_1024)
3103                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3104         else if (max_frame <= IGB_RXBUFFER_2048)
3105                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3106         else
3107 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3108                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3109 #else
3110                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3111 #endif
3112         /* adjust allocation if LPE protects us, and we aren't using SBP */
3113         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3114              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3115                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3116
3117         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3118                  netdev->mtu, new_mtu);
3119         netdev->mtu = new_mtu;
3120
3121         if (netif_running(netdev))
3122                 igb_up(adapter);
3123         else
3124                 igb_reset(adapter);
3125
3126         clear_bit(__IGB_RESETTING, &adapter->state);
3127
3128         return 0;
3129 }
3130
3131 /**
3132  * igb_update_stats - Update the board statistics counters
3133  * @adapter: board private structure
3134  **/
3135
3136 void igb_update_stats(struct igb_adapter *adapter)
3137 {
3138         struct e1000_hw *hw = &adapter->hw;
3139         struct pci_dev *pdev = adapter->pdev;
3140         u16 phy_tmp;
3141
3142 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3143
3144         /*
3145          * Prevent stats update while adapter is being reset, or if the pci
3146          * connection is down.
3147          */
3148         if (adapter->link_speed == 0)
3149                 return;
3150         if (pci_channel_offline(pdev))
3151                 return;
3152
3153         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3154         adapter->stats.gprc += rd32(E1000_GPRC);
3155         adapter->stats.gorc += rd32(E1000_GORCL);
3156         rd32(E1000_GORCH); /* clear GORCL */
3157         adapter->stats.bprc += rd32(E1000_BPRC);
3158         adapter->stats.mprc += rd32(E1000_MPRC);
3159         adapter->stats.roc += rd32(E1000_ROC);
3160
3161         adapter->stats.prc64 += rd32(E1000_PRC64);
3162         adapter->stats.prc127 += rd32(E1000_PRC127);
3163         adapter->stats.prc255 += rd32(E1000_PRC255);
3164         adapter->stats.prc511 += rd32(E1000_PRC511);
3165         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3166         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3167         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3168         adapter->stats.sec += rd32(E1000_SEC);
3169
3170         adapter->stats.mpc += rd32(E1000_MPC);
3171         adapter->stats.scc += rd32(E1000_SCC);
3172         adapter->stats.ecol += rd32(E1000_ECOL);
3173         adapter->stats.mcc += rd32(E1000_MCC);
3174         adapter->stats.latecol += rd32(E1000_LATECOL);
3175         adapter->stats.dc += rd32(E1000_DC);
3176         adapter->stats.rlec += rd32(E1000_RLEC);
3177         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3178         adapter->stats.xontxc += rd32(E1000_XONTXC);
3179         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3180         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3181         adapter->stats.fcruc += rd32(E1000_FCRUC);
3182         adapter->stats.gptc += rd32(E1000_GPTC);
3183         adapter->stats.gotc += rd32(E1000_GOTCL);
3184         rd32(E1000_GOTCH); /* clear GOTCL */
3185         adapter->stats.rnbc += rd32(E1000_RNBC);
3186         adapter->stats.ruc += rd32(E1000_RUC);
3187         adapter->stats.rfc += rd32(E1000_RFC);
3188         adapter->stats.rjc += rd32(E1000_RJC);
3189         adapter->stats.tor += rd32(E1000_TORH);
3190         adapter->stats.tot += rd32(E1000_TOTH);
3191         adapter->stats.tpr += rd32(E1000_TPR);
3192
3193         adapter->stats.ptc64 += rd32(E1000_PTC64);
3194         adapter->stats.ptc127 += rd32(E1000_PTC127);
3195         adapter->stats.ptc255 += rd32(E1000_PTC255);
3196         adapter->stats.ptc511 += rd32(E1000_PTC511);
3197         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3198         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3199
3200         adapter->stats.mptc += rd32(E1000_MPTC);
3201         adapter->stats.bptc += rd32(E1000_BPTC);
3202
3203         /* used for adaptive IFS */
3204
3205         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3206         adapter->stats.tpt += hw->mac.tx_packet_delta;
3207         hw->mac.collision_delta = rd32(E1000_COLC);
3208         adapter->stats.colc += hw->mac.collision_delta;
3209
3210         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3211         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3212         adapter->stats.tncrs += rd32(E1000_TNCRS);
3213         adapter->stats.tsctc += rd32(E1000_TSCTC);
3214         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3215
3216         adapter->stats.iac += rd32(E1000_IAC);
3217         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3218         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3219         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3220         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3221         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3222         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3223         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3224         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3225
3226         /* Fill out the OS statistics structure */
3227         adapter->net_stats.multicast = adapter->stats.mprc;
3228         adapter->net_stats.collisions = adapter->stats.colc;
3229
3230         /* Rx Errors */
3231
3232         /* RLEC on some newer hardware can be incorrect so build
3233         * our own version based on RUC and ROC */
3234         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3235                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3236                 adapter->stats.ruc + adapter->stats.roc +
3237                 adapter->stats.cexterr;
3238         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3239                                               adapter->stats.roc;
3240         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3241         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3242         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3243
3244         /* Tx Errors */
3245         adapter->net_stats.tx_errors = adapter->stats.ecol +
3246                                        adapter->stats.latecol;
3247         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3248         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3249         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3250
3251         /* Tx Dropped needs to be maintained elsewhere */
3252
3253         /* Phy Stats */
3254         if (hw->phy.media_type == e1000_media_type_copper) {
3255                 if ((adapter->link_speed == SPEED_1000) &&
3256                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3257                                               &phy_tmp))) {
3258                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3259                         adapter->phy_stats.idle_errors += phy_tmp;
3260                 }
3261         }
3262
3263         /* Management Stats */
3264         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3265         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3266         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3267 }
3268
3269
3270 static irqreturn_t igb_msix_other(int irq, void *data)
3271 {
3272         struct net_device *netdev = data;
3273         struct igb_adapter *adapter = netdev_priv(netdev);
3274         struct e1000_hw *hw = &adapter->hw;
3275         u32 icr = rd32(E1000_ICR);
3276
3277         /* reading ICR causes bit 31 of EICR to be cleared */
3278         if (!(icr & E1000_ICR_LSC))
3279                 goto no_link_interrupt;
3280         hw->mac.get_link_status = 1;
3281         /* guard against interrupt when we're going down */
3282         if (!test_bit(__IGB_DOWN, &adapter->state))
3283                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3284         
3285 no_link_interrupt:
3286         wr32(E1000_IMS, E1000_IMS_LSC);
3287         wr32(E1000_EIMS, adapter->eims_other);
3288
3289         return IRQ_HANDLED;
3290 }
3291
3292 static irqreturn_t igb_msix_tx(int irq, void *data)
3293 {
3294         struct igb_ring *tx_ring = data;
3295         struct igb_adapter *adapter = tx_ring->adapter;
3296         struct e1000_hw *hw = &adapter->hw;
3297
3298 #ifdef CONFIG_IGB_DCA
3299         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3300                 igb_update_tx_dca(tx_ring);
3301 #endif
3302         tx_ring->total_bytes = 0;
3303         tx_ring->total_packets = 0;
3304
3305         /* auto mask will automatically reenable the interrupt when we write
3306          * EICS */
3307         if (!igb_clean_tx_irq(tx_ring))
3308                 /* Ring was not completely cleaned, so fire another interrupt */
3309                 wr32(E1000_EICS, tx_ring->eims_value);
3310         else
3311                 wr32(E1000_EIMS, tx_ring->eims_value);
3312
3313         return IRQ_HANDLED;
3314 }
3315
3316 static void igb_write_itr(struct igb_ring *ring)
3317 {
3318         struct e1000_hw *hw = &ring->adapter->hw;
3319         if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3320                 switch (hw->mac.type) {
3321                 case e1000_82576:
3322                         wr32(ring->itr_register,
3323                              ring->itr_val |
3324                              0x80000000);
3325                         break;
3326                 default:
3327                         wr32(ring->itr_register,
3328                              ring->itr_val |
3329                              (ring->itr_val << 16));
3330                         break;
3331                 }
3332                 ring->set_itr = 0;
3333         }
3334 }
3335
3336 static irqreturn_t igb_msix_rx(int irq, void *data)
3337 {
3338         struct igb_ring *rx_ring = data;
3339         struct igb_adapter *adapter = rx_ring->adapter;
3340
3341         /* Write the ITR value calculated at the end of the
3342          * previous interrupt.
3343          */
3344
3345         igb_write_itr(rx_ring);
3346
3347         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3348                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3349
3350 #ifdef CONFIG_IGB_DCA
3351         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3352                 igb_update_rx_dca(rx_ring);
3353 #endif
3354                 return IRQ_HANDLED;
3355 }
3356
3357 #ifdef CONFIG_IGB_DCA
3358 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3359 {
3360         u32 dca_rxctrl;
3361         struct igb_adapter *adapter = rx_ring->adapter;
3362         struct e1000_hw *hw = &adapter->hw;
3363         int cpu = get_cpu();
3364         int q = rx_ring - adapter->rx_ring;
3365
3366         if (rx_ring->cpu != cpu) {
3367                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3368                 if (hw->mac.type == e1000_82576) {
3369                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3370                         dca_rxctrl |= dca_get_tag(cpu) <<
3371                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3372                 } else {
3373                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3374                         dca_rxctrl |= dca_get_tag(cpu);
3375                 }
3376                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3377                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3378                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3379                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3380                 rx_ring->cpu = cpu;
3381         }
3382         put_cpu();
3383 }
3384
3385 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3386 {
3387         u32 dca_txctrl;
3388         struct igb_adapter *adapter = tx_ring->adapter;
3389         struct e1000_hw *hw = &adapter->hw;
3390         int cpu = get_cpu();
3391         int q = tx_ring - adapter->tx_ring;
3392
3393         if (tx_ring->cpu != cpu) {
3394                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3395                 if (hw->mac.type == e1000_82576) {
3396                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3397                         dca_txctrl |= dca_get_tag(cpu) <<
3398                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3399                 } else {
3400                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3401                         dca_txctrl |= dca_get_tag(cpu);
3402                 }
3403                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3404                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3405                 tx_ring->cpu = cpu;
3406         }
3407         put_cpu();
3408 }
3409
3410 static void igb_setup_dca(struct igb_adapter *adapter)
3411 {
3412         int i;
3413
3414         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3415                 return;
3416
3417         for (i = 0; i < adapter->num_tx_queues; i++) {
3418                 adapter->tx_ring[i].cpu = -1;
3419                 igb_update_tx_dca(&adapter->tx_ring[i]);
3420         }
3421         for (i = 0; i < adapter->num_rx_queues; i++) {
3422                 adapter->rx_ring[i].cpu = -1;
3423                 igb_update_rx_dca(&adapter->rx_ring[i]);
3424         }
3425 }
3426
3427 static int __igb_notify_dca(struct device *dev, void *data)
3428 {
3429         struct net_device *netdev = dev_get_drvdata(dev);
3430         struct igb_adapter *adapter = netdev_priv(netdev);
3431         struct e1000_hw *hw = &adapter->hw;
3432         unsigned long event = *(unsigned long *)data;
3433
3434         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3435                 goto out;
3436
3437         switch (event) {
3438         case DCA_PROVIDER_ADD:
3439                 /* if already enabled, don't do it again */
3440                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3441                         break;
3442                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3443                 /* Always use CB2 mode, difference is masked
3444                  * in the CB driver. */
3445                 wr32(E1000_DCA_CTRL, 2);
3446                 if (dca_add_requester(dev) == 0) {
3447                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3448                         igb_setup_dca(adapter);
3449                         break;
3450                 }
3451                 /* Fall Through since DCA is disabled. */
3452         case DCA_PROVIDER_REMOVE:
3453                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3454                         /* without this a class_device is left
3455                          * hanging around in the sysfs model */
3456                         dca_remove_requester(dev);
3457                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3458                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3459                         wr32(E1000_DCA_CTRL, 1);
3460                 }
3461                 break;
3462         }
3463 out:
3464         return 0;
3465 }
3466
3467 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3468                           void *p)
3469 {
3470         int ret_val;
3471
3472         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3473                                          __igb_notify_dca);
3474
3475         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3476 }
3477 #endif /* CONFIG_IGB_DCA */
3478
3479 /**
3480  * igb_intr_msi - Interrupt Handler
3481  * @irq: interrupt number
3482  * @data: pointer to a network interface device structure
3483  **/
3484 static irqreturn_t igb_intr_msi(int irq, void *data)
3485 {
3486         struct net_device *netdev = data;
3487         struct igb_adapter *adapter = netdev_priv(netdev);
3488         struct e1000_hw *hw = &adapter->hw;
3489         /* read ICR disables interrupts using IAM */
3490         u32 icr = rd32(E1000_ICR);
3491
3492         igb_write_itr(adapter->rx_ring);
3493
3494         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3495                 hw->mac.get_link_status = 1;
3496                 if (!test_bit(__IGB_DOWN, &adapter->state))
3497                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3498         }
3499
3500         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3501
3502         return IRQ_HANDLED;
3503 }
3504
3505 /**
3506  * igb_intr - Interrupt Handler
3507  * @irq: interrupt number
3508  * @data: pointer to a network interface device structure
3509  **/
3510 static irqreturn_t igb_intr(int irq, void *data)
3511 {
3512         struct net_device *netdev = data;
3513         struct igb_adapter *adapter = netdev_priv(netdev);
3514         struct e1000_hw *hw = &adapter->hw;
3515         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3516          * need for the IMC write */
3517         u32 icr = rd32(E1000_ICR);
3518         u32 eicr = 0;
3519         if (!icr)
3520                 return IRQ_NONE;  /* Not our interrupt */
3521
3522         igb_write_itr(adapter->rx_ring);
3523
3524         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3525          * not set, then the adapter didn't send an interrupt */
3526         if (!(icr & E1000_ICR_INT_ASSERTED))
3527                 return IRQ_NONE;
3528
3529         eicr = rd32(E1000_EICR);
3530
3531         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3532                 hw->mac.get_link_status = 1;
3533                 /* guard against interrupt when we're going down */
3534                 if (!test_bit(__IGB_DOWN, &adapter->state))
3535                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3536         }
3537
3538         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3539
3540         return IRQ_HANDLED;
3541 }
3542
3543 /**
3544  * igb_poll - NAPI Rx polling callback
3545  * @napi: napi polling structure
3546  * @budget: count of how many packets we should handle
3547  **/
3548 static int igb_poll(struct napi_struct *napi, int budget)
3549 {
3550         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3551         struct igb_adapter *adapter = rx_ring->adapter;
3552         struct net_device *netdev = adapter->netdev;
3553         int tx_clean_complete, work_done = 0;
3554
3555         /* this poll routine only supports one tx and one rx queue */
3556 #ifdef CONFIG_IGB_DCA
3557         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3558                 igb_update_tx_dca(&adapter->tx_ring[0]);
3559 #endif
3560         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3561
3562 #ifdef CONFIG_IGB_DCA
3563         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3564                 igb_update_rx_dca(&adapter->rx_ring[0]);
3565 #endif
3566         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3567
3568         /* If no Tx and not enough Rx work done, exit the polling mode */
3569         if ((tx_clean_complete && (work_done < budget)) ||
3570             !netif_running(netdev)) {
3571                 if (adapter->itr_setting & 3)
3572                         igb_set_itr(adapter);
3573                 netif_rx_complete(netdev, napi);
3574                 if (!test_bit(__IGB_DOWN, &adapter->state))
3575                         igb_irq_enable(adapter);
3576                 return 0;
3577         }
3578
3579         return 1;
3580 }
3581
3582 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3583 {
3584         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3585         struct igb_adapter *adapter = rx_ring->adapter;
3586         struct e1000_hw *hw = &adapter->hw;
3587         struct net_device *netdev = adapter->netdev;
3588         int work_done = 0;
3589
3590 #ifdef CONFIG_IGB_DCA
3591         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3592                 igb_update_rx_dca(rx_ring);
3593 #endif
3594         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3595
3596
3597         /* If not enough Rx work done, exit the polling mode */
3598         if ((work_done == 0) || !netif_running(netdev)) {
3599                 netif_rx_complete(netdev, napi);
3600
3601                 if (adapter->itr_setting & 3) {
3602                         if (adapter->num_rx_queues == 1)
3603                                 igb_set_itr(adapter);
3604                         else
3605                                 igb_update_ring_itr(rx_ring);
3606                 }
3607
3608                 if (!test_bit(__IGB_DOWN, &adapter->state))
3609                         wr32(E1000_EIMS, rx_ring->eims_value);
3610
3611                 return 0;
3612         }
3613
3614         return 1;
3615 }
3616
3617 static inline u32 get_head(struct igb_ring *tx_ring)
3618 {
3619         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3620         return le32_to_cpu(*(volatile __le32 *)end);
3621 }
3622
3623 /**
3624  * igb_clean_tx_irq - Reclaim resources after transmit completes
3625  * @adapter: board private structure
3626  * returns true if ring is completely cleaned
3627  **/
3628 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3629 {
3630         struct igb_adapter *adapter = tx_ring->adapter;
3631         struct e1000_hw *hw = &adapter->hw;
3632         struct net_device *netdev = adapter->netdev;
3633         struct e1000_tx_desc *tx_desc;
3634         struct igb_buffer *buffer_info;
3635         struct sk_buff *skb;
3636         unsigned int i;
3637         u32 head, oldhead;
3638         unsigned int count = 0;
3639         unsigned int total_bytes = 0, total_packets = 0;
3640         bool retval = true;
3641
3642         rmb();
3643         head = get_head(tx_ring);
3644         i = tx_ring->next_to_clean;
3645         while (1) {
3646                 while (i != head) {
3647                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3648                         buffer_info = &tx_ring->buffer_info[i];
3649                         skb = buffer_info->skb;
3650
3651                         if (skb) {
3652                                 unsigned int segs, bytecount;
3653                                 /* gso_segs is currently only valid for tcp */
3654                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3655                                 /* multiply data chunks by size of headers */
3656                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3657                                             skb->len;
3658                                 total_packets += segs;
3659                                 total_bytes += bytecount;
3660                         }
3661
3662                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3663
3664                         i++;
3665                         if (i == tx_ring->count)
3666                                 i = 0;
3667
3668                         count++;
3669                         if (count == IGB_MAX_TX_CLEAN) {
3670                                 retval = false;
3671                                 goto done_cleaning;
3672                         }
3673                 }
3674                 oldhead = head;
3675                 rmb();
3676                 head = get_head(tx_ring);
3677                 if (head == oldhead)
3678                         goto done_cleaning;
3679         }  /* while (1) */
3680
3681 done_cleaning:
3682         tx_ring->next_to_clean = i;
3683
3684         if (unlikely(count &&
3685                      netif_carrier_ok(netdev) &&
3686                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3687                 /* Make sure that anybody stopping the queue after this
3688                  * sees the new next_to_clean.
3689                  */
3690                 smp_mb();
3691                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3692                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3693                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3694                         ++adapter->restart_queue;
3695                 }
3696         }
3697
3698         if (tx_ring->detect_tx_hung) {
3699                 /* Detect a transmit hang in hardware, this serializes the
3700                  * check with the clearing of time_stamp and movement of i */
3701                 tx_ring->detect_tx_hung = false;
3702                 if (tx_ring->buffer_info[i].time_stamp &&
3703                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3704                                (adapter->tx_timeout_factor * HZ))
3705                     && !(rd32(E1000_STATUS) &
3706                          E1000_STATUS_TXOFF)) {
3707
3708                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3709                         /* detected Tx unit hang */
3710                         dev_err(&adapter->pdev->dev,
3711                                 "Detected Tx Unit Hang\n"
3712                                 "  Tx Queue             <%d>\n"
3713                                 "  TDH                  <%x>\n"
3714                                 "  TDT                  <%x>\n"
3715                                 "  next_to_use          <%x>\n"
3716                                 "  next_to_clean        <%x>\n"
3717                                 "  head (WB)            <%x>\n"
3718                                 "buffer_info[next_to_clean]\n"
3719                                 "  time_stamp           <%lx>\n"
3720                                 "  jiffies              <%lx>\n"
3721                                 "  desc.status          <%x>\n",
3722                                 tx_ring->queue_index,
3723                                 readl(adapter->hw.hw_addr + tx_ring->head),
3724                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3725                                 tx_ring->next_to_use,
3726                                 tx_ring->next_to_clean,
3727                                 head,
3728                                 tx_ring->buffer_info[i].time_stamp,
3729                                 jiffies,
3730                                 tx_desc->upper.fields.status);
3731                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3732                 }
3733         }
3734         tx_ring->total_bytes += total_bytes;
3735         tx_ring->total_packets += total_packets;
3736         tx_ring->tx_stats.bytes += total_bytes;
3737         tx_ring->tx_stats.packets += total_packets;
3738         adapter->net_stats.tx_bytes += total_bytes;
3739         adapter->net_stats.tx_packets += total_packets;
3740         return retval;
3741 }
3742
3743 #ifdef CONFIG_IGB_LRO
3744  /**
3745  * igb_get_skb_hdr - helper function for LRO header processing
3746  * @skb: pointer to sk_buff to be added to LRO packet
3747  * @iphdr: pointer to ip header structure
3748  * @tcph: pointer to tcp header structure
3749  * @hdr_flags: pointer to header flags
3750  * @priv: pointer to the receive descriptor for the current sk_buff
3751  **/
3752 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3753                            u64 *hdr_flags, void *priv)
3754 {
3755         union e1000_adv_rx_desc *rx_desc = priv;
3756         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3757                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3758
3759         /* Verify that this is a valid IPv4 TCP packet */
3760         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3761                           E1000_RXDADV_PKTTYPE_TCP))
3762                 return -1;
3763
3764         /* Set network headers */
3765         skb_reset_network_header(skb);
3766         skb_set_transport_header(skb, ip_hdrlen(skb));
3767         *iphdr = ip_hdr(skb);
3768         *tcph = tcp_hdr(skb);
3769         *hdr_flags = LRO_IPV4 | LRO_TCP;
3770
3771         return 0;
3772
3773 }
3774 #endif /* CONFIG_IGB_LRO */
3775
3776 /**
3777  * igb_receive_skb - helper function to handle rx indications
3778  * @ring: pointer to receive ring receving this packet 
3779  * @status: descriptor status field as written by hardware
3780  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3781  * @skb: pointer to sk_buff to be indicated to stack
3782  **/
3783 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3784                             union e1000_adv_rx_desc * rx_desc,
3785                             struct sk_buff *skb)
3786 {
3787         struct igb_adapter * adapter = ring->adapter;
3788         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3789
3790 #ifdef CONFIG_IGB_LRO
3791         if (adapter->netdev->features & NETIF_F_LRO &&
3792             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3793                 if (vlan_extracted)
3794                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3795                                            adapter->vlgrp,
3796                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3797                                            rx_desc);
3798                 else
3799                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3800                 ring->lro_used = 1;
3801         } else {
3802 #endif
3803                 if (vlan_extracted)
3804                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3805                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3806                 else
3807
3808                         netif_receive_skb(skb);
3809 #ifdef CONFIG_IGB_LRO
3810         }
3811 #endif
3812 }
3813
3814
3815 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3816                                        u32 status_err, struct sk_buff *skb)
3817 {
3818         skb->ip_summed = CHECKSUM_NONE;
3819
3820         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3821         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3822                 return;
3823         /* TCP/UDP checksum error bit is set */
3824         if (status_err &
3825             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3826                 /* let the stack verify checksum errors */
3827                 adapter->hw_csum_err++;
3828                 return;
3829         }
3830         /* It must be a TCP or UDP packet with a valid checksum */
3831         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3832                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3833
3834         adapter->hw_csum_good++;
3835 }
3836
3837 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3838                                  int *work_done, int budget)
3839 {
3840         struct igb_adapter *adapter = rx_ring->adapter;
3841         struct net_device *netdev = adapter->netdev;
3842         struct pci_dev *pdev = adapter->pdev;
3843         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3844         struct igb_buffer *buffer_info , *next_buffer;
3845         struct sk_buff *skb;
3846         unsigned int i;
3847         u32 length, hlen, staterr;
3848         bool cleaned = false;
3849         int cleaned_count = 0;
3850         unsigned int total_bytes = 0, total_packets = 0;
3851
3852         i = rx_ring->next_to_clean;
3853         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3854         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3855
3856         while (staterr & E1000_RXD_STAT_DD) {
3857                 if (*work_done >= budget)
3858                         break;
3859                 (*work_done)++;
3860                 buffer_info = &rx_ring->buffer_info[i];
3861
3862                 /* HW will not DMA in data larger than the given buffer, even
3863                  * if it parses the (NFS, of course) header to be larger.  In
3864                  * that case, it fills the header buffer and spills the rest
3865                  * into the page.
3866                  */
3867                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3868                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3869                 if (hlen > adapter->rx_ps_hdr_size)
3870                         hlen = adapter->rx_ps_hdr_size;
3871
3872                 length = le16_to_cpu(rx_desc->wb.upper.length);
3873                 cleaned = true;
3874                 cleaned_count++;
3875
3876                 skb = buffer_info->skb;
3877                 prefetch(skb->data - NET_IP_ALIGN);
3878                 buffer_info->skb = NULL;
3879                 if (!adapter->rx_ps_hdr_size) {
3880                         pci_unmap_single(pdev, buffer_info->dma,
3881                                          adapter->rx_buffer_len +
3882                                            NET_IP_ALIGN,
3883                                          PCI_DMA_FROMDEVICE);
3884                         skb_put(skb, length);
3885                         goto send_up;
3886                 }
3887
3888                 if (!skb_shinfo(skb)->nr_frags) {
3889                         pci_unmap_single(pdev, buffer_info->dma,
3890                                          adapter->rx_ps_hdr_size +
3891                                            NET_IP_ALIGN,
3892                                          PCI_DMA_FROMDEVICE);
3893                         skb_put(skb, hlen);
3894                 }
3895
3896                 if (length) {
3897                         pci_unmap_page(pdev, buffer_info->page_dma,
3898                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3899                         buffer_info->page_dma = 0;
3900
3901                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3902                                                 buffer_info->page,
3903                                                 buffer_info->page_offset,
3904                                                 length);
3905
3906                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3907                             (page_count(buffer_info->page) != 1))
3908                                 buffer_info->page = NULL;
3909                         else
3910                                 get_page(buffer_info->page);
3911
3912                         skb->len += length;
3913                         skb->data_len += length;
3914
3915                         skb->truesize += length;
3916                 }
3917 send_up:
3918                 i++;
3919                 if (i == rx_ring->count)
3920                         i = 0;
3921                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3922                 prefetch(next_rxd);
3923                 next_buffer = &rx_ring->buffer_info[i];
3924
3925                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3926                         buffer_info->skb = xchg(&next_buffer->skb, skb);
3927                         buffer_info->dma = xchg(&next_buffer->dma, 0);
3928                         goto next_desc;
3929                 }
3930
3931                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3932                         dev_kfree_skb_irq(skb);
3933                         goto next_desc;
3934                 }
3935
3936                 total_bytes += skb->len;
3937                 total_packets++;
3938
3939                 igb_rx_checksum_adv(adapter, staterr, skb);
3940
3941                 skb->protocol = eth_type_trans(skb, netdev);
3942
3943                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3944
3945                 netdev->last_rx = jiffies;
3946
3947 next_desc:
3948                 rx_desc->wb.upper.status_error = 0;
3949
3950                 /* return some buffers to hardware, one at a time is too slow */
3951                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3952                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3953                         cleaned_count = 0;
3954                 }
3955
3956                 /* use prefetched values */
3957                 rx_desc = next_rxd;
3958                 buffer_info = next_buffer;
3959
3960                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3961         }
3962
3963         rx_ring->next_to_clean = i;
3964         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3965
3966 #ifdef CONFIG_IGB_LRO
3967         if (rx_ring->lro_used) {
3968                 lro_flush_all(&rx_ring->lro_mgr);
3969                 rx_ring->lro_used = 0;
3970         }
3971 #endif
3972
3973         if (cleaned_count)
3974                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3975
3976         rx_ring->total_packets += total_packets;
3977         rx_ring->total_bytes += total_bytes;
3978         rx_ring->rx_stats.packets += total_packets;
3979         rx_ring->rx_stats.bytes += total_bytes;
3980         adapter->net_stats.rx_bytes += total_bytes;
3981         adapter->net_stats.rx_packets += total_packets;
3982         return cleaned;
3983 }
3984
3985
3986 /**
3987  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3988  * @adapter: address of board private structure
3989  **/
3990 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3991                                      int cleaned_count)
3992 {
3993         struct igb_adapter *adapter = rx_ring->adapter;
3994         struct net_device *netdev = adapter->netdev;
3995         struct pci_dev *pdev = adapter->pdev;
3996         union e1000_adv_rx_desc *rx_desc;
3997         struct igb_buffer *buffer_info;
3998         struct sk_buff *skb;
3999         unsigned int i;
4000
4001         i = rx_ring->next_to_use;
4002         buffer_info = &rx_ring->buffer_info[i];
4003
4004         while (cleaned_count--) {
4005                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4006
4007                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4008                         if (!buffer_info->page) {
4009                                 buffer_info->page = alloc_page(GFP_ATOMIC);
4010                                 if (!buffer_info->page) {
4011                                         adapter->alloc_rx_buff_failed++;
4012                                         goto no_buffers;
4013                                 }
4014                                 buffer_info->page_offset = 0;
4015                         } else {
4016                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4017                         }
4018                         buffer_info->page_dma =
4019                                 pci_map_page(pdev,
4020                                              buffer_info->page,
4021                                              buffer_info->page_offset,
4022                                              PAGE_SIZE / 2,
4023                                              PCI_DMA_FROMDEVICE);
4024                 }
4025
4026                 if (!buffer_info->skb) {
4027                         int bufsz;
4028
4029                         if (adapter->rx_ps_hdr_size)
4030                                 bufsz = adapter->rx_ps_hdr_size;
4031                         else
4032                                 bufsz = adapter->rx_buffer_len;
4033                         bufsz += NET_IP_ALIGN;
4034                         skb = netdev_alloc_skb(netdev, bufsz);
4035
4036                         if (!skb) {
4037                                 adapter->alloc_rx_buff_failed++;
4038                                 goto no_buffers;
4039                         }
4040
4041                         /* Make buffer alignment 2 beyond a 16 byte boundary
4042                          * this will result in a 16 byte aligned IP header after
4043                          * the 14 byte MAC header is removed
4044                          */
4045                         skb_reserve(skb, NET_IP_ALIGN);
4046
4047                         buffer_info->skb = skb;
4048                         buffer_info->dma = pci_map_single(pdev, skb->data,
4049                                                           bufsz,
4050                                                           PCI_DMA_FROMDEVICE);
4051
4052                 }
4053                 /* Refresh the desc even if buffer_addrs didn't change because
4054                  * each write-back erases this info. */
4055                 if (adapter->rx_ps_hdr_size) {
4056                         rx_desc->read.pkt_addr =
4057                              cpu_to_le64(buffer_info->page_dma);
4058                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4059                 } else {
4060                         rx_desc->read.pkt_addr =
4061                              cpu_to_le64(buffer_info->dma);
4062                         rx_desc->read.hdr_addr = 0;
4063                 }
4064
4065                 i++;
4066                 if (i == rx_ring->count)
4067                         i = 0;
4068                 buffer_info = &rx_ring->buffer_info[i];
4069         }
4070
4071 no_buffers:
4072         if (rx_ring->next_to_use != i) {
4073                 rx_ring->next_to_use = i;
4074                 if (i == 0)
4075                         i = (rx_ring->count - 1);
4076                 else
4077                         i--;
4078
4079                 /* Force memory writes to complete before letting h/w
4080                  * know there are new descriptors to fetch.  (Only
4081                  * applicable for weak-ordered memory model archs,
4082                  * such as IA-64). */
4083                 wmb();
4084                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4085         }
4086 }
4087
4088 /**
4089  * igb_mii_ioctl -
4090  * @netdev:
4091  * @ifreq:
4092  * @cmd:
4093  **/
4094 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4095 {
4096         struct igb_adapter *adapter = netdev_priv(netdev);
4097         struct mii_ioctl_data *data = if_mii(ifr);
4098
4099         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4100                 return -EOPNOTSUPP;
4101
4102         switch (cmd) {
4103         case SIOCGMIIPHY:
4104                 data->phy_id = adapter->hw.phy.addr;
4105                 break;
4106         case SIOCGMIIREG:
4107                 if (!capable(CAP_NET_ADMIN))
4108                         return -EPERM;
4109                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4110                                                      data->reg_num
4111                                                      & 0x1F, &data->val_out))
4112                         return -EIO;
4113                 break;
4114         case SIOCSMIIREG:
4115         default:
4116                 return -EOPNOTSUPP;
4117         }
4118         return 0;
4119 }
4120
4121 /**
4122  * igb_ioctl -
4123  * @netdev:
4124  * @ifreq:
4125  * @cmd:
4126  **/
4127 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4128 {
4129         switch (cmd) {
4130         case SIOCGMIIPHY:
4131         case SIOCGMIIREG:
4132         case SIOCSMIIREG:
4133                 return igb_mii_ioctl(netdev, ifr, cmd);
4134         default:
4135                 return -EOPNOTSUPP;
4136         }
4137 }
4138
4139 static void igb_vlan_rx_register(struct net_device *netdev,
4140                                  struct vlan_group *grp)
4141 {
4142         struct igb_adapter *adapter = netdev_priv(netdev);
4143         struct e1000_hw *hw = &adapter->hw;
4144         u32 ctrl, rctl;
4145
4146         igb_irq_disable(adapter);
4147         adapter->vlgrp = grp;
4148
4149         if (grp) {
4150                 /* enable VLAN tag insert/strip */
4151                 ctrl = rd32(E1000_CTRL);
4152                 ctrl |= E1000_CTRL_VME;
4153                 wr32(E1000_CTRL, ctrl);
4154
4155                 /* enable VLAN receive filtering */
4156                 rctl = rd32(E1000_RCTL);
4157                 rctl &= ~E1000_RCTL_CFIEN;
4158                 wr32(E1000_RCTL, rctl);
4159                 igb_update_mng_vlan(adapter);
4160                 wr32(E1000_RLPML,
4161                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4162         } else {
4163                 /* disable VLAN tag insert/strip */
4164                 ctrl = rd32(E1000_CTRL);
4165                 ctrl &= ~E1000_CTRL_VME;
4166                 wr32(E1000_CTRL, ctrl);
4167
4168                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4169                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4170                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4171                 }
4172                 wr32(E1000_RLPML,
4173                                 adapter->max_frame_size);
4174         }
4175
4176         if (!test_bit(__IGB_DOWN, &adapter->state))
4177                 igb_irq_enable(adapter);
4178 }
4179
4180 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4181 {
4182         struct igb_adapter *adapter = netdev_priv(netdev);
4183         struct e1000_hw *hw = &adapter->hw;
4184         u32 vfta, index;
4185
4186         if ((adapter->hw.mng_cookie.status &
4187              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4188             (vid == adapter->mng_vlan_id))
4189                 return;
4190         /* add VID to filter table */
4191         index = (vid >> 5) & 0x7F;
4192         vfta = array_rd32(E1000_VFTA, index);
4193         vfta |= (1 << (vid & 0x1F));
4194         igb_write_vfta(&adapter->hw, index, vfta);
4195 }
4196
4197 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4198 {
4199         struct igb_adapter *adapter = netdev_priv(netdev);
4200         struct e1000_hw *hw = &adapter->hw;
4201         u32 vfta, index;
4202
4203         igb_irq_disable(adapter);
4204         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4205
4206         if (!test_bit(__IGB_DOWN, &adapter->state))
4207                 igb_irq_enable(adapter);
4208
4209         if ((adapter->hw.mng_cookie.status &
4210              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4211             (vid == adapter->mng_vlan_id)) {
4212                 /* release control to f/w */
4213                 igb_release_hw_control(adapter);
4214                 return;
4215         }
4216
4217         /* remove VID from filter table */
4218         index = (vid >> 5) & 0x7F;
4219         vfta = array_rd32(E1000_VFTA, index);
4220         vfta &= ~(1 << (vid & 0x1F));
4221         igb_write_vfta(&adapter->hw, index, vfta);
4222 }
4223
4224 static void igb_restore_vlan(struct igb_adapter *adapter)
4225 {
4226         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4227
4228         if (adapter->vlgrp) {
4229                 u16 vid;
4230                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4231                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4232                                 continue;
4233                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4234                 }
4235         }
4236 }
4237
4238 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4239 {
4240         struct e1000_mac_info *mac = &adapter->hw.mac;
4241
4242         mac->autoneg = 0;
4243
4244         /* Fiber NICs only allow 1000 gbps Full duplex */
4245         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4246                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4247                 dev_err(&adapter->pdev->dev,
4248                         "Unsupported Speed/Duplex configuration\n");
4249                 return -EINVAL;
4250         }
4251
4252         switch (spddplx) {
4253         case SPEED_10 + DUPLEX_HALF:
4254                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4255                 break;
4256         case SPEED_10 + DUPLEX_FULL:
4257                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4258                 break;
4259         case SPEED_100 + DUPLEX_HALF:
4260                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4261                 break;
4262         case SPEED_100 + DUPLEX_FULL:
4263                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4264                 break;
4265         case SPEED_1000 + DUPLEX_FULL:
4266                 mac->autoneg = 1;
4267                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4268                 break;
4269         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4270         default:
4271                 dev_err(&adapter->pdev->dev,
4272                         "Unsupported Speed/Duplex configuration\n");
4273                 return -EINVAL;
4274         }
4275         return 0;
4276 }
4277
4278
4279 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4280 {
4281         struct net_device *netdev = pci_get_drvdata(pdev);
4282         struct igb_adapter *adapter = netdev_priv(netdev);
4283         struct e1000_hw *hw = &adapter->hw;
4284         u32 ctrl, rctl, status;
4285         u32 wufc = adapter->wol;
4286 #ifdef CONFIG_PM
4287         int retval = 0;
4288 #endif
4289
4290         netif_device_detach(netdev);
4291
4292         if (netif_running(netdev))
4293                 igb_close(netdev);
4294
4295         igb_reset_interrupt_capability(adapter);
4296
4297         igb_free_queues(adapter);
4298
4299 #ifdef CONFIG_PM
4300         retval = pci_save_state(pdev);
4301         if (retval)
4302                 return retval;
4303 #endif
4304
4305         status = rd32(E1000_STATUS);
4306         if (status & E1000_STATUS_LU)
4307                 wufc &= ~E1000_WUFC_LNKC;
4308
4309         if (wufc) {
4310                 igb_setup_rctl(adapter);
4311                 igb_set_multi(netdev);
4312
4313                 /* turn on all-multi mode if wake on multicast is enabled */
4314                 if (wufc & E1000_WUFC_MC) {
4315                         rctl = rd32(E1000_RCTL);
4316                         rctl |= E1000_RCTL_MPE;
4317                         wr32(E1000_RCTL, rctl);
4318                 }
4319
4320                 ctrl = rd32(E1000_CTRL);
4321                 /* advertise wake from D3Cold */
4322                 #define E1000_CTRL_ADVD3WUC 0x00100000
4323                 /* phy power management enable */
4324                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4325                 ctrl |= E1000_CTRL_ADVD3WUC;
4326                 wr32(E1000_CTRL, ctrl);
4327
4328                 /* Allow time for pending master requests to run */
4329                 igb_disable_pcie_master(&adapter->hw);
4330
4331                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4332                 wr32(E1000_WUFC, wufc);
4333         } else {
4334                 wr32(E1000_WUC, 0);
4335                 wr32(E1000_WUFC, 0);
4336         }
4337
4338         /* make sure adapter isn't asleep if manageability/wol is enabled */
4339         if (wufc || adapter->en_mng_pt) {
4340                 pci_enable_wake(pdev, PCI_D3hot, 1);
4341                 pci_enable_wake(pdev, PCI_D3cold, 1);
4342         } else {
4343                 igb_shutdown_fiber_serdes_link_82575(hw);
4344                 pci_enable_wake(pdev, PCI_D3hot, 0);
4345                 pci_enable_wake(pdev, PCI_D3cold, 0);
4346         }
4347
4348         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4349          * would have already happened in close and is redundant. */
4350         igb_release_hw_control(adapter);
4351
4352         pci_disable_device(pdev);
4353
4354         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4355
4356         return 0;
4357 }
4358
4359 #ifdef CONFIG_PM
4360 static int igb_resume(struct pci_dev *pdev)
4361 {
4362         struct net_device *netdev = pci_get_drvdata(pdev);
4363         struct igb_adapter *adapter = netdev_priv(netdev);
4364         struct e1000_hw *hw = &adapter->hw;
4365         u32 err;
4366
4367         pci_set_power_state(pdev, PCI_D0);
4368         pci_restore_state(pdev);
4369
4370         if (adapter->need_ioport)
4371                 err = pci_enable_device(pdev);
4372         else
4373                 err = pci_enable_device_mem(pdev);
4374         if (err) {
4375                 dev_err(&pdev->dev,
4376                         "igb: Cannot enable PCI device from suspend\n");
4377                 return err;
4378         }
4379         pci_set_master(pdev);
4380
4381         pci_enable_wake(pdev, PCI_D3hot, 0);
4382         pci_enable_wake(pdev, PCI_D3cold, 0);
4383
4384         igb_set_interrupt_capability(adapter);
4385
4386         if (igb_alloc_queues(adapter)) {
4387                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4388                 return -ENOMEM;
4389         }
4390
4391         /* e1000_power_up_phy(adapter); */
4392
4393         igb_reset(adapter);
4394         wr32(E1000_WUS, ~0);
4395
4396         if (netif_running(netdev)) {
4397                 err = igb_open(netdev);
4398                 if (err)
4399                         return err;
4400         }
4401
4402         netif_device_attach(netdev);
4403
4404         /* let the f/w know that the h/w is now under the control of the
4405          * driver. */
4406         igb_get_hw_control(adapter);
4407
4408         return 0;
4409 }
4410 #endif
4411
4412 static void igb_shutdown(struct pci_dev *pdev)
4413 {
4414         igb_suspend(pdev, PMSG_SUSPEND);
4415 }
4416
4417 #ifdef CONFIG_NET_POLL_CONTROLLER
4418 /*
4419  * Polling 'interrupt' - used by things like netconsole to send skbs
4420  * without having to re-enable interrupts. It's not called while
4421  * the interrupt routine is executing.
4422  */
4423 static void igb_netpoll(struct net_device *netdev)
4424 {
4425         struct igb_adapter *adapter = netdev_priv(netdev);
4426         int i;
4427         int work_done = 0;
4428
4429         igb_irq_disable(adapter);
4430         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4431
4432         for (i = 0; i < adapter->num_tx_queues; i++)
4433                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4434
4435         for (i = 0; i < adapter->num_rx_queues; i++)
4436                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4437                                      &work_done,
4438                                      adapter->rx_ring[i].napi.weight);
4439
4440         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4441         igb_irq_enable(adapter);
4442 }
4443 #endif /* CONFIG_NET_POLL_CONTROLLER */
4444
4445 /**
4446  * igb_io_error_detected - called when PCI error is detected
4447  * @pdev: Pointer to PCI device
4448  * @state: The current pci connection state
4449  *
4450  * This function is called after a PCI bus error affecting
4451  * this device has been detected.
4452  */
4453 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4454                                               pci_channel_state_t state)
4455 {
4456         struct net_device *netdev = pci_get_drvdata(pdev);
4457         struct igb_adapter *adapter = netdev_priv(netdev);
4458
4459         netif_device_detach(netdev);
4460
4461         if (netif_running(netdev))
4462                 igb_down(adapter);
4463         pci_disable_device(pdev);
4464
4465         /* Request a slot slot reset. */
4466         return PCI_ERS_RESULT_NEED_RESET;
4467 }
4468
4469 /**
4470  * igb_io_slot_reset - called after the pci bus has been reset.
4471  * @pdev: Pointer to PCI device
4472  *
4473  * Restart the card from scratch, as if from a cold-boot. Implementation
4474  * resembles the first-half of the igb_resume routine.
4475  */
4476 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4477 {
4478         struct net_device *netdev = pci_get_drvdata(pdev);
4479         struct igb_adapter *adapter = netdev_priv(netdev);
4480         struct e1000_hw *hw = &adapter->hw;
4481         int err;
4482
4483         if (adapter->need_ioport)
4484                 err = pci_enable_device(pdev);
4485         else
4486                 err = pci_enable_device_mem(pdev);
4487         if (err) {
4488                 dev_err(&pdev->dev,
4489                         "Cannot re-enable PCI device after reset.\n");
4490                 return PCI_ERS_RESULT_DISCONNECT;
4491         }
4492         pci_set_master(pdev);
4493         pci_restore_state(pdev);
4494
4495         pci_enable_wake(pdev, PCI_D3hot, 0);
4496         pci_enable_wake(pdev, PCI_D3cold, 0);
4497
4498         igb_reset(adapter);
4499         wr32(E1000_WUS, ~0);
4500
4501         return PCI_ERS_RESULT_RECOVERED;
4502 }
4503
4504 /**
4505  * igb_io_resume - called when traffic can start flowing again.
4506  * @pdev: Pointer to PCI device
4507  *
4508  * This callback is called when the error recovery driver tells us that
4509  * its OK to resume normal operation. Implementation resembles the
4510  * second-half of the igb_resume routine.
4511  */
4512 static void igb_io_resume(struct pci_dev *pdev)
4513 {
4514         struct net_device *netdev = pci_get_drvdata(pdev);
4515         struct igb_adapter *adapter = netdev_priv(netdev);
4516
4517         if (netif_running(netdev)) {
4518                 if (igb_up(adapter)) {
4519                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4520                         return;
4521                 }
4522         }
4523
4524         netif_device_attach(netdev);
4525
4526         /* let the f/w know that the h/w is now under the control of the
4527          * driver. */
4528         igb_get_hw_control(adapter);
4529
4530 }
4531
4532 /* igb_main.c */