7a34118507db17a0699520816016b8c6d2655226
[linux-2.6.git] / drivers / mmc / host / atmel-mci.c
1 /*
2  * Atmel MultiMedia Card Interface driver
3  *
4  * Copyright (C) 2004-2008 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
26
27 #include <linux/mmc/host.h>
28
29 #include <asm/atmel-mci.h>
30 #include <asm/io.h>
31 #include <asm/unaligned.h>
32
33 #include <mach/board.h>
34
35 #include "atmel-mci-regs.h"
36
37 #define ATMCI_DATA_ERROR_FLAGS  (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 #define ATMCI_DMA_THRESHOLD     16
39
40 enum {
41         EVENT_CMD_COMPLETE = 0,
42         EVENT_XFER_COMPLETE,
43         EVENT_DATA_COMPLETE,
44         EVENT_DATA_ERROR,
45 };
46
47 enum atmel_mci_state {
48         STATE_IDLE = 0,
49         STATE_SENDING_CMD,
50         STATE_SENDING_DATA,
51         STATE_DATA_BUSY,
52         STATE_SENDING_STOP,
53         STATE_DATA_ERROR,
54 };
55
56 struct atmel_mci_dma {
57 #ifdef CONFIG_MMC_ATMELMCI_DMA
58         struct dma_client               client;
59         struct dma_chan                 *chan;
60         struct dma_async_tx_descriptor  *data_desc;
61 #endif
62 };
63
64 /**
65  * struct atmel_mci - MMC controller state shared between all slots
66  * @lock: Spinlock protecting the queue and associated data.
67  * @regs: Pointer to MMIO registers.
68  * @sg: Scatterlist entry currently being processed by PIO code, if any.
69  * @pio_offset: Offset into the current scatterlist entry.
70  * @cur_slot: The slot which is currently using the controller.
71  * @mrq: The request currently being processed on @cur_slot,
72  *      or NULL if the controller is idle.
73  * @cmd: The command currently being sent to the card, or NULL.
74  * @data: The data currently being transferred, or NULL if no data
75  *      transfer is in progress.
76  * @dma: DMA client state.
77  * @data_chan: DMA channel being used for the current data transfer.
78  * @cmd_status: Snapshot of SR taken upon completion of the current
79  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
80  * @data_status: Snapshot of SR taken upon completion of the current
81  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
82  *      EVENT_DATA_ERROR is pending.
83  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
84  *      to be sent.
85  * @tasklet: Tasklet running the request state machine.
86  * @pending_events: Bitmask of events flagged by the interrupt handler
87  *      to be processed by the tasklet.
88  * @completed_events: Bitmask of events which the state machine has
89  *      processed.
90  * @state: Tasklet state.
91  * @queue: List of slots waiting for access to the controller.
92  * @need_clock_update: Update the clock rate before the next request.
93  * @need_reset: Reset controller before next request.
94  * @mode_reg: Value of the MR register.
95  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
96  *      rate and timeout calculations.
97  * @mapbase: Physical address of the MMIO registers.
98  * @mck: The peripheral bus clock hooked up to the MMC controller.
99  * @pdev: Platform device associated with the MMC controller.
100  * @slot: Slots sharing this MMC controller.
101  *
102  * Locking
103  * =======
104  *
105  * @lock is a softirq-safe spinlock protecting @queue as well as
106  * @cur_slot, @mrq and @state. These must always be updated
107  * at the same time while holding @lock.
108  *
109  * @lock also protects mode_reg and need_clock_update since these are
110  * used to synchronize mode register updates with the queue
111  * processing.
112  *
113  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
114  * and must always be written at the same time as the slot is added to
115  * @queue.
116  *
117  * @pending_events and @completed_events are accessed using atomic bit
118  * operations, so they don't need any locking.
119  *
120  * None of the fields touched by the interrupt handler need any
121  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
122  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
123  * interrupts must be disabled and @data_status updated with a
124  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
125  * CMDRDY interupt must be disabled and @cmd_status updated with a
126  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
127  * bytes_xfered field of @data must be written. This is ensured by
128  * using barriers.
129  */
130 struct atmel_mci {
131         spinlock_t              lock;
132         void __iomem            *regs;
133
134         struct scatterlist      *sg;
135         unsigned int            pio_offset;
136
137         struct atmel_mci_slot   *cur_slot;
138         struct mmc_request      *mrq;
139         struct mmc_command      *cmd;
140         struct mmc_data         *data;
141
142         struct atmel_mci_dma    dma;
143         struct dma_chan         *data_chan;
144
145         u32                     cmd_status;
146         u32                     data_status;
147         u32                     stop_cmdr;
148
149         struct tasklet_struct   tasklet;
150         unsigned long           pending_events;
151         unsigned long           completed_events;
152         enum atmel_mci_state    state;
153         struct list_head        queue;
154
155         bool                    need_clock_update;
156         bool                    need_reset;
157         u32                     mode_reg;
158         unsigned long           bus_hz;
159         unsigned long           mapbase;
160         struct clk              *mck;
161         struct platform_device  *pdev;
162
163         struct atmel_mci_slot   *slot[ATMEL_MCI_MAX_NR_SLOTS];
164 };
165
166 /**
167  * struct atmel_mci_slot - MMC slot state
168  * @mmc: The mmc_host representing this slot.
169  * @host: The MMC controller this slot is using.
170  * @sdc_reg: Value of SDCR to be written before using this slot.
171  * @mrq: mmc_request currently being processed or waiting to be
172  *      processed, or NULL when the slot is idle.
173  * @queue_node: List node for placing this node in the @queue list of
174  *      &struct atmel_mci.
175  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
176  * @flags: Random state bits associated with the slot.
177  * @detect_pin: GPIO pin used for card detection, or negative if not
178  *      available.
179  * @wp_pin: GPIO pin used for card write protect sending, or negative
180  *      if not available.
181  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
182  */
183 struct atmel_mci_slot {
184         struct mmc_host         *mmc;
185         struct atmel_mci        *host;
186
187         u32                     sdc_reg;
188
189         struct mmc_request      *mrq;
190         struct list_head        queue_node;
191
192         unsigned int            clock;
193         unsigned long           flags;
194 #define ATMCI_CARD_PRESENT      0
195 #define ATMCI_CARD_NEED_INIT    1
196 #define ATMCI_SHUTDOWN          2
197
198         int                     detect_pin;
199         int                     wp_pin;
200
201         struct timer_list       detect_timer;
202 };
203
204 #define atmci_test_and_clear_pending(host, event)               \
205         test_and_clear_bit(event, &host->pending_events)
206 #define atmci_set_completed(host, event)                        \
207         set_bit(event, &host->completed_events)
208 #define atmci_set_pending(host, event)                          \
209         set_bit(event, &host->pending_events)
210
211 /*
212  * The debugfs stuff below is mostly optimized away when
213  * CONFIG_DEBUG_FS is not set.
214  */
215 static int atmci_req_show(struct seq_file *s, void *v)
216 {
217         struct atmel_mci_slot   *slot = s->private;
218         struct mmc_request      *mrq;
219         struct mmc_command      *cmd;
220         struct mmc_command      *stop;
221         struct mmc_data         *data;
222
223         /* Make sure we get a consistent snapshot */
224         spin_lock_bh(&slot->host->lock);
225         mrq = slot->mrq;
226
227         if (mrq) {
228                 cmd = mrq->cmd;
229                 data = mrq->data;
230                 stop = mrq->stop;
231
232                 if (cmd)
233                         seq_printf(s,
234                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
235                                 cmd->opcode, cmd->arg, cmd->flags,
236                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
237                                 cmd->resp[2], cmd->error);
238                 if (data)
239                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
240                                 data->bytes_xfered, data->blocks,
241                                 data->blksz, data->flags, data->error);
242                 if (stop)
243                         seq_printf(s,
244                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
245                                 stop->opcode, stop->arg, stop->flags,
246                                 stop->resp[0], stop->resp[1], stop->resp[2],
247                                 stop->resp[2], stop->error);
248         }
249
250         spin_unlock_bh(&slot->host->lock);
251
252         return 0;
253 }
254
255 static int atmci_req_open(struct inode *inode, struct file *file)
256 {
257         return single_open(file, atmci_req_show, inode->i_private);
258 }
259
260 static const struct file_operations atmci_req_fops = {
261         .owner          = THIS_MODULE,
262         .open           = atmci_req_open,
263         .read           = seq_read,
264         .llseek         = seq_lseek,
265         .release        = single_release,
266 };
267
268 static void atmci_show_status_reg(struct seq_file *s,
269                 const char *regname, u32 value)
270 {
271         static const char       *sr_bit[] = {
272                 [0]     = "CMDRDY",
273                 [1]     = "RXRDY",
274                 [2]     = "TXRDY",
275                 [3]     = "BLKE",
276                 [4]     = "DTIP",
277                 [5]     = "NOTBUSY",
278                 [8]     = "SDIOIRQA",
279                 [9]     = "SDIOIRQB",
280                 [16]    = "RINDE",
281                 [17]    = "RDIRE",
282                 [18]    = "RCRCE",
283                 [19]    = "RENDE",
284                 [20]    = "RTOE",
285                 [21]    = "DCRCE",
286                 [22]    = "DTOE",
287                 [30]    = "OVRE",
288                 [31]    = "UNRE",
289         };
290         unsigned int            i;
291
292         seq_printf(s, "%s:\t0x%08x", regname, value);
293         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
294                 if (value & (1 << i)) {
295                         if (sr_bit[i])
296                                 seq_printf(s, " %s", sr_bit[i]);
297                         else
298                                 seq_puts(s, " UNKNOWN");
299                 }
300         }
301         seq_putc(s, '\n');
302 }
303
304 static int atmci_regs_show(struct seq_file *s, void *v)
305 {
306         struct atmel_mci        *host = s->private;
307         u32                     *buf;
308
309         buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
310         if (!buf)
311                 return -ENOMEM;
312
313         /*
314          * Grab a more or less consistent snapshot. Note that we're
315          * not disabling interrupts, so IMR and SR may not be
316          * consistent.
317          */
318         spin_lock_bh(&host->lock);
319         clk_enable(host->mck);
320         memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
321         clk_disable(host->mck);
322         spin_unlock_bh(&host->lock);
323
324         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
325                         buf[MCI_MR / 4],
326                         buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
327                         buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
328                         buf[MCI_MR / 4] & 0xff);
329         seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
330         seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
331         seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
332         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
333                         buf[MCI_BLKR / 4],
334                         buf[MCI_BLKR / 4] & 0xffff,
335                         (buf[MCI_BLKR / 4] >> 16) & 0xffff);
336
337         /* Don't read RSPR and RDR; it will consume the data there */
338
339         atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
340         atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
341
342         kfree(buf);
343
344         return 0;
345 }
346
347 static int atmci_regs_open(struct inode *inode, struct file *file)
348 {
349         return single_open(file, atmci_regs_show, inode->i_private);
350 }
351
352 static const struct file_operations atmci_regs_fops = {
353         .owner          = THIS_MODULE,
354         .open           = atmci_regs_open,
355         .read           = seq_read,
356         .llseek         = seq_lseek,
357         .release        = single_release,
358 };
359
360 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
361 {
362         struct mmc_host         *mmc = slot->mmc;
363         struct atmel_mci        *host = slot->host;
364         struct dentry           *root;
365         struct dentry           *node;
366
367         root = mmc->debugfs_root;
368         if (!root)
369                 return;
370
371         node = debugfs_create_file("regs", S_IRUSR, root, host,
372                         &atmci_regs_fops);
373         if (IS_ERR(node))
374                 return;
375         if (!node)
376                 goto err;
377
378         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
379         if (!node)
380                 goto err;
381
382         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
383         if (!node)
384                 goto err;
385
386         node = debugfs_create_x32("pending_events", S_IRUSR, root,
387                                      (u32 *)&host->pending_events);
388         if (!node)
389                 goto err;
390
391         node = debugfs_create_x32("completed_events", S_IRUSR, root,
392                                      (u32 *)&host->completed_events);
393         if (!node)
394                 goto err;
395
396         return;
397
398 err:
399         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
400 }
401
402 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
403                                         unsigned int ns)
404 {
405         return (ns * (host->bus_hz / 1000000) + 999) / 1000;
406 }
407
408 static void atmci_set_timeout(struct atmel_mci *host,
409                 struct atmel_mci_slot *slot, struct mmc_data *data)
410 {
411         static unsigned dtomul_to_shift[] = {
412                 0, 4, 7, 8, 10, 12, 16, 20
413         };
414         unsigned        timeout;
415         unsigned        dtocyc;
416         unsigned        dtomul;
417
418         timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
419
420         for (dtomul = 0; dtomul < 8; dtomul++) {
421                 unsigned shift = dtomul_to_shift[dtomul];
422                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
423                 if (dtocyc < 15)
424                         break;
425         }
426
427         if (dtomul >= 8) {
428                 dtomul = 7;
429                 dtocyc = 15;
430         }
431
432         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
433                         dtocyc << dtomul_to_shift[dtomul]);
434         mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
435 }
436
437 /*
438  * Return mask with command flags to be enabled for this command.
439  */
440 static u32 atmci_prepare_command(struct mmc_host *mmc,
441                                  struct mmc_command *cmd)
442 {
443         struct mmc_data *data;
444         u32             cmdr;
445
446         cmd->error = -EINPROGRESS;
447
448         cmdr = MCI_CMDR_CMDNB(cmd->opcode);
449
450         if (cmd->flags & MMC_RSP_PRESENT) {
451                 if (cmd->flags & MMC_RSP_136)
452                         cmdr |= MCI_CMDR_RSPTYP_136BIT;
453                 else
454                         cmdr |= MCI_CMDR_RSPTYP_48BIT;
455         }
456
457         /*
458          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
459          * it's too difficult to determine whether this is an ACMD or
460          * not. Better make it 64.
461          */
462         cmdr |= MCI_CMDR_MAXLAT_64CYC;
463
464         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
465                 cmdr |= MCI_CMDR_OPDCMD;
466
467         data = cmd->data;
468         if (data) {
469                 cmdr |= MCI_CMDR_START_XFER;
470                 if (data->flags & MMC_DATA_STREAM)
471                         cmdr |= MCI_CMDR_STREAM;
472                 else if (data->blocks > 1)
473                         cmdr |= MCI_CMDR_MULTI_BLOCK;
474                 else
475                         cmdr |= MCI_CMDR_BLOCK;
476
477                 if (data->flags & MMC_DATA_READ)
478                         cmdr |= MCI_CMDR_TRDIR_READ;
479         }
480
481         return cmdr;
482 }
483
484 static void atmci_start_command(struct atmel_mci *host,
485                 struct mmc_command *cmd, u32 cmd_flags)
486 {
487         WARN_ON(host->cmd);
488         host->cmd = cmd;
489
490         dev_vdbg(&host->pdev->dev,
491                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
492                         cmd->arg, cmd_flags);
493
494         mci_writel(host, ARGR, cmd->arg);
495         mci_writel(host, CMDR, cmd_flags);
496 }
497
498 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
499 {
500         atmci_start_command(host, data->stop, host->stop_cmdr);
501         mci_writel(host, IER, MCI_CMDRDY);
502 }
503
504 #ifdef CONFIG_MMC_ATMELMCI_DMA
505 static void atmci_dma_cleanup(struct atmel_mci *host)
506 {
507         struct mmc_data                 *data = host->data;
508
509         dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
510                      ((data->flags & MMC_DATA_WRITE)
511                       ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
512 }
513
514 static void atmci_stop_dma(struct atmel_mci *host)
515 {
516         struct dma_chan *chan = host->data_chan;
517
518         if (chan) {
519                 chan->device->device_terminate_all(chan);
520                 atmci_dma_cleanup(host);
521         } else {
522                 /* Data transfer was stopped by the interrupt handler */
523                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
524                 mci_writel(host, IER, MCI_NOTBUSY);
525         }
526 }
527
528 /* This function is called by the DMA driver from tasklet context. */
529 static void atmci_dma_complete(void *arg)
530 {
531         struct atmel_mci        *host = arg;
532         struct mmc_data         *data = host->data;
533
534         dev_vdbg(&host->pdev->dev, "DMA complete\n");
535
536         atmci_dma_cleanup(host);
537
538         /*
539          * If the card was removed, data will be NULL. No point trying
540          * to send the stop command or waiting for NBUSY in this case.
541          */
542         if (data) {
543                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
544                 tasklet_schedule(&host->tasklet);
545
546                 /*
547                  * Regardless of what the documentation says, we have
548                  * to wait for NOTBUSY even after block read
549                  * operations.
550                  *
551                  * When the DMA transfer is complete, the controller
552                  * may still be reading the CRC from the card, i.e.
553                  * the data transfer is still in progress and we
554                  * haven't seen all the potential error bits yet.
555                  *
556                  * The interrupt handler will schedule a different
557                  * tasklet to finish things up when the data transfer
558                  * is completely done.
559                  *
560                  * We may not complete the mmc request here anyway
561                  * because the mmc layer may call back and cause us to
562                  * violate the "don't submit new operations from the
563                  * completion callback" rule of the dma engine
564                  * framework.
565                  */
566                 mci_writel(host, IER, MCI_NOTBUSY);
567         }
568 }
569
570 static int
571 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
572 {
573         struct dma_chan                 *chan;
574         struct dma_async_tx_descriptor  *desc;
575         struct scatterlist              *sg;
576         unsigned int                    i;
577         enum dma_data_direction         direction;
578
579         /*
580          * We don't do DMA on "complex" transfers, i.e. with
581          * non-word-aligned buffers or lengths. Also, we don't bother
582          * with all the DMA setup overhead for short transfers.
583          */
584         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
585                 return -EINVAL;
586         if (data->blksz & 3)
587                 return -EINVAL;
588
589         for_each_sg(data->sg, sg, data->sg_len, i) {
590                 if (sg->offset & 3 || sg->length & 3)
591                         return -EINVAL;
592         }
593
594         /* If we don't have a channel, we can't do DMA */
595         chan = host->dma.chan;
596         if (chan)
597                 host->data_chan = chan;
598
599         if (!chan)
600                 return -ENODEV;
601
602         if (data->flags & MMC_DATA_READ)
603                 direction = DMA_FROM_DEVICE;
604         else
605                 direction = DMA_TO_DEVICE;
606
607         desc = chan->device->device_prep_slave_sg(chan,
608                         data->sg, data->sg_len, direction,
609                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
610         if (!desc)
611                 return -ENOMEM;
612
613         host->dma.data_desc = desc;
614         desc->callback = atmci_dma_complete;
615         desc->callback_param = host;
616         desc->tx_submit(desc);
617
618         /* Go! */
619         chan->device->device_issue_pending(chan);
620
621         return 0;
622 }
623
624 #else /* CONFIG_MMC_ATMELMCI_DMA */
625
626 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
627 {
628         return -ENOSYS;
629 }
630
631 static void atmci_stop_dma(struct atmel_mci *host)
632 {
633         /* Data transfer was stopped by the interrupt handler */
634         atmci_set_pending(host, EVENT_XFER_COMPLETE);
635         mci_writel(host, IER, MCI_NOTBUSY);
636 }
637
638 #endif /* CONFIG_MMC_ATMELMCI_DMA */
639
640 /*
641  * Returns a mask of interrupt flags to be enabled after the whole
642  * request has been prepared.
643  */
644 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
645 {
646         u32 iflags;
647
648         data->error = -EINPROGRESS;
649
650         WARN_ON(host->data);
651         host->sg = NULL;
652         host->data = data;
653
654         iflags = ATMCI_DATA_ERROR_FLAGS;
655         if (atmci_submit_data_dma(host, data)) {
656                 host->data_chan = NULL;
657
658                 /*
659                  * Errata: MMC data write operation with less than 12
660                  * bytes is impossible.
661                  *
662                  * Errata: MCI Transmit Data Register (TDR) FIFO
663                  * corruption when length is not multiple of 4.
664                  */
665                 if (data->blocks * data->blksz < 12
666                                 || (data->blocks * data->blksz) & 3)
667                         host->need_reset = true;
668
669                 host->sg = data->sg;
670                 host->pio_offset = 0;
671                 if (data->flags & MMC_DATA_READ)
672                         iflags |= MCI_RXRDY;
673                 else
674                         iflags |= MCI_TXRDY;
675         }
676
677         return iflags;
678 }
679
680 static void atmci_start_request(struct atmel_mci *host,
681                 struct atmel_mci_slot *slot)
682 {
683         struct mmc_request      *mrq;
684         struct mmc_command      *cmd;
685         struct mmc_data         *data;
686         u32                     iflags;
687         u32                     cmdflags;
688
689         mrq = slot->mrq;
690         host->cur_slot = slot;
691         host->mrq = mrq;
692
693         host->pending_events = 0;
694         host->completed_events = 0;
695         host->data_status = 0;
696
697         if (host->need_reset) {
698                 mci_writel(host, CR, MCI_CR_SWRST);
699                 mci_writel(host, CR, MCI_CR_MCIEN);
700                 mci_writel(host, MR, host->mode_reg);
701                 host->need_reset = false;
702         }
703         mci_writel(host, SDCR, slot->sdc_reg);
704
705         iflags = mci_readl(host, IMR);
706         if (iflags)
707                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
708                                 iflags);
709
710         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
711                 /* Send init sequence (74 clock cycles) */
712                 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
713                 while (!(mci_readl(host, SR) & MCI_CMDRDY))
714                         cpu_relax();
715         }
716         data = mrq->data;
717         if (data) {
718                 atmci_set_timeout(host, slot, data);
719
720                 /* Must set block count/size before sending command */
721                 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
722                                 | MCI_BLKLEN(data->blksz));
723                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
724                         MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
725         }
726
727         iflags = MCI_CMDRDY;
728         cmd = mrq->cmd;
729         cmdflags = atmci_prepare_command(slot->mmc, cmd);
730         atmci_start_command(host, cmd, cmdflags);
731
732         if (data)
733                 iflags |= atmci_submit_data(host, data);
734
735         if (mrq->stop) {
736                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
737                 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
738                 if (!(data->flags & MMC_DATA_WRITE))
739                         host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
740                 if (data->flags & MMC_DATA_STREAM)
741                         host->stop_cmdr |= MCI_CMDR_STREAM;
742                 else
743                         host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
744         }
745
746         /*
747          * We could have enabled interrupts earlier, but I suspect
748          * that would open up a nice can of interesting race
749          * conditions (e.g. command and data complete, but stop not
750          * prepared yet.)
751          */
752         mci_writel(host, IER, iflags);
753 }
754
755 static void atmci_queue_request(struct atmel_mci *host,
756                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
757 {
758         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
759                         host->state);
760
761         spin_lock_bh(&host->lock);
762         slot->mrq = mrq;
763         if (host->state == STATE_IDLE) {
764                 host->state = STATE_SENDING_CMD;
765                 atmci_start_request(host, slot);
766         } else {
767                 list_add_tail(&slot->queue_node, &host->queue);
768         }
769         spin_unlock_bh(&host->lock);
770 }
771
772 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
773 {
774         struct atmel_mci_slot   *slot = mmc_priv(mmc);
775         struct atmel_mci        *host = slot->host;
776         struct mmc_data         *data;
777
778         WARN_ON(slot->mrq);
779
780         /*
781          * We may "know" the card is gone even though there's still an
782          * electrical connection. If so, we really need to communicate
783          * this to the MMC core since there won't be any more
784          * interrupts as the card is completely removed. Otherwise,
785          * the MMC core might believe the card is still there even
786          * though the card was just removed very slowly.
787          */
788         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
789                 mrq->cmd->error = -ENOMEDIUM;
790                 mmc_request_done(mmc, mrq);
791                 return;
792         }
793
794         /* We don't support multiple blocks of weird lengths. */
795         data = mrq->data;
796         if (data && data->blocks > 1 && data->blksz & 3) {
797                 mrq->cmd->error = -EINVAL;
798                 mmc_request_done(mmc, mrq);
799         }
800
801         atmci_queue_request(host, slot, mrq);
802 }
803
804 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
805 {
806         struct atmel_mci_slot   *slot = mmc_priv(mmc);
807         struct atmel_mci        *host = slot->host;
808         unsigned int            i;
809
810         slot->sdc_reg &= ~MCI_SDCBUS_MASK;
811         switch (ios->bus_width) {
812         case MMC_BUS_WIDTH_1:
813                 slot->sdc_reg |= MCI_SDCBUS_1BIT;
814                 break;
815         case MMC_BUS_WIDTH_4:
816                 slot->sdc_reg = MCI_SDCBUS_4BIT;
817                 break;
818         }
819
820         if (ios->clock) {
821                 unsigned int clock_min = ~0U;
822                 u32 clkdiv;
823
824                 spin_lock_bh(&host->lock);
825                 if (!host->mode_reg) {
826                         clk_enable(host->mck);
827                         mci_writel(host, CR, MCI_CR_SWRST);
828                         mci_writel(host, CR, MCI_CR_MCIEN);
829                 }
830
831                 /*
832                  * Use mirror of ios->clock to prevent race with mmc
833                  * core ios update when finding the minimum.
834                  */
835                 slot->clock = ios->clock;
836                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
837                         if (host->slot[i] && host->slot[i]->clock
838                                         && host->slot[i]->clock < clock_min)
839                                 clock_min = host->slot[i]->clock;
840                 }
841
842                 /* Calculate clock divider */
843                 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
844                 if (clkdiv > 255) {
845                         dev_warn(&mmc->class_dev,
846                                 "clock %u too slow; using %lu\n",
847                                 clock_min, host->bus_hz / (2 * 256));
848                         clkdiv = 255;
849                 }
850
851                 /*
852                  * WRPROOF and RDPROOF prevent overruns/underruns by
853                  * stopping the clock when the FIFO is full/empty.
854                  * This state is not expected to last for long.
855                  */
856                 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
857                                         | MCI_MR_RDPROOF;
858
859                 if (list_empty(&host->queue))
860                         mci_writel(host, MR, host->mode_reg);
861                 else
862                         host->need_clock_update = true;
863
864                 spin_unlock_bh(&host->lock);
865         } else {
866                 bool any_slot_active = false;
867
868                 spin_lock_bh(&host->lock);
869                 slot->clock = 0;
870                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
871                         if (host->slot[i] && host->slot[i]->clock) {
872                                 any_slot_active = true;
873                                 break;
874                         }
875                 }
876                 if (!any_slot_active) {
877                         mci_writel(host, CR, MCI_CR_MCIDIS);
878                         if (host->mode_reg) {
879                                 mci_readl(host, MR);
880                                 clk_disable(host->mck);
881                         }
882                         host->mode_reg = 0;
883                 }
884                 spin_unlock_bh(&host->lock);
885         }
886
887         switch (ios->power_mode) {
888         case MMC_POWER_UP:
889                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
890                 break;
891         default:
892                 /*
893                  * TODO: None of the currently available AVR32-based
894                  * boards allow MMC power to be turned off. Implement
895                  * power control when this can be tested properly.
896                  *
897                  * We also need to hook this into the clock management
898                  * somehow so that newly inserted cards aren't
899                  * subjected to a fast clock before we have a chance
900                  * to figure out what the maximum rate is. Currently,
901                  * there's no way to avoid this, and there never will
902                  * be for boards that don't support power control.
903                  */
904                 break;
905         }
906 }
907
908 static int atmci_get_ro(struct mmc_host *mmc)
909 {
910         int                     read_only = -ENOSYS;
911         struct atmel_mci_slot   *slot = mmc_priv(mmc);
912
913         if (gpio_is_valid(slot->wp_pin)) {
914                 read_only = gpio_get_value(slot->wp_pin);
915                 dev_dbg(&mmc->class_dev, "card is %s\n",
916                                 read_only ? "read-only" : "read-write");
917         }
918
919         return read_only;
920 }
921
922 static int atmci_get_cd(struct mmc_host *mmc)
923 {
924         int                     present = -ENOSYS;
925         struct atmel_mci_slot   *slot = mmc_priv(mmc);
926
927         if (gpio_is_valid(slot->detect_pin)) {
928                 present = !gpio_get_value(slot->detect_pin);
929                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
930                                 present ? "" : "not ");
931         }
932
933         return present;
934 }
935
936 static const struct mmc_host_ops atmci_ops = {
937         .request        = atmci_request,
938         .set_ios        = atmci_set_ios,
939         .get_ro         = atmci_get_ro,
940         .get_cd         = atmci_get_cd,
941 };
942
943 /* Called with host->lock held */
944 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
945         __releases(&host->lock)
946         __acquires(&host->lock)
947 {
948         struct atmel_mci_slot   *slot = NULL;
949         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
950
951         WARN_ON(host->cmd || host->data);
952
953         /*
954          * Update the MMC clock rate if necessary. This may be
955          * necessary if set_ios() is called when a different slot is
956          * busy transfering data.
957          */
958         if (host->need_clock_update)
959                 mci_writel(host, MR, host->mode_reg);
960
961         host->cur_slot->mrq = NULL;
962         host->mrq = NULL;
963         if (!list_empty(&host->queue)) {
964                 slot = list_entry(host->queue.next,
965                                 struct atmel_mci_slot, queue_node);
966                 list_del(&slot->queue_node);
967                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
968                                 mmc_hostname(slot->mmc));
969                 host->state = STATE_SENDING_CMD;
970                 atmci_start_request(host, slot);
971         } else {
972                 dev_vdbg(&host->pdev->dev, "list empty\n");
973                 host->state = STATE_IDLE;
974         }
975
976         spin_unlock(&host->lock);
977         mmc_request_done(prev_mmc, mrq);
978         spin_lock(&host->lock);
979 }
980
981 static void atmci_command_complete(struct atmel_mci *host,
982                         struct mmc_command *cmd)
983 {
984         u32             status = host->cmd_status;
985
986         /* Read the response from the card (up to 16 bytes) */
987         cmd->resp[0] = mci_readl(host, RSPR);
988         cmd->resp[1] = mci_readl(host, RSPR);
989         cmd->resp[2] = mci_readl(host, RSPR);
990         cmd->resp[3] = mci_readl(host, RSPR);
991
992         if (status & MCI_RTOE)
993                 cmd->error = -ETIMEDOUT;
994         else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
995                 cmd->error = -EILSEQ;
996         else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
997                 cmd->error = -EIO;
998         else
999                 cmd->error = 0;
1000
1001         if (cmd->error) {
1002                 dev_dbg(&host->pdev->dev,
1003                         "command error: status=0x%08x\n", status);
1004
1005                 if (cmd->data) {
1006                         host->data = NULL;
1007                         atmci_stop_dma(host);
1008                         mci_writel(host, IDR, MCI_NOTBUSY
1009                                         | MCI_TXRDY | MCI_RXRDY
1010                                         | ATMCI_DATA_ERROR_FLAGS);
1011                 }
1012         }
1013 }
1014
1015 static void atmci_detect_change(unsigned long data)
1016 {
1017         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1018         bool                    present;
1019         bool                    present_old;
1020
1021         /*
1022          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1023          * freeing the interrupt. We must not re-enable the interrupt
1024          * if it has been freed, and if we're shutting down, it
1025          * doesn't really matter whether the card is present or not.
1026          */
1027         smp_rmb();
1028         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1029                 return;
1030
1031         enable_irq(gpio_to_irq(slot->detect_pin));
1032         present = !gpio_get_value(slot->detect_pin);
1033         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1034
1035         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1036                         present, present_old);
1037
1038         if (present != present_old) {
1039                 struct atmel_mci        *host = slot->host;
1040                 struct mmc_request      *mrq;
1041
1042                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1043                         present ? "inserted" : "removed");
1044
1045                 spin_lock(&host->lock);
1046
1047                 if (!present)
1048                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1049                 else
1050                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1051
1052                 /* Clean up queue if present */
1053                 mrq = slot->mrq;
1054                 if (mrq) {
1055                         if (mrq == host->mrq) {
1056                                 /*
1057                                  * Reset controller to terminate any ongoing
1058                                  * commands or data transfers.
1059                                  */
1060                                 mci_writel(host, CR, MCI_CR_SWRST);
1061                                 mci_writel(host, CR, MCI_CR_MCIEN);
1062                                 mci_writel(host, MR, host->mode_reg);
1063
1064                                 host->data = NULL;
1065                                 host->cmd = NULL;
1066
1067                                 switch (host->state) {
1068                                 case STATE_IDLE:
1069                                         break;
1070                                 case STATE_SENDING_CMD:
1071                                         mrq->cmd->error = -ENOMEDIUM;
1072                                         if (!mrq->data)
1073                                                 break;
1074                                         /* fall through */
1075                                 case STATE_SENDING_DATA:
1076                                         mrq->data->error = -ENOMEDIUM;
1077                                         atmci_stop_dma(host);
1078                                         break;
1079                                 case STATE_DATA_BUSY:
1080                                 case STATE_DATA_ERROR:
1081                                         if (mrq->data->error == -EINPROGRESS)
1082                                                 mrq->data->error = -ENOMEDIUM;
1083                                         if (!mrq->stop)
1084                                                 break;
1085                                         /* fall through */
1086                                 case STATE_SENDING_STOP:
1087                                         mrq->stop->error = -ENOMEDIUM;
1088                                         break;
1089                                 }
1090
1091                                 atmci_request_end(host, mrq);
1092                         } else {
1093                                 list_del(&slot->queue_node);
1094                                 mrq->cmd->error = -ENOMEDIUM;
1095                                 if (mrq->data)
1096                                         mrq->data->error = -ENOMEDIUM;
1097                                 if (mrq->stop)
1098                                         mrq->stop->error = -ENOMEDIUM;
1099
1100                                 spin_unlock(&host->lock);
1101                                 mmc_request_done(slot->mmc, mrq);
1102                                 spin_lock(&host->lock);
1103                         }
1104                 }
1105                 spin_unlock(&host->lock);
1106
1107                 mmc_detect_change(slot->mmc, 0);
1108         }
1109 }
1110
1111 static void atmci_tasklet_func(unsigned long priv)
1112 {
1113         struct atmel_mci        *host = (struct atmel_mci *)priv;
1114         struct mmc_request      *mrq = host->mrq;
1115         struct mmc_data         *data = host->data;
1116         struct mmc_command      *cmd = host->cmd;
1117         enum atmel_mci_state    state = host->state;
1118         enum atmel_mci_state    prev_state;
1119         u32                     status;
1120
1121         spin_lock(&host->lock);
1122
1123         state = host->state;
1124
1125         dev_vdbg(&host->pdev->dev,
1126                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1127                 state, host->pending_events, host->completed_events,
1128                 mci_readl(host, IMR));
1129
1130         do {
1131                 prev_state = state;
1132
1133                 switch (state) {
1134                 case STATE_IDLE:
1135                         break;
1136
1137                 case STATE_SENDING_CMD:
1138                         if (!atmci_test_and_clear_pending(host,
1139                                                 EVENT_CMD_COMPLETE))
1140                                 break;
1141
1142                         host->cmd = NULL;
1143                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1144                         atmci_command_complete(host, mrq->cmd);
1145                         if (!mrq->data || cmd->error) {
1146                                 atmci_request_end(host, host->mrq);
1147                                 goto unlock;
1148                         }
1149
1150                         prev_state = state = STATE_SENDING_DATA;
1151                         /* fall through */
1152
1153                 case STATE_SENDING_DATA:
1154                         if (atmci_test_and_clear_pending(host,
1155                                                 EVENT_DATA_ERROR)) {
1156                                 atmci_stop_dma(host);
1157                                 if (data->stop)
1158                                         send_stop_cmd(host, data);
1159                                 state = STATE_DATA_ERROR;
1160                                 break;
1161                         }
1162
1163                         if (!atmci_test_and_clear_pending(host,
1164                                                 EVENT_XFER_COMPLETE))
1165                                 break;
1166
1167                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1168                         prev_state = state = STATE_DATA_BUSY;
1169                         /* fall through */
1170
1171                 case STATE_DATA_BUSY:
1172                         if (!atmci_test_and_clear_pending(host,
1173                                                 EVENT_DATA_COMPLETE))
1174                                 break;
1175
1176                         host->data = NULL;
1177                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1178                         status = host->data_status;
1179                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1180                                 if (status & MCI_DTOE) {
1181                                         dev_dbg(&host->pdev->dev,
1182                                                         "data timeout error\n");
1183                                         data->error = -ETIMEDOUT;
1184                                 } else if (status & MCI_DCRCE) {
1185                                         dev_dbg(&host->pdev->dev,
1186                                                         "data CRC error\n");
1187                                         data->error = -EILSEQ;
1188                                 } else {
1189                                         dev_dbg(&host->pdev->dev,
1190                                                 "data FIFO error (status=%08x)\n",
1191                                                 status);
1192                                         data->error = -EIO;
1193                                 }
1194                         } else {
1195                                 data->bytes_xfered = data->blocks * data->blksz;
1196                                 data->error = 0;
1197                         }
1198
1199                         if (!data->stop) {
1200                                 atmci_request_end(host, host->mrq);
1201                                 goto unlock;
1202                         }
1203
1204                         prev_state = state = STATE_SENDING_STOP;
1205                         if (!data->error)
1206                                 send_stop_cmd(host, data);
1207                         /* fall through */
1208
1209                 case STATE_SENDING_STOP:
1210                         if (!atmci_test_and_clear_pending(host,
1211                                                 EVENT_CMD_COMPLETE))
1212                                 break;
1213
1214                         host->cmd = NULL;
1215                         atmci_command_complete(host, mrq->stop);
1216                         atmci_request_end(host, host->mrq);
1217                         goto unlock;
1218
1219                 case STATE_DATA_ERROR:
1220                         if (!atmci_test_and_clear_pending(host,
1221                                                 EVENT_XFER_COMPLETE))
1222                                 break;
1223
1224                         state = STATE_DATA_BUSY;
1225                         break;
1226                 }
1227         } while (state != prev_state);
1228
1229         host->state = state;
1230
1231 unlock:
1232         spin_unlock(&host->lock);
1233 }
1234
1235 static void atmci_read_data_pio(struct atmel_mci *host)
1236 {
1237         struct scatterlist      *sg = host->sg;
1238         void                    *buf = sg_virt(sg);
1239         unsigned int            offset = host->pio_offset;
1240         struct mmc_data         *data = host->data;
1241         u32                     value;
1242         u32                     status;
1243         unsigned int            nbytes = 0;
1244
1245         do {
1246                 value = mci_readl(host, RDR);
1247                 if (likely(offset + 4 <= sg->length)) {
1248                         put_unaligned(value, (u32 *)(buf + offset));
1249
1250                         offset += 4;
1251                         nbytes += 4;
1252
1253                         if (offset == sg->length) {
1254                                 flush_dcache_page(sg_page(sg));
1255                                 host->sg = sg = sg_next(sg);
1256                                 if (!sg)
1257                                         goto done;
1258
1259                                 offset = 0;
1260                                 buf = sg_virt(sg);
1261                         }
1262                 } else {
1263                         unsigned int remaining = sg->length - offset;
1264                         memcpy(buf + offset, &value, remaining);
1265                         nbytes += remaining;
1266
1267                         flush_dcache_page(sg_page(sg));
1268                         host->sg = sg = sg_next(sg);
1269                         if (!sg)
1270                                 goto done;
1271
1272                         offset = 4 - remaining;
1273                         buf = sg_virt(sg);
1274                         memcpy(buf, (u8 *)&value + remaining, offset);
1275                         nbytes += offset;
1276                 }
1277
1278                 status = mci_readl(host, SR);
1279                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1280                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1281                                                 | ATMCI_DATA_ERROR_FLAGS));
1282                         host->data_status = status;
1283                         data->bytes_xfered += nbytes;
1284                         smp_wmb();
1285                         atmci_set_pending(host, EVENT_DATA_ERROR);
1286                         tasklet_schedule(&host->tasklet);
1287                         return;
1288                 }
1289         } while (status & MCI_RXRDY);
1290
1291         host->pio_offset = offset;
1292         data->bytes_xfered += nbytes;
1293
1294         return;
1295
1296 done:
1297         mci_writel(host, IDR, MCI_RXRDY);
1298         mci_writel(host, IER, MCI_NOTBUSY);
1299         data->bytes_xfered += nbytes;
1300         smp_wmb();
1301         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1302 }
1303
1304 static void atmci_write_data_pio(struct atmel_mci *host)
1305 {
1306         struct scatterlist      *sg = host->sg;
1307         void                    *buf = sg_virt(sg);
1308         unsigned int            offset = host->pio_offset;
1309         struct mmc_data         *data = host->data;
1310         u32                     value;
1311         u32                     status;
1312         unsigned int            nbytes = 0;
1313
1314         do {
1315                 if (likely(offset + 4 <= sg->length)) {
1316                         value = get_unaligned((u32 *)(buf + offset));
1317                         mci_writel(host, TDR, value);
1318
1319                         offset += 4;
1320                         nbytes += 4;
1321                         if (offset == sg->length) {
1322                                 host->sg = sg = sg_next(sg);
1323                                 if (!sg)
1324                                         goto done;
1325
1326                                 offset = 0;
1327                                 buf = sg_virt(sg);
1328                         }
1329                 } else {
1330                         unsigned int remaining = sg->length - offset;
1331
1332                         value = 0;
1333                         memcpy(&value, buf + offset, remaining);
1334                         nbytes += remaining;
1335
1336                         host->sg = sg = sg_next(sg);
1337                         if (!sg) {
1338                                 mci_writel(host, TDR, value);
1339                                 goto done;
1340                         }
1341
1342                         offset = 4 - remaining;
1343                         buf = sg_virt(sg);
1344                         memcpy((u8 *)&value + remaining, buf, offset);
1345                         mci_writel(host, TDR, value);
1346                         nbytes += offset;
1347                 }
1348
1349                 status = mci_readl(host, SR);
1350                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1351                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1352                                                 | ATMCI_DATA_ERROR_FLAGS));
1353                         host->data_status = status;
1354                         data->bytes_xfered += nbytes;
1355                         smp_wmb();
1356                         atmci_set_pending(host, EVENT_DATA_ERROR);
1357                         tasklet_schedule(&host->tasklet);
1358                         return;
1359                 }
1360         } while (status & MCI_TXRDY);
1361
1362         host->pio_offset = offset;
1363         data->bytes_xfered += nbytes;
1364
1365         return;
1366
1367 done:
1368         mci_writel(host, IDR, MCI_TXRDY);
1369         mci_writel(host, IER, MCI_NOTBUSY);
1370         data->bytes_xfered += nbytes;
1371         smp_wmb();
1372         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1373 }
1374
1375 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1376 {
1377         mci_writel(host, IDR, MCI_CMDRDY);
1378
1379         host->cmd_status = status;
1380         smp_wmb();
1381         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1382         tasklet_schedule(&host->tasklet);
1383 }
1384
1385 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1386 {
1387         struct atmel_mci        *host = dev_id;
1388         u32                     status, mask, pending;
1389         unsigned int            pass_count = 0;
1390
1391         do {
1392                 status = mci_readl(host, SR);
1393                 mask = mci_readl(host, IMR);
1394                 pending = status & mask;
1395                 if (!pending)
1396                         break;
1397
1398                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1399                         mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1400                                         | MCI_RXRDY | MCI_TXRDY);
1401                         pending &= mci_readl(host, IMR);
1402
1403                         host->data_status = status;
1404                         smp_wmb();
1405                         atmci_set_pending(host, EVENT_DATA_ERROR);
1406                         tasklet_schedule(&host->tasklet);
1407                 }
1408                 if (pending & MCI_NOTBUSY) {
1409                         mci_writel(host, IDR,
1410                                         ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1411                         if (!host->data_status)
1412                                 host->data_status = status;
1413                         smp_wmb();
1414                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1415                         tasklet_schedule(&host->tasklet);
1416                 }
1417                 if (pending & MCI_RXRDY)
1418                         atmci_read_data_pio(host);
1419                 if (pending & MCI_TXRDY)
1420                         atmci_write_data_pio(host);
1421
1422                 if (pending & MCI_CMDRDY)
1423                         atmci_cmd_interrupt(host, status);
1424         } while (pass_count++ < 5);
1425
1426         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1427 }
1428
1429 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1430 {
1431         struct atmel_mci_slot   *slot = dev_id;
1432
1433         /*
1434          * Disable interrupts until the pin has stabilized and check
1435          * the state then. Use mod_timer() since we may be in the
1436          * middle of the timer routine when this interrupt triggers.
1437          */
1438         disable_irq_nosync(irq);
1439         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1440
1441         return IRQ_HANDLED;
1442 }
1443
1444 static int __init atmci_init_slot(struct atmel_mci *host,
1445                 struct mci_slot_pdata *slot_data, unsigned int id,
1446                 u32 sdc_reg)
1447 {
1448         struct mmc_host                 *mmc;
1449         struct atmel_mci_slot           *slot;
1450
1451         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1452         if (!mmc)
1453                 return -ENOMEM;
1454
1455         slot = mmc_priv(mmc);
1456         slot->mmc = mmc;
1457         slot->host = host;
1458         slot->detect_pin = slot_data->detect_pin;
1459         slot->wp_pin = slot_data->wp_pin;
1460         slot->sdc_reg = sdc_reg;
1461
1462         mmc->ops = &atmci_ops;
1463         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1464         mmc->f_max = host->bus_hz / 2;
1465         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1466         if (slot_data->bus_width >= 4)
1467                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1468
1469         mmc->max_hw_segs = 64;
1470         mmc->max_phys_segs = 64;
1471         mmc->max_req_size = 32768 * 512;
1472         mmc->max_blk_size = 32768;
1473         mmc->max_blk_count = 512;
1474
1475         /* Assume card is present initially */
1476         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1477         if (gpio_is_valid(slot->detect_pin)) {
1478                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1479                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1480                         slot->detect_pin = -EBUSY;
1481                 } else if (gpio_get_value(slot->detect_pin)) {
1482                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1483                 }
1484         }
1485
1486         if (!gpio_is_valid(slot->detect_pin))
1487                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1488
1489         if (gpio_is_valid(slot->wp_pin)) {
1490                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1491                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1492                         slot->wp_pin = -EBUSY;
1493                 }
1494         }
1495
1496         host->slot[id] = slot;
1497         mmc_add_host(mmc);
1498
1499         if (gpio_is_valid(slot->detect_pin)) {
1500                 int ret;
1501
1502                 setup_timer(&slot->detect_timer, atmci_detect_change,
1503                                 (unsigned long)slot);
1504
1505                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1506                                 atmci_detect_interrupt,
1507                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1508                                 "mmc-detect", slot);
1509                 if (ret) {
1510                         dev_dbg(&mmc->class_dev,
1511                                 "could not request IRQ %d for detect pin\n",
1512                                 gpio_to_irq(slot->detect_pin));
1513                         gpio_free(slot->detect_pin);
1514                         slot->detect_pin = -EBUSY;
1515                 }
1516         }
1517
1518         atmci_init_debugfs(slot);
1519
1520         return 0;
1521 }
1522
1523 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1524                 unsigned int id)
1525 {
1526         /* Debugfs stuff is cleaned up by mmc core */
1527
1528         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1529         smp_wmb();
1530
1531         mmc_remove_host(slot->mmc);
1532
1533         if (gpio_is_valid(slot->detect_pin)) {
1534                 int pin = slot->detect_pin;
1535
1536                 free_irq(gpio_to_irq(pin), slot);
1537                 del_timer_sync(&slot->detect_timer);
1538                 gpio_free(pin);
1539         }
1540         if (gpio_is_valid(slot->wp_pin))
1541                 gpio_free(slot->wp_pin);
1542
1543         slot->host->slot[id] = NULL;
1544         mmc_free_host(slot->mmc);
1545 }
1546
1547 #ifdef CONFIG_MMC_ATMELMCI_DMA
1548 static enum dma_state_client filter(struct dma_chan *chan, void *slave)
1549 {
1550         struct dw_dma_slave *dws = slave;
1551
1552         if (dws->dma_dev == chan->device->dev)
1553                 return DMA_ACK;
1554         else
1555                 return DMA_DUP;
1556 }
1557 #endif
1558
1559 static int __init atmci_probe(struct platform_device *pdev)
1560 {
1561         struct mci_platform_data        *pdata;
1562         struct atmel_mci                *host;
1563         struct resource                 *regs;
1564         unsigned int                    nr_slots;
1565         int                             irq;
1566         int                             ret;
1567
1568         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1569         if (!regs)
1570                 return -ENXIO;
1571         pdata = pdev->dev.platform_data;
1572         if (!pdata)
1573                 return -ENXIO;
1574         irq = platform_get_irq(pdev, 0);
1575         if (irq < 0)
1576                 return irq;
1577
1578         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1579         if (!host)
1580                 return -ENOMEM;
1581
1582         host->pdev = pdev;
1583         spin_lock_init(&host->lock);
1584         INIT_LIST_HEAD(&host->queue);
1585
1586         host->mck = clk_get(&pdev->dev, "mci_clk");
1587         if (IS_ERR(host->mck)) {
1588                 ret = PTR_ERR(host->mck);
1589                 goto err_clk_get;
1590         }
1591
1592         ret = -ENOMEM;
1593         host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1594         if (!host->regs)
1595                 goto err_ioremap;
1596
1597         clk_enable(host->mck);
1598         mci_writel(host, CR, MCI_CR_SWRST);
1599         host->bus_hz = clk_get_rate(host->mck);
1600         clk_disable(host->mck);
1601
1602         host->mapbase = regs->start;
1603
1604         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1605
1606         ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, host);
1607         if (ret)
1608                 goto err_request_irq;
1609
1610 #ifdef CONFIG_MMC_ATMELMCI_DMA
1611         if (pdata->dma_slave.dma_dev) {
1612                 struct dw_dma_slave *dws = &pdata->dma_slave;
1613                 dma_cap_mask_t mask;
1614
1615                 dws->tx_reg = regs->start + MCI_TDR;
1616                 dws->rx_reg = regs->start + MCI_RDR;
1617
1618                 /* Try to grab a DMA channel */
1619                 dma_cap_zero(mask);
1620                 dma_cap_set(DMA_SLAVE, mask);
1621                 host->dma.chan = dma_request_channel(mask, filter, dws);
1622         }
1623         if (!host->dma.chan)
1624                 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1625 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1626
1627         platform_set_drvdata(pdev, host);
1628
1629         /* We need at least one slot to succeed */
1630         nr_slots = 0;
1631         ret = -ENODEV;
1632         if (pdata->slot[0].bus_width) {
1633                 ret = atmci_init_slot(host, &pdata->slot[0],
1634                                 MCI_SDCSEL_SLOT_A, 0);
1635                 if (!ret)
1636                         nr_slots++;
1637         }
1638         if (pdata->slot[1].bus_width) {
1639                 ret = atmci_init_slot(host, &pdata->slot[1],
1640                                 MCI_SDCSEL_SLOT_B, 1);
1641                 if (!ret)
1642                         nr_slots++;
1643         }
1644
1645         if (!nr_slots)
1646                 goto err_init_slot;
1647
1648         dev_info(&pdev->dev,
1649                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1650                         host->mapbase, irq, nr_slots);
1651
1652         return 0;
1653
1654 err_init_slot:
1655 #ifdef CONFIG_MMC_ATMELMCI_DMA
1656         if (host->dma.chan)
1657                 dma_release_channel(host->dma.chan);
1658 #endif
1659         free_irq(irq, host);
1660 err_request_irq:
1661         iounmap(host->regs);
1662 err_ioremap:
1663         clk_put(host->mck);
1664 err_clk_get:
1665         kfree(host);
1666         return ret;
1667 }
1668
1669 static int __exit atmci_remove(struct platform_device *pdev)
1670 {
1671         struct atmel_mci        *host = platform_get_drvdata(pdev);
1672         unsigned int            i;
1673
1674         platform_set_drvdata(pdev, NULL);
1675
1676         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1677                 if (host->slot[i])
1678                         atmci_cleanup_slot(host->slot[i], i);
1679         }
1680
1681         clk_enable(host->mck);
1682         mci_writel(host, IDR, ~0UL);
1683         mci_writel(host, CR, MCI_CR_MCIDIS);
1684         mci_readl(host, SR);
1685         clk_disable(host->mck);
1686
1687 #ifdef CONFIG_MMC_ATMELMCI_DMA
1688         if (host->dma.chan)
1689                 dma_release_channel(host->dma.chan);
1690 #endif
1691
1692         free_irq(platform_get_irq(pdev, 0), host);
1693         iounmap(host->regs);
1694
1695         clk_put(host->mck);
1696         kfree(host);
1697
1698         return 0;
1699 }
1700
1701 static struct platform_driver atmci_driver = {
1702         .remove         = __exit_p(atmci_remove),
1703         .driver         = {
1704                 .name           = "atmel_mci",
1705         },
1706 };
1707
1708 static int __init atmci_init(void)
1709 {
1710         return platform_driver_probe(&atmci_driver, atmci_probe);
1711 }
1712
1713 static void __exit atmci_exit(void)
1714 {
1715         platform_driver_unregister(&atmci_driver);
1716 }
1717
1718 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1719 module_exit(atmci_exit);
1720
1721 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1722 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1723 MODULE_LICENSE("GPL v2");