75c37213670243bfade9a595497f6902705eba45
[linux-2.6.git] / drivers / infiniband / hw / ipath / ipath_init_chip.c
1 /*
2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33
34 #include <linux/pci.h>
35 #include <linux/netdevice.h>
36 #include <linux/vmalloc.h>
37
38 #include "ipath_kernel.h"
39 #include "ipath_common.h"
40
41 /*
42  * min buffers we want to have per port, after driver
43  */
44 #define IPATH_MIN_USER_PORT_BUFCNT 8
45
46 /*
47  * Number of ports we are configured to use (to allow for more pio
48  * buffers per port, etc.)  Zero means use chip value.
49  */
50 static ushort ipath_cfgports;
51
52 module_param_named(cfgports, ipath_cfgports, ushort, S_IRUGO);
53 MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
54
55 /*
56  * Number of buffers reserved for driver (layered drivers and SMA
57  * send).  Reserved at end of buffer list.   Initialized based on
58  * number of PIO buffers if not set via module interface.
59  * The problem with this is that it's global, but we'll use different
60  * numbers for different chip types.  So the default value is not
61  * very useful.  I've redefined it for the 1.3 release so that it's
62  * zero unless set by the user to something else, in which case we
63  * try to respect it.
64  */
65 static ushort ipath_kpiobufs;
66
67 static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
68
69 module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
70                   &ipath_kpiobufs, S_IWUSR | S_IRUGO);
71 MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
72
73 /**
74  * create_port0_egr - allocate the eager TID buffers
75  * @dd: the infinipath device
76  *
77  * This code is now quite different for user and kernel, because
78  * the kernel uses skb's, for the accelerated network performance.
79  * This is the kernel (port0) version.
80  *
81  * Allocate the eager TID buffers and program them into infinipath.
82  * We use the network layer alloc_skb() allocator to allocate the
83  * memory, and either use the buffers as is for things like SMA
84  * packets, or pass the buffers up to the ipath layered driver and
85  * thence the network layer, replacing them as we do so (see
86  * ipath_rcv_layer()).
87  */
88 static int create_port0_egr(struct ipath_devdata *dd)
89 {
90         unsigned e, egrcnt;
91         struct sk_buff **skbs;
92         int ret;
93
94         egrcnt = dd->ipath_rcvegrcnt;
95
96         skbs = vmalloc(sizeof(*dd->ipath_port0_skbs) * egrcnt);
97         if (skbs == NULL) {
98                 ipath_dev_err(dd, "allocation error for eager TID "
99                               "skb array\n");
100                 ret = -ENOMEM;
101                 goto bail;
102         }
103         for (e = 0; e < egrcnt; e++) {
104                 /*
105                  * This is a bit tricky in that we allocate extra
106                  * space for 2 bytes of the 14 byte ethernet header.
107                  * These two bytes are passed in the ipath header so
108                  * the rest of the data is word aligned.  We allocate
109                  * 4 bytes so that the data buffer stays word aligned.
110                  * See ipath_kreceive() for more details.
111                  */
112                 skbs[e] = ipath_alloc_skb(dd, GFP_KERNEL);
113                 if (!skbs[e]) {
114                         ipath_dev_err(dd, "SKB allocation error for "
115                                       "eager TID %u\n", e);
116                         while (e != 0)
117                                 dev_kfree_skb(skbs[--e]);
118                         vfree(skbs);
119                         ret = -ENOMEM;
120                         goto bail;
121                 }
122         }
123         /*
124          * After loop above, so we can test non-NULL to see if ready
125          * to use at receive, etc.
126          */
127         dd->ipath_port0_skbs = skbs;
128
129         for (e = 0; e < egrcnt; e++) {
130                 unsigned long phys =
131                         virt_to_phys(dd->ipath_port0_skbs[e]->data);
132                 dd->ipath_f_put_tid(dd, e + (u64 __iomem *)
133                                     ((char __iomem *) dd->ipath_kregbase +
134                                      dd->ipath_rcvegrbase), 0, phys);
135         }
136
137         ret = 0;
138
139 bail:
140         return ret;
141 }
142
143 static int bringup_link(struct ipath_devdata *dd)
144 {
145         u64 val, ibc;
146         int ret = 0;
147
148         /* hold IBC in reset */
149         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
150         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
151                          dd->ipath_control);
152
153         /*
154          * Note that prior to try 14 or 15 of IB, the credit scaling
155          * wasn't working, because it was swapped for writes with the
156          * 1 bit default linkstate field
157          */
158
159         /* ignore pbc and align word */
160         val = dd->ipath_piosize2k - 2 * sizeof(u32);
161         /*
162          * for ICRC, which we only send in diag test pkt mode, and we
163          * don't need to worry about that for mtu
164          */
165         val += 1;
166         /*
167          * Set the IBC maxpktlength to the size of our pio buffers the
168          * maxpktlength is in words.  This is *not* the IB data MTU.
169          */
170         ibc = (val / sizeof(u32)) << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
171         /* in KB */
172         ibc |= 0x5ULL << INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT;
173         /*
174          * How often flowctrl sent.  More or less in usecs; balance against
175          * watermark value, so that in theory senders always get a flow
176          * control update in time to not let the IB link go idle.
177          */
178         ibc |= 0x3ULL << INFINIPATH_IBCC_FLOWCTRLPERIOD_SHIFT;
179         /* max error tolerance */
180         ibc |= 0xfULL << INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT;
181         /* use "real" buffer space for */
182         ibc |= 4ULL << INFINIPATH_IBCC_CREDITSCALE_SHIFT;
183         /* IB credit flow control. */
184         ibc |= 0xfULL << INFINIPATH_IBCC_OVERRUNTHRESHOLD_SHIFT;
185         /* initially come up waiting for TS1, without sending anything. */
186         dd->ipath_ibcctrl = ibc;
187         /*
188          * Want to start out with both LINKCMD and LINKINITCMD in NOP
189          * (0 and 0).  Don't put linkinitcmd in ipath_ibcctrl, want that
190          * to stay a NOP
191          */
192         ibc |= INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
193                 INFINIPATH_IBCC_LINKINITCMD_SHIFT;
194         ipath_cdbg(VERBOSE, "Writing 0x%llx to ibcctrl\n",
195                    (unsigned long long) ibc);
196         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc);
197
198         // be sure chip saw it
199         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
200
201         ret = dd->ipath_f_bringup_serdes(dd);
202
203         if (ret)
204                 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, "
205                          "not usable\n");
206         else {
207                 /* enable IBC */
208                 dd->ipath_control |= INFINIPATH_C_LINKENABLE;
209                 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
210                                  dd->ipath_control);
211         }
212
213         return ret;
214 }
215
216 static int init_chip_first(struct ipath_devdata *dd,
217                            struct ipath_portdata **pdp)
218 {
219         struct ipath_portdata *pd = NULL;
220         int ret = 0;
221         u64 val;
222
223         /*
224          * skip cfgports stuff because we are not allocating memory,
225          * and we don't want problems if the portcnt changed due to
226          * cfgports.  We do still check and report a difference, if
227          * not same (should be impossible).
228          */
229         dd->ipath_portcnt =
230                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
231         if (!ipath_cfgports)
232                 dd->ipath_cfgports = dd->ipath_portcnt;
233         else if (ipath_cfgports <= dd->ipath_portcnt) {
234                 dd->ipath_cfgports = ipath_cfgports;
235                 ipath_dbg("Configured to use %u ports out of %u in chip\n",
236                           dd->ipath_cfgports, dd->ipath_portcnt);
237         } else {
238                 dd->ipath_cfgports = dd->ipath_portcnt;
239                 ipath_dbg("Tried to configured to use %u ports; chip "
240                           "only supports %u\n", ipath_cfgports,
241                           dd->ipath_portcnt);
242         }
243         /*
244          * Allocate full portcnt array, rather than just cfgports, because
245          * cleanup iterates across all possible ports.
246          */
247         dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt,
248                                GFP_KERNEL);
249
250         if (!dd->ipath_pd) {
251                 ipath_dev_err(dd, "Unable to allocate portdata array, "
252                               "failing\n");
253                 ret = -ENOMEM;
254                 goto done;
255         }
256
257         dd->ipath_lastegrheads = kzalloc(sizeof(*dd->ipath_lastegrheads)
258                                          * dd->ipath_cfgports,
259                                          GFP_KERNEL);
260         dd->ipath_lastrcvhdrqtails =
261                 kzalloc(sizeof(*dd->ipath_lastrcvhdrqtails)
262                         * dd->ipath_cfgports, GFP_KERNEL);
263
264         if (!dd->ipath_lastegrheads || !dd->ipath_lastrcvhdrqtails) {
265                 ipath_dev_err(dd, "Unable to allocate head arrays, "
266                               "failing\n");
267                 ret = -ENOMEM;
268                 goto done;
269         }
270
271         dd->ipath_pd[0] = kzalloc(sizeof(*pd), GFP_KERNEL);
272
273         if (!dd->ipath_pd[0]) {
274                 ipath_dev_err(dd, "Unable to allocate portdata for port "
275                               "0, failing\n");
276                 ret = -ENOMEM;
277                 goto done;
278         }
279         pd = dd->ipath_pd[0];
280         pd->port_dd = dd;
281         pd->port_port = 0;
282         pd->port_cnt = 1;
283         /* The port 0 pkey table is used by the layer interface. */
284         pd->port_pkeys[0] = IPATH_DEFAULT_P_KEY;
285         dd->ipath_rcvtidcnt =
286                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
287         dd->ipath_rcvtidbase =
288                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
289         dd->ipath_rcvegrcnt =
290                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
291         dd->ipath_rcvegrbase =
292                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
293         dd->ipath_palign =
294                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
295         dd->ipath_piobufbase =
296                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase);
297         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize);
298         dd->ipath_piosize2k = val & ~0U;
299         dd->ipath_piosize4k = val >> 32;
300         dd->ipath_ibmtu = 4096; /* default to largest legal MTU */
301         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt);
302         dd->ipath_piobcnt2k = val & ~0U;
303         dd->ipath_piobcnt4k = val >> 32;
304         dd->ipath_pio2kbase =
305                 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) +
306                                  (dd->ipath_piobufbase & 0xffffffff));
307         if (dd->ipath_piobcnt4k) {
308                 dd->ipath_pio4kbase = (u32 __iomem *)
309                         (((char __iomem *) dd->ipath_kregbase) +
310                          (dd->ipath_piobufbase >> 32));
311                 /*
312                  * 4K buffers take 2 pages; we use roundup just to be
313                  * paranoid; we calculate it once here, rather than on
314                  * ever buf allocate
315                  */
316                 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k,
317                                           dd->ipath_palign);
318                 ipath_dbg("%u 2k(%x) piobufs @ %p, %u 4k(%x) @ %p "
319                           "(%x aligned)\n",
320                           dd->ipath_piobcnt2k, dd->ipath_piosize2k,
321                           dd->ipath_pio2kbase, dd->ipath_piobcnt4k,
322                           dd->ipath_piosize4k, dd->ipath_pio4kbase,
323                           dd->ipath_4kalign);
324         }
325         else ipath_dbg("%u 2k piobufs @ %p\n",
326                        dd->ipath_piobcnt2k, dd->ipath_pio2kbase);
327
328         spin_lock_init(&dd->ipath_tid_lock);
329
330 done:
331         *pdp = pd;
332         return ret;
333 }
334
335 /**
336  * init_chip_reset - re-initialize after a reset, or enable
337  * @dd: the infinipath device
338  * @pdp: output for port data
339  *
340  * sanity check at least some of the values after reset, and
341  * ensure no receive or transmit (explictly, in case reset
342  * failed
343  */
344 static int init_chip_reset(struct ipath_devdata *dd,
345                            struct ipath_portdata **pdp)
346 {
347         struct ipath_portdata *pd;
348         u32 rtmp;
349
350         *pdp = pd = dd->ipath_pd[0];
351         /* ensure chip does no sends or receives while we re-initialize */
352         dd->ipath_control = dd->ipath_sendctrl = dd->ipath_rcvctrl = 0U;
353         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, 0);
354         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0);
355         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0);
356
357         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
358         if (dd->ipath_portcnt != rtmp)
359                 dev_info(&dd->pcidev->dev, "portcnt was %u before "
360                          "reset, now %u, using original\n",
361                          dd->ipath_portcnt, rtmp);
362         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
363         if (rtmp != dd->ipath_rcvtidcnt)
364                 dev_info(&dd->pcidev->dev, "tidcnt was %u before "
365                          "reset, now %u, using original\n",
366                          dd->ipath_rcvtidcnt, rtmp);
367         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
368         if (rtmp != dd->ipath_rcvtidbase)
369                 dev_info(&dd->pcidev->dev, "tidbase was %u before "
370                          "reset, now %u, using original\n",
371                          dd->ipath_rcvtidbase, rtmp);
372         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
373         if (rtmp != dd->ipath_rcvegrcnt)
374                 dev_info(&dd->pcidev->dev, "egrcnt was %u before "
375                          "reset, now %u, using original\n",
376                          dd->ipath_rcvegrcnt, rtmp);
377         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
378         if (rtmp != dd->ipath_rcvegrbase)
379                 dev_info(&dd->pcidev->dev, "egrbase was %u before "
380                          "reset, now %u, using original\n",
381                          dd->ipath_rcvegrbase, rtmp);
382
383         return 0;
384 }
385
386 static int init_pioavailregs(struct ipath_devdata *dd)
387 {
388         int ret;
389
390         dd->ipath_pioavailregs_dma = dma_alloc_coherent(
391                 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys,
392                 GFP_KERNEL);
393         if (!dd->ipath_pioavailregs_dma) {
394                 ipath_dev_err(dd, "failed to allocate PIOavail reg area "
395                               "in memory\n");
396                 ret = -ENOMEM;
397                 goto done;
398         }
399
400         /*
401          * we really want L2 cache aligned, but for current CPUs of
402          * interest, they are the same.
403          */
404         dd->ipath_statusp = (u64 *)
405                 ((char *)dd->ipath_pioavailregs_dma +
406                  ((2 * L1_CACHE_BYTES +
407                    dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
408         /* copy the current value now that it's really allocated */
409         *dd->ipath_statusp = dd->_ipath_status;
410         /*
411          * setup buffer to hold freeze msg, accessible to apps,
412          * following statusp
413          */
414         dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1];
415         /* and its length */
416         dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]);
417
418         ret = 0;
419
420 done:
421         return ret;
422 }
423
424 /**
425  * init_shadow_tids - allocate the shadow TID array
426  * @dd: the infinipath device
427  *
428  * allocate the shadow TID array, so we can ipath_munlock previous
429  * entries.  It may make more sense to move the pageshadow to the
430  * port data structure, so we only allocate memory for ports actually
431  * in use, since we at 8k per port, now.
432  */
433 static void init_shadow_tids(struct ipath_devdata *dd)
434 {
435         dd->ipath_pageshadow = (struct page **)
436                 vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
437                         sizeof(struct page *));
438         if (!dd->ipath_pageshadow)
439                 ipath_dev_err(dd, "failed to allocate shadow page * "
440                               "array, no expected sends!\n");
441         else
442                 memset(dd->ipath_pageshadow, 0,
443                        dd->ipath_cfgports * dd->ipath_rcvtidcnt *
444                        sizeof(struct page *));
445 }
446
447 static void enable_chip(struct ipath_devdata *dd,
448                         struct ipath_portdata *pd, int reinit)
449 {
450         u32 val;
451         int i;
452
453         if (!reinit) {
454                 init_waitqueue_head(&ipath_sma_state_wait);
455         }
456         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
457                          dd->ipath_rcvctrl);
458
459         /* Enable PIO send, and update of PIOavail regs to memory. */
460         dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE |
461                 INFINIPATH_S_PIOBUFAVAILUPD;
462         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
463                          dd->ipath_sendctrl);
464
465         /*
466          * enable port 0 receive, and receive interrupt.  other ports
467          * done as user opens and inits them.
468          */
469         dd->ipath_rcvctrl = INFINIPATH_R_TAILUPD |
470                 (1ULL << INFINIPATH_R_PORTENABLE_SHIFT) |
471                 (1ULL << INFINIPATH_R_INTRAVAIL_SHIFT);
472         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
473                          dd->ipath_rcvctrl);
474
475         /*
476          * now ready for use.  this should be cleared whenever we
477          * detect a reset, or initiate one.
478          */
479         dd->ipath_flags |= IPATH_INITTED;
480
481         /*
482          * init our shadow copies of head from tail values, and write
483          * head values to match.
484          */
485         val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
486         (void)ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
487         dd->ipath_port0head = ipath_read_ureg32(dd, ur_rcvhdrtail, 0);
488
489         /* Initialize so we interrupt on next packet received */
490         (void)ipath_write_ureg(dd, ur_rcvhdrhead,
491                                dd->ipath_rhdrhead_intr_off |
492                                dd->ipath_port0head, 0);
493
494         /*
495          * by now pioavail updates to memory should have occurred, so
496          * copy them into our working/shadow registers; this is in
497          * case something went wrong with abort, but mostly to get the
498          * initial values of the generation bit correct.
499          */
500         for (i = 0; i < dd->ipath_pioavregs; i++) {
501                 __le64 val;
502
503                 /*
504                  * Chip Errata bug 6641; even and odd qwords>3 are swapped.
505                  */
506                 if (i > 3) {
507                         if (i & 1)
508                                 val = dd->ipath_pioavailregs_dma[i - 1];
509                         else
510                                 val = dd->ipath_pioavailregs_dma[i + 1];
511                 }
512                 else
513                         val = dd->ipath_pioavailregs_dma[i];
514                 dd->ipath_pioavailshadow[i] = le64_to_cpu(val);
515         }
516         /* can get counters, stats, etc. */
517         dd->ipath_flags |= IPATH_PRESENT;
518 }
519
520 static int init_housekeeping(struct ipath_devdata *dd,
521                              struct ipath_portdata **pdp, int reinit)
522 {
523         char boardn[32];
524         int ret = 0;
525
526         /*
527          * have to clear shadow copies of registers at init that are
528          * not otherwise set here, or all kinds of bizarre things
529          * happen with driver on chip reset
530          */
531         dd->ipath_rcvhdrsize = 0;
532
533         /*
534          * Don't clear ipath_flags as 8bit mode was set before
535          * entering this func. However, we do set the linkstate to
536          * unknown, so we can watch for a transition.
537          * PRESENT is set because we want register reads to work,
538          * and the kernel infrastructure saw it in config space;
539          * We clear it if we have failures.
540          */
541         dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
542         dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
543                              IPATH_LINKDOWN | IPATH_LINKINIT);
544
545         ipath_cdbg(VERBOSE, "Try to read spc chip revision\n");
546         dd->ipath_revision =
547                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
548
549         /*
550          * set up fundamental info we need to use the chip; we assume
551          * if the revision reg and these regs are OK, we don't need to
552          * special case the rest
553          */
554         dd->ipath_sregbase =
555                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase);
556         dd->ipath_cregbase =
557                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase);
558         dd->ipath_uregbase =
559                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase);
560         ipath_cdbg(VERBOSE, "ipath_kregbase %p, sendbase %x usrbase %x, "
561                    "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase,
562                    dd->ipath_uregbase, dd->ipath_cregbase);
563         if ((dd->ipath_revision & 0xffffffff) == 0xffffffff
564             || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff
565             || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff
566             || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
567                 ipath_dev_err(dd, "Register read failures from chip, "
568                               "giving up initialization\n");
569                 dd->ipath_flags &= ~IPATH_PRESENT;
570                 ret = -ENODEV;
571                 goto done;
572         }
573
574         /* clear the initial reset flag, in case first driver load */
575         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
576                          INFINIPATH_E_RESET);
577
578         if (reinit)
579                 ret = init_chip_reset(dd, pdp);
580         else
581                 ret = init_chip_first(dd, pdp);
582
583         if (ret)
584                 goto done;
585
586         ipath_cdbg(VERBOSE, "Revision %llx (PCI %x), %u ports, %u tids, "
587                    "%u egrtids\n", (unsigned long long) dd->ipath_revision,
588                    dd->ipath_pcirev, dd->ipath_portcnt, dd->ipath_rcvtidcnt,
589                    dd->ipath_rcvegrcnt);
590
591         if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) &
592              INFINIPATH_R_SOFTWARE_MASK) != IPATH_CHIP_SWVERSION) {
593                 ipath_dev_err(dd, "Driver only handles version %d, "
594                               "chip swversion is %d (%llx), failng\n",
595                               IPATH_CHIP_SWVERSION,
596                               (int)(dd->ipath_revision >>
597                                     INFINIPATH_R_SOFTWARE_SHIFT) &
598                               INFINIPATH_R_SOFTWARE_MASK,
599                               (unsigned long long) dd->ipath_revision);
600                 ret = -ENOSYS;
601                 goto done;
602         }
603         dd->ipath_majrev = (u8) ((dd->ipath_revision >>
604                                   INFINIPATH_R_CHIPREVMAJOR_SHIFT) &
605                                  INFINIPATH_R_CHIPREVMAJOR_MASK);
606         dd->ipath_minrev = (u8) ((dd->ipath_revision >>
607                                   INFINIPATH_R_CHIPREVMINOR_SHIFT) &
608                                  INFINIPATH_R_CHIPREVMINOR_MASK);
609         dd->ipath_boardrev = (u8) ((dd->ipath_revision >>
610                                     INFINIPATH_R_BOARDID_SHIFT) &
611                                    INFINIPATH_R_BOARDID_MASK);
612
613         ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn);
614
615         snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion),
616                  "Driver %u.%u, %s, InfiniPath%u %u.%u, PCI %u, "
617                  "SW Compat %u\n",
618                  IPATH_CHIP_VERS_MAJ, IPATH_CHIP_VERS_MIN, boardn,
619                  (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) &
620                  INFINIPATH_R_ARCH_MASK,
621                  dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev,
622                  (unsigned)(dd->ipath_revision >>
623                             INFINIPATH_R_SOFTWARE_SHIFT) &
624                  INFINIPATH_R_SOFTWARE_MASK);
625
626         ipath_dbg("%s", dd->ipath_boardversion);
627
628 done:
629         return ret;
630 }
631
632
633 /**
634  * ipath_init_chip - do the actual initialization sequence on the chip
635  * @dd: the infinipath device
636  * @reinit: reinitializing, so don't allocate new memory
637  *
638  * Do the actual initialization sequence on the chip.  This is done
639  * both from the init routine called from the PCI infrastructure, and
640  * when we reset the chip, or detect that it was reset internally,
641  * or it's administratively re-enabled.
642  *
643  * Memory allocation here and in called routines is only done in
644  * the first case (reinit == 0).  We have to be careful, because even
645  * without memory allocation, we need to re-write all the chip registers
646  * TIDs, etc. after the reset or enable has completed.
647  */
648 int ipath_init_chip(struct ipath_devdata *dd, int reinit)
649 {
650         int ret = 0, i;
651         u32 val32, kpiobufs;
652         u64 val;
653         struct ipath_portdata *pd = NULL; /* keep gcc4 happy */
654         gfp_t gfp_flags = GFP_USER | __GFP_COMP;
655
656         ret = init_housekeeping(dd, &pd, reinit);
657         if (ret)
658                 goto done;
659
660         /*
661          * we ignore most issues after reporting them, but have to specially
662          * handle hardware-disabled chips.
663          */
664         if (ret == 2) {
665                 /* unique error, known to ipath_init_one */
666                 ret = -EPERM;
667                 goto done;
668         }
669
670         /*
671          * We could bump this to allow for full rcvegrcnt + rcvtidcnt,
672          * but then it no longer nicely fits power of two, and since
673          * we now use routines that backend onto __get_free_pages, the
674          * rest would be wasted.
675          */
676         dd->ipath_rcvhdrcnt = dd->ipath_rcvegrcnt;
677         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt,
678                          dd->ipath_rcvhdrcnt);
679
680         /*
681          * Set up the shadow copies of the piobufavail registers,
682          * which we compare against the chip registers for now, and
683          * the in memory DMA'ed copies of the registers.  This has to
684          * be done early, before we calculate lastport, etc.
685          */
686         val = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
687         /*
688          * calc number of pioavail registers, and save it; we have 2
689          * bits per buffer.
690          */
691         dd->ipath_pioavregs = ALIGN(val, sizeof(u64) * BITS_PER_BYTE / 2)
692                 / (sizeof(u64) * BITS_PER_BYTE / 2);
693         if (ipath_kpiobufs == 0) {
694                 /* not set by user (this is default) */
695                 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) > 128)
696                         kpiobufs = 32;
697                 else
698                         kpiobufs = 16;
699         }
700         else
701                 kpiobufs = ipath_kpiobufs;
702
703         if (kpiobufs >
704             (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
705              (dd->ipath_cfgports * IPATH_MIN_USER_PORT_BUFCNT))) {
706                 i = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
707                         (dd->ipath_cfgports * IPATH_MIN_USER_PORT_BUFCNT);
708                 if (i < 0)
709                         i = 0;
710                 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs for "
711                          "kernel leaves too few for %d user ports "
712                          "(%d each); using %u\n", kpiobufs,
713                          dd->ipath_cfgports - 1,
714                          IPATH_MIN_USER_PORT_BUFCNT, i);
715                 /*
716                  * shouldn't change ipath_kpiobufs, because could be
717                  * different for different devices...
718                  */
719                 kpiobufs = i;
720         }
721         dd->ipath_lastport_piobuf =
722                 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - kpiobufs;
723         dd->ipath_pbufsport = dd->ipath_cfgports > 1
724                 ? dd->ipath_lastport_piobuf / (dd->ipath_cfgports - 1)
725                 : 0;
726         val32 = dd->ipath_lastport_piobuf -
727                 (dd->ipath_pbufsport * (dd->ipath_cfgports - 1));
728         if (val32 > 0) {
729                 ipath_dbg("allocating %u pbufs/port leaves %u unused, "
730                           "add to kernel\n", dd->ipath_pbufsport, val32);
731                 dd->ipath_lastport_piobuf -= val32;
732                 ipath_dbg("%u pbufs/port leaves %u unused, add to kernel\n",
733                           dd->ipath_pbufsport, val32);
734         }
735         dd->ipath_lastpioindex = dd->ipath_lastport_piobuf;
736         ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
737                    "each for %u user ports\n", kpiobufs,
738                    dd->ipath_piobcnt2k + dd->ipath_piobcnt4k,
739                    dd->ipath_pbufsport, dd->ipath_cfgports - 1);
740
741         dd->ipath_f_early_init(dd);
742
743         /* early_init sets rcvhdrentsize and rcvhdrsize, so this must be
744          * done after early_init */
745         dd->ipath_hdrqlast =
746                 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1);
747         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize,
748                          dd->ipath_rcvhdrentsize);
749         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
750                          dd->ipath_rcvhdrsize);
751
752         if (!reinit) {
753                 ret = init_pioavailregs(dd);
754                 init_shadow_tids(dd);
755                 if (ret)
756                         goto done;
757         }
758
759         (void)ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
760                                dd->ipath_pioavailregs_phys);
761         /*
762          * this is to detect s/w errors, which the h/w works around by
763          * ignoring the low 6 bits of address, if it wasn't aligned.
764          */
765         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr);
766         if (val != dd->ipath_pioavailregs_phys) {
767                 ipath_dev_err(dd, "Catastrophic software error, "
768                               "SendPIOAvailAddr written as %lx, "
769                               "read back as %llx\n",
770                               (unsigned long) dd->ipath_pioavailregs_phys,
771                               (unsigned long long) val);
772                 ret = -EINVAL;
773                 goto done;
774         }
775
776         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP);
777
778         /*
779          * make sure we are not in freeze, and PIO send enabled, so
780          * writes to pbc happen
781          */
782         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL);
783         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
784                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
785         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
786         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
787                          INFINIPATH_S_PIOENABLE);
788
789         /*
790          * before error clears, since we expect serdes pll errors during
791          * this, the first time after reset
792          */
793         if (bringup_link(dd)) {
794                 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n");
795                 ret = -ENETDOWN;
796                 goto done;
797         }
798
799         /*
800          * clear any "expected" hwerrs from reset and/or initialization
801          * clear any that aren't enabled (at least this once), and then
802          * set the enable mask
803          */
804         dd->ipath_f_init_hwerrors(dd);
805         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
806                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
807         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
808                          dd->ipath_hwerrmask);
809
810         dd->ipath_maskederrs = dd->ipath_ignorederrs;
811         /* clear all */
812         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
813         /* enable errors that are masked, at least this first time. */
814         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
815                          ~dd->ipath_maskederrs);
816         /* clear any interrups up to this point (ints still not enabled) */
817         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
818
819         /*
820          * Set up the port 0 (kernel) rcvhdr q and egr TIDs.  If doing
821          * re-init, the simplest way to handle this is to free
822          * existing, and re-allocate.
823          */
824         if (reinit) {
825                 struct ipath_portdata *pd = dd->ipath_pd[0];
826                 dd->ipath_pd[0] = NULL;
827                 ipath_free_pddata(dd, pd);
828         }
829         dd->ipath_f_tidtemplate(dd);
830         ret = ipath_create_rcvhdrq(dd, pd);
831         if (!ret) {
832                 dd->ipath_hdrqtailptr =
833                         (volatile __le64 *)pd->port_rcvhdrtail_kvaddr;
834                 ret = create_port0_egr(dd);
835         }
836         if (ret)
837                 ipath_dev_err(dd, "failed to allocate port 0 (kernel) "
838                               "rcvhdrq and/or egr bufs\n");
839         else
840                 enable_chip(dd, pd, reinit);
841
842
843         if (!ret && !reinit) {
844             /* used when we close a port, for DMA already in flight at close */
845                 dd->ipath_dummy_hdrq = dma_alloc_coherent(
846                         &dd->pcidev->dev, pd->port_rcvhdrq_size,
847                         &dd->ipath_dummy_hdrq_phys,
848                         gfp_flags);
849                 if (!dd->ipath_dummy_hdrq ) {
850                         dev_info(&dd->pcidev->dev,
851                                 "Couldn't allocate 0x%lx bytes for dummy hdrq\n",
852                                 pd->port_rcvhdrq_size);
853                         /* fallback to just 0'ing */
854                         dd->ipath_dummy_hdrq_phys = 0UL;
855                 }
856         }
857
858         /*
859          * cause retrigger of pending interrupts ignored during init,
860          * even if we had errors
861          */
862         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
863
864         if(!dd->ipath_stats_timer_active) {
865                 /*
866                  * first init, or after an admin disable/enable
867                  * set up stats retrieval timer, even if we had errors
868                  * in last portion of setup
869                  */
870                 init_timer(&dd->ipath_stats_timer);
871                 dd->ipath_stats_timer.function = ipath_get_faststats;
872                 dd->ipath_stats_timer.data = (unsigned long) dd;
873                 /* every 5 seconds; */
874                 dd->ipath_stats_timer.expires = jiffies + 5 * HZ;
875                 /* takes ~16 seconds to overflow at full IB 4x bandwdith */
876                 add_timer(&dd->ipath_stats_timer);
877                 dd->ipath_stats_timer_active = 1;
878         }
879
880 done:
881         if (!ret) {
882                 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT;
883                 if (!dd->ipath_f_intrsetup(dd)) {
884                         /* now we can enable all interrupts from the chip */
885                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
886                                          -1LL);
887                         /* force re-interrupt of any pending interrupts. */
888                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear,
889                                          0ULL);
890                         /* chip is usable; mark it as initialized */
891                         *dd->ipath_statusp |= IPATH_STATUS_INITTED;
892                 } else
893                         ipath_dev_err(dd, "No interrupts enabled, couldn't "
894                                       "setup interrupt address\n");
895
896                 if (dd->ipath_cfgports > ipath_stats.sps_nports)
897                         /*
898                          * sps_nports is a global, so, we set it to
899                          * the highest number of ports of any of the
900                          * chips we find; we never decrement it, at
901                          * least for now.  Since this might have changed
902                          * over disable/enable or prior to reset, always
903                          * do the check and potentially adjust.
904                          */
905                         ipath_stats.sps_nports = dd->ipath_cfgports;
906         } else
907                 ipath_dbg("Failed (%d) to initialize chip\n", ret);
908
909         /* if ret is non-zero, we probably should do some cleanup
910            here... */
911         return ret;
912 }
913
914 static int ipath_set_kpiobufs(const char *str, struct kernel_param *kp)
915 {
916         struct ipath_devdata *dd;
917         unsigned long flags;
918         unsigned short val;
919         int ret;
920
921         ret = ipath_parse_ushort(str, &val);
922
923         spin_lock_irqsave(&ipath_devs_lock, flags);
924
925         if (ret < 0)
926                 goto bail;
927
928         if (val == 0) {
929                 ret = -EINVAL;
930                 goto bail;
931         }
932
933         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
934                 if (dd->ipath_kregbase)
935                         continue;
936                 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
937                            (dd->ipath_cfgports *
938                             IPATH_MIN_USER_PORT_BUFCNT)))
939                 {
940                         ipath_dev_err(
941                                 dd,
942                                 "Allocating %d PIO bufs for kernel leaves "
943                                 "too few for %d user ports (%d each)\n",
944                                 val, dd->ipath_cfgports - 1,
945                                 IPATH_MIN_USER_PORT_BUFCNT);
946                         ret = -EINVAL;
947                         goto bail;
948                 }
949                 dd->ipath_lastport_piobuf =
950                         dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val;
951         }
952
953         ipath_kpiobufs = val;
954         ret = 0;
955 bail:
956         spin_unlock_irqrestore(&ipath_devs_lock, flags);
957
958         return ret;
959 }