f4e8a0cf06e21a097d40f2f76d9681dfb9fb08e7
[linux-2.6.git] / drivers / ide / ide-iops.c
1 /*
2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
3  *
4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
6  *
7  */
8
9 #include <linux/module.h>
10 #include <linux/types.h>
11 #include <linux/string.h>
12 #include <linux/kernel.h>
13 #include <linux/timer.h>
14 #include <linux/mm.h>
15 #include <linux/interrupt.h>
16 #include <linux/major.h>
17 #include <linux/errno.h>
18 #include <linux/genhd.h>
19 #include <linux/blkpg.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/delay.h>
23 #include <linux/hdreg.h>
24 #include <linux/ide.h>
25 #include <linux/bitops.h>
26 #include <linux/nmi.h>
27
28 #include <asm/byteorder.h>
29 #include <asm/irq.h>
30 #include <asm/uaccess.h>
31 #include <asm/io.h>
32
33 /*
34  *      Conventional PIO operations for ATA devices
35  */
36
37 static u8 ide_inb (unsigned long port)
38 {
39         return (u8) inb(port);
40 }
41
42 static u16 ide_inw (unsigned long port)
43 {
44         return (u16) inw(port);
45 }
46
47 static void ide_insw (unsigned long port, void *addr, u32 count)
48 {
49         insw(port, addr, count);
50 }
51
52 static void ide_insl (unsigned long port, void *addr, u32 count)
53 {
54         insl(port, addr, count);
55 }
56
57 static void ide_outb (u8 val, unsigned long port)
58 {
59         outb(val, port);
60 }
61
62 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
63 {
64         outb(addr, port);
65 }
66
67 static void ide_outw (u16 val, unsigned long port)
68 {
69         outw(val, port);
70 }
71
72 static void ide_outsw (unsigned long port, void *addr, u32 count)
73 {
74         outsw(port, addr, count);
75 }
76
77 static void ide_outsl (unsigned long port, void *addr, u32 count)
78 {
79         outsl(port, addr, count);
80 }
81
82 void default_hwif_iops (ide_hwif_t *hwif)
83 {
84         hwif->OUTB      = ide_outb;
85         hwif->OUTBSYNC  = ide_outbsync;
86         hwif->OUTW      = ide_outw;
87         hwif->OUTSW     = ide_outsw;
88         hwif->OUTSL     = ide_outsl;
89         hwif->INB       = ide_inb;
90         hwif->INW       = ide_inw;
91         hwif->INSW      = ide_insw;
92         hwif->INSL      = ide_insl;
93 }
94
95 /*
96  *      MMIO operations, typically used for SATA controllers
97  */
98
99 static u8 ide_mm_inb (unsigned long port)
100 {
101         return (u8) readb((void __iomem *) port);
102 }
103
104 static u16 ide_mm_inw (unsigned long port)
105 {
106         return (u16) readw((void __iomem *) port);
107 }
108
109 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
110 {
111         __ide_mm_insw((void __iomem *) port, addr, count);
112 }
113
114 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
115 {
116         __ide_mm_insl((void __iomem *) port, addr, count);
117 }
118
119 static void ide_mm_outb (u8 value, unsigned long port)
120 {
121         writeb(value, (void __iomem *) port);
122 }
123
124 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
125 {
126         writeb(value, (void __iomem *) port);
127 }
128
129 static void ide_mm_outw (u16 value, unsigned long port)
130 {
131         writew(value, (void __iomem *) port);
132 }
133
134 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
135 {
136         __ide_mm_outsw((void __iomem *) port, addr, count);
137 }
138
139 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
140 {
141         __ide_mm_outsl((void __iomem *) port, addr, count);
142 }
143
144 void default_hwif_mmiops (ide_hwif_t *hwif)
145 {
146         hwif->OUTB      = ide_mm_outb;
147         /* Most systems will need to override OUTBSYNC, alas however
148            this one is controller specific! */
149         hwif->OUTBSYNC  = ide_mm_outbsync;
150         hwif->OUTW      = ide_mm_outw;
151         hwif->OUTSW     = ide_mm_outsw;
152         hwif->OUTSL     = ide_mm_outsl;
153         hwif->INB       = ide_mm_inb;
154         hwif->INW       = ide_mm_inw;
155         hwif->INSW      = ide_mm_insw;
156         hwif->INSL      = ide_mm_insl;
157 }
158
159 EXPORT_SYMBOL(default_hwif_mmiops);
160
161 u32 ide_read_24 (ide_drive_t *drive)
162 {
163         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
164         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
165         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
166         return (hcyl<<16)|(lcyl<<8)|sect;
167 }
168
169 void SELECT_DRIVE (ide_drive_t *drive)
170 {
171         if (HWIF(drive)->selectproc)
172                 HWIF(drive)->selectproc(drive);
173         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
174 }
175
176 EXPORT_SYMBOL(SELECT_DRIVE);
177
178 void SELECT_INTERRUPT (ide_drive_t *drive)
179 {
180         if (HWIF(drive)->intrproc)
181                 HWIF(drive)->intrproc(drive);
182         else
183                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
184 }
185
186 void SELECT_MASK (ide_drive_t *drive, int mask)
187 {
188         if (HWIF(drive)->maskproc)
189                 HWIF(drive)->maskproc(drive, mask);
190 }
191
192 void QUIRK_LIST (ide_drive_t *drive)
193 {
194         if (HWIF(drive)->quirkproc)
195                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
196 }
197
198 /*
199  * Some localbus EIDE interfaces require a special access sequence
200  * when using 32-bit I/O instructions to transfer data.  We call this
201  * the "vlb_sync" sequence, which consists of three successive reads
202  * of the sector count register location, with interrupts disabled
203  * to ensure that the reads all happen together.
204  */
205 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
206 {
207         (void) HWIF(drive)->INB(port);
208         (void) HWIF(drive)->INB(port);
209         (void) HWIF(drive)->INB(port);
210 }
211
212 /*
213  * This is used for most PIO data transfers *from* the IDE interface
214  */
215 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
216 {
217         ide_hwif_t *hwif        = HWIF(drive);
218         u8 io_32bit             = drive->io_32bit;
219
220         if (io_32bit) {
221                 if (io_32bit & 2) {
222                         unsigned long flags;
223                         local_irq_save(flags);
224                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
225                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
226                         local_irq_restore(flags);
227                 } else
228                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
229         } else {
230                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
231         }
232 }
233
234 /*
235  * This is used for most PIO data transfers *to* the IDE interface
236  */
237 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
238 {
239         ide_hwif_t *hwif        = HWIF(drive);
240         u8 io_32bit             = drive->io_32bit;
241
242         if (io_32bit) {
243                 if (io_32bit & 2) {
244                         unsigned long flags;
245                         local_irq_save(flags);
246                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
247                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
248                         local_irq_restore(flags);
249                 } else
250                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
251         } else {
252                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
253         }
254 }
255
256 /*
257  * The following routines are mainly used by the ATAPI drivers.
258  *
259  * These routines will round up any request for an odd number of bytes,
260  * so if an odd bytecount is specified, be sure that there's at least one
261  * extra byte allocated for the buffer.
262  */
263
264 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
265 {
266         ide_hwif_t *hwif = HWIF(drive);
267
268         ++bytecount;
269 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
270         if (MACH_IS_ATARI || MACH_IS_Q40) {
271                 /* Atari has a byte-swapped IDE interface */
272                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
273                 return;
274         }
275 #endif /* CONFIG_ATARI || CONFIG_Q40 */
276         hwif->ata_input_data(drive, buffer, bytecount / 4);
277         if ((bytecount & 0x03) >= 2)
278                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
279 }
280
281 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
282 {
283         ide_hwif_t *hwif = HWIF(drive);
284
285         ++bytecount;
286 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
287         if (MACH_IS_ATARI || MACH_IS_Q40) {
288                 /* Atari has a byte-swapped IDE interface */
289                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
290                 return;
291         }
292 #endif /* CONFIG_ATARI || CONFIG_Q40 */
293         hwif->ata_output_data(drive, buffer, bytecount / 4);
294         if ((bytecount & 0x03) >= 2)
295                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
296 }
297
298 void default_hwif_transport(ide_hwif_t *hwif)
299 {
300         hwif->ata_input_data            = ata_input_data;
301         hwif->ata_output_data           = ata_output_data;
302         hwif->atapi_input_bytes         = atapi_input_bytes;
303         hwif->atapi_output_bytes        = atapi_output_bytes;
304 }
305
306 void ide_fix_driveid (struct hd_driveid *id)
307 {
308 #ifndef __LITTLE_ENDIAN
309 # ifdef __BIG_ENDIAN
310         int i;
311         u16 *stringcast;
312
313         id->config         = __le16_to_cpu(id->config);
314         id->cyls           = __le16_to_cpu(id->cyls);
315         id->reserved2      = __le16_to_cpu(id->reserved2);
316         id->heads          = __le16_to_cpu(id->heads);
317         id->track_bytes    = __le16_to_cpu(id->track_bytes);
318         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
319         id->sectors        = __le16_to_cpu(id->sectors);
320         id->vendor0        = __le16_to_cpu(id->vendor0);
321         id->vendor1        = __le16_to_cpu(id->vendor1);
322         id->vendor2        = __le16_to_cpu(id->vendor2);
323         stringcast = (u16 *)&id->serial_no[0];
324         for (i = 0; i < (20/2); i++)
325                 stringcast[i] = __le16_to_cpu(stringcast[i]);
326         id->buf_type       = __le16_to_cpu(id->buf_type);
327         id->buf_size       = __le16_to_cpu(id->buf_size);
328         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
329         stringcast = (u16 *)&id->fw_rev[0];
330         for (i = 0; i < (8/2); i++)
331                 stringcast[i] = __le16_to_cpu(stringcast[i]);
332         stringcast = (u16 *)&id->model[0];
333         for (i = 0; i < (40/2); i++)
334                 stringcast[i] = __le16_to_cpu(stringcast[i]);
335         id->dword_io       = __le16_to_cpu(id->dword_io);
336         id->reserved50     = __le16_to_cpu(id->reserved50);
337         id->field_valid    = __le16_to_cpu(id->field_valid);
338         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
339         id->cur_heads      = __le16_to_cpu(id->cur_heads);
340         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
341         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
342         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
343         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
344         id->dma_1word      = __le16_to_cpu(id->dma_1word);
345         id->dma_mword      = __le16_to_cpu(id->dma_mword);
346         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
347         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
348         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
349         id->eide_pio       = __le16_to_cpu(id->eide_pio);
350         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
351         for (i = 0; i < 2; ++i)
352                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
353         for (i = 0; i < 4; ++i)
354                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
355         id->queue_depth    = __le16_to_cpu(id->queue_depth);
356         for (i = 0; i < 4; ++i)
357                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
358         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
359         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
360         id->command_set_1  = __le16_to_cpu(id->command_set_1);
361         id->command_set_2  = __le16_to_cpu(id->command_set_2);
362         id->cfsse          = __le16_to_cpu(id->cfsse);
363         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
364         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
365         id->csf_default    = __le16_to_cpu(id->csf_default);
366         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
367         id->trseuc         = __le16_to_cpu(id->trseuc);
368         id->trsEuc         = __le16_to_cpu(id->trsEuc);
369         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
370         id->mprc           = __le16_to_cpu(id->mprc);
371         id->hw_config      = __le16_to_cpu(id->hw_config);
372         id->acoustic       = __le16_to_cpu(id->acoustic);
373         id->msrqs          = __le16_to_cpu(id->msrqs);
374         id->sxfert         = __le16_to_cpu(id->sxfert);
375         id->sal            = __le16_to_cpu(id->sal);
376         id->spg            = __le32_to_cpu(id->spg);
377         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
378         for (i = 0; i < 22; i++)
379                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
380         id->last_lun       = __le16_to_cpu(id->last_lun);
381         id->word127        = __le16_to_cpu(id->word127);
382         id->dlf            = __le16_to_cpu(id->dlf);
383         id->csfo           = __le16_to_cpu(id->csfo);
384         for (i = 0; i < 26; i++)
385                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
386         id->word156        = __le16_to_cpu(id->word156);
387         for (i = 0; i < 3; i++)
388                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
389         id->cfa_power      = __le16_to_cpu(id->cfa_power);
390         for (i = 0; i < 14; i++)
391                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
392         for (i = 0; i < 31; i++)
393                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
394         for (i = 0; i < 48; i++)
395                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
396         id->integrity_word  = __le16_to_cpu(id->integrity_word);
397 # else
398 #  error "Please fix <asm/byteorder.h>"
399 # endif
400 #endif
401 }
402
403 /*
404  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
405  * removing leading/trailing blanks and compressing internal blanks.
406  * It is primarily used to tidy up the model name/number fields as
407  * returned by the WIN_[P]IDENTIFY commands.
408  */
409
410 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
411 {
412         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
413
414         if (byteswap) {
415                 /* convert from big-endian to host byte order */
416                 for (p = end ; p != s;) {
417                         unsigned short *pp = (unsigned short *) (p -= 2);
418                         *pp = ntohs(*pp);
419                 }
420         }
421         /* strip leading blanks */
422         while (s != end && *s == ' ')
423                 ++s;
424         /* compress internal blanks and strip trailing blanks */
425         while (s != end && *s) {
426                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
427                         *p++ = *(s-1);
428         }
429         /* wipe out trailing garbage */
430         while (p != end)
431                 *p++ = '\0';
432 }
433
434 EXPORT_SYMBOL(ide_fixstring);
435
436 /*
437  * Needed for PCI irq sharing
438  */
439 int drive_is_ready (ide_drive_t *drive)
440 {
441         ide_hwif_t *hwif        = HWIF(drive);
442         u8 stat                 = 0;
443
444         if (drive->waiting_for_dma)
445                 return hwif->ide_dma_test_irq(drive);
446
447 #if 0
448         /* need to guarantee 400ns since last command was issued */
449         udelay(1);
450 #endif
451
452 #ifdef CONFIG_IDEPCI_SHARE_IRQ
453         /*
454          * We do a passive status test under shared PCI interrupts on
455          * cards that truly share the ATA side interrupt, but may also share
456          * an interrupt with another pci card/device.  We make no assumptions
457          * about possible isa-pnp and pci-pnp issues yet.
458          */
459         if (IDE_CONTROL_REG)
460                 stat = hwif->INB(IDE_ALTSTATUS_REG);
461         else
462 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
463                 /* Note: this may clear a pending IRQ!! */
464                 stat = hwif->INB(IDE_STATUS_REG);
465
466         if (stat & BUSY_STAT)
467                 /* drive busy:  definitely not interrupting */
468                 return 0;
469
470         /* drive ready: *might* be interrupting */
471         return 1;
472 }
473
474 EXPORT_SYMBOL(drive_is_ready);
475
476 /*
477  * This routine busy-waits for the drive status to be not "busy".
478  * It then checks the status for all of the "good" bits and none
479  * of the "bad" bits, and if all is okay it returns 0.  All other
480  * cases return error -- caller may then invoke ide_error().
481  *
482  * This routine should get fixed to not hog the cpu during extra long waits..
483  * That could be done by busy-waiting for the first jiffy or two, and then
484  * setting a timer to wake up at half second intervals thereafter,
485  * until timeout is achieved, before timing out.
486  */
487 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
488 {
489         ide_hwif_t *hwif = drive->hwif;
490         unsigned long flags;
491         int i;
492         u8 stat;
493
494         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
495         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
496                 local_irq_set(flags);
497                 timeout += jiffies;
498                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
499                         if (time_after(jiffies, timeout)) {
500                                 /*
501                                  * One last read after the timeout in case
502                                  * heavy interrupt load made us not make any
503                                  * progress during the timeout..
504                                  */
505                                 stat = hwif->INB(IDE_STATUS_REG);
506                                 if (!(stat & BUSY_STAT))
507                                         break;
508
509                                 local_irq_restore(flags);
510                                 *rstat = stat;
511                                 return -EBUSY;
512                         }
513                 }
514                 local_irq_restore(flags);
515         }
516         /*
517          * Allow status to settle, then read it again.
518          * A few rare drives vastly violate the 400ns spec here,
519          * so we'll wait up to 10usec for a "good" status
520          * rather than expensively fail things immediately.
521          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
522          */
523         for (i = 0; i < 10; i++) {
524                 udelay(1);
525                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) {
526                         *rstat = stat;
527                         return 0;
528                 }
529         }
530         *rstat = stat;
531         return -EFAULT;
532 }
533
534 /*
535  * In case of error returns error value after doing "*startstop = ide_error()".
536  * The caller should return the updated value of "startstop" in this case,
537  * "startstop" is unchanged when the function returns 0.
538  */
539 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
540 {
541         int err;
542         u8 stat;
543
544         /* bail early if we've exceeded max_failures */
545         if (drive->max_failures && (drive->failures > drive->max_failures)) {
546                 *startstop = ide_stopped;
547                 return 1;
548         }
549
550         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
551
552         if (err) {
553                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
554                 *startstop = ide_error(drive, s, stat);
555         }
556
557         return err;
558 }
559
560 EXPORT_SYMBOL(ide_wait_stat);
561
562 /**
563  *      ide_in_drive_list       -       look for drive in black/white list
564  *      @id: drive identifier
565  *      @drive_table: list to inspect
566  *
567  *      Look for a drive in the blacklist and the whitelist tables
568  *      Returns 1 if the drive is found in the table.
569  */
570
571 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
572 {
573         for ( ; drive_table->id_model; drive_table++)
574                 if ((!strcmp(drive_table->id_model, id->model)) &&
575                     (!drive_table->id_firmware ||
576                      strstr(id->fw_rev, drive_table->id_firmware)))
577                         return 1;
578         return 0;
579 }
580
581 EXPORT_SYMBOL_GPL(ide_in_drive_list);
582
583 /*
584  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
585  * We list them here and depend on the device side cable detection for them.
586  *
587  * Some optical devices with the buggy firmwares have the same problem.
588  */
589 static const struct drive_list_entry ivb_list[] = {
590         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
591         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
592         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
593         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
594         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
595         { NULL                          , NULL          }
596 };
597
598 /*
599  *  All hosts that use the 80c ribbon must use!
600  *  The name is derived from upper byte of word 93 and the 80c ribbon.
601  */
602 u8 eighty_ninty_three (ide_drive_t *drive)
603 {
604         ide_hwif_t *hwif = drive->hwif;
605         struct hd_driveid *id = drive->id;
606         int ivb = ide_in_drive_list(id, ivb_list);
607
608         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
609                 return 1;
610
611         if (ivb)
612                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
613                                   drive->name);
614
615         if (ide_dev_is_sata(id) && !ivb)
616                 return 1;
617
618         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
619                 goto no_80w;
620
621         /*
622          * FIXME:
623          * - force bit13 (80c cable present) check also for !ivb devices
624          *   (unless the slave device is pre-ATA3)
625          */
626         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
627                 return 1;
628
629 no_80w:
630         if (drive->udma33_warned == 1)
631                 return 0;
632
633         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
634                             "limiting max speed to UDMA33\n",
635                             drive->name,
636                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
637
638         drive->udma33_warned = 1;
639
640         return 0;
641 }
642
643 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
644 {
645         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
646             (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
647             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
648                 if (eighty_ninty_three(drive) == 0) {
649                         printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
650                                             "be set\n", drive->name);
651                         return 1;
652                 }
653         }
654
655         return 0;
656 }
657
658 /*
659  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
660  * 1 : Safe to update drive->id DMA registers.
661  * 0 : OOPs not allowed.
662  */
663 int set_transfer (ide_drive_t *drive, ide_task_t *args)
664 {
665         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
666             (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
667             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
668             (drive->id->dma_ultra ||
669              drive->id->dma_mword ||
670              drive->id->dma_1word))
671                 return 1;
672
673         return 0;
674 }
675
676 #ifdef CONFIG_BLK_DEV_IDEDMA
677 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
678 {
679         if (!drive->crc_count)
680                 return drive->current_speed;
681         drive->crc_count = 0;
682
683         switch(drive->current_speed) {
684                 case XFER_UDMA_7:       return XFER_UDMA_6;
685                 case XFER_UDMA_6:       return XFER_UDMA_5;
686                 case XFER_UDMA_5:       return XFER_UDMA_4;
687                 case XFER_UDMA_4:       return XFER_UDMA_3;
688                 case XFER_UDMA_3:       return XFER_UDMA_2;
689                 case XFER_UDMA_2:       return XFER_UDMA_1;
690                 case XFER_UDMA_1:       return XFER_UDMA_0;
691                         /*
692                          * OOPS we do not goto non Ultra DMA modes
693                          * without iCRC's available we force
694                          * the system to PIO and make the user
695                          * invoke the ATA-1 ATA-2 DMA modes.
696                          */
697                 case XFER_UDMA_0:
698                 default:                return XFER_PIO_4;
699         }
700 }
701 #endif /* CONFIG_BLK_DEV_IDEDMA */
702
703 int ide_driveid_update(ide_drive_t *drive)
704 {
705         ide_hwif_t *hwif = drive->hwif;
706         struct hd_driveid *id;
707         unsigned long timeout, flags;
708
709         /*
710          * Re-read drive->id for possible DMA mode
711          * change (copied from ide-probe.c)
712          */
713
714         SELECT_MASK(drive, 1);
715         if (IDE_CONTROL_REG)
716                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
717         msleep(50);
718         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
719         timeout = jiffies + WAIT_WORSTCASE;
720         do {
721                 if (time_after(jiffies, timeout)) {
722                         SELECT_MASK(drive, 0);
723                         return 0;       /* drive timed-out */
724                 }
725                 msleep(50);     /* give drive a breather */
726         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
727         msleep(50);     /* wait for IRQ and DRQ_STAT */
728         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
729                 SELECT_MASK(drive, 0);
730                 printk("%s: CHECK for good STATUS\n", drive->name);
731                 return 0;
732         }
733         local_irq_save(flags);
734         SELECT_MASK(drive, 0);
735         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
736         if (!id) {
737                 local_irq_restore(flags);
738                 return 0;
739         }
740         ata_input_data(drive, id, SECTOR_WORDS);
741         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
742         local_irq_enable();
743         local_irq_restore(flags);
744         ide_fix_driveid(id);
745         if (id) {
746                 drive->id->dma_ultra = id->dma_ultra;
747                 drive->id->dma_mword = id->dma_mword;
748                 drive->id->dma_1word = id->dma_1word;
749                 /* anything more ? */
750                 kfree(id);
751
752                 if (drive->using_dma && ide_id_dma_bug(drive))
753                         ide_dma_off(drive);
754         }
755
756         return 1;
757 }
758
759 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
760 {
761         ide_hwif_t *hwif = drive->hwif;
762         int error = 0;
763         u8 stat;
764
765 //      while (HWGROUP(drive)->busy)
766 //              msleep(50);
767
768 #ifdef CONFIG_BLK_DEV_IDEDMA
769         if (hwif->ide_dma_on)   /* check if host supports DMA */
770                 hwif->dma_host_off(drive);
771 #endif
772
773         /* Skip setting PIO flow-control modes on pre-EIDE drives */
774         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
775                 goto skip;
776
777         /*
778          * Don't use ide_wait_cmd here - it will
779          * attempt to set_geometry and recalibrate,
780          * but for some reason these don't work at
781          * this point (lost interrupt).
782          */
783         /*
784          * Select the drive, and issue the SETFEATURES command
785          */
786         disable_irq_nosync(hwif->irq);
787         
788         /*
789          *      FIXME: we race against the running IRQ here if
790          *      this is called from non IRQ context. If we use
791          *      disable_irq() we hang on the error path. Work
792          *      is needed.
793          */
794          
795         udelay(1);
796         SELECT_DRIVE(drive);
797         SELECT_MASK(drive, 0);
798         udelay(1);
799         if (IDE_CONTROL_REG)
800                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
801         hwif->OUTB(speed, IDE_NSECTOR_REG);
802         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
803         hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG);
804         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
805                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
806
807         error = __ide_wait_stat(drive, drive->ready_stat,
808                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
809                                 WAIT_CMD, &stat);
810
811         SELECT_MASK(drive, 0);
812
813         enable_irq(hwif->irq);
814
815         if (error) {
816                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
817                 return error;
818         }
819
820         drive->id->dma_ultra &= ~0xFF00;
821         drive->id->dma_mword &= ~0x0F00;
822         drive->id->dma_1word &= ~0x0F00;
823
824  skip:
825 #ifdef CONFIG_BLK_DEV_IDEDMA
826         if (speed >= XFER_SW_DMA_0)
827                 hwif->dma_host_on(drive);
828         else if (hwif->ide_dma_on)      /* check if host supports DMA */
829                 hwif->dma_off_quietly(drive);
830 #endif
831
832         switch(speed) {
833                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
834                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
835                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
836                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
837                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
838                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
839                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
840                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
841                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
842                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
843                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
844                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
845                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
846                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
847                 default: break;
848         }
849         if (!drive->init_speed)
850                 drive->init_speed = speed;
851         drive->current_speed = speed;
852         return error;
853 }
854
855 /*
856  * This should get invoked any time we exit the driver to
857  * wait for an interrupt response from a drive.  handler() points
858  * at the appropriate code to handle the next interrupt, and a
859  * timer is started to prevent us from waiting forever in case
860  * something goes wrong (see the ide_timer_expiry() handler later on).
861  *
862  * See also ide_execute_command
863  */
864 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
865                       unsigned int timeout, ide_expiry_t *expiry)
866 {
867         ide_hwgroup_t *hwgroup = HWGROUP(drive);
868
869         if (hwgroup->handler != NULL) {
870                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
871                         "old=%p, new=%p\n",
872                         drive->name, hwgroup->handler, handler);
873         }
874         hwgroup->handler        = handler;
875         hwgroup->expiry         = expiry;
876         hwgroup->timer.expires  = jiffies + timeout;
877         hwgroup->req_gen_timer = hwgroup->req_gen;
878         add_timer(&hwgroup->timer);
879 }
880
881 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
882                       unsigned int timeout, ide_expiry_t *expiry)
883 {
884         unsigned long flags;
885         spin_lock_irqsave(&ide_lock, flags);
886         __ide_set_handler(drive, handler, timeout, expiry);
887         spin_unlock_irqrestore(&ide_lock, flags);
888 }
889
890 EXPORT_SYMBOL(ide_set_handler);
891  
892 /**
893  *      ide_execute_command     -       execute an IDE command
894  *      @drive: IDE drive to issue the command against
895  *      @command: command byte to write
896  *      @handler: handler for next phase
897  *      @timeout: timeout for command
898  *      @expiry:  handler to run on timeout
899  *
900  *      Helper function to issue an IDE command. This handles the
901  *      atomicity requirements, command timing and ensures that the 
902  *      handler and IRQ setup do not race. All IDE command kick off
903  *      should go via this function or do equivalent locking.
904  */
905
906 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
907                          unsigned timeout, ide_expiry_t *expiry)
908 {
909         unsigned long flags;
910         ide_hwgroup_t *hwgroup = HWGROUP(drive);
911         ide_hwif_t *hwif = HWIF(drive);
912         
913         spin_lock_irqsave(&ide_lock, flags);
914         
915         BUG_ON(hwgroup->handler);
916         hwgroup->handler        = handler;
917         hwgroup->expiry         = expiry;
918         hwgroup->timer.expires  = jiffies + timeout;
919         hwgroup->req_gen_timer = hwgroup->req_gen;
920         add_timer(&hwgroup->timer);
921         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
922         /* Drive takes 400nS to respond, we must avoid the IRQ being
923            serviced before that. 
924            
925            FIXME: we could skip this delay with care on non shared
926            devices 
927         */
928         ndelay(400);
929         spin_unlock_irqrestore(&ide_lock, flags);
930 }
931
932 EXPORT_SYMBOL(ide_execute_command);
933
934
935 /* needed below */
936 static ide_startstop_t do_reset1 (ide_drive_t *, int);
937
938 /*
939  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
940  * during an atapi drive reset operation. If the drive has not yet responded,
941  * and we have not yet hit our maximum waiting time, then the timer is restarted
942  * for another 50ms.
943  */
944 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
945 {
946         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
947         ide_hwif_t *hwif        = HWIF(drive);
948         u8 stat;
949
950         SELECT_DRIVE(drive);
951         udelay (10);
952
953         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
954                 printk("%s: ATAPI reset complete\n", drive->name);
955         } else {
956                 if (time_before(jiffies, hwgroup->poll_timeout)) {
957                         BUG_ON(HWGROUP(drive)->handler != NULL);
958                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
959                         /* continue polling */
960                         return ide_started;
961                 }
962                 /* end of polling */
963                 hwgroup->polling = 0;
964                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
965                                 drive->name, stat);
966                 /* do it the old fashioned way */
967                 return do_reset1(drive, 1);
968         }
969         /* done polling */
970         hwgroup->polling = 0;
971         hwgroup->resetting = 0;
972         return ide_stopped;
973 }
974
975 /*
976  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
977  * during an ide reset operation. If the drives have not yet responded,
978  * and we have not yet hit our maximum waiting time, then the timer is restarted
979  * for another 50ms.
980  */
981 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
982 {
983         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
984         ide_hwif_t *hwif        = HWIF(drive);
985         u8 tmp;
986
987         if (hwif->reset_poll != NULL) {
988                 if (hwif->reset_poll(drive)) {
989                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
990                                 hwif->name, drive->name);
991                         return ide_stopped;
992                 }
993         }
994
995         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
996                 if (time_before(jiffies, hwgroup->poll_timeout)) {
997                         BUG_ON(HWGROUP(drive)->handler != NULL);
998                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
999                         /* continue polling */
1000                         return ide_started;
1001                 }
1002                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1003                 drive->failures++;
1004         } else  {
1005                 printk("%s: reset: ", hwif->name);
1006                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1007                         printk("success\n");
1008                         drive->failures = 0;
1009                 } else {
1010                         drive->failures++;
1011                         printk("master: ");
1012                         switch (tmp & 0x7f) {
1013                                 case 1: printk("passed");
1014                                         break;
1015                                 case 2: printk("formatter device error");
1016                                         break;
1017                                 case 3: printk("sector buffer error");
1018                                         break;
1019                                 case 4: printk("ECC circuitry error");
1020                                         break;
1021                                 case 5: printk("controlling MPU error");
1022                                         break;
1023                                 default:printk("error (0x%02x?)", tmp);
1024                         }
1025                         if (tmp & 0x80)
1026                                 printk("; slave: failed");
1027                         printk("\n");
1028                 }
1029         }
1030         hwgroup->polling = 0;   /* done polling */
1031         hwgroup->resetting = 0; /* done reset attempt */
1032         return ide_stopped;
1033 }
1034
1035 static void check_dma_crc(ide_drive_t *drive)
1036 {
1037 #ifdef CONFIG_BLK_DEV_IDEDMA
1038         if (drive->crc_count) {
1039                 drive->hwif->dma_off_quietly(drive);
1040                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1041                 if (drive->current_speed >= XFER_SW_DMA_0)
1042                         (void) HWIF(drive)->ide_dma_on(drive);
1043         } else
1044                 ide_dma_off(drive);
1045 #endif
1046 }
1047
1048 static void ide_disk_pre_reset(ide_drive_t *drive)
1049 {
1050         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1051
1052         drive->special.all = 0;
1053         drive->special.b.set_geometry = legacy;
1054         drive->special.b.recalibrate  = legacy;
1055         if (OK_TO_RESET_CONTROLLER)
1056                 drive->mult_count = 0;
1057         if (!drive->keep_settings && !drive->using_dma)
1058                 drive->mult_req = 0;
1059         if (drive->mult_req != drive->mult_count)
1060                 drive->special.b.set_multmode = 1;
1061 }
1062
1063 static void pre_reset(ide_drive_t *drive)
1064 {
1065         if (drive->media == ide_disk)
1066                 ide_disk_pre_reset(drive);
1067         else
1068                 drive->post_reset = 1;
1069
1070         if (!drive->keep_settings) {
1071                 if (drive->using_dma) {
1072                         check_dma_crc(drive);
1073                 } else {
1074                         drive->unmask = 0;
1075                         drive->io_32bit = 0;
1076                 }
1077                 return;
1078         }
1079         if (drive->using_dma)
1080                 check_dma_crc(drive);
1081
1082         if (HWIF(drive)->pre_reset != NULL)
1083                 HWIF(drive)->pre_reset(drive);
1084
1085         if (drive->current_speed != 0xff)
1086                 drive->desired_speed = drive->current_speed;
1087         drive->current_speed = 0xff;
1088 }
1089
1090 /*
1091  * do_reset1() attempts to recover a confused drive by resetting it.
1092  * Unfortunately, resetting a disk drive actually resets all devices on
1093  * the same interface, so it can really be thought of as resetting the
1094  * interface rather than resetting the drive.
1095  *
1096  * ATAPI devices have their own reset mechanism which allows them to be
1097  * individually reset without clobbering other devices on the same interface.
1098  *
1099  * Unfortunately, the IDE interface does not generate an interrupt to let
1100  * us know when the reset operation has finished, so we must poll for this.
1101  * Equally poor, though, is the fact that this may a very long time to complete,
1102  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1103  * we set a timer to poll at 50ms intervals.
1104  */
1105 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1106 {
1107         unsigned int unit;
1108         unsigned long flags;
1109         ide_hwif_t *hwif;
1110         ide_hwgroup_t *hwgroup;
1111         
1112         spin_lock_irqsave(&ide_lock, flags);
1113         hwif = HWIF(drive);
1114         hwgroup = HWGROUP(drive);
1115
1116         /* We must not reset with running handlers */
1117         BUG_ON(hwgroup->handler != NULL);
1118
1119         /* For an ATAPI device, first try an ATAPI SRST. */
1120         if (drive->media != ide_disk && !do_not_try_atapi) {
1121                 hwgroup->resetting = 1;
1122                 pre_reset(drive);
1123                 SELECT_DRIVE(drive);
1124                 udelay (20);
1125                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1126                 ndelay(400);
1127                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1128                 hwgroup->polling = 1;
1129                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1130                 spin_unlock_irqrestore(&ide_lock, flags);
1131                 return ide_started;
1132         }
1133
1134         /*
1135          * First, reset any device state data we were maintaining
1136          * for any of the drives on this interface.
1137          */
1138         for (unit = 0; unit < MAX_DRIVES; ++unit)
1139                 pre_reset(&hwif->drives[unit]);
1140
1141 #if OK_TO_RESET_CONTROLLER
1142         if (!IDE_CONTROL_REG) {
1143                 spin_unlock_irqrestore(&ide_lock, flags);
1144                 return ide_stopped;
1145         }
1146
1147         hwgroup->resetting = 1;
1148         /*
1149          * Note that we also set nIEN while resetting the device,
1150          * to mask unwanted interrupts from the interface during the reset.
1151          * However, due to the design of PC hardware, this will cause an
1152          * immediate interrupt due to the edge transition it produces.
1153          * This single interrupt gives us a "fast poll" for drives that
1154          * recover from reset very quickly, saving us the first 50ms wait time.
1155          */
1156         /* set SRST and nIEN */
1157         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1158         /* more than enough time */
1159         udelay(10);
1160         if (drive->quirk_list == 2) {
1161                 /* clear SRST and nIEN */
1162                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1163         } else {
1164                 /* clear SRST, leave nIEN */
1165                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1166         }
1167         /* more than enough time */
1168         udelay(10);
1169         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1170         hwgroup->polling = 1;
1171         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1172
1173         /*
1174          * Some weird controller like resetting themselves to a strange
1175          * state when the disks are reset this way. At least, the Winbond
1176          * 553 documentation says that
1177          */
1178         if (hwif->resetproc != NULL) {
1179                 hwif->resetproc(drive);
1180         }
1181         
1182 #endif  /* OK_TO_RESET_CONTROLLER */
1183
1184         spin_unlock_irqrestore(&ide_lock, flags);
1185         return ide_started;
1186 }
1187
1188 /*
1189  * ide_do_reset() is the entry point to the drive/interface reset code.
1190  */
1191
1192 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1193 {
1194         return do_reset1(drive, 0);
1195 }
1196
1197 EXPORT_SYMBOL(ide_do_reset);
1198
1199 /*
1200  * ide_wait_not_busy() waits for the currently selected device on the hwif
1201  * to report a non-busy status, see comments in probe_hwif().
1202  */
1203 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1204 {
1205         u8 stat = 0;
1206
1207         while(timeout--) {
1208                 /*
1209                  * Turn this into a schedule() sleep once I'm sure
1210                  * about locking issues (2.5 work ?).
1211                  */
1212                 mdelay(1);
1213                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1214                 if ((stat & BUSY_STAT) == 0)
1215                         return 0;
1216                 /*
1217                  * Assume a value of 0xff means nothing is connected to
1218                  * the interface and it doesn't implement the pull-down
1219                  * resistor on D7.
1220                  */
1221                 if (stat == 0xff)
1222                         return -ENODEV;
1223                 touch_softlockup_watchdog();
1224                 touch_nmi_watchdog();
1225         }
1226         return -EBUSY;
1227 }
1228
1229 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1230