]> nv-tegra.nvidia Code Review - linux-2.6.git/blob - drivers/gpu/drm/i915/i915_drv.c
Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[linux-2.6.git] / drivers / gpu / drm / i915 / i915_drv.c
1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2  */
3 /*
4  *
5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6  * All Rights Reserved.
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the
10  * "Software"), to deal in the Software without restriction, including
11  * without limitation the rights to use, copy, modify, merge, publish,
12  * distribute, sub license, and/or sell copies of the Software, and to
13  * permit persons to whom the Software is furnished to do so, subject to
14  * the following conditions:
15  *
16  * The above copyright notice and this permission notice (including the
17  * next paragraph) shall be included in all copies or substantial portions
18  * of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27  *
28  */
29
30 #include <linux/device.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
38
39 static int i915_modeset = -1;
40 module_param_named(modeset, i915_modeset, int, 0400);
41
42 unsigned int i915_fbpercrtc = 0;
43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
44
45 unsigned int i915_powersave = 1;
46 module_param_named(powersave, i915_powersave, int, 0400);
47
48 static struct drm_driver driver;
49
50 #define INTEL_VGA_DEVICE(id, info) {            \
51         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
52         .class_mask = 0xffff00,                 \
53         .vendor = 0x8086,                       \
54         .device = id,                           \
55         .subvendor = PCI_ANY_ID,                \
56         .subdevice = PCI_ANY_ID,                \
57         .driver_data = (unsigned long) info }
58
59 const static struct intel_device_info intel_i830_info = {
60         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
61 };
62
63 const static struct intel_device_info intel_845g_info = {
64         .is_i8xx = 1,
65 };
66
67 const static struct intel_device_info intel_i85x_info = {
68         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
69 };
70
71 const static struct intel_device_info intel_i865g_info = {
72         .is_i8xx = 1,
73 };
74
75 const static struct intel_device_info intel_i915g_info = {
76         .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
77 };
78 const static struct intel_device_info intel_i915gm_info = {
79         .is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
80         .cursor_needs_physical = 1,
81 };
82 const static struct intel_device_info intel_i945g_info = {
83         .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
84 };
85 const static struct intel_device_info intel_i945gm_info = {
86         .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
87         .has_hotplug = 1, .cursor_needs_physical = 1,
88 };
89
90 const static struct intel_device_info intel_i965g_info = {
91         .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
92 };
93
94 const static struct intel_device_info intel_i965gm_info = {
95         .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
96         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
97         .has_hotplug = 1,
98 };
99
100 const static struct intel_device_info intel_g33_info = {
101         .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
102         .has_hotplug = 1,
103 };
104
105 const static struct intel_device_info intel_g45_info = {
106         .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
107         .has_pipe_cxsr = 1,
108         .has_hotplug = 1,
109 };
110
111 const static struct intel_device_info intel_gm45_info = {
112         .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
113         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
114         .has_pipe_cxsr = 1,
115         .has_hotplug = 1,
116 };
117
118 const static struct intel_device_info intel_pineview_info = {
119         .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
120         .has_pipe_cxsr = 1,
121         .has_hotplug = 1,
122 };
123
124 const static struct intel_device_info intel_ironlake_d_info = {
125         .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
126         .has_pipe_cxsr = 1,
127         .has_hotplug = 1,
128 };
129
130 const static struct intel_device_info intel_ironlake_m_info = {
131         .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
132         .need_gfx_hws = 1, .has_rc6 = 1,
133         .has_hotplug = 1,
134 };
135
136 const static struct pci_device_id pciidlist[] = {
137         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
138         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
139         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
140         INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
141         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
142         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
143         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
144         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
145         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
146         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
147         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
148         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
149         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
150         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
151         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
152         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
153         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
154         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
155         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
156         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
157         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
158         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
159         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
160         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
161         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
162         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
163         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
164         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
165         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
166         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
167         {0, 0, 0}
168 };
169
170 #if defined(CONFIG_DRM_I915_KMS)
171 MODULE_DEVICE_TABLE(pci, pciidlist);
172 #endif
173
174 static int i915_suspend(struct drm_device *dev, pm_message_t state)
175 {
176         struct drm_i915_private *dev_priv = dev->dev_private;
177
178         if (!dev || !dev_priv) {
179                 DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
180                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
181                 return -ENODEV;
182         }
183
184         if (state.event == PM_EVENT_PRETHAW)
185                 return 0;
186
187         pci_save_state(dev->pdev);
188
189         /* If KMS is active, we do the leavevt stuff here */
190         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
191                 if (i915_gem_idle(dev))
192                         dev_err(&dev->pdev->dev,
193                                 "GEM idle failed, resume may fail\n");
194                 drm_irq_uninstall(dev);
195         }
196
197         i915_save_state(dev);
198
199         intel_opregion_free(dev, 1);
200
201         if (state.event == PM_EVENT_SUSPEND) {
202                 /* Shut down the device */
203                 pci_disable_device(dev->pdev);
204                 pci_set_power_state(dev->pdev, PCI_D3hot);
205         }
206
207         /* Modeset on resume, not lid events */
208         dev_priv->modeset_on_lid = 0;
209
210         return 0;
211 }
212
213 static int i915_resume(struct drm_device *dev)
214 {
215         struct drm_i915_private *dev_priv = dev->dev_private;
216         int ret = 0;
217
218         if (pci_enable_device(dev->pdev))
219                 return -1;
220         pci_set_master(dev->pdev);
221
222         i915_restore_state(dev);
223
224         intel_opregion_init(dev, 1);
225
226         /* KMS EnterVT equivalent */
227         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
228                 mutex_lock(&dev->struct_mutex);
229                 dev_priv->mm.suspended = 0;
230
231                 ret = i915_gem_init_ringbuffer(dev);
232                 if (ret != 0)
233                         ret = -1;
234                 mutex_unlock(&dev->struct_mutex);
235
236                 drm_irq_install(dev);
237         }
238         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
239                 /* Resume the modeset for every activated CRTC */
240                 drm_helper_resume_force_mode(dev);
241         }
242
243         dev_priv->modeset_on_lid = 0;
244
245         return ret;
246 }
247
248 /**
249  * i965_reset - reset chip after a hang
250  * @dev: drm device to reset
251  * @flags: reset domains
252  *
253  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
254  * reset or otherwise an error code.
255  *
256  * Procedure is fairly simple:
257  *   - reset the chip using the reset reg
258  *   - re-init context state
259  *   - re-init hardware status page
260  *   - re-init ring buffer
261  *   - re-init interrupt state
262  *   - re-init display
263  */
264 int i965_reset(struct drm_device *dev, u8 flags)
265 {
266         drm_i915_private_t *dev_priv = dev->dev_private;
267         unsigned long timeout;
268         u8 gdrst;
269         /*
270          * We really should only reset the display subsystem if we actually
271          * need to
272          */
273         bool need_display = true;
274
275         mutex_lock(&dev->struct_mutex);
276
277         /*
278          * Clear request list
279          */
280         i915_gem_retire_requests(dev);
281
282         if (need_display)
283                 i915_save_display(dev);
284
285         if (IS_I965G(dev) || IS_G4X(dev)) {
286                 /*
287                  * Set the domains we want to reset, then the reset bit (bit 0).
288                  * Clear the reset bit after a while and wait for hardware status
289                  * bit (bit 1) to be set
290                  */
291                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
292                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
293                 udelay(50);
294                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
295
296                 /* ...we don't want to loop forever though, 500ms should be plenty */
297                timeout = jiffies + msecs_to_jiffies(500);
298                 do {
299                         udelay(100);
300                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
301                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
302
303                 if (gdrst & 0x1) {
304                         WARN(true, "i915: Failed to reset chip\n");
305                         mutex_unlock(&dev->struct_mutex);
306                         return -EIO;
307                 }
308         } else {
309                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
310                 return -ENODEV;
311         }
312
313         /* Ok, now get things going again... */
314
315         /*
316          * Everything depends on having the GTT running, so we need to start
317          * there.  Fortunately we don't need to do this unless we reset the
318          * chip at a PCI level.
319          *
320          * Next we need to restore the context, but we don't use those
321          * yet either...
322          *
323          * Ring buffer needs to be re-initialized in the KMS case, or if X
324          * was running at the time of the reset (i.e. we weren't VT
325          * switched away).
326          */
327         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
328             !dev_priv->mm.suspended) {
329                 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
330                 struct drm_gem_object *obj = ring->ring_obj;
331                 struct drm_i915_gem_object *obj_priv = obj->driver_private;
332                 dev_priv->mm.suspended = 0;
333
334                 /* Stop the ring if it's running. */
335                 I915_WRITE(PRB0_CTL, 0);
336                 I915_WRITE(PRB0_TAIL, 0);
337                 I915_WRITE(PRB0_HEAD, 0);
338
339                 /* Initialize the ring. */
340                 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
341                 I915_WRITE(PRB0_CTL,
342                            ((obj->size - 4096) & RING_NR_PAGES) |
343                            RING_NO_REPORT |
344                            RING_VALID);
345                 if (!drm_core_check_feature(dev, DRIVER_MODESET))
346                         i915_kernel_lost_context(dev);
347                 else {
348                         ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
349                         ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
350                         ring->space = ring->head - (ring->tail + 8);
351                         if (ring->space < 0)
352                                 ring->space += ring->Size;
353                 }
354
355                 mutex_unlock(&dev->struct_mutex);
356                 drm_irq_uninstall(dev);
357                 drm_irq_install(dev);
358                 mutex_lock(&dev->struct_mutex);
359         }
360
361         /*
362          * Display needs restore too...
363          */
364         if (need_display)
365                 i915_restore_display(dev);
366
367         mutex_unlock(&dev->struct_mutex);
368         return 0;
369 }
370
371
372 static int __devinit
373 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
374 {
375         return drm_get_dev(pdev, ent, &driver);
376 }
377
378 static void
379 i915_pci_remove(struct pci_dev *pdev)
380 {
381         struct drm_device *dev = pci_get_drvdata(pdev);
382
383         drm_put_dev(dev);
384 }
385
386 static int
387 i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
388 {
389         struct drm_device *dev = pci_get_drvdata(pdev);
390
391         return i915_suspend(dev, state);
392 }
393
394 static int
395 i915_pci_resume(struct pci_dev *pdev)
396 {
397         struct drm_device *dev = pci_get_drvdata(pdev);
398
399         return i915_resume(dev);
400 }
401
402 static int
403 i915_pm_suspend(struct device *dev)
404 {
405         return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
406 }
407
408 static int
409 i915_pm_resume(struct device *dev)
410 {
411         return i915_pci_resume(to_pci_dev(dev));
412 }
413
414 static int
415 i915_pm_freeze(struct device *dev)
416 {
417         return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
418 }
419
420 static int
421 i915_pm_thaw(struct device *dev)
422 {
423         /* thaw during hibernate, do nothing! */
424         return 0;
425 }
426
427 static int
428 i915_pm_poweroff(struct device *dev)
429 {
430         return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
431 }
432
433 static int
434 i915_pm_restore(struct device *dev)
435 {
436         return i915_pci_resume(to_pci_dev(dev));
437 }
438
439 const struct dev_pm_ops i915_pm_ops = {
440      .suspend = i915_pm_suspend,
441      .resume = i915_pm_resume,
442      .freeze = i915_pm_freeze,
443      .thaw = i915_pm_thaw,
444      .poweroff = i915_pm_poweroff,
445      .restore = i915_pm_restore,
446 };
447
448 static struct vm_operations_struct i915_gem_vm_ops = {
449         .fault = i915_gem_fault,
450         .open = drm_gem_vm_open,
451         .close = drm_gem_vm_close,
452 };
453
454 static struct drm_driver driver = {
455         /* don't use mtrr's here, the Xserver or user space app should
456          * deal with them for intel hardware.
457          */
458         .driver_features =
459             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
460             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
461         .load = i915_driver_load,
462         .unload = i915_driver_unload,
463         .open = i915_driver_open,
464         .lastclose = i915_driver_lastclose,
465         .preclose = i915_driver_preclose,
466         .postclose = i915_driver_postclose,
467         .suspend = i915_suspend,
468         .resume = i915_resume,
469         .device_is_agp = i915_driver_device_is_agp,
470         .enable_vblank = i915_enable_vblank,
471         .disable_vblank = i915_disable_vblank,
472         .irq_preinstall = i915_driver_irq_preinstall,
473         .irq_postinstall = i915_driver_irq_postinstall,
474         .irq_uninstall = i915_driver_irq_uninstall,
475         .irq_handler = i915_driver_irq_handler,
476         .reclaim_buffers = drm_core_reclaim_buffers,
477         .get_map_ofs = drm_core_get_map_ofs,
478         .get_reg_ofs = drm_core_get_reg_ofs,
479         .master_create = i915_master_create,
480         .master_destroy = i915_master_destroy,
481 #if defined(CONFIG_DEBUG_FS)
482         .debugfs_init = i915_debugfs_init,
483         .debugfs_cleanup = i915_debugfs_cleanup,
484 #endif
485         .gem_init_object = i915_gem_init_object,
486         .gem_free_object = i915_gem_free_object,
487         .gem_vm_ops = &i915_gem_vm_ops,
488         .ioctls = i915_ioctls,
489         .fops = {
490                  .owner = THIS_MODULE,
491                  .open = drm_open,
492                  .release = drm_release,
493                  .unlocked_ioctl = drm_ioctl,
494                  .mmap = drm_gem_mmap,
495                  .poll = drm_poll,
496                  .fasync = drm_fasync,
497                  .read = drm_read,
498 #ifdef CONFIG_COMPAT
499                  .compat_ioctl = i915_compat_ioctl,
500 #endif
501         },
502
503         .pci_driver = {
504                  .name = DRIVER_NAME,
505                  .id_table = pciidlist,
506                  .probe = i915_pci_probe,
507                  .remove = i915_pci_remove,
508                  .driver.pm = &i915_pm_ops,
509         },
510
511         .name = DRIVER_NAME,
512         .desc = DRIVER_DESC,
513         .date = DRIVER_DATE,
514         .major = DRIVER_MAJOR,
515         .minor = DRIVER_MINOR,
516         .patchlevel = DRIVER_PATCHLEVEL,
517 };
518
519 static int __init i915_init(void)
520 {
521         driver.num_ioctls = i915_max_ioctl;
522
523         i915_gem_shrinker_init();
524
525         /*
526          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
527          * explicitly disabled with the module pararmeter.
528          *
529          * Otherwise, just follow the parameter (defaulting to off).
530          *
531          * Allow optional vga_text_mode_force boot option to override
532          * the default behavior.
533          */
534 #if defined(CONFIG_DRM_I915_KMS)
535         if (i915_modeset != 0)
536                 driver.driver_features |= DRIVER_MODESET;
537 #endif
538         if (i915_modeset == 1)
539                 driver.driver_features |= DRIVER_MODESET;
540
541 #ifdef CONFIG_VGA_CONSOLE
542         if (vgacon_text_force() && i915_modeset == -1)
543                 driver.driver_features &= ~DRIVER_MODESET;
544 #endif
545
546         return drm_init(&driver);
547 }
548
549 static void __exit i915_exit(void)
550 {
551         i915_gem_shrinker_exit();
552         drm_exit(&driver);
553 }
554
555 module_init(i915_init);
556 module_exit(i915_exit);
557
558 MODULE_AUTHOR(DRIVER_AUTHOR);
559 MODULE_DESCRIPTION(DRIVER_DESC);
560 MODULE_LICENSE("GPL and additional rights");