drivers/acpi/processor_idle.c

   1 /*
   2  * processor_idle - idle state submodule to the ACPI processor driver
   3  *
   4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
   7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
   8  *                      - Added processor hotplug support
   9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10  *                      - Added support for C3 on SMP
  11  *
  12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13  *
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or (at
  17  *  your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful, but
  20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  22  *  General Public License for more details.
  23  *
  24  *  You should have received a copy of the GNU General Public License along
  25  *  with this program; if not, write to the Free Software Foundation, Inc.,
  26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27  *
  28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29  */
  30
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/init.h>
  34 #include <linux/cpufreq.h>
  35 #include <linux/proc_fs.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/acpi.h>
  38 #include <linux/dmi.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/sched.h>        /* need_resched() */
  41 #include <linux/pm_qos_params.h>
  42 #include <linux/clockchips.h>
  43 #include <linux/cpuidle.h>
  44
  45 /*
  46  * Include the apic definitions for x86 to have the APIC timer related defines
  47  * available also for UP (on SMP it gets magically included via linux/smp.h).
  48  * asm/acpi.h is not an option, as it would require more include magic. Also
  49  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  50  */
  51 #ifdef CONFIG_X86
  52 #include <asm/apic.h>
  53 #endif
  54
  55 #include <asm/io.h>
  56 #include <asm/uaccess.h>
  57
  58 #include <acpi/acpi_bus.h>
  59 #include <acpi/processor.h>
  60
  61 #define ACPI_PROCESSOR_COMPONENT        0x01000000
  62 #define ACPI_PROCESSOR_CLASS            "processor"
  63 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
  64 ACPI_MODULE_NAME("processor_idle");
  65 #define ACPI_PROCESSOR_FILE_POWER       "power"
  66 #define US_TO_PM_TIMER_TICKS(t)         ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  67 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
  68 #ifndef CONFIG_CPU_IDLE
  69 #define C2_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
  70 #define C3_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
  71 static void (*pm_idle_save) (void) __read_mostly;
  72 #else
  73 #define C2_OVERHEAD                     1       /* 1us */
  74 #define C3_OVERHEAD                     1       /* 1us */
  75 #endif
  76 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
  77
  78 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  79 #ifdef CONFIG_CPU_IDLE
  80 module_param(max_cstate, uint, 0000);
  81 #else
  82 module_param(max_cstate, uint, 0644);
  83 #endif
  84 static unsigned int nocst __read_mostly;
  85 module_param(nocst, uint, 0000);
  86
  87 #ifndef CONFIG_CPU_IDLE
  88 /*
  89  * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  90  * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  91  * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  92  * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  93  * reduce history for more aggressive entry into C3
  94  */
  95 static unsigned int bm_history __read_mostly =
  96     (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  97 module_param(bm_history, uint, 0644);
  98
  99 static int acpi_processor_set_power_policy(struct acpi_processor *pr);
 100
 101 #endif
 102
 103 /*
 104  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
 105  * For now disable this. Probably a bug somewhere else.
 106  *
 107  * To skip this limit, boot/load with a large max_cstate limit.
 108  */
 109 static int set_max_cstate(const struct dmi_system_id *id)
 110 {
 111         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
 112                 return 0;
 113
 114         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
 115                " Override with \"processor.max_cstate=%d\"\n", id->ident,
 116                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
 117
 118         max_cstate = (long)id->driver_data;
 119
 120         return 0;
 121 }
 122
 123 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
 124    callers to only run once -AK */
 125 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
 126         { set_max_cstate, "IBM ThinkPad R40e", {
 127           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 128           DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
 129         { set_max_cstate, "IBM ThinkPad R40e", {
 130           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 131           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
 132         { set_max_cstate, "IBM ThinkPad R40e", {
 133           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 134           DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
 135         { set_max_cstate, "IBM ThinkPad R40e", {
 136           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 137           DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
 138         { set_max_cstate, "IBM ThinkPad R40e", {
 139           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 140           DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
 141         { set_max_cstate, "IBM ThinkPad R40e", {
 142           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 143           DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
 144         { set_max_cstate, "IBM ThinkPad R40e", {
 145           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 146           DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
 147         { set_max_cstate, "IBM ThinkPad R40e", {
 148           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 149           DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
 150         { set_max_cstate, "IBM ThinkPad R40e", {
 151           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 152           DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
 153         { set_max_cstate, "IBM ThinkPad R40e", {
 154           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 155           DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
 156         { set_max_cstate, "IBM ThinkPad R40e", {
 157           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 158           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
 159         { set_max_cstate, "IBM ThinkPad R40e", {
 160           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 161           DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
 162         { set_max_cstate, "IBM ThinkPad R40e", {
 163           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 164           DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
 165         { set_max_cstate, "IBM ThinkPad R40e", {
 166           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 167           DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
 168         { set_max_cstate, "IBM ThinkPad R40e", {
 169           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 170           DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
 171         { set_max_cstate, "IBM ThinkPad R40e", {
 172           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
 173           DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
 174         { set_max_cstate, "Medion 41700", {
 175           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
 176           DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
 177         { set_max_cstate, "Clevo 5600D", {
 178           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
 179           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
 180          (void *)2},
 181         {},
 182 };
 183
 184 static inline u32 ticks_elapsed(u32 t1, u32 t2)
 185 {
 186         if (t2 >= t1)
 187                 return (t2 - t1);
 188         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
 189                 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
 190         else
 191                 return ((0xFFFFFFFF - t1) + t2);
 192 }
 193
 194 static inline u32 ticks_elapsed_in_us(u32 t1, u32 t2)
 195 {
 196         if (t2 >= t1)
 197                 return PM_TIMER_TICKS_TO_US(t2 - t1);
 198         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
 199                 return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
 200         else
 201                 return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1) + t2);
 202 }
 203
 204 static void acpi_safe_halt(void)
 205 {
 206         current_thread_info()->status &= ~TS_POLLING;
 207         /*
 208          * TS_POLLING-cleared state must be visible before we
 209          * test NEED_RESCHED:
 210          */
 211         smp_mb();
 212         if (!need_resched())
 213                 safe_halt();
 214         current_thread_info()->status |= TS_POLLING;
 215 }
 216
 217 #ifndef CONFIG_CPU_IDLE
 218
 219 static void
 220 acpi_processor_power_activate(struct acpi_processor *pr,
 221                               struct acpi_processor_cx *new)
 222 {
 223         struct acpi_processor_cx *old;
 224
 225         if (!pr || !new)
 226                 return;
 227
 228         old = pr->power.state;
 229
 230         if (old)
 231                 old->promotion.count = 0;
 232         new->demotion.count = 0;
 233
 234         /* Cleanup from old state. */
 235         if (old) {
 236                 switch (old->type) {
 237                 case ACPI_STATE_C3:
 238                         /* Disable bus master reload */
 239                         if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
 240                                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
 241                         break;
 242                 }
 243         }
 244
 245         /* Prepare to use new state. */
 246         switch (new->type) {
 247         case ACPI_STATE_C3:
 248                 /* Enable bus master reload */
 249                 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
 250                         acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
 251                 break;
 252         }
 253
 254         pr->power.state = new;
 255
 256         return;
 257 }
 258
 259 static atomic_t c3_cpu_count;
 260
 261 /* Common C-state entry for C2, C3, .. */
 262 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
 263 {
 264         if (cstate->space_id == ACPI_CSTATE_FFH) {
 265                 /* Call into architectural FFH based C-state */
 266                 acpi_processor_ffh_cstate_enter(cstate);
 267         } else {
 268                 int unused;
 269                 /* IO port based C-state */
 270                 inb(cstate->address);
 271                 /* Dummy wait op - must do something useless after P_LVL2 read
 272                    because chipsets cannot guarantee that STPCLK# signal
 273                    gets asserted in time to freeze execution properly. */
 274                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
 275         }
 276 }
 277 #endif /* !CONFIG_CPU_IDLE */
 278
 279 #ifdef ARCH_APICTIMER_STOPS_ON_C3
 280
 281 /*
 282  * Some BIOS implementations switch to C3 in the published C2 state.
 283  * This seems to be a common problem on AMD boxen, but other vendors
 284  * are affected too. We pick the most conservative approach: we assume
 285  * that the local APIC stops in both C2 and C3.
 286  */
 287 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
 288                                    struct acpi_processor_cx *cx)
 289 {
 290         struct acpi_processor_power *pwr = &pr->power;
 291         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
 292
 293         /*
 294          * Check, if one of the previous states already marked the lapic
 295          * unstable
 296          */
 297         if (pwr->timer_broadcast_on_state < state)
 298                 return;
 299
 300         if (cx->type >= type)
 301                 pr->power.timer_broadcast_on_state = state;
 302 }
 303
 304 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
 305 {
 306         unsigned long reason;
 307
 308         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
 309                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
 310
 311         clockevents_notify(reason, &pr->id);
 312 }
 313
 314 /* Power(C) State timer broadcast control */
 315 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
 316                                        struct acpi_processor_cx *cx,
 317                                        int broadcast)
 318 {
 319         int state = cx - pr->power.states;
 320
 321         if (state >= pr->power.timer_broadcast_on_state) {
 322                 unsigned long reason;
 323
 324                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
 325                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
 326                 clockevents_notify(reason, &pr->id);
 327         }
 328 }
 329
 330 #else
 331
 332 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
 333                                    struct acpi_processor_cx *cstate) { }
 334 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
 335 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
 336                                        struct acpi_processor_cx *cx,
 337                                        int broadcast)
 338 {
 339 }
 340
 341 #endif
 342
 343 /*
 344  * Suspend / resume control
 345  */
 346 static int acpi_idle_suspend;
 347
 348 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
 349 {
 350         acpi_idle_suspend = 1;
 351         return 0;
 352 }
 353
 354 int acpi_processor_resume(struct acpi_device * device)
 355 {
 356         acpi_idle_suspend = 0;
 357         return 0;
 358 }
 359
 360 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
 361 static int tsc_halts_in_c(int state)
 362 {
 363         switch (boot_cpu_data.x86_vendor) {
 364         case X86_VENDOR_AMD:
 365                 /*
 366                  * AMD Fam10h TSC will tick in all
 367                  * C/P/S0/S1 states when this bit is set.
 368                  */
 369                 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
 370                         return 0;
 371                 /*FALL THROUGH*/
 372         case X86_VENDOR_INTEL:
 373                 /* Several cases known where TSC halts in C2 too */
 374         default:
 375                 return state > ACPI_STATE_C1;
 376         }
 377 }
 378 #endif
 379
 380 #ifndef CONFIG_CPU_IDLE
 381 static void acpi_processor_idle(void)
 382 {
 383         struct acpi_processor *pr = NULL;
 384         struct acpi_processor_cx *cx = NULL;
 385         struct acpi_processor_cx *next_state = NULL;
 386         int sleep_ticks = 0;
 387         u32 t1, t2 = 0;
 388
 389         /*
 390          * Interrupts must be disabled during bus mastering calculations and
 391          * for C2/C3 transitions.
 392          */
 393         local_irq_disable();
 394
 395         pr = processors[smp_processor_id()];
 396         if (!pr) {
 397                 local_irq_enable();
 398                 return;
 399         }
 400
 401         /*
 402          * Check whether we truly need to go idle, or should
 403          * reschedule:
 404          */
 405         if (unlikely(need_resched())) {
 406                 local_irq_enable();
 407                 return;
 408         }
 409
 410         cx = pr->power.state;
 411         if (!cx || acpi_idle_suspend) {
 412                 if (pm_idle_save)
 413                         pm_idle_save();
 414                 else
 415                         acpi_safe_halt();
 416                 return;
 417         }
 418
 419         /*
 420          * Check BM Activity
 421          * -----------------
 422          * Check for bus mastering activity (if required), record, and check
 423          * for demotion.
 424          */
 425         if (pr->flags.bm_check) {
 426                 u32 bm_status = 0;
 427                 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
 428
 429                 if (diff > 31)
 430                         diff = 31;
 431
 432                 pr->power.bm_activity <<= diff;
 433
 434                 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
 435                 if (bm_status) {
 436                         pr->power.bm_activity |= 0x1;
 437                         acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
 438                 }
 439                 /*
 440                  * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
 441                  * the true state of bus mastering activity; forcing us to
 442                  * manually check the BMIDEA bit of each IDE channel.
 443                  */
 444                 else if (errata.piix4.bmisx) {
 445                         if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
 446                             || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
 447                                 pr->power.bm_activity |= 0x1;
 448                 }
 449
 450                 pr->power.bm_check_timestamp = jiffies;
 451
 452                 /*
 453                  * If bus mastering is or was active this jiffy, demote
 454                  * to avoid a faulty transition.  Note that the processor
 455                  * won't enter a low-power state during this call (to this
 456                  * function) but should upon the next.
 457                  *
 458                  * TBD: A better policy might be to fallback to the demotion
 459                  *      state (use it for this quantum only) istead of
 460                  *      demoting -- and rely on duration as our sole demotion
 461                  *      qualification.  This may, however, introduce DMA
 462                  *      issues (e.g. floppy DMA transfer overrun/underrun).
 463                  */
 464                 if ((pr->power.bm_activity & 0x1) &&
 465                     cx->demotion.threshold.bm) {
 466                         local_irq_enable();
 467                         next_state = cx->demotion.state;
 468                         goto end;
 469                 }
 470         }
 471
 472 #ifdef CONFIG_HOTPLUG_CPU
 473         /*
 474          * Check for P_LVL2_UP flag before entering C2 and above on
 475          * an SMP system. We do it here instead of doing it at _CST/P_LVL
 476          * detection phase, to work cleanly with logical CPU hotplug.
 477          */
 478         if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
 479             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
 480                 cx = &pr->power.states[ACPI_STATE_C1];
 481 #endif
 482
 483         /*
 484          * Sleep:
 485          * ------
 486          * Invoke the current Cx state to put the processor to sleep.
 487          */
 488         if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
 489                 current_thread_info()->status &= ~TS_POLLING;
 490                 /*
 491                  * TS_POLLING-cleared state must be visible before we
 492                  * test NEED_RESCHED:
 493                  */
 494                 smp_mb();
 495                 if (need_resched()) {
 496                         current_thread_info()->status |= TS_POLLING;
 497                         local_irq_enable();
 498                         return;
 499                 }
 500         }
 501
 502         switch (cx->type) {
 503
 504         case ACPI_STATE_C1:
 505                 /*
 506                  * Invoke C1.
 507                  * Use the appropriate idle routine, the one that would
 508                  * be used without acpi C-states.
 509                  */
 510                 if (pm_idle_save)
 511                         pm_idle_save();
 512                 else
 513                         acpi_safe_halt();
 514
 515                 /*
 516                  * TBD: Can't get time duration while in C1, as resumes
 517                  *      go to an ISR rather than here.  Need to instrument
 518                  *      base interrupt handler.
 519                  *
 520                  * Note: the TSC better not stop in C1, sched_clock() will
 521                  *       skew otherwise.
 522                  */
 523                 sleep_ticks = 0xFFFFFFFF;
 524                 break;
 525
 526         case ACPI_STATE_C2:
 527                 /* Get start time (ticks) */
 528                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 529                 /* Tell the scheduler that we are going deep-idle: */
 530                 sched_clock_idle_sleep_event();
 531                 /* Invoke C2 */
 532                 acpi_state_timer_broadcast(pr, cx, 1);
 533                 acpi_cstate_enter(cx);
 534                 /* Get end time (ticks) */
 535                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 536
 537 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
 538                 /* TSC halts in C2, so notify users */
 539                 if (tsc_halts_in_c(ACPI_STATE_C2))
 540                         mark_tsc_unstable("possible TSC halt in C2");
 541 #endif
 542                 /* Compute time (ticks) that we were actually asleep */
 543                 sleep_ticks = ticks_elapsed(t1, t2);
 544
 545                 /* Tell the scheduler how much we idled: */
 546                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
 547
 548                 /* Re-enable interrupts */
 549                 local_irq_enable();
 550                 /* Do not account our idle-switching overhead: */
 551                 sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
 552
 553                 current_thread_info()->status |= TS_POLLING;
 554                 acpi_state_timer_broadcast(pr, cx, 0);
 555                 break;
 556
 557         case ACPI_STATE_C3:
 558                 acpi_unlazy_tlb(smp_processor_id());
 559                 /*
 560                  * Must be done before busmaster disable as we might
 561                  * need to access HPET !
 562                  */
 563                 acpi_state_timer_broadcast(pr, cx, 1);
 564                 /*
 565                  * disable bus master
 566                  * bm_check implies we need ARB_DIS
 567                  * !bm_check implies we need cache flush
 568                  * bm_control implies whether we can do ARB_DIS
 569                  *
 570                  * That leaves a case where bm_check is set and bm_control is
 571                  * not set. In that case we cannot do much, we enter C3
 572                  * without doing anything.
 573                  */
 574                 if (pr->flags.bm_check && pr->flags.bm_control) {
 575                         if (atomic_inc_return(&c3_cpu_count) ==
 576                             num_online_cpus()) {
 577                                 /*
 578                                  * All CPUs are trying to go to C3
 579                                  * Disable bus master arbitration
 580                                  */
 581                                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
 582                         }
 583                 } else if (!pr->flags.bm_check) {
 584                         /* SMP with no shared cache... Invalidate cache  */
 585                         ACPI_FLUSH_CPU_CACHE();
 586                 }
 587
 588                 /* Get start time (ticks) */
 589                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 590                 /* Invoke C3 */
 591                 /* Tell the scheduler that we are going deep-idle: */
 592                 sched_clock_idle_sleep_event();
 593                 acpi_cstate_enter(cx);
 594                 /* Get end time (ticks) */
 595                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
 596                 if (pr->flags.bm_check && pr->flags.bm_control) {
 597                         /* Enable bus master arbitration */
 598                         atomic_dec(&c3_cpu_count);
 599                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
 600                 }
 601
 602 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
 603                 /* TSC halts in C3, so notify users */
 604                 if (tsc_halts_in_c(ACPI_STATE_C3))
 605                         mark_tsc_unstable("TSC halts in C3");
 606 #endif
 607                 /* Compute time (ticks) that we were actually asleep */
 608                 sleep_ticks = ticks_elapsed(t1, t2);
 609                 /* Tell the scheduler how much we idled: */
 610                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
 611
 612                 /* Re-enable interrupts */
 613                 local_irq_enable();
 614                 /* Do not account our idle-switching overhead: */
 615                 sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
 616
 617                 current_thread_info()->status |= TS_POLLING;
 618                 acpi_state_timer_broadcast(pr, cx, 0);
 619                 break;
 620
 621         default:
 622                 local_irq_enable();
 623                 return;
 624         }
 625         cx->usage++;
 626         if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
 627                 cx->time += sleep_ticks;
 628
 629         next_state = pr->power.state;
 630
 631 #ifdef CONFIG_HOTPLUG_CPU
 632         /* Don't do promotion/demotion */
 633         if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
 634             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
 635                 next_state = cx;
 636                 goto end;
 637         }
 638 #endif
 639
 640         /*
 641          * Promotion?
 642          * ----------
 643          * Track the number of longs (time asleep is greater than threshold)
 644          * and promote when the count threshold is reached.  Note that bus
 645          * mastering activity may prevent promotions.
 646          * Do not promote above max_cstate.
 647          */
 648         if (cx->promotion.state &&
 649             ((cx->promotion.state - pr->power.states) <= max_cstate)) {
 650                 if (sleep_ticks > cx->promotion.threshold.ticks &&
 651                   cx->promotion.state->latency <=
 652                                 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
 653                         cx->promotion.count++;
 654                         cx->demotion.count = 0;
 655                         if (cx->promotion.count >=
 656                             cx->promotion.threshold.count) {
 657                                 if (pr->flags.bm_check) {
 658                                         if (!
 659                                             (pr->power.bm_activity & cx->
 660                                              promotion.threshold.bm)) {
 661                                                 next_state =
 662                                                     cx->promotion.state;
 663                                                 goto end;
 664                                         }
 665                                 } else {
 666                                         next_state = cx->promotion.state;
 667                                         goto end;
 668                                 }
 669                         }
 670                 }
 671         }
 672
 673         /*
 674          * Demotion?
 675          * ---------
 676          * Track the number of shorts (time asleep is less than time threshold)
 677          * and demote when the usage threshold is reached.
 678          */
 679         if (cx->demotion.state) {
 680                 if (sleep_ticks < cx->demotion.threshold.ticks) {
 681                         cx->demotion.count++;
 682                         cx->promotion.count = 0;
 683                         if (cx->demotion.count >= cx->demotion.threshold.count) {
 684                                 next_state = cx->demotion.state;
 685                                 goto end;
 686                         }
 687                 }
 688         }
 689
 690       end:
 691         /*
 692          * Demote if current state exceeds max_cstate
 693          * or if the latency of the current state is unacceptable
 694          */
 695         if ((pr->power.state - pr->power.states) > max_cstate ||
 696                 pr->power.state->latency >
 697                                 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
 698                 if (cx->demotion.state)
 699                         next_state = cx->demotion.state;
 700         }
 701
 702         /*
 703          * New Cx State?
 704          * -------------
 705          * If we're going to start using a new Cx state we must clean up
 706          * from the previous and prepare to use the new.
 707          */
 708         if (next_state != pr->power.state)
 709                 acpi_processor_power_activate(pr, next_state);
 710 }
 711
 712 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
 713 {
 714         unsigned int i;
 715         unsigned int state_is_set = 0;
 716         struct acpi_processor_cx *lower = NULL;
 717         struct acpi_processor_cx *higher = NULL;
 718         struct acpi_processor_cx *cx;
 719
 720
 721         if (!pr)
 722                 return -EINVAL;
 723
 724         /*
 725          * This function sets the default Cx state policy (OS idle handler).
 726          * Our scheme is to promote quickly to C2 but more conservatively
 727          * to C3.  We're favoring C2  for its characteristics of low latency
 728          * (quick response), good power savings, and ability to allow bus
 729          * mastering activity.  Note that the Cx state policy is completely
 730          * customizable and can be altered dynamically.
 731          */
 732
 733         /* startup state */
 734         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
 735                 cx = &pr->power.states[i];
 736                 if (!cx->valid)
 737                         continue;
 738
 739                 if (!state_is_set)
 740                         pr->power.state = cx;
 741                 state_is_set++;
 742                 break;
 743         }
 744
 745         if (!state_is_set)
 746                 return -ENODEV;
 747
 748         /* demotion */
 749         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
 750                 cx = &pr->power.states[i];
 751                 if (!cx->valid)
 752                         continue;
 753
 754                 if (lower) {
 755                         cx->demotion.state = lower;
 756                         cx->demotion.threshold.ticks = cx->latency_ticks;
 757                         cx->demotion.threshold.count = 1;
 758                         if (cx->type == ACPI_STATE_C3)
 759                                 cx->demotion.threshold.bm = bm_history;
 760                 }
 761
 762                 lower = cx;
 763         }
 764
 765         /* promotion */
 766         for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
 767                 cx = &pr->power.states[i];
 768                 if (!cx->valid)
 769                         continue;
 770
 771                 if (higher) {
 772                         cx->promotion.state = higher;
 773                         cx->promotion.threshold.ticks = cx->latency_ticks;
 774                         if (cx->type >= ACPI_STATE_C2)
 775                                 cx->promotion.threshold.count = 4;
 776                         else
 777                                 cx->promotion.threshold.count = 10;
 778                         if (higher->type == ACPI_STATE_C3)
 779                                 cx->promotion.threshold.bm = bm_history;
 780                 }
 781
 782                 higher = cx;
 783         }
 784
 785         return 0;
 786 }
 787 #endif /* !CONFIG_CPU_IDLE */
 788
 789 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
 790 {
 791
 792         if (!pr)
 793                 return -EINVAL;
 794
 795         if (!pr->pblk)
 796                 return -ENODEV;
 797
 798         /* if info is obtained from pblk/fadt, type equals state */
 799         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
 800         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
 801
 802 #ifndef CONFIG_HOTPLUG_CPU
 803         /*
 804          * Check for P_LVL2_UP flag before entering C2 and above on
 805          * an SMP system.
 806          */
 807         if ((num_online_cpus() > 1) &&
 808             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
 809                 return -ENODEV;
 810 #endif
 811
 812         /* determine C2 and C3 address from pblk */
 813         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
 814         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
 815
 816         /* determine latencies from FADT */
 817         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
 818         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
 819
 820         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 821                           "lvl2[0x%08x] lvl3[0x%08x]\n",
 822                           pr->power.states[ACPI_STATE_C2].address,
 823                           pr->power.states[ACPI_STATE_C3].address));
 824
 825         return 0;
 826 }
 827
 828 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
 829 {
 830         if (!pr->power.states[ACPI_STATE_C1].valid) {
 831                 /* set the first C-State to C1 */
 832                 /* all processors need to support C1 */
 833                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
 834                 pr->power.states[ACPI_STATE_C1].valid = 1;
 835         }
 836         /* the C0 state only exists as a filler in our array */
 837         pr->power.states[ACPI_STATE_C0].valid = 1;
 838         return 0;
 839 }
 840
 841 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
 842 {
 843         acpi_status status = 0;
 844         acpi_integer count;
 845         int current_count;
 846         int i;
 847         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
 848         union acpi_object *cst;
 849
 850
 851         if (nocst)
 852                 return -ENODEV;
 853
 854         current_count = 0;
 855
 856         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
 857         if (ACPI_FAILURE(status)) {
 858                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
 859                 return -ENODEV;
 860         }
 861
 862         cst = buffer.pointer;
 863
 864         /* There must be at least 2 elements */
 865         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
 866                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
 867                 status = -EFAULT;
 868                 goto end;
 869         }
 870
 871         count = cst->package.elements[0].integer.value;
 872
 873         /* Validate number of power states. */
 874         if (count < 1 || count != cst->package.count - 1) {
 875                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
 876                 status = -EFAULT;
 877                 goto end;
 878         }
 879
 880         /* Tell driver that at least _CST is supported. */
 881         pr->flags.has_cst = 1;
 882
 883         for (i = 1; i <= count; i++) {
 884                 union acpi_object *element;
 885                 union acpi_object *obj;
 886                 struct acpi_power_register *reg;
 887                 struct acpi_processor_cx cx;
 888
 889                 memset(&cx, 0, sizeof(cx));
 890
 891                 element = &(cst->package.elements[i]);
 892                 if (element->type != ACPI_TYPE_PACKAGE)
 893                         continue;
 894
 895                 if (element->package.count != 4)
 896                         continue;
 897
 898                 obj = &(element->package.elements[0]);
 899
 900                 if (obj->type != ACPI_TYPE_BUFFER)
 901                         continue;
 902
 903                 reg = (struct acpi_power_register *)obj->buffer.pointer;
 904
 905                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
 906                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
 907                         continue;
 908
 909                 /* There should be an easy way to extract an integer... */
 910                 obj = &(element->package.elements[1]);
 911                 if (obj->type != ACPI_TYPE_INTEGER)
 912                         continue;
 913
 914                 cx.type = obj->integer.value;
 915                 /*
 916                  * Some buggy BIOSes won't list C1 in _CST -
 917                  * Let acpi_processor_get_power_info_default() handle them later
 918                  */
 919                 if (i == 1 && cx.type != ACPI_STATE_C1)
 920                         current_count++;
 921
 922                 cx.address = reg->address;
 923                 cx.index = current_count + 1;
 924
 925                 cx.space_id = ACPI_CSTATE_SYSTEMIO;
 926                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
 927                         if (acpi_processor_ffh_cstate_probe
 928                                         (pr->id, &cx, reg) == 0) {
 929                                 cx.space_id = ACPI_CSTATE_FFH;
 930                         } else if (cx.type != ACPI_STATE_C1) {
 931                                 /*
 932                                  * C1 is a special case where FIXED_HARDWARE
 933                                  * can be handled in non-MWAIT way as well.
 934                                  * In that case, save this _CST entry info.
 935                                  * That is, we retain space_id of SYSTEM_IO for
 936                                  * halt based C1.
 937                                  * Otherwise, ignore this info and continue.
 938                                  */
 939                                 continue;
 940                         }
 941                 }
 942
 943                 obj = &(element->package.elements[2]);
 944                 if (obj->type != ACPI_TYPE_INTEGER)
 945                         continue;
 946
 947                 cx.latency = obj->integer.value;
 948
 949                 obj = &(element->package.elements[3]);
 950                 if (obj->type != ACPI_TYPE_INTEGER)
 951                         continue;
 952
 953                 cx.power = obj->integer.value;
 954
 955                 current_count++;
 956                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
 957
 958                 /*
 959                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
 960                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
 961                  */
 962                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
 963                         printk(KERN_WARNING
 964                                "Limiting number of power states to max (%d)\n",
 965                                ACPI_PROCESSOR_MAX_POWER);
 966                         printk(KERN_WARNING
 967                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
 968                         break;
 969                 }
 970         }
 971
 972         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
 973                           current_count));
 974
 975         /* Validate number of power states discovered */
 976         if (current_count < 2)
 977                 status = -EFAULT;
 978
 979       end:
 980         kfree(buffer.pointer);
 981
 982         return status;
 983 }
 984
 985 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
 986 {
 987
 988         if (!cx->address)
 989                 return;
 990
 991         /*
 992          * C2 latency must be less than or equal to 100
 993          * microseconds.
 994          */
 995         else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
 996                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 997                                   "latency too large [%d]\n", cx->latency));
 998                 return;
 999         }
1000
1001         /*
1002          * Otherwise we've met all of our C2 requirements.
1003          * Normalize the C2 latency to expidite policy
1004          */
1005         cx->valid = 1;
1006
1007 #ifndef CONFIG_CPU_IDLE
1008         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1009 #else
1010         cx->latency_ticks = cx->latency;
1011 #endif
1012
1013         return;
1014 }
1015
1016 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
1017                                            struct acpi_processor_cx *cx)
1018 {
1019         static int bm_check_flag;
1020
1021
1022         if (!cx->address)
1023                 return;
1024
1025         /*
1026          * C3 latency must be less than or equal to 1000
1027          * microseconds.
1028          */
1029         else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
1030                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1031                                   "latency too large [%d]\n", cx->latency));
1032                 return;
1033         }
1034
1035         /*
1036          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
1037          * DMA transfers are used by any ISA device to avoid livelock.
1038          * Note that we could disable Type-F DMA (as recommended by
1039          * the erratum), but this is known to disrupt certain ISA
1040          * devices thus we take the conservative approach.
1041          */
1042         else if (errata.piix4.fdma) {
1043                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1044                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
1045                 return;
1046         }
1047
1048         /* All the logic here assumes flags.bm_check is same across all CPUs */
1049         if (!bm_check_flag) {
1050                 /* Determine whether bm_check is needed based on CPU  */
1051                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
1052                 bm_check_flag = pr->flags.bm_check;
1053         } else {
1054                 pr->flags.bm_check = bm_check_flag;
1055         }
1056
1057         if (pr->flags.bm_check) {
1058                 if (!pr->flags.bm_control) {
1059                         if (pr->flags.has_cst != 1) {
1060                                 /* bus mastering control is necessary */
1061                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1062                                         "C3 support requires BM control\n"));
1063                                 return;
1064                         } else {
1065                                 /* Here we enter C3 without bus mastering */
1066                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1067                                         "C3 support without BM control\n"));
1068                         }
1069                 }
1070         } else {
1071                 /*
1072                  * WBINVD should be set in fadt, for C3 state to be
1073                  * supported on when bm_check is not required.
1074                  */
1075                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
1076                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1077                                           "Cache invalidation should work properly"
1078                                           " for C3 to be enabled on SMP systems\n"));
1079                         return;
1080                 }
1081                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1082         }
1083
1084         /*
1085          * Otherwise we've met all of our C3 requirements.
1086          * Normalize the C3 latency to expidite policy.  Enable
1087          * checking of bus mastering status (bm_check) so we can
1088          * use this in our C3 policy
1089          */
1090         cx->valid = 1;
1091
1092 #ifndef CONFIG_CPU_IDLE
1093         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1094 #else
1095         cx->latency_ticks = cx->latency;
1096 #endif
1097
1098         return;
1099 }
1100
1101 static int acpi_processor_power_verify(struct acpi_processor *pr)
1102 {
1103         unsigned int i;
1104         unsigned int working = 0;
1105
1106         pr->power.timer_broadcast_on_state = INT_MAX;
1107
1108         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1109                 struct acpi_processor_cx *cx = &pr->power.states[i];
1110
1111                 switch (cx->type) {
1112                 case ACPI_STATE_C1:
1113                         cx->valid = 1;
1114                         break;
1115
1116                 case ACPI_STATE_C2:
1117                         acpi_processor_power_verify_c2(cx);
1118                         if (cx->valid)
1119                                 acpi_timer_check_state(i, pr, cx);
1120                         break;
1121
1122                 case ACPI_STATE_C3:
1123                         acpi_processor_power_verify_c3(pr, cx);
1124                         if (cx->valid)
1125                                 acpi_timer_check_state(i, pr, cx);
1126                         break;
1127                 }
1128
1129                 if (cx->valid)
1130                         working++;
1131         }
1132
1133         acpi_propagate_timer_broadcast(pr);
1134
1135         return (working);
1136 }
1137
1138 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1139 {
1140         unsigned int i;
1141         int result;
1142
1143
1144         /* NOTE: the idle thread may not be running while calling
1145          * this function */
1146
1147         /* Zero initialize all the C-states info. */
1148         memset(pr->power.states, 0, sizeof(pr->power.states));
1149
1150         result = acpi_processor_get_power_info_cst(pr);
1151         if (result == -ENODEV)
1152                 result = acpi_processor_get_power_info_fadt(pr);
1153
1154         if (result)
1155                 return result;
1156
1157         acpi_processor_get_power_info_default(pr);
1158
1159         pr->power.count = acpi_processor_power_verify(pr);
1160
1161 #ifndef CONFIG_CPU_IDLE
1162         /*
1163          * Set Default Policy
1164          * ------------------
1165          * Now that we know which states are supported, set the default
1166          * policy.  Note that this policy can be changed dynamically
1167          * (e.g. encourage deeper sleeps to conserve battery life when
1168          * not on AC).
1169          */
1170         result = acpi_processor_set_power_policy(pr);
1171         if (result)
1172                 return result;
1173 #endif
1174
1175         /*
1176          * if one state of type C2 or C3 is available, mark this
1177          * CPU as being "idle manageable"
1178          */
1179         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1180                 if (pr->power.states[i].valid) {
1181                         pr->power.count = i;
1182                         if (pr->power.states[i].type >= ACPI_STATE_C2)
1183                                 pr->flags.power = 1;
1184                 }
1185         }
1186
1187         return 0;
1188 }
1189
1190 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1191 {
1192         struct acpi_processor *pr = seq->private;
1193         unsigned int i;
1194
1195
1196         if (!pr)
1197                 goto end;
1198
1199         seq_printf(seq, "active state:            C%zd\n"
1200                    "max_cstate:              C%d\n"
1201                    "bus master activity:     %08x\n"
1202                    "maximum allowed latency: %d usec\n",
1203                    pr->power.state ? pr->power.state - pr->power.states : 0,
1204                    max_cstate, (unsigned)pr->power.bm_activity,
1205                    pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
1206
1207         seq_puts(seq, "states:\n");
1208
1209         for (i = 1; i <= pr->power.count; i++) {
1210                 seq_printf(seq, "   %cC%d:                  ",
1211                            (&pr->power.states[i] ==
1212                             pr->power.state ? '*' : ' '), i);
1213
1214                 if (!pr->power.states[i].valid) {
1215                         seq_puts(seq, "<not supported>\n");
1216                         continue;
1217                 }
1218
1219                 switch (pr->power.states[i].type) {
1220                 case ACPI_STATE_C1:
1221                         seq_printf(seq, "type[C1] ");
1222                         break;
1223                 case ACPI_STATE_C2:
1224                         seq_printf(seq, "type[C2] ");
1225                         break;
1226                 case ACPI_STATE_C3:
1227                         seq_printf(seq, "type[C3] ");
1228                         break;
1229                 default:
1230                         seq_printf(seq, "type[--] ");
1231                         break;
1232                 }
1233
1234                 if (pr->power.states[i].promotion.state)
1235                         seq_printf(seq, "promotion[C%zd] ",
1236                                    (pr->power.states[i].promotion.state -
1237                                     pr->power.states));
1238                 else
1239                         seq_puts(seq, "promotion[--] ");
1240
1241                 if (pr->power.states[i].demotion.state)
1242                         seq_printf(seq, "demotion[C%zd] ",
1243                                    (pr->power.states[i].demotion.state -
1244                                     pr->power.states));
1245                 else
1246                         seq_puts(seq, "demotion[--] ");
1247
1248                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1249                            pr->power.states[i].latency,
1250                            pr->power.states[i].usage,
1251                            (unsigned long long)pr->power.states[i].time);
1252         }
1253
1254       end:
1255         return 0;
1256 }
1257
1258 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1259 {
1260         return single_open(file, acpi_processor_power_seq_show,
1261                            PDE(inode)->data);
1262 }
1263
1264 static const struct file_operations acpi_processor_power_fops = {
1265         .open = acpi_processor_power_open_fs,
1266         .read = seq_read,
1267         .llseek = seq_lseek,
1268         .release = single_release,
1269 };
1270
1271 #ifndef CONFIG_CPU_IDLE
1272
1273 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1274 {
1275         int result = 0;
1276
1277
1278         if (!pr)
1279                 return -EINVAL;
1280
1281         if (nocst) {
1282                 return -ENODEV;
1283         }
1284
1285         if (!pr->flags.power_setup_done)
1286                 return -ENODEV;
1287
1288         /* Fall back to the default idle loop */
1289         pm_idle = pm_idle_save;
1290         synchronize_sched();    /* Relies on interrupts forcing exit from idle. */
1291
1292         pr->flags.power = 0;
1293         result = acpi_processor_get_power_info(pr);
1294         if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1295                 pm_idle = acpi_processor_idle;
1296
1297         return result;
1298 }
1299
1300 #ifdef CONFIG_SMP
1301 static void smp_callback(void *v)
1302 {
1303         /* we already woke the CPU up, nothing more to do */
1304 }
1305
1306 /*
1307  * This function gets called when a part of the kernel has a new latency
1308  * requirement.  This means we need to get all processors out of their C-state,
1309  * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1310  * wakes them all right up.
1311  */
1312 static int acpi_processor_latency_notify(struct notifier_block *b,
1313                 unsigned long l, void *v)
1314 {
1315         smp_call_function(smp_callback, NULL, 0, 1);
1316         return NOTIFY_OK;
1317 }
1318
1319 static struct notifier_block acpi_processor_latency_notifier = {
1320         .notifier_call = acpi_processor_latency_notify,
1321 };
1322
1323 #endif
1324
1325 #else /* CONFIG_CPU_IDLE */
1326
1327 /**
1328  * acpi_idle_bm_check - checks if bus master activity was detected
1329  */
1330 static int acpi_idle_bm_check(void)
1331 {
1332         u32 bm_status = 0;
1333
1334         acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
1335         if (bm_status)
1336                 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
1337         /*
1338          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
1339          * the true state of bus mastering activity; forcing us to
1340          * manually check the BMIDEA bit of each IDE channel.
1341          */
1342         else if (errata.piix4.bmisx) {
1343                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
1344                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
1345                         bm_status = 1;
1346         }
1347         return bm_status;
1348 }
1349
1350 /**
1351  * acpi_idle_update_bm_rld - updates the BM_RLD bit depending on target state
1352  * @pr: the processor
1353  * @target: the new target state
1354  */
1355 static inline void acpi_idle_update_bm_rld(struct acpi_processor *pr,
1356                                            struct acpi_processor_cx *target)
1357 {
1358         if (pr->flags.bm_rld_set && target->type != ACPI_STATE_C3) {
1359                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1360                 pr->flags.bm_rld_set = 0;
1361         }
1362
1363         if (!pr->flags.bm_rld_set && target->type == ACPI_STATE_C3) {
1364                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1365                 pr->flags.bm_rld_set = 1;
1366         }
1367 }
1368
1369 /**
1370  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
1371  * @cx: cstate data
1372  */
1373 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
1374 {
1375         if (cx->space_id == ACPI_CSTATE_FFH) {
1376                 /* Call into architectural FFH based C-state */
1377                 acpi_processor_ffh_cstate_enter(cx);
1378         } else {
1379                 int unused;
1380                 /* IO port based C-state */
1381                 inb(cx->address);
1382                 /* Dummy wait op - must do something useless after P_LVL2 read
1383                    because chipsets cannot guarantee that STPCLK# signal
1384                    gets asserted in time to freeze execution properly. */
1385                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
1386         }
1387 }
1388
1389 /**
1390  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
1391  * @dev: the target CPU
1392  * @state: the state data
1393  *
1394  * This is equivalent to the HALT instruction.
1395  */
1396 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
1397                               struct cpuidle_state *state)
1398 {
1399         struct acpi_processor *pr;
1400         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1401         pr = processors[smp_processor_id()];
1402
1403         if (unlikely(!pr))
1404                 return 0;
1405
1406         if (pr->flags.bm_check)
1407                 acpi_idle_update_bm_rld(pr, cx);
1408
1409         acpi_safe_halt();
1410
1411         cx->usage++;
1412
1413         return 0;
1414 }
1415
1416 /**
1417  * acpi_idle_enter_simple - enters an ACPI state without BM handling
1418  * @dev: the target CPU
1419  * @state: the state data
1420  */
1421 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
1422                                   struct cpuidle_state *state)
1423 {
1424         struct acpi_processor *pr;
1425         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1426         u32 t1, t2;
1427         int sleep_ticks = 0;
1428
1429         pr = processors[smp_processor_id()];
1430
1431         if (unlikely(!pr))
1432                 return 0;
1433
1434         if (acpi_idle_suspend)
1435                 return(acpi_idle_enter_c1(dev, state));
1436
1437         local_irq_disable();
1438         current_thread_info()->status &= ~TS_POLLING;
1439         /*
1440          * TS_POLLING-cleared state must be visible before we test
1441          * NEED_RESCHED:
1442          */
1443         smp_mb();
1444
1445         if (unlikely(need_resched())) {
1446                 current_thread_info()->status |= TS_POLLING;
1447                 local_irq_enable();
1448                 return 0;
1449         }
1450
1451         acpi_unlazy_tlb(smp_processor_id());
1452         /*
1453          * Must be done before busmaster disable as we might need to
1454          * access HPET !
1455          */
1456         acpi_state_timer_broadcast(pr, cx, 1);
1457
1458         if (pr->flags.bm_check)
1459                 acpi_idle_update_bm_rld(pr, cx);
1460
1461         if (cx->type == ACPI_STATE_C3)
1462                 ACPI_FLUSH_CPU_CACHE();
1463
1464         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1465         /* Tell the scheduler that we are going deep-idle: */
1466         sched_clock_idle_sleep_event();
1467         acpi_idle_do_entry(cx);
1468         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1469
1470 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
1471         /* TSC could halt in idle, so notify users */
1472         if (tsc_halts_in_c(cx->type))
1473                 mark_tsc_unstable("TSC halts in idle");;
1474 #endif
1475         sleep_ticks = ticks_elapsed(t1, t2);
1476
1477         /* Tell the scheduler how much we idled: */
1478         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1479
1480         local_irq_enable();
1481         current_thread_info()->status |= TS_POLLING;
1482
1483         cx->usage++;
1484
1485         acpi_state_timer_broadcast(pr, cx, 0);
1486         cx->time += sleep_ticks;
1487         return ticks_elapsed_in_us(t1, t2);
1488 }
1489
1490 static int c3_cpu_count;
1491 static DEFINE_SPINLOCK(c3_lock);
1492
1493 /**
1494  * acpi_idle_enter_bm - enters C3 with proper BM handling
1495  * @dev: the target CPU
1496  * @state: the state data
1497  *
1498  * If BM is detected, the deepest non-C3 idle state is entered instead.
1499  */
1500 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
1501                               struct cpuidle_state *state)
1502 {
1503         struct acpi_processor *pr;
1504         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1505         u32 t1, t2;
1506         int sleep_ticks = 0;
1507
1508         pr = processors[smp_processor_id()];
1509
1510         if (unlikely(!pr))
1511                 return 0;
1512
1513         if (acpi_idle_suspend)
1514                 return(acpi_idle_enter_c1(dev, state));
1515
1516         if (acpi_idle_bm_check()) {
1517                 if (dev->safe_state) {
1518                         return dev->safe_state->enter(dev, dev->safe_state);
1519                 } else {
1520                         acpi_safe_halt();
1521                         return 0;
1522                 }
1523         }
1524
1525         local_irq_disable();
1526         current_thread_info()->status &= ~TS_POLLING;
1527         /*
1528          * TS_POLLING-cleared state must be visible before we test
1529          * NEED_RESCHED:
1530          */
1531         smp_mb();
1532
1533         if (unlikely(need_resched())) {
1534                 current_thread_info()->status |= TS_POLLING;
1535                 local_irq_enable();
1536                 return 0;
1537         }
1538
1539         /* Tell the scheduler that we are going deep-idle: */
1540         sched_clock_idle_sleep_event();
1541         /*
1542          * Must be done before busmaster disable as we might need to
1543          * access HPET !
1544          */
1545         acpi_state_timer_broadcast(pr, cx, 1);
1546
1547         acpi_idle_update_bm_rld(pr, cx);
1548
1549         /*
1550          * disable bus master
1551          * bm_check implies we need ARB_DIS
1552          * !bm_check implies we need cache flush
1553          * bm_control implies whether we can do ARB_DIS
1554          *
1555          * That leaves a case where bm_check is set and bm_control is
1556          * not set. In that case we cannot do much, we enter C3
1557          * without doing anything.
1558          */
1559         if (pr->flags.bm_check && pr->flags.bm_control) {
1560                 spin_lock(&c3_lock);
1561                 c3_cpu_count++;
1562                 /* Disable bus master arbitration when all CPUs are in C3 */
1563                 if (c3_cpu_count == num_online_cpus())
1564                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
1565                 spin_unlock(&c3_lock);
1566         } else if (!pr->flags.bm_check) {
1567                 ACPI_FLUSH_CPU_CACHE();
1568         }
1569
1570         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1571         acpi_idle_do_entry(cx);
1572         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1573
1574         /* Re-enable bus master arbitration */
1575         if (pr->flags.bm_check && pr->flags.bm_control) {
1576                 spin_lock(&c3_lock);
1577                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
1578                 c3_cpu_count--;
1579                 spin_unlock(&c3_lock);
1580         }
1581
1582 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
1583         /* TSC could halt in idle, so notify users */
1584         if (tsc_halts_in_c(ACPI_STATE_C3))
1585                 mark_tsc_unstable("TSC halts in idle");
1586 #endif
1587         sleep_ticks = ticks_elapsed(t1, t2);
1588         /* Tell the scheduler how much we idled: */
1589         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1590
1591         local_irq_enable();
1592         current_thread_info()->status |= TS_POLLING;
1593
1594         cx->usage++;
1595
1596         acpi_state_timer_broadcast(pr, cx, 0);
1597         cx->time += sleep_ticks;
1598         return ticks_elapsed_in_us(t1, t2);
1599 }
1600
1601 struct cpuidle_driver acpi_idle_driver = {
1602         .name =         "acpi_idle",
1603         .owner =        THIS_MODULE,
1604 };
1605
1606 /**
1607  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1608  * @pr: the ACPI processor
1609  */
1610 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1611 {
1612         int i, count = 0;
1613         struct acpi_processor_cx *cx;
1614         struct cpuidle_state *state;
1615         struct cpuidle_device *dev = &pr->power.dev;
1616
1617         if (!pr->flags.power_setup_done)
1618                 return -EINVAL;
1619
1620         if (pr->flags.power == 0) {
1621                 return -EINVAL;
1622         }
1623
1624         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1625                 cx = &pr->power.states[i];
1626                 state = &dev->states[count];
1627
1628                 if (!cx->valid)
1629                         continue;
1630
1631 #ifdef CONFIG_HOTPLUG_CPU
1632                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1633                     !pr->flags.has_cst &&
1634                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1635                         continue;
1636 #endif
1637                 cpuidle_set_statedata(state, cx);
1638
1639                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1640                 state->exit_latency = cx->latency;
1641                 state->target_residency = cx->latency * 6;
1642                 state->power_usage = cx->power;
1643
1644                 state->flags = 0;
1645                 switch (cx->type) {
1646                         case ACPI_STATE_C1:
1647                         state->flags |= CPUIDLE_FLAG_SHALLOW;
1648                         state->enter = acpi_idle_enter_c1;
1649                         dev->safe_state = state;
1650                         break;
1651
1652                         case ACPI_STATE_C2:
1653                         state->flags |= CPUIDLE_FLAG_BALANCED;
1654                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1655                         state->enter = acpi_idle_enter_simple;
1656                         dev->safe_state = state;
1657                         break;
1658
1659                         case ACPI_STATE_C3:
1660                         state->flags |= CPUIDLE_FLAG_DEEP;
1661                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1662                         state->flags |= CPUIDLE_FLAG_CHECK_BM;
1663                         state->enter = pr->flags.bm_check ?
1664                                         acpi_idle_enter_bm :
1665                                         acpi_idle_enter_simple;
1666                         break;
1667                 }
1668
1669                 count++;
1670         }
1671
1672         dev->state_count = count;
1673
1674         if (!count)
1675                 return -EINVAL;
1676
1677         return 0;
1678 }
1679
1680 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1681 {
1682         int ret;
1683
1684         if (!pr)
1685                 return -EINVAL;
1686
1687         if (nocst) {
1688                 return -ENODEV;
1689         }
1690
1691         if (!pr->flags.power_setup_done)
1692                 return -ENODEV;
1693
1694         cpuidle_pause_and_lock();
1695         cpuidle_disable_device(&pr->power.dev);
1696         acpi_processor_get_power_info(pr);
1697         acpi_processor_setup_cpuidle(pr);
1698         ret = cpuidle_enable_device(&pr->power.dev);
1699         cpuidle_resume_and_unlock();
1700
1701         return ret;
1702 }
1703
1704 #endif /* CONFIG_CPU_IDLE */
1705
1706 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1707                               struct acpi_device *device)
1708 {
1709         acpi_status status = 0;
1710         static int first_run;
1711         struct proc_dir_entry *entry = NULL;
1712         unsigned int i;
1713
1714
1715         if (!first_run) {
1716                 dmi_check_system(processor_power_dmi_table);
1717                 max_cstate = acpi_processor_cstate_check(max_cstate);
1718                 if (max_cstate < ACPI_C_STATES_MAX)
1719                         printk(KERN_NOTICE
1720                                "ACPI: processor limited to max C-state %d\n",
1721                                max_cstate);
1722                 first_run++;
1723 #if !defined(CONFIG_CPU_IDLE) && defined(CONFIG_SMP)
1724                 pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY,
1725                                 &acpi_processor_latency_notifier);
1726 #endif
1727         }
1728
1729         if (!pr)
1730                 return -EINVAL;
1731
1732         if (acpi_gbl_FADT.cst_control && !nocst) {
1733                 status =
1734                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1735                 if (ACPI_FAILURE(status)) {
1736                         ACPI_EXCEPTION((AE_INFO, status,
1737                                         "Notifying BIOS of _CST ability failed"));
1738                 }
1739         }
1740
1741         acpi_processor_get_power_info(pr);
1742         pr->flags.power_setup_done = 1;
1743
1744         /*
1745          * Install the idle handler if processor power management is supported.
1746          * Note that we use previously set idle handler will be used on
1747          * platforms that only support C1.
1748          */
1749         if ((pr->flags.power) && (!boot_option_idle_override)) {
1750 #ifdef CONFIG_CPU_IDLE
1751                 acpi_processor_setup_cpuidle(pr);
1752                 pr->power.dev.cpu = pr->id;
1753                 if (cpuidle_register_device(&pr->power.dev))
1754                         return -EIO;
1755 #endif
1756
1757                 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1758                 for (i = 1; i <= pr->power.count; i++)
1759                         if (pr->power.states[i].valid)
1760                                 printk(" C%d[C%d]", i,
1761                                        pr->power.states[i].type);
1762                 printk(")\n");
1763
1764 #ifndef CONFIG_CPU_IDLE
1765                 if (pr->id == 0) {
1766                         pm_idle_save = pm_idle;
1767                         pm_idle = acpi_processor_idle;
1768                 }
1769 #endif
1770         }
1771
1772         /* 'power' [R] */
1773         entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1774                                   S_IRUGO, acpi_device_dir(device));
1775         if (!entry)
1776                 return -EIO;
1777         else {
1778                 entry->proc_fops = &acpi_processor_power_fops;
1779                 entry->data = acpi_driver_data(device);
1780                 entry->owner = THIS_MODULE;
1781         }
1782
1783         return 0;
1784 }
1785
1786 int acpi_processor_power_exit(struct acpi_processor *pr,
1787                               struct acpi_device *device)
1788 {
1789 #ifdef CONFIG_CPU_IDLE
1790         if ((pr->flags.power) && (!boot_option_idle_override))
1791                 cpuidle_unregister_device(&pr->power.dev);
1792 #endif
1793         pr->flags.power_setup_done = 0;
1794
1795         if (acpi_device_dir(device))
1796                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1797                                   acpi_device_dir(device));
1798
1799 #ifndef CONFIG_CPU_IDLE
1800
1801         /* Unregister the idle handler when processor #0 is removed. */
1802         if (pr->id == 0) {
1803                 pm_idle = pm_idle_save;
1804
1805                 /*
1806                  * We are about to unload the current idle thread pm callback
1807                  * (pm_idle), Wait for all processors to update cached/local
1808                  * copies of pm_idle before proceeding.
1809                  */
1810                 cpu_idle_wait();
1811 #ifdef CONFIG_SMP
1812                 pm_qos_remove_notifier(PM_QOS_CPU_DMA_LATENCY,
1813                                 &acpi_processor_latency_notifier);
1814 #endif
1815         }
1816 #endif
1817
1818         return 0;
1819 }