xtensa: convert to asm-generic/hardirq.h
[linux-2.6.git] / arch / xtensa / kernel / irq.c
1 /*
2  * linux/arch/xtensa/kernel/irq.c
3  *
4  * Xtensa built-in interrupt controller and some generic functions copied
5  * from i386.
6  *
7  * Copyright (C) 2002 - 2006 Tensilica, Inc.
8  * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
9  *
10  *
11  * Chris Zankel <chris@zankel.net>
12  * Kevin Chea
13  *
14  */
15
16 #include <linux/module.h>
17 #include <linux/seq_file.h>
18 #include <linux/interrupt.h>
19 #include <linux/irq.h>
20 #include <linux/kernel_stat.h>
21
22 #include <asm/uaccess.h>
23 #include <asm/platform.h>
24
25 static unsigned int cached_irq_mask;
26
27 atomic_t irq_err_count;
28
29 /*
30  * do_IRQ handles all normal device IRQ's (the special
31  * SMP cross-CPU interrupts have their own specific
32  * handlers).
33  */
34
35 asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
36 {
37         struct pt_regs *old_regs = set_irq_regs(regs);
38         struct irq_desc *desc = irq_desc + irq;
39
40         if (irq >= NR_IRQS) {
41                 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
42                                 __func__, irq);
43         }
44
45         irq_enter();
46
47 #ifdef CONFIG_DEBUG_STACKOVERFLOW
48         /* Debugging check for stack overflow: is there less than 1KB free? */
49         {
50                 unsigned long sp;
51
52                 __asm__ __volatile__ ("mov %0, a1\n" : "=a" (sp));
53                 sp &= THREAD_SIZE - 1;
54
55                 if (unlikely(sp < (sizeof(thread_info) + 1024)))
56                         printk("Stack overflow in do_IRQ: %ld\n",
57                                sp - sizeof(struct thread_info));
58         }
59 #endif
60         desc->handle_irq(irq, desc);
61
62         irq_exit();
63         set_irq_regs(old_regs);
64 }
65
66 /*
67  * Generic, controller-independent functions:
68  */
69
70 int show_interrupts(struct seq_file *p, void *v)
71 {
72         int i = *(loff_t *) v, j;
73         struct irqaction * action;
74         unsigned long flags;
75
76         if (i == 0) {
77                 seq_printf(p, "           ");
78                 for_each_online_cpu(j)
79                         seq_printf(p, "CPU%d       ",j);
80                 seq_putc(p, '\n');
81         }
82
83         if (i < NR_IRQS) {
84                 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
85                 action = irq_desc[i].action;
86                 if (!action)
87                         goto skip;
88                 seq_printf(p, "%3d: ",i);
89 #ifndef CONFIG_SMP
90                 seq_printf(p, "%10u ", kstat_irqs(i));
91 #else
92                 for_each_online_cpu(j)
93                         seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
94 #endif
95                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
96                 seq_printf(p, "  %s", action->name);
97
98                 for (action=action->next; action; action = action->next)
99                         seq_printf(p, ", %s", action->name);
100
101                 seq_putc(p, '\n');
102 skip:
103                 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
104         } else if (i == NR_IRQS) {
105                 seq_printf(p, "NMI: ");
106                 for_each_online_cpu(j)
107                         seq_printf(p, "%10u ", nmi_count(j));
108                 seq_putc(p, '\n');
109                 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
110         }
111         return 0;
112 }
113
114 static void xtensa_irq_mask(unsigned int irq)
115 {
116         cached_irq_mask &= ~(1 << irq);
117         set_sr (cached_irq_mask, INTENABLE);
118 }
119
120 static void xtensa_irq_unmask(unsigned int irq)
121 {
122         cached_irq_mask |= 1 << irq;
123         set_sr (cached_irq_mask, INTENABLE);
124 }
125
126 static void xtensa_irq_enable(unsigned int irq)
127 {
128         variant_irq_enable(irq);
129         xtensa_irq_unmask(irq);
130 }
131
132 static void xtensa_irq_disable(unsigned int irq)
133 {
134         xtensa_irq_mask(irq);
135         variant_irq_disable(irq);
136 }
137
138 static void xtensa_irq_ack(unsigned int irq)
139 {
140         set_sr(1 << irq, INTCLEAR);
141 }
142
143 static int xtensa_irq_retrigger(unsigned int irq)
144 {
145         set_sr (1 << irq, INTSET);
146         return 1;
147 }
148
149
150 static struct irq_chip xtensa_irq_chip = {
151         .name           = "xtensa",
152         .enable         = xtensa_irq_enable,
153         .disable        = xtensa_irq_disable,
154         .mask           = xtensa_irq_mask,
155         .unmask         = xtensa_irq_unmask,
156         .ack            = xtensa_irq_ack,
157         .retrigger      = xtensa_irq_retrigger,
158 };
159
160 void __init init_IRQ(void)
161 {
162         int index;
163
164         for (index = 0; index < XTENSA_NR_IRQS; index++) {
165                 int mask = 1 << index;
166
167                 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
168                         set_irq_chip_and_handler(index, &xtensa_irq_chip,
169                                                  handle_simple_irq);
170
171                 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
172                         set_irq_chip_and_handler(index, &xtensa_irq_chip,
173                                                  handle_edge_irq);
174
175                 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
176                         set_irq_chip_and_handler(index, &xtensa_irq_chip,
177                                                  handle_level_irq);
178
179                 else if (mask & XCHAL_INTTYPE_MASK_TIMER)
180                         set_irq_chip_and_handler(index, &xtensa_irq_chip,
181                                                  handle_edge_irq);
182
183                 else    /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
184                         /* XCHAL_INTTYPE_MASK_NMI */
185
186                         set_irq_chip_and_handler(index, &xtensa_irq_chip,
187                                                  handle_level_irq);
188         }
189
190         cached_irq_mask = 0;
191
192         variant_init_irq();
193 }