KVM: s390: ucontrol: export SIE control block to user
[linux-2.6.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29 #include "cpuid.h"
30
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
34 #include <linux/fs.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
50
51 #define CREATE_TRACE_POINTS
52 #include "trace.h"
53
54 #include <asm/debugreg.h>
55 #include <asm/msr.h>
56 #include <asm/desc.h>
57 #include <asm/mtrr.h>
58 #include <asm/mce.h>
59 #include <asm/i387.h>
60 #include <asm/xcr.h>
61 #include <asm/pvclock.h>
62 #include <asm/div64.h>
63
64 #define MAX_IO_MSRS 256
65 #define KVM_MAX_MCE_BANKS 32
66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
67
68 #define emul_to_vcpu(ctxt) \
69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
70
71 /* EFER defaults:
72  * - enable syscall per default because its emulated by KVM
73  * - enable LME and LMA per default on 64 bit KVM
74  */
75 #ifdef CONFIG_X86_64
76 static
77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
78 #else
79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
80 #endif
81
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static void process_nmi(struct kvm_vcpu *vcpu);
87
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
90
91 static bool ignore_msrs = 0;
92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
93
94 bool kvm_has_tsc_control;
95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
96 u32  kvm_max_guest_tsc_khz;
97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102         int nr;
103         u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107         struct user_return_notifier urn;
108         bool registered;
109         struct kvm_shared_msr_values {
110                 u64 host;
111                 u64 curr;
112         } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119         { "pf_fixed", VCPU_STAT(pf_fixed) },
120         { "pf_guest", VCPU_STAT(pf_guest) },
121         { "tlb_flush", VCPU_STAT(tlb_flush) },
122         { "invlpg", VCPU_STAT(invlpg) },
123         { "exits", VCPU_STAT(exits) },
124         { "io_exits", VCPU_STAT(io_exits) },
125         { "mmio_exits", VCPU_STAT(mmio_exits) },
126         { "signal_exits", VCPU_STAT(signal_exits) },
127         { "irq_window", VCPU_STAT(irq_window_exits) },
128         { "nmi_window", VCPU_STAT(nmi_window_exits) },
129         { "halt_exits", VCPU_STAT(halt_exits) },
130         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131         { "hypercalls", VCPU_STAT(hypercalls) },
132         { "request_irq", VCPU_STAT(request_irq_exits) },
133         { "irq_exits", VCPU_STAT(irq_exits) },
134         { "host_state_reload", VCPU_STAT(host_state_reload) },
135         { "efer_reload", VCPU_STAT(efer_reload) },
136         { "fpu_reload", VCPU_STAT(fpu_reload) },
137         { "insn_emulation", VCPU_STAT(insn_emulation) },
138         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139         { "irq_injections", VCPU_STAT(irq_injections) },
140         { "nmi_injections", VCPU_STAT(nmi_injections) },
141         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145         { "mmu_flooded", VM_STAT(mmu_flooded) },
146         { "mmu_recycled", VM_STAT(mmu_recycled) },
147         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148         { "mmu_unsync", VM_STAT(mmu_unsync) },
149         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150         { "largepages", VM_STAT(lpages) },
151         { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
157
158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
159 {
160         int i;
161         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
162                 vcpu->arch.apf.gfns[i] = ~0;
163 }
164
165 static void kvm_on_user_return(struct user_return_notifier *urn)
166 {
167         unsigned slot;
168         struct kvm_shared_msrs *locals
169                 = container_of(urn, struct kvm_shared_msrs, urn);
170         struct kvm_shared_msr_values *values;
171
172         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
173                 values = &locals->values[slot];
174                 if (values->host != values->curr) {
175                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
176                         values->curr = values->host;
177                 }
178         }
179         locals->registered = false;
180         user_return_notifier_unregister(urn);
181 }
182
183 static void shared_msr_update(unsigned slot, u32 msr)
184 {
185         struct kvm_shared_msrs *smsr;
186         u64 value;
187
188         smsr = &__get_cpu_var(shared_msrs);
189         /* only read, and nobody should modify it at this time,
190          * so don't need lock */
191         if (slot >= shared_msrs_global.nr) {
192                 printk(KERN_ERR "kvm: invalid MSR slot!");
193                 return;
194         }
195         rdmsrl_safe(msr, &value);
196         smsr->values[slot].host = value;
197         smsr->values[slot].curr = value;
198 }
199
200 void kvm_define_shared_msr(unsigned slot, u32 msr)
201 {
202         if (slot >= shared_msrs_global.nr)
203                 shared_msrs_global.nr = slot + 1;
204         shared_msrs_global.msrs[slot] = msr;
205         /* we need ensured the shared_msr_global have been updated */
206         smp_wmb();
207 }
208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
209
210 static void kvm_shared_msr_cpu_online(void)
211 {
212         unsigned i;
213
214         for (i = 0; i < shared_msrs_global.nr; ++i)
215                 shared_msr_update(i, shared_msrs_global.msrs[i]);
216 }
217
218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
219 {
220         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
221
222         if (((value ^ smsr->values[slot].curr) & mask) == 0)
223                 return;
224         smsr->values[slot].curr = value;
225         wrmsrl(shared_msrs_global.msrs[slot], value);
226         if (!smsr->registered) {
227                 smsr->urn.on_user_return = kvm_on_user_return;
228                 user_return_notifier_register(&smsr->urn);
229                 smsr->registered = true;
230         }
231 }
232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
233
234 static void drop_user_return_notifiers(void *ignore)
235 {
236         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
237
238         if (smsr->registered)
239                 kvm_on_user_return(&smsr->urn);
240 }
241
242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
243 {
244         if (irqchip_in_kernel(vcpu->kvm))
245                 return vcpu->arch.apic_base;
246         else
247                 return vcpu->arch.apic_base;
248 }
249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
250
251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
252 {
253         /* TODO: reserve bits check */
254         if (irqchip_in_kernel(vcpu->kvm))
255                 kvm_lapic_set_base(vcpu, data);
256         else
257                 vcpu->arch.apic_base = data;
258 }
259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
260
261 #define EXCPT_BENIGN            0
262 #define EXCPT_CONTRIBUTORY      1
263 #define EXCPT_PF                2
264
265 static int exception_class(int vector)
266 {
267         switch (vector) {
268         case PF_VECTOR:
269                 return EXCPT_PF;
270         case DE_VECTOR:
271         case TS_VECTOR:
272         case NP_VECTOR:
273         case SS_VECTOR:
274         case GP_VECTOR:
275                 return EXCPT_CONTRIBUTORY;
276         default:
277                 break;
278         }
279         return EXCPT_BENIGN;
280 }
281
282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
283                 unsigned nr, bool has_error, u32 error_code,
284                 bool reinject)
285 {
286         u32 prev_nr;
287         int class1, class2;
288
289         kvm_make_request(KVM_REQ_EVENT, vcpu);
290
291         if (!vcpu->arch.exception.pending) {
292         queue:
293                 vcpu->arch.exception.pending = true;
294                 vcpu->arch.exception.has_error_code = has_error;
295                 vcpu->arch.exception.nr = nr;
296                 vcpu->arch.exception.error_code = error_code;
297                 vcpu->arch.exception.reinject = reinject;
298                 return;
299         }
300
301         /* to check exception */
302         prev_nr = vcpu->arch.exception.nr;
303         if (prev_nr == DF_VECTOR) {
304                 /* triple fault -> shutdown */
305                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
306                 return;
307         }
308         class1 = exception_class(prev_nr);
309         class2 = exception_class(nr);
310         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
311                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
312                 /* generate double fault per SDM Table 5-5 */
313                 vcpu->arch.exception.pending = true;
314                 vcpu->arch.exception.has_error_code = true;
315                 vcpu->arch.exception.nr = DF_VECTOR;
316                 vcpu->arch.exception.error_code = 0;
317         } else
318                 /* replace previous exception with a new one in a hope
319                    that instruction re-execution will regenerate lost
320                    exception */
321                 goto queue;
322 }
323
324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 {
326         kvm_multiple_exception(vcpu, nr, false, 0, false);
327 }
328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
329
330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
331 {
332         kvm_multiple_exception(vcpu, nr, false, 0, true);
333 }
334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
335
336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
337 {
338         if (err)
339                 kvm_inject_gp(vcpu, 0);
340         else
341                 kvm_x86_ops->skip_emulated_instruction(vcpu);
342 }
343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
344
345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
346 {
347         ++vcpu->stat.pf_guest;
348         vcpu->arch.cr2 = fault->address;
349         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
350 }
351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
352
353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
354 {
355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
357         else
358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
359 }
360
361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
362 {
363         atomic_inc(&vcpu->arch.nmi_queued);
364         kvm_make_request(KVM_REQ_NMI, vcpu);
365 }
366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
367
368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
369 {
370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
371 }
372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
373
374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
375 {
376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
377 }
378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
379
380 /*
381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
382  * a #GP and return false.
383  */
384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
385 {
386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
387                 return true;
388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
389         return false;
390 }
391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
392
393 /*
394  * This function will be used to read from the physical memory of the currently
395  * running guest. The difference to kvm_read_guest_page is that this function
396  * can read from guest physical or from the guest's guest physical memory.
397  */
398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
399                             gfn_t ngfn, void *data, int offset, int len,
400                             u32 access)
401 {
402         gfn_t real_gfn;
403         gpa_t ngpa;
404
405         ngpa     = gfn_to_gpa(ngfn);
406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
407         if (real_gfn == UNMAPPED_GVA)
408                 return -EFAULT;
409
410         real_gfn = gpa_to_gfn(real_gfn);
411
412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
413 }
414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
415
416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
417                                void *data, int offset, int len, u32 access)
418 {
419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
420                                        data, offset, len, access);
421 }
422
423 /*
424  * Load the pae pdptrs.  Return true is they are all valid.
425  */
426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
427 {
428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
430         int i;
431         int ret;
432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
433
434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
435                                       offset * sizeof(u64), sizeof(pdpte),
436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
437         if (ret < 0) {
438                 ret = 0;
439                 goto out;
440         }
441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
442                 if (is_present_gpte(pdpte[i]) &&
443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
444                         ret = 0;
445                         goto out;
446                 }
447         }
448         ret = 1;
449
450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
451         __set_bit(VCPU_EXREG_PDPTR,
452                   (unsigned long *)&vcpu->arch.regs_avail);
453         __set_bit(VCPU_EXREG_PDPTR,
454                   (unsigned long *)&vcpu->arch.regs_dirty);
455 out:
456
457         return ret;
458 }
459 EXPORT_SYMBOL_GPL(load_pdptrs);
460
461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
462 {
463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
464         bool changed = true;
465         int offset;
466         gfn_t gfn;
467         int r;
468
469         if (is_long_mode(vcpu) || !is_pae(vcpu))
470                 return false;
471
472         if (!test_bit(VCPU_EXREG_PDPTR,
473                       (unsigned long *)&vcpu->arch.regs_avail))
474                 return true;
475
476         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
477         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
480         if (r < 0)
481                 goto out;
482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
483 out:
484
485         return changed;
486 }
487
488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
489 {
490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
492                                     X86_CR0_CD | X86_CR0_NW;
493
494         cr0 |= X86_CR0_ET;
495
496 #ifdef CONFIG_X86_64
497         if (cr0 & 0xffffffff00000000UL)
498                 return 1;
499 #endif
500
501         cr0 &= ~CR0_RESERVED_BITS;
502
503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
504                 return 1;
505
506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
507                 return 1;
508
509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
510 #ifdef CONFIG_X86_64
511                 if ((vcpu->arch.efer & EFER_LME)) {
512                         int cs_db, cs_l;
513
514                         if (!is_pae(vcpu))
515                                 return 1;
516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
517                         if (cs_l)
518                                 return 1;
519                 } else
520 #endif
521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
522                                                  kvm_read_cr3(vcpu)))
523                         return 1;
524         }
525
526         kvm_x86_ops->set_cr0(vcpu, cr0);
527
528         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
529                 kvm_clear_async_pf_completion_queue(vcpu);
530                 kvm_async_pf_hash_reset(vcpu);
531         }
532
533         if ((cr0 ^ old_cr0) & update_bits)
534                 kvm_mmu_reset_context(vcpu);
535         return 0;
536 }
537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
538
539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
540 {
541         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
542 }
543 EXPORT_SYMBOL_GPL(kvm_lmsw);
544
545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
546 {
547         u64 xcr0;
548
549         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
550         if (index != XCR_XFEATURE_ENABLED_MASK)
551                 return 1;
552         xcr0 = xcr;
553         if (kvm_x86_ops->get_cpl(vcpu) != 0)
554                 return 1;
555         if (!(xcr0 & XSTATE_FP))
556                 return 1;
557         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
558                 return 1;
559         if (xcr0 & ~host_xcr0)
560                 return 1;
561         vcpu->arch.xcr0 = xcr0;
562         vcpu->guest_xcr0_loaded = 0;
563         return 0;
564 }
565
566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
567 {
568         if (__kvm_set_xcr(vcpu, index, xcr)) {
569                 kvm_inject_gp(vcpu, 0);
570                 return 1;
571         }
572         return 0;
573 }
574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
575
576 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
577 {
578         unsigned long old_cr4 = kvm_read_cr4(vcpu);
579         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
580                                    X86_CR4_PAE | X86_CR4_SMEP;
581         if (cr4 & CR4_RESERVED_BITS)
582                 return 1;
583
584         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
585                 return 1;
586
587         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
588                 return 1;
589
590         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
591                 return 1;
592
593         if (is_long_mode(vcpu)) {
594                 if (!(cr4 & X86_CR4_PAE))
595                         return 1;
596         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
597                    && ((cr4 ^ old_cr4) & pdptr_bits)
598                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
599                                    kvm_read_cr3(vcpu)))
600                 return 1;
601
602         if (kvm_x86_ops->set_cr4(vcpu, cr4))
603                 return 1;
604
605         if ((cr4 ^ old_cr4) & pdptr_bits)
606                 kvm_mmu_reset_context(vcpu);
607
608         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
609                 kvm_update_cpuid(vcpu);
610
611         return 0;
612 }
613 EXPORT_SYMBOL_GPL(kvm_set_cr4);
614
615 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
616 {
617         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
618                 kvm_mmu_sync_roots(vcpu);
619                 kvm_mmu_flush_tlb(vcpu);
620                 return 0;
621         }
622
623         if (is_long_mode(vcpu)) {
624                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
625                         return 1;
626         } else {
627                 if (is_pae(vcpu)) {
628                         if (cr3 & CR3_PAE_RESERVED_BITS)
629                                 return 1;
630                         if (is_paging(vcpu) &&
631                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
632                                 return 1;
633                 }
634                 /*
635                  * We don't check reserved bits in nonpae mode, because
636                  * this isn't enforced, and VMware depends on this.
637                  */
638         }
639
640         /*
641          * Does the new cr3 value map to physical memory? (Note, we
642          * catch an invalid cr3 even in real-mode, because it would
643          * cause trouble later on when we turn on paging anyway.)
644          *
645          * A real CPU would silently accept an invalid cr3 and would
646          * attempt to use it - with largely undefined (and often hard
647          * to debug) behavior on the guest side.
648          */
649         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
650                 return 1;
651         vcpu->arch.cr3 = cr3;
652         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
653         vcpu->arch.mmu.new_cr3(vcpu);
654         return 0;
655 }
656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
657
658 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
659 {
660         if (cr8 & CR8_RESERVED_BITS)
661                 return 1;
662         if (irqchip_in_kernel(vcpu->kvm))
663                 kvm_lapic_set_tpr(vcpu, cr8);
664         else
665                 vcpu->arch.cr8 = cr8;
666         return 0;
667 }
668 EXPORT_SYMBOL_GPL(kvm_set_cr8);
669
670 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
671 {
672         if (irqchip_in_kernel(vcpu->kvm))
673                 return kvm_lapic_get_cr8(vcpu);
674         else
675                 return vcpu->arch.cr8;
676 }
677 EXPORT_SYMBOL_GPL(kvm_get_cr8);
678
679 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
680 {
681         switch (dr) {
682         case 0 ... 3:
683                 vcpu->arch.db[dr] = val;
684                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
685                         vcpu->arch.eff_db[dr] = val;
686                 break;
687         case 4:
688                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
689                         return 1; /* #UD */
690                 /* fall through */
691         case 6:
692                 if (val & 0xffffffff00000000ULL)
693                         return -1; /* #GP */
694                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
695                 break;
696         case 5:
697                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
698                         return 1; /* #UD */
699                 /* fall through */
700         default: /* 7 */
701                 if (val & 0xffffffff00000000ULL)
702                         return -1; /* #GP */
703                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
704                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
705                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
706                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
707                 }
708                 break;
709         }
710
711         return 0;
712 }
713
714 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
715 {
716         int res;
717
718         res = __kvm_set_dr(vcpu, dr, val);
719         if (res > 0)
720                 kvm_queue_exception(vcpu, UD_VECTOR);
721         else if (res < 0)
722                 kvm_inject_gp(vcpu, 0);
723
724         return res;
725 }
726 EXPORT_SYMBOL_GPL(kvm_set_dr);
727
728 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
729 {
730         switch (dr) {
731         case 0 ... 3:
732                 *val = vcpu->arch.db[dr];
733                 break;
734         case 4:
735                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
736                         return 1;
737                 /* fall through */
738         case 6:
739                 *val = vcpu->arch.dr6;
740                 break;
741         case 5:
742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
743                         return 1;
744                 /* fall through */
745         default: /* 7 */
746                 *val = vcpu->arch.dr7;
747                 break;
748         }
749
750         return 0;
751 }
752
753 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
754 {
755         if (_kvm_get_dr(vcpu, dr, val)) {
756                 kvm_queue_exception(vcpu, UD_VECTOR);
757                 return 1;
758         }
759         return 0;
760 }
761 EXPORT_SYMBOL_GPL(kvm_get_dr);
762
763 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
764 {
765         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
766         u64 data;
767         int err;
768
769         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
770         if (err)
771                 return err;
772         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
773         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
774         return err;
775 }
776 EXPORT_SYMBOL_GPL(kvm_rdpmc);
777
778 /*
779  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
780  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
781  *
782  * This list is modified at module load time to reflect the
783  * capabilities of the host cpu. This capabilities test skips MSRs that are
784  * kvm-specific. Those are put in the beginning of the list.
785  */
786
787 #define KVM_SAVE_MSRS_BEGIN     9
788 static u32 msrs_to_save[] = {
789         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
790         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
791         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
792         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
793         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
794         MSR_STAR,
795 #ifdef CONFIG_X86_64
796         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
797 #endif
798         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
799 };
800
801 static unsigned num_msrs_to_save;
802
803 static u32 emulated_msrs[] = {
804         MSR_IA32_TSCDEADLINE,
805         MSR_IA32_MISC_ENABLE,
806         MSR_IA32_MCG_STATUS,
807         MSR_IA32_MCG_CTL,
808 };
809
810 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
811 {
812         u64 old_efer = vcpu->arch.efer;
813
814         if (efer & efer_reserved_bits)
815                 return 1;
816
817         if (is_paging(vcpu)
818             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
819                 return 1;
820
821         if (efer & EFER_FFXSR) {
822                 struct kvm_cpuid_entry2 *feat;
823
824                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
825                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
826                         return 1;
827         }
828
829         if (efer & EFER_SVME) {
830                 struct kvm_cpuid_entry2 *feat;
831
832                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
833                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
834                         return 1;
835         }
836
837         efer &= ~EFER_LMA;
838         efer |= vcpu->arch.efer & EFER_LMA;
839
840         kvm_x86_ops->set_efer(vcpu, efer);
841
842         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
843
844         /* Update reserved bits */
845         if ((efer ^ old_efer) & EFER_NX)
846                 kvm_mmu_reset_context(vcpu);
847
848         return 0;
849 }
850
851 void kvm_enable_efer_bits(u64 mask)
852 {
853        efer_reserved_bits &= ~mask;
854 }
855 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
856
857
858 /*
859  * Writes msr value into into the appropriate "register".
860  * Returns 0 on success, non-0 otherwise.
861  * Assumes vcpu_load() was already called.
862  */
863 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
864 {
865         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
866 }
867
868 /*
869  * Adapt set_msr() to msr_io()'s calling convention
870  */
871 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
872 {
873         return kvm_set_msr(vcpu, index, *data);
874 }
875
876 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
877 {
878         int version;
879         int r;
880         struct pvclock_wall_clock wc;
881         struct timespec boot;
882
883         if (!wall_clock)
884                 return;
885
886         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
887         if (r)
888                 return;
889
890         if (version & 1)
891                 ++version;  /* first time write, random junk */
892
893         ++version;
894
895         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
896
897         /*
898          * The guest calculates current wall clock time by adding
899          * system time (updated by kvm_guest_time_update below) to the
900          * wall clock specified here.  guest system time equals host
901          * system time for us, thus we must fill in host boot time here.
902          */
903         getboottime(&boot);
904
905         wc.sec = boot.tv_sec;
906         wc.nsec = boot.tv_nsec;
907         wc.version = version;
908
909         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
910
911         version++;
912         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
913 }
914
915 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
916 {
917         uint32_t quotient, remainder;
918
919         /* Don't try to replace with do_div(), this one calculates
920          * "(dividend << 32) / divisor" */
921         __asm__ ( "divl %4"
922                   : "=a" (quotient), "=d" (remainder)
923                   : "0" (0), "1" (dividend), "r" (divisor) );
924         return quotient;
925 }
926
927 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
928                                s8 *pshift, u32 *pmultiplier)
929 {
930         uint64_t scaled64;
931         int32_t  shift = 0;
932         uint64_t tps64;
933         uint32_t tps32;
934
935         tps64 = base_khz * 1000LL;
936         scaled64 = scaled_khz * 1000LL;
937         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
938                 tps64 >>= 1;
939                 shift--;
940         }
941
942         tps32 = (uint32_t)tps64;
943         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
944                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
945                         scaled64 >>= 1;
946                 else
947                         tps32 <<= 1;
948                 shift++;
949         }
950
951         *pshift = shift;
952         *pmultiplier = div_frac(scaled64, tps32);
953
954         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
955                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
956 }
957
958 static inline u64 get_kernel_ns(void)
959 {
960         struct timespec ts;
961
962         WARN_ON(preemptible());
963         ktime_get_ts(&ts);
964         monotonic_to_bootbased(&ts);
965         return timespec_to_ns(&ts);
966 }
967
968 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
969 unsigned long max_tsc_khz;
970
971 static inline int kvm_tsc_changes_freq(void)
972 {
973         int cpu = get_cpu();
974         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
975                   cpufreq_quick_get(cpu) != 0;
976         put_cpu();
977         return ret;
978 }
979
980 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
981 {
982         if (vcpu->arch.virtual_tsc_khz)
983                 return vcpu->arch.virtual_tsc_khz;
984         else
985                 return __this_cpu_read(cpu_tsc_khz);
986 }
987
988 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
989 {
990         u64 ret;
991
992         WARN_ON(preemptible());
993         if (kvm_tsc_changes_freq())
994                 printk_once(KERN_WARNING
995                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
996         ret = nsec * vcpu_tsc_khz(vcpu);
997         do_div(ret, USEC_PER_SEC);
998         return ret;
999 }
1000
1001 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1002 {
1003         /* Compute a scale to convert nanoseconds in TSC cycles */
1004         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1005                            &vcpu->arch.tsc_catchup_shift,
1006                            &vcpu->arch.tsc_catchup_mult);
1007 }
1008
1009 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1010 {
1011         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1012                                       vcpu->arch.tsc_catchup_mult,
1013                                       vcpu->arch.tsc_catchup_shift);
1014         tsc += vcpu->arch.last_tsc_write;
1015         return tsc;
1016 }
1017
1018 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1019 {
1020         struct kvm *kvm = vcpu->kvm;
1021         u64 offset, ns, elapsed;
1022         unsigned long flags;
1023         s64 sdiff;
1024
1025         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1026         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1027         ns = get_kernel_ns();
1028         elapsed = ns - kvm->arch.last_tsc_nsec;
1029         sdiff = data - kvm->arch.last_tsc_write;
1030         if (sdiff < 0)
1031                 sdiff = -sdiff;
1032
1033         /*
1034          * Special case: close write to TSC within 5 seconds of
1035          * another CPU is interpreted as an attempt to synchronize
1036          * The 5 seconds is to accommodate host load / swapping as
1037          * well as any reset of TSC during the boot process.
1038          *
1039          * In that case, for a reliable TSC, we can match TSC offsets,
1040          * or make a best guest using elapsed value.
1041          */
1042         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1043             elapsed < 5ULL * NSEC_PER_SEC) {
1044                 if (!check_tsc_unstable()) {
1045                         offset = kvm->arch.last_tsc_offset;
1046                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1047                 } else {
1048                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1049                         offset += delta;
1050                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1051                 }
1052                 ns = kvm->arch.last_tsc_nsec;
1053         }
1054         kvm->arch.last_tsc_nsec = ns;
1055         kvm->arch.last_tsc_write = data;
1056         kvm->arch.last_tsc_offset = offset;
1057         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1058         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1059
1060         /* Reset of TSC must disable overshoot protection below */
1061         vcpu->arch.hv_clock.tsc_timestamp = 0;
1062         vcpu->arch.last_tsc_write = data;
1063         vcpu->arch.last_tsc_nsec = ns;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1066
1067 static int kvm_guest_time_update(struct kvm_vcpu *v)
1068 {
1069         unsigned long flags;
1070         struct kvm_vcpu_arch *vcpu = &v->arch;
1071         void *shared_kaddr;
1072         unsigned long this_tsc_khz;
1073         s64 kernel_ns, max_kernel_ns;
1074         u64 tsc_timestamp;
1075
1076         /* Keep irq disabled to prevent changes to the clock */
1077         local_irq_save(flags);
1078         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1079         kernel_ns = get_kernel_ns();
1080         this_tsc_khz = vcpu_tsc_khz(v);
1081         if (unlikely(this_tsc_khz == 0)) {
1082                 local_irq_restore(flags);
1083                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1084                 return 1;
1085         }
1086
1087         /*
1088          * We may have to catch up the TSC to match elapsed wall clock
1089          * time for two reasons, even if kvmclock is used.
1090          *   1) CPU could have been running below the maximum TSC rate
1091          *   2) Broken TSC compensation resets the base at each VCPU
1092          *      entry to avoid unknown leaps of TSC even when running
1093          *      again on the same CPU.  This may cause apparent elapsed
1094          *      time to disappear, and the guest to stand still or run
1095          *      very slowly.
1096          */
1097         if (vcpu->tsc_catchup) {
1098                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1099                 if (tsc > tsc_timestamp) {
1100                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1101                         tsc_timestamp = tsc;
1102                 }
1103         }
1104
1105         local_irq_restore(flags);
1106
1107         if (!vcpu->time_page)
1108                 return 0;
1109
1110         /*
1111          * Time as measured by the TSC may go backwards when resetting the base
1112          * tsc_timestamp.  The reason for this is that the TSC resolution is
1113          * higher than the resolution of the other clock scales.  Thus, many
1114          * possible measurments of the TSC correspond to one measurement of any
1115          * other clock, and so a spread of values is possible.  This is not a
1116          * problem for the computation of the nanosecond clock; with TSC rates
1117          * around 1GHZ, there can only be a few cycles which correspond to one
1118          * nanosecond value, and any path through this code will inevitably
1119          * take longer than that.  However, with the kernel_ns value itself,
1120          * the precision may be much lower, down to HZ granularity.  If the
1121          * first sampling of TSC against kernel_ns ends in the low part of the
1122          * range, and the second in the high end of the range, we can get:
1123          *
1124          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1125          *
1126          * As the sampling errors potentially range in the thousands of cycles,
1127          * it is possible such a time value has already been observed by the
1128          * guest.  To protect against this, we must compute the system time as
1129          * observed by the guest and ensure the new system time is greater.
1130          */
1131         max_kernel_ns = 0;
1132         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1133                 max_kernel_ns = vcpu->last_guest_tsc -
1134                                 vcpu->hv_clock.tsc_timestamp;
1135                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1136                                     vcpu->hv_clock.tsc_to_system_mul,
1137                                     vcpu->hv_clock.tsc_shift);
1138                 max_kernel_ns += vcpu->last_kernel_ns;
1139         }
1140
1141         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1142                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1143                                    &vcpu->hv_clock.tsc_shift,
1144                                    &vcpu->hv_clock.tsc_to_system_mul);
1145                 vcpu->hw_tsc_khz = this_tsc_khz;
1146         }
1147
1148         if (max_kernel_ns > kernel_ns)
1149                 kernel_ns = max_kernel_ns;
1150
1151         /* With all the info we got, fill in the values */
1152         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1153         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1154         vcpu->last_kernel_ns = kernel_ns;
1155         vcpu->last_guest_tsc = tsc_timestamp;
1156         vcpu->hv_clock.flags = 0;
1157
1158         /*
1159          * The interface expects us to write an even number signaling that the
1160          * update is finished. Since the guest won't see the intermediate
1161          * state, we just increase by 2 at the end.
1162          */
1163         vcpu->hv_clock.version += 2;
1164
1165         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1166
1167         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1168                sizeof(vcpu->hv_clock));
1169
1170         kunmap_atomic(shared_kaddr, KM_USER0);
1171
1172         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1173         return 0;
1174 }
1175
1176 static bool msr_mtrr_valid(unsigned msr)
1177 {
1178         switch (msr) {
1179         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1180         case MSR_MTRRfix64K_00000:
1181         case MSR_MTRRfix16K_80000:
1182         case MSR_MTRRfix16K_A0000:
1183         case MSR_MTRRfix4K_C0000:
1184         case MSR_MTRRfix4K_C8000:
1185         case MSR_MTRRfix4K_D0000:
1186         case MSR_MTRRfix4K_D8000:
1187         case MSR_MTRRfix4K_E0000:
1188         case MSR_MTRRfix4K_E8000:
1189         case MSR_MTRRfix4K_F0000:
1190         case MSR_MTRRfix4K_F8000:
1191         case MSR_MTRRdefType:
1192         case MSR_IA32_CR_PAT:
1193                 return true;
1194         case 0x2f8:
1195                 return true;
1196         }
1197         return false;
1198 }
1199
1200 static bool valid_pat_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1203 }
1204
1205 static bool valid_mtrr_type(unsigned t)
1206 {
1207         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1208 }
1209
1210 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1211 {
1212         int i;
1213
1214         if (!msr_mtrr_valid(msr))
1215                 return false;
1216
1217         if (msr == MSR_IA32_CR_PAT) {
1218                 for (i = 0; i < 8; i++)
1219                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1220                                 return false;
1221                 return true;
1222         } else if (msr == MSR_MTRRdefType) {
1223                 if (data & ~0xcff)
1224                         return false;
1225                 return valid_mtrr_type(data & 0xff);
1226         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1227                 for (i = 0; i < 8 ; i++)
1228                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1229                                 return false;
1230                 return true;
1231         }
1232
1233         /* variable MTRRs */
1234         return valid_mtrr_type(data & 0xff);
1235 }
1236
1237 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1238 {
1239         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1240
1241         if (!mtrr_valid(vcpu, msr, data))
1242                 return 1;
1243
1244         if (msr == MSR_MTRRdefType) {
1245                 vcpu->arch.mtrr_state.def_type = data;
1246                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1247         } else if (msr == MSR_MTRRfix64K_00000)
1248                 p[0] = data;
1249         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1251         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1253         else if (msr == MSR_IA32_CR_PAT)
1254                 vcpu->arch.pat = data;
1255         else {  /* Variable MTRRs */
1256                 int idx, is_mtrr_mask;
1257                 u64 *pt;
1258
1259                 idx = (msr - 0x200) / 2;
1260                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1261                 if (!is_mtrr_mask)
1262                         pt =
1263                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1264                 else
1265                         pt =
1266                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1267                 *pt = data;
1268         }
1269
1270         kvm_mmu_reset_context(vcpu);
1271         return 0;
1272 }
1273
1274 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1275 {
1276         u64 mcg_cap = vcpu->arch.mcg_cap;
1277         unsigned bank_num = mcg_cap & 0xff;
1278
1279         switch (msr) {
1280         case MSR_IA32_MCG_STATUS:
1281                 vcpu->arch.mcg_status = data;
1282                 break;
1283         case MSR_IA32_MCG_CTL:
1284                 if (!(mcg_cap & MCG_CTL_P))
1285                         return 1;
1286                 if (data != 0 && data != ~(u64)0)
1287                         return -1;
1288                 vcpu->arch.mcg_ctl = data;
1289                 break;
1290         default:
1291                 if (msr >= MSR_IA32_MC0_CTL &&
1292                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1293                         u32 offset = msr - MSR_IA32_MC0_CTL;
1294                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1295                          * some Linux kernels though clear bit 10 in bank 4 to
1296                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1297                          * this to avoid an uncatched #GP in the guest
1298                          */
1299                         if ((offset & 0x3) == 0 &&
1300                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1301                                 return -1;
1302                         vcpu->arch.mce_banks[offset] = data;
1303                         break;
1304                 }
1305                 return 1;
1306         }
1307         return 0;
1308 }
1309
1310 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1311 {
1312         struct kvm *kvm = vcpu->kvm;
1313         int lm = is_long_mode(vcpu);
1314         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1315                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1316         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1317                 : kvm->arch.xen_hvm_config.blob_size_32;
1318         u32 page_num = data & ~PAGE_MASK;
1319         u64 page_addr = data & PAGE_MASK;
1320         u8 *page;
1321         int r;
1322
1323         r = -E2BIG;
1324         if (page_num >= blob_size)
1325                 goto out;
1326         r = -ENOMEM;
1327         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1328         if (IS_ERR(page)) {
1329                 r = PTR_ERR(page);
1330                 goto out;
1331         }
1332         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1333                 goto out_free;
1334         r = 0;
1335 out_free:
1336         kfree(page);
1337 out:
1338         return r;
1339 }
1340
1341 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1342 {
1343         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1344 }
1345
1346 static bool kvm_hv_msr_partition_wide(u32 msr)
1347 {
1348         bool r = false;
1349         switch (msr) {
1350         case HV_X64_MSR_GUEST_OS_ID:
1351         case HV_X64_MSR_HYPERCALL:
1352                 r = true;
1353                 break;
1354         }
1355
1356         return r;
1357 }
1358
1359 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1360 {
1361         struct kvm *kvm = vcpu->kvm;
1362
1363         switch (msr) {
1364         case HV_X64_MSR_GUEST_OS_ID:
1365                 kvm->arch.hv_guest_os_id = data;
1366                 /* setting guest os id to zero disables hypercall page */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1369                 break;
1370         case HV_X64_MSR_HYPERCALL: {
1371                 u64 gfn;
1372                 unsigned long addr;
1373                 u8 instructions[4];
1374
1375                 /* if guest os id is not set hypercall should remain disabled */
1376                 if (!kvm->arch.hv_guest_os_id)
1377                         break;
1378                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1379                         kvm->arch.hv_hypercall = data;
1380                         break;
1381                 }
1382                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1383                 addr = gfn_to_hva(kvm, gfn);
1384                 if (kvm_is_error_hva(addr))
1385                         return 1;
1386                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1387                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1388                 if (__copy_to_user((void __user *)addr, instructions, 4))
1389                         return 1;
1390                 kvm->arch.hv_hypercall = data;
1391                 break;
1392         }
1393         default:
1394                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1395                           "data 0x%llx\n", msr, data);
1396                 return 1;
1397         }
1398         return 0;
1399 }
1400
1401 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1402 {
1403         switch (msr) {
1404         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1405                 unsigned long addr;
1406
1407                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1408                         vcpu->arch.hv_vapic = data;
1409                         break;
1410                 }
1411                 addr = gfn_to_hva(vcpu->kvm, data >>
1412                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1413                 if (kvm_is_error_hva(addr))
1414                         return 1;
1415                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1416                         return 1;
1417                 vcpu->arch.hv_vapic = data;
1418                 break;
1419         }
1420         case HV_X64_MSR_EOI:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1422         case HV_X64_MSR_ICR:
1423                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1424         case HV_X64_MSR_TPR:
1425                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1426         default:
1427                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1428                           "data 0x%llx\n", msr, data);
1429                 return 1;
1430         }
1431
1432         return 0;
1433 }
1434
1435 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1436 {
1437         gpa_t gpa = data & ~0x3f;
1438
1439         /* Bits 2:5 are resrved, Should be zero */
1440         if (data & 0x3c)
1441                 return 1;
1442
1443         vcpu->arch.apf.msr_val = data;
1444
1445         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1446                 kvm_clear_async_pf_completion_queue(vcpu);
1447                 kvm_async_pf_hash_reset(vcpu);
1448                 return 0;
1449         }
1450
1451         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1452                 return 1;
1453
1454         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1455         kvm_async_pf_wakeup_all(vcpu);
1456         return 0;
1457 }
1458
1459 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1460 {
1461         if (vcpu->arch.time_page) {
1462                 kvm_release_page_dirty(vcpu->arch.time_page);
1463                 vcpu->arch.time_page = NULL;
1464         }
1465 }
1466
1467 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1468 {
1469         u64 delta;
1470
1471         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1472                 return;
1473
1474         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1475         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1476         vcpu->arch.st.accum_steal = delta;
1477 }
1478
1479 static void record_steal_time(struct kvm_vcpu *vcpu)
1480 {
1481         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1482                 return;
1483
1484         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1485                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1486                 return;
1487
1488         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1489         vcpu->arch.st.steal.version += 2;
1490         vcpu->arch.st.accum_steal = 0;
1491
1492         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1493                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1494 }
1495
1496 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1497 {
1498         bool pr = false;
1499
1500         switch (msr) {
1501         case MSR_EFER:
1502                 return set_efer(vcpu, data);
1503         case MSR_K7_HWCR:
1504                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1505                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1506                 if (data != 0) {
1507                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1508                                 data);
1509                         return 1;
1510                 }
1511                 break;
1512         case MSR_FAM10H_MMIO_CONF_BASE:
1513                 if (data != 0) {
1514                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1515                                 "0x%llx\n", data);
1516                         return 1;
1517                 }
1518                 break;
1519         case MSR_AMD64_NB_CFG:
1520                 break;
1521         case MSR_IA32_DEBUGCTLMSR:
1522                 if (!data) {
1523                         /* We support the non-activated case already */
1524                         break;
1525                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1526                         /* Values other than LBR and BTF are vendor-specific,
1527                            thus reserved and should throw a #GP */
1528                         return 1;
1529                 }
1530                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1531                         __func__, data);
1532                 break;
1533         case MSR_IA32_UCODE_REV:
1534         case MSR_IA32_UCODE_WRITE:
1535         case MSR_VM_HSAVE_PA:
1536         case MSR_AMD64_PATCH_LOADER:
1537                 break;
1538         case 0x200 ... 0x2ff:
1539                 return set_msr_mtrr(vcpu, msr, data);
1540         case MSR_IA32_APICBASE:
1541                 kvm_set_apic_base(vcpu, data);
1542                 break;
1543         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1544                 return kvm_x2apic_msr_write(vcpu, msr, data);
1545         case MSR_IA32_TSCDEADLINE:
1546                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1547                 break;
1548         case MSR_IA32_MISC_ENABLE:
1549                 vcpu->arch.ia32_misc_enable_msr = data;
1550                 break;
1551         case MSR_KVM_WALL_CLOCK_NEW:
1552         case MSR_KVM_WALL_CLOCK:
1553                 vcpu->kvm->arch.wall_clock = data;
1554                 kvm_write_wall_clock(vcpu->kvm, data);
1555                 break;
1556         case MSR_KVM_SYSTEM_TIME_NEW:
1557         case MSR_KVM_SYSTEM_TIME: {
1558                 kvmclock_reset(vcpu);
1559
1560                 vcpu->arch.time = data;
1561                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1562
1563                 /* we verify if the enable bit is set... */
1564                 if (!(data & 1))
1565                         break;
1566
1567                 /* ...but clean it before doing the actual write */
1568                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1569
1570                 vcpu->arch.time_page =
1571                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1572
1573                 if (is_error_page(vcpu->arch.time_page)) {
1574                         kvm_release_page_clean(vcpu->arch.time_page);
1575                         vcpu->arch.time_page = NULL;
1576                 }
1577                 break;
1578         }
1579         case MSR_KVM_ASYNC_PF_EN:
1580                 if (kvm_pv_enable_async_pf(vcpu, data))
1581                         return 1;
1582                 break;
1583         case MSR_KVM_STEAL_TIME:
1584
1585                 if (unlikely(!sched_info_on()))
1586                         return 1;
1587
1588                 if (data & KVM_STEAL_RESERVED_MASK)
1589                         return 1;
1590
1591                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1592                                                         data & KVM_STEAL_VALID_BITS))
1593                         return 1;
1594
1595                 vcpu->arch.st.msr_val = data;
1596
1597                 if (!(data & KVM_MSR_ENABLED))
1598                         break;
1599
1600                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1601
1602                 preempt_disable();
1603                 accumulate_steal_time(vcpu);
1604                 preempt_enable();
1605
1606                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1607
1608                 break;
1609
1610         case MSR_IA32_MCG_CTL:
1611         case MSR_IA32_MCG_STATUS:
1612         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1613                 return set_msr_mce(vcpu, msr, data);
1614
1615         /* Performance counters are not protected by a CPUID bit,
1616          * so we should check all of them in the generic path for the sake of
1617          * cross vendor migration.
1618          * Writing a zero into the event select MSRs disables them,
1619          * which we perfectly emulate ;-). Any other value should be at least
1620          * reported, some guests depend on them.
1621          */
1622         case MSR_K7_EVNTSEL0:
1623         case MSR_K7_EVNTSEL1:
1624         case MSR_K7_EVNTSEL2:
1625         case MSR_K7_EVNTSEL3:
1626                 if (data != 0)
1627                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1628                                 "0x%x data 0x%llx\n", msr, data);
1629                 break;
1630         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1631          * so we ignore writes to make it happy.
1632          */
1633         case MSR_K7_PERFCTR0:
1634         case MSR_K7_PERFCTR1:
1635         case MSR_K7_PERFCTR2:
1636         case MSR_K7_PERFCTR3:
1637                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1638                         "0x%x data 0x%llx\n", msr, data);
1639                 break;
1640         case MSR_P6_PERFCTR0:
1641         case MSR_P6_PERFCTR1:
1642                 pr = true;
1643         case MSR_P6_EVNTSEL0:
1644         case MSR_P6_EVNTSEL1:
1645                 if (kvm_pmu_msr(vcpu, msr))
1646                         return kvm_pmu_set_msr(vcpu, msr, data);
1647
1648                 if (pr || data != 0)
1649                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1650                                 "0x%x data 0x%llx\n", msr, data);
1651                 break;
1652         case MSR_K7_CLK_CTL:
1653                 /*
1654                  * Ignore all writes to this no longer documented MSR.
1655                  * Writes are only relevant for old K7 processors,
1656                  * all pre-dating SVM, but a recommended workaround from
1657                  * AMD for these chips. It is possible to speicify the
1658                  * affected processor models on the command line, hence
1659                  * the need to ignore the workaround.
1660                  */
1661                 break;
1662         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1663                 if (kvm_hv_msr_partition_wide(msr)) {
1664                         int r;
1665                         mutex_lock(&vcpu->kvm->lock);
1666                         r = set_msr_hyperv_pw(vcpu, msr, data);
1667                         mutex_unlock(&vcpu->kvm->lock);
1668                         return r;
1669                 } else
1670                         return set_msr_hyperv(vcpu, msr, data);
1671                 break;
1672         case MSR_IA32_BBL_CR_CTL3:
1673                 /* Drop writes to this legacy MSR -- see rdmsr
1674                  * counterpart for further detail.
1675                  */
1676                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1677                 break;
1678         default:
1679                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1680                         return xen_hvm_config(vcpu, data);
1681                 if (kvm_pmu_msr(vcpu, msr))
1682                         return kvm_pmu_set_msr(vcpu, msr, data);
1683                 if (!ignore_msrs) {
1684                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1685                                 msr, data);
1686                         return 1;
1687                 } else {
1688                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1689                                 msr, data);
1690                         break;
1691                 }
1692         }
1693         return 0;
1694 }
1695 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1696
1697
1698 /*
1699  * Reads an msr value (of 'msr_index') into 'pdata'.
1700  * Returns 0 on success, non-0 otherwise.
1701  * Assumes vcpu_load() was already called.
1702  */
1703 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1704 {
1705         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1706 }
1707
1708 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1709 {
1710         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1711
1712         if (!msr_mtrr_valid(msr))
1713                 return 1;
1714
1715         if (msr == MSR_MTRRdefType)
1716                 *pdata = vcpu->arch.mtrr_state.def_type +
1717                          (vcpu->arch.mtrr_state.enabled << 10);
1718         else if (msr == MSR_MTRRfix64K_00000)
1719                 *pdata = p[0];
1720         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1721                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1722         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1723                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1724         else if (msr == MSR_IA32_CR_PAT)
1725                 *pdata = vcpu->arch.pat;
1726         else {  /* Variable MTRRs */
1727                 int idx, is_mtrr_mask;
1728                 u64 *pt;
1729
1730                 idx = (msr - 0x200) / 2;
1731                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1732                 if (!is_mtrr_mask)
1733                         pt =
1734                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1735                 else
1736                         pt =
1737                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1738                 *pdata = *pt;
1739         }
1740
1741         return 0;
1742 }
1743
1744 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1745 {
1746         u64 data;
1747         u64 mcg_cap = vcpu->arch.mcg_cap;
1748         unsigned bank_num = mcg_cap & 0xff;
1749
1750         switch (msr) {
1751         case MSR_IA32_P5_MC_ADDR:
1752         case MSR_IA32_P5_MC_TYPE:
1753                 data = 0;
1754                 break;
1755         case MSR_IA32_MCG_CAP:
1756                 data = vcpu->arch.mcg_cap;
1757                 break;
1758         case MSR_IA32_MCG_CTL:
1759                 if (!(mcg_cap & MCG_CTL_P))
1760                         return 1;
1761                 data = vcpu->arch.mcg_ctl;
1762                 break;
1763         case MSR_IA32_MCG_STATUS:
1764                 data = vcpu->arch.mcg_status;
1765                 break;
1766         default:
1767                 if (msr >= MSR_IA32_MC0_CTL &&
1768                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1769                         u32 offset = msr - MSR_IA32_MC0_CTL;
1770                         data = vcpu->arch.mce_banks[offset];
1771                         break;
1772                 }
1773                 return 1;
1774         }
1775         *pdata = data;
1776         return 0;
1777 }
1778
1779 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1780 {
1781         u64 data = 0;
1782         struct kvm *kvm = vcpu->kvm;
1783
1784         switch (msr) {
1785         case HV_X64_MSR_GUEST_OS_ID:
1786                 data = kvm->arch.hv_guest_os_id;
1787                 break;
1788         case HV_X64_MSR_HYPERCALL:
1789                 data = kvm->arch.hv_hypercall;
1790                 break;
1791         default:
1792                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1793                 return 1;
1794         }
1795
1796         *pdata = data;
1797         return 0;
1798 }
1799
1800 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1801 {
1802         u64 data = 0;
1803
1804         switch (msr) {
1805         case HV_X64_MSR_VP_INDEX: {
1806                 int r;
1807                 struct kvm_vcpu *v;
1808                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1809                         if (v == vcpu)
1810                                 data = r;
1811                 break;
1812         }
1813         case HV_X64_MSR_EOI:
1814                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1815         case HV_X64_MSR_ICR:
1816                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1817         case HV_X64_MSR_TPR:
1818                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1819         case HV_X64_MSR_APIC_ASSIST_PAGE:
1820                 data = vcpu->arch.hv_vapic;
1821                 break;
1822         default:
1823                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1824                 return 1;
1825         }
1826         *pdata = data;
1827         return 0;
1828 }
1829
1830 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1831 {
1832         u64 data;
1833
1834         switch (msr) {
1835         case MSR_IA32_PLATFORM_ID:
1836         case MSR_IA32_EBL_CR_POWERON:
1837         case MSR_IA32_DEBUGCTLMSR:
1838         case MSR_IA32_LASTBRANCHFROMIP:
1839         case MSR_IA32_LASTBRANCHTOIP:
1840         case MSR_IA32_LASTINTFROMIP:
1841         case MSR_IA32_LASTINTTOIP:
1842         case MSR_K8_SYSCFG:
1843         case MSR_K7_HWCR:
1844         case MSR_VM_HSAVE_PA:
1845         case MSR_K7_EVNTSEL0:
1846         case MSR_K7_PERFCTR0:
1847         case MSR_K8_INT_PENDING_MSG:
1848         case MSR_AMD64_NB_CFG:
1849         case MSR_FAM10H_MMIO_CONF_BASE:
1850                 data = 0;
1851                 break;
1852         case MSR_P6_PERFCTR0:
1853         case MSR_P6_PERFCTR1:
1854         case MSR_P6_EVNTSEL0:
1855         case MSR_P6_EVNTSEL1:
1856                 if (kvm_pmu_msr(vcpu, msr))
1857                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1858                 data = 0;
1859                 break;
1860         case MSR_IA32_UCODE_REV:
1861                 data = 0x100000000ULL;
1862                 break;
1863         case MSR_MTRRcap:
1864                 data = 0x500 | KVM_NR_VAR_MTRR;
1865                 break;
1866         case 0x200 ... 0x2ff:
1867                 return get_msr_mtrr(vcpu, msr, pdata);
1868         case 0xcd: /* fsb frequency */
1869                 data = 3;
1870                 break;
1871                 /*
1872                  * MSR_EBC_FREQUENCY_ID
1873                  * Conservative value valid for even the basic CPU models.
1874                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1875                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1876                  * and 266MHz for model 3, or 4. Set Core Clock
1877                  * Frequency to System Bus Frequency Ratio to 1 (bits
1878                  * 31:24) even though these are only valid for CPU
1879                  * models > 2, however guests may end up dividing or
1880                  * multiplying by zero otherwise.
1881                  */
1882         case MSR_EBC_FREQUENCY_ID:
1883                 data = 1 << 24;
1884                 break;
1885         case MSR_IA32_APICBASE:
1886                 data = kvm_get_apic_base(vcpu);
1887                 break;
1888         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1889                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1890                 break;
1891         case MSR_IA32_TSCDEADLINE:
1892                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1893                 break;
1894         case MSR_IA32_MISC_ENABLE:
1895                 data = vcpu->arch.ia32_misc_enable_msr;
1896                 break;
1897         case MSR_IA32_PERF_STATUS:
1898                 /* TSC increment by tick */
1899                 data = 1000ULL;
1900                 /* CPU multiplier */
1901                 data |= (((uint64_t)4ULL) << 40);
1902                 break;
1903         case MSR_EFER:
1904                 data = vcpu->arch.efer;
1905                 break;
1906         case MSR_KVM_WALL_CLOCK:
1907         case MSR_KVM_WALL_CLOCK_NEW:
1908                 data = vcpu->kvm->arch.wall_clock;
1909                 break;
1910         case MSR_KVM_SYSTEM_TIME:
1911         case MSR_KVM_SYSTEM_TIME_NEW:
1912                 data = vcpu->arch.time;
1913                 break;
1914         case MSR_KVM_ASYNC_PF_EN:
1915                 data = vcpu->arch.apf.msr_val;
1916                 break;
1917         case MSR_KVM_STEAL_TIME:
1918                 data = vcpu->arch.st.msr_val;
1919                 break;
1920         case MSR_IA32_P5_MC_ADDR:
1921         case MSR_IA32_P5_MC_TYPE:
1922         case MSR_IA32_MCG_CAP:
1923         case MSR_IA32_MCG_CTL:
1924         case MSR_IA32_MCG_STATUS:
1925         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1926                 return get_msr_mce(vcpu, msr, pdata);
1927         case MSR_K7_CLK_CTL:
1928                 /*
1929                  * Provide expected ramp-up count for K7. All other
1930                  * are set to zero, indicating minimum divisors for
1931                  * every field.
1932                  *
1933                  * This prevents guest kernels on AMD host with CPU
1934                  * type 6, model 8 and higher from exploding due to
1935                  * the rdmsr failing.
1936                  */
1937                 data = 0x20000000;
1938                 break;
1939         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1940                 if (kvm_hv_msr_partition_wide(msr)) {
1941                         int r;
1942                         mutex_lock(&vcpu->kvm->lock);
1943                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1944                         mutex_unlock(&vcpu->kvm->lock);
1945                         return r;
1946                 } else
1947                         return get_msr_hyperv(vcpu, msr, pdata);
1948                 break;
1949         case MSR_IA32_BBL_CR_CTL3:
1950                 /* This legacy MSR exists but isn't fully documented in current
1951                  * silicon.  It is however accessed by winxp in very narrow
1952                  * scenarios where it sets bit #19, itself documented as
1953                  * a "reserved" bit.  Best effort attempt to source coherent
1954                  * read data here should the balance of the register be
1955                  * interpreted by the guest:
1956                  *
1957                  * L2 cache control register 3: 64GB range, 256KB size,
1958                  * enabled, latency 0x1, configured
1959                  */
1960                 data = 0xbe702111;
1961                 break;
1962         default:
1963                 if (kvm_pmu_msr(vcpu, msr))
1964                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1965                 if (!ignore_msrs) {
1966                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1967                         return 1;
1968                 } else {
1969                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1970                         data = 0;
1971                 }
1972                 break;
1973         }
1974         *pdata = data;
1975         return 0;
1976 }
1977 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1978
1979 /*
1980  * Read or write a bunch of msrs. All parameters are kernel addresses.
1981  *
1982  * @return number of msrs set successfully.
1983  */
1984 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1985                     struct kvm_msr_entry *entries,
1986                     int (*do_msr)(struct kvm_vcpu *vcpu,
1987                                   unsigned index, u64 *data))
1988 {
1989         int i, idx;
1990
1991         idx = srcu_read_lock(&vcpu->kvm->srcu);
1992         for (i = 0; i < msrs->nmsrs; ++i)
1993                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1994                         break;
1995         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1996
1997         return i;
1998 }
1999
2000 /*
2001  * Read or write a bunch of msrs. Parameters are user addresses.
2002  *
2003  * @return number of msrs set successfully.
2004  */
2005 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2006                   int (*do_msr)(struct kvm_vcpu *vcpu,
2007                                 unsigned index, u64 *data),
2008                   int writeback)
2009 {
2010         struct kvm_msrs msrs;
2011         struct kvm_msr_entry *entries;
2012         int r, n;
2013         unsigned size;
2014
2015         r = -EFAULT;
2016         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2017                 goto out;
2018
2019         r = -E2BIG;
2020         if (msrs.nmsrs >= MAX_IO_MSRS)
2021                 goto out;
2022
2023         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2024         entries = memdup_user(user_msrs->entries, size);
2025         if (IS_ERR(entries)) {
2026                 r = PTR_ERR(entries);
2027                 goto out;
2028         }
2029
2030         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2031         if (r < 0)
2032                 goto out_free;
2033
2034         r = -EFAULT;
2035         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2036                 goto out_free;
2037
2038         r = n;
2039
2040 out_free:
2041         kfree(entries);
2042 out:
2043         return r;
2044 }
2045
2046 int kvm_dev_ioctl_check_extension(long ext)
2047 {
2048         int r;
2049
2050         switch (ext) {
2051         case KVM_CAP_IRQCHIP:
2052         case KVM_CAP_HLT:
2053         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2054         case KVM_CAP_SET_TSS_ADDR:
2055         case KVM_CAP_EXT_CPUID:
2056         case KVM_CAP_CLOCKSOURCE:
2057         case KVM_CAP_PIT:
2058         case KVM_CAP_NOP_IO_DELAY:
2059         case KVM_CAP_MP_STATE:
2060         case KVM_CAP_SYNC_MMU:
2061         case KVM_CAP_USER_NMI:
2062         case KVM_CAP_REINJECT_CONTROL:
2063         case KVM_CAP_IRQ_INJECT_STATUS:
2064         case KVM_CAP_ASSIGN_DEV_IRQ:
2065         case KVM_CAP_IRQFD:
2066         case KVM_CAP_IOEVENTFD:
2067         case KVM_CAP_PIT2:
2068         case KVM_CAP_PIT_STATE2:
2069         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2070         case KVM_CAP_XEN_HVM:
2071         case KVM_CAP_ADJUST_CLOCK:
2072         case KVM_CAP_VCPU_EVENTS:
2073         case KVM_CAP_HYPERV:
2074         case KVM_CAP_HYPERV_VAPIC:
2075         case KVM_CAP_HYPERV_SPIN:
2076         case KVM_CAP_PCI_SEGMENT:
2077         case KVM_CAP_DEBUGREGS:
2078         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2079         case KVM_CAP_XSAVE:
2080         case KVM_CAP_ASYNC_PF:
2081         case KVM_CAP_GET_TSC_KHZ:
2082                 r = 1;
2083                 break;
2084         case KVM_CAP_COALESCED_MMIO:
2085                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2086                 break;
2087         case KVM_CAP_VAPIC:
2088                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2089                 break;
2090         case KVM_CAP_NR_VCPUS:
2091                 r = KVM_SOFT_MAX_VCPUS;
2092                 break;
2093         case KVM_CAP_MAX_VCPUS:
2094                 r = KVM_MAX_VCPUS;
2095                 break;
2096         case KVM_CAP_NR_MEMSLOTS:
2097                 r = KVM_MEMORY_SLOTS;
2098                 break;
2099         case KVM_CAP_PV_MMU:    /* obsolete */
2100                 r = 0;
2101                 break;
2102         case KVM_CAP_IOMMU:
2103                 r = iommu_present(&pci_bus_type);
2104                 break;
2105         case KVM_CAP_MCE:
2106                 r = KVM_MAX_MCE_BANKS;
2107                 break;
2108         case KVM_CAP_XCRS:
2109                 r = cpu_has_xsave;
2110                 break;
2111         case KVM_CAP_TSC_CONTROL:
2112                 r = kvm_has_tsc_control;
2113                 break;
2114         case KVM_CAP_TSC_DEADLINE_TIMER:
2115                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2116                 break;
2117         default:
2118                 r = 0;
2119                 break;
2120         }
2121         return r;
2122
2123 }
2124
2125 long kvm_arch_dev_ioctl(struct file *filp,
2126                         unsigned int ioctl, unsigned long arg)
2127 {
2128         void __user *argp = (void __user *)arg;
2129         long r;
2130
2131         switch (ioctl) {
2132         case KVM_GET_MSR_INDEX_LIST: {
2133                 struct kvm_msr_list __user *user_msr_list = argp;
2134                 struct kvm_msr_list msr_list;
2135                 unsigned n;
2136
2137                 r = -EFAULT;
2138                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2139                         goto out;
2140                 n = msr_list.nmsrs;
2141                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2142                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2143                         goto out;
2144                 r = -E2BIG;
2145                 if (n < msr_list.nmsrs)
2146                         goto out;
2147                 r = -EFAULT;
2148                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2149                                  num_msrs_to_save * sizeof(u32)))
2150                         goto out;
2151                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2152                                  &emulated_msrs,
2153                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2154                         goto out;
2155                 r = 0;
2156                 break;
2157         }
2158         case KVM_GET_SUPPORTED_CPUID: {
2159                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2160                 struct kvm_cpuid2 cpuid;
2161
2162                 r = -EFAULT;
2163                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2164                         goto out;
2165                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2166                                                       cpuid_arg->entries);
2167                 if (r)
2168                         goto out;
2169
2170                 r = -EFAULT;
2171                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2172                         goto out;
2173                 r = 0;
2174                 break;
2175         }
2176         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2177                 u64 mce_cap;
2178
2179                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2180                 r = -EFAULT;
2181                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2182                         goto out;
2183                 r = 0;
2184                 break;
2185         }
2186         default:
2187                 r = -EINVAL;
2188         }
2189 out:
2190         return r;
2191 }
2192
2193 static void wbinvd_ipi(void *garbage)
2194 {
2195         wbinvd();
2196 }
2197
2198 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2199 {
2200         return vcpu->kvm->arch.iommu_domain &&
2201                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2202 }
2203
2204 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2205 {
2206         /* Address WBINVD may be executed by guest */
2207         if (need_emulate_wbinvd(vcpu)) {
2208                 if (kvm_x86_ops->has_wbinvd_exit())
2209                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2210                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2211                         smp_call_function_single(vcpu->cpu,
2212                                         wbinvd_ipi, NULL, 1);
2213         }
2214
2215         kvm_x86_ops->vcpu_load(vcpu, cpu);
2216         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2217                 /* Make sure TSC doesn't go backwards */
2218                 s64 tsc_delta;
2219                 u64 tsc;
2220
2221                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2222                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2223                              tsc - vcpu->arch.last_guest_tsc;
2224
2225                 if (tsc_delta < 0)
2226                         mark_tsc_unstable("KVM discovered backwards TSC");
2227                 if (check_tsc_unstable()) {
2228                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2229                         vcpu->arch.tsc_catchup = 1;
2230                 }
2231                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2232                 if (vcpu->cpu != cpu)
2233                         kvm_migrate_timers(vcpu);
2234                 vcpu->cpu = cpu;
2235         }
2236
2237         accumulate_steal_time(vcpu);
2238         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2239 }
2240
2241 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2242 {
2243         kvm_x86_ops->vcpu_put(vcpu);
2244         kvm_put_guest_fpu(vcpu);
2245         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2246 }
2247
2248 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2249                                     struct kvm_lapic_state *s)
2250 {
2251         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2252
2253         return 0;
2254 }
2255
2256 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2257                                     struct kvm_lapic_state *s)
2258 {
2259         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2260         kvm_apic_post_state_restore(vcpu);
2261         update_cr8_intercept(vcpu);
2262
2263         return 0;
2264 }
2265
2266 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2267                                     struct kvm_interrupt *irq)
2268 {
2269         if (irq->irq < 0 || irq->irq >= 256)
2270                 return -EINVAL;
2271         if (irqchip_in_kernel(vcpu->kvm))
2272                 return -ENXIO;
2273
2274         kvm_queue_interrupt(vcpu, irq->irq, false);
2275         kvm_make_request(KVM_REQ_EVENT, vcpu);
2276
2277         return 0;
2278 }
2279
2280 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2281 {
2282         kvm_inject_nmi(vcpu);
2283
2284         return 0;
2285 }
2286
2287 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2288                                            struct kvm_tpr_access_ctl *tac)
2289 {
2290         if (tac->flags)
2291                 return -EINVAL;
2292         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2293         return 0;
2294 }
2295
2296 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2297                                         u64 mcg_cap)
2298 {
2299         int r;
2300         unsigned bank_num = mcg_cap & 0xff, bank;
2301
2302         r = -EINVAL;
2303         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2304                 goto out;
2305         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2306                 goto out;
2307         r = 0;
2308         vcpu->arch.mcg_cap = mcg_cap;
2309         /* Init IA32_MCG_CTL to all 1s */
2310         if (mcg_cap & MCG_CTL_P)
2311                 vcpu->arch.mcg_ctl = ~(u64)0;
2312         /* Init IA32_MCi_CTL to all 1s */
2313         for (bank = 0; bank < bank_num; bank++)
2314                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2315 out:
2316         return r;
2317 }
2318
2319 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2320                                       struct kvm_x86_mce *mce)
2321 {
2322         u64 mcg_cap = vcpu->arch.mcg_cap;
2323         unsigned bank_num = mcg_cap & 0xff;
2324         u64 *banks = vcpu->arch.mce_banks;
2325
2326         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2327                 return -EINVAL;
2328         /*
2329          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2330          * reporting is disabled
2331          */
2332         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2333             vcpu->arch.mcg_ctl != ~(u64)0)
2334                 return 0;
2335         banks += 4 * mce->bank;
2336         /*
2337          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2338          * reporting is disabled for the bank
2339          */
2340         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2341                 return 0;
2342         if (mce->status & MCI_STATUS_UC) {
2343                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2344                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2345                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2346                         return 0;
2347                 }
2348                 if (banks[1] & MCI_STATUS_VAL)
2349                         mce->status |= MCI_STATUS_OVER;
2350                 banks[2] = mce->addr;
2351                 banks[3] = mce->misc;
2352                 vcpu->arch.mcg_status = mce->mcg_status;
2353                 banks[1] = mce->status;
2354                 kvm_queue_exception(vcpu, MC_VECTOR);
2355         } else if (!(banks[1] & MCI_STATUS_VAL)
2356                    || !(banks[1] & MCI_STATUS_UC)) {
2357                 if (banks[1] & MCI_STATUS_VAL)
2358                         mce->status |= MCI_STATUS_OVER;
2359                 banks[2] = mce->addr;
2360                 banks[3] = mce->misc;
2361                 banks[1] = mce->status;
2362         } else
2363                 banks[1] |= MCI_STATUS_OVER;
2364         return 0;
2365 }
2366
2367 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2368                                                struct kvm_vcpu_events *events)
2369 {
2370         process_nmi(vcpu);
2371         events->exception.injected =
2372                 vcpu->arch.exception.pending &&
2373                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2374         events->exception.nr = vcpu->arch.exception.nr;
2375         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2376         events->exception.pad = 0;
2377         events->exception.error_code = vcpu->arch.exception.error_code;
2378
2379         events->interrupt.injected =
2380                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2381         events->interrupt.nr = vcpu->arch.interrupt.nr;
2382         events->interrupt.soft = 0;
2383         events->interrupt.shadow =
2384                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2385                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2386
2387         events->nmi.injected = vcpu->arch.nmi_injected;
2388         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2389         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2390         events->nmi.pad = 0;
2391
2392         events->sipi_vector = vcpu->arch.sipi_vector;
2393
2394         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2395                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2396                          | KVM_VCPUEVENT_VALID_SHADOW);
2397         memset(&events->reserved, 0, sizeof(events->reserved));
2398 }
2399
2400 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2401                                               struct kvm_vcpu_events *events)
2402 {
2403         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2404                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2405                               | KVM_VCPUEVENT_VALID_SHADOW))
2406                 return -EINVAL;
2407
2408         process_nmi(vcpu);
2409         vcpu->arch.exception.pending = events->exception.injected;
2410         vcpu->arch.exception.nr = events->exception.nr;
2411         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2412         vcpu->arch.exception.error_code = events->exception.error_code;
2413
2414         vcpu->arch.interrupt.pending = events->interrupt.injected;
2415         vcpu->arch.interrupt.nr = events->interrupt.nr;
2416         vcpu->arch.interrupt.soft = events->interrupt.soft;
2417         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2418                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2419                                                   events->interrupt.shadow);
2420
2421         vcpu->arch.nmi_injected = events->nmi.injected;
2422         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2423                 vcpu->arch.nmi_pending = events->nmi.pending;
2424         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2425
2426         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2427                 vcpu->arch.sipi_vector = events->sipi_vector;
2428
2429         kvm_make_request(KVM_REQ_EVENT, vcpu);
2430
2431         return 0;
2432 }
2433
2434 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2435                                              struct kvm_debugregs *dbgregs)
2436 {
2437         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2438         dbgregs->dr6 = vcpu->arch.dr6;
2439         dbgregs->dr7 = vcpu->arch.dr7;
2440         dbgregs->flags = 0;
2441         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2442 }
2443
2444 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2445                                             struct kvm_debugregs *dbgregs)
2446 {
2447         if (dbgregs->flags)
2448                 return -EINVAL;
2449
2450         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2451         vcpu->arch.dr6 = dbgregs->dr6;
2452         vcpu->arch.dr7 = dbgregs->dr7;
2453
2454         return 0;
2455 }
2456
2457 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2458                                          struct kvm_xsave *guest_xsave)
2459 {
2460         if (cpu_has_xsave)
2461                 memcpy(guest_xsave->region,
2462                         &vcpu->arch.guest_fpu.state->xsave,
2463                         xstate_size);
2464         else {
2465                 memcpy(guest_xsave->region,
2466                         &vcpu->arch.guest_fpu.state->fxsave,
2467                         sizeof(struct i387_fxsave_struct));
2468                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2469                         XSTATE_FPSSE;
2470         }
2471 }
2472
2473 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2474                                         struct kvm_xsave *guest_xsave)
2475 {
2476         u64 xstate_bv =
2477                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2478
2479         if (cpu_has_xsave)
2480                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2481                         guest_xsave->region, xstate_size);
2482         else {
2483                 if (xstate_bv & ~XSTATE_FPSSE)
2484                         return -EINVAL;
2485                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2486                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2487         }
2488         return 0;
2489 }
2490
2491 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2492                                         struct kvm_xcrs *guest_xcrs)
2493 {
2494         if (!cpu_has_xsave) {
2495                 guest_xcrs->nr_xcrs = 0;
2496                 return;
2497         }
2498
2499         guest_xcrs->nr_xcrs = 1;
2500         guest_xcrs->flags = 0;
2501         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2502         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2503 }
2504
2505 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2506                                        struct kvm_xcrs *guest_xcrs)
2507 {
2508         int i, r = 0;
2509
2510         if (!cpu_has_xsave)
2511                 return -EINVAL;
2512
2513         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2514                 return -EINVAL;
2515
2516         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2517                 /* Only support XCR0 currently */
2518                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2519                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2520                                 guest_xcrs->xcrs[0].value);
2521                         break;
2522                 }
2523         if (r)
2524                 r = -EINVAL;
2525         return r;
2526 }
2527
2528 long kvm_arch_vcpu_ioctl(struct file *filp,
2529                          unsigned int ioctl, unsigned long arg)
2530 {
2531         struct kvm_vcpu *vcpu = filp->private_data;
2532         void __user *argp = (void __user *)arg;
2533         int r;
2534         union {
2535                 struct kvm_lapic_state *lapic;
2536                 struct kvm_xsave *xsave;
2537                 struct kvm_xcrs *xcrs;
2538                 void *buffer;
2539         } u;
2540
2541         u.buffer = NULL;
2542         switch (ioctl) {
2543         case KVM_GET_LAPIC: {
2544                 r = -EINVAL;
2545                 if (!vcpu->arch.apic)
2546                         goto out;
2547                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2548
2549                 r = -ENOMEM;
2550                 if (!u.lapic)
2551                         goto out;
2552                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2553                 if (r)
2554                         goto out;
2555                 r = -EFAULT;
2556                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2557                         goto out;
2558                 r = 0;
2559                 break;
2560         }
2561         case KVM_SET_LAPIC: {
2562                 r = -EINVAL;
2563                 if (!vcpu->arch.apic)
2564                         goto out;
2565                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2566                 if (IS_ERR(u.lapic)) {
2567                         r = PTR_ERR(u.lapic);
2568                         goto out;
2569                 }
2570
2571                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2572                 if (r)
2573                         goto out;
2574                 r = 0;
2575                 break;
2576         }
2577         case KVM_INTERRUPT: {
2578                 struct kvm_interrupt irq;
2579
2580                 r = -EFAULT;
2581                 if (copy_from_user(&irq, argp, sizeof irq))
2582                         goto out;
2583                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2584                 if (r)
2585                         goto out;
2586                 r = 0;
2587                 break;
2588         }
2589         case KVM_NMI: {
2590                 r = kvm_vcpu_ioctl_nmi(vcpu);
2591                 if (r)
2592                         goto out;
2593                 r = 0;
2594                 break;
2595         }
2596         case KVM_SET_CPUID: {
2597                 struct kvm_cpuid __user *cpuid_arg = argp;
2598                 struct kvm_cpuid cpuid;
2599
2600                 r = -EFAULT;
2601                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2602                         goto out;
2603                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2604                 if (r)
2605                         goto out;
2606                 break;
2607         }
2608         case KVM_SET_CPUID2: {
2609                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2610                 struct kvm_cpuid2 cpuid;
2611
2612                 r = -EFAULT;
2613                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2614                         goto out;
2615                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2616                                               cpuid_arg->entries);
2617                 if (r)
2618                         goto out;
2619                 break;
2620         }
2621         case KVM_GET_CPUID2: {
2622                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2623                 struct kvm_cpuid2 cpuid;
2624
2625                 r = -EFAULT;
2626                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2627                         goto out;
2628                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2629                                               cpuid_arg->entries);
2630                 if (r)
2631                         goto out;
2632                 r = -EFAULT;
2633                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2634                         goto out;
2635                 r = 0;
2636                 break;
2637         }
2638         case KVM_GET_MSRS:
2639                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2640                 break;
2641         case KVM_SET_MSRS:
2642                 r = msr_io(vcpu, argp, do_set_msr, 0);
2643                 break;
2644         case KVM_TPR_ACCESS_REPORTING: {
2645                 struct kvm_tpr_access_ctl tac;
2646
2647                 r = -EFAULT;
2648                 if (copy_from_user(&tac, argp, sizeof tac))
2649                         goto out;
2650                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2651                 if (r)
2652                         goto out;
2653                 r = -EFAULT;
2654                 if (copy_to_user(argp, &tac, sizeof tac))
2655                         goto out;
2656                 r = 0;
2657                 break;
2658         };
2659         case KVM_SET_VAPIC_ADDR: {
2660                 struct kvm_vapic_addr va;
2661
2662                 r = -EINVAL;
2663                 if (!irqchip_in_kernel(vcpu->kvm))
2664                         goto out;
2665                 r = -EFAULT;
2666                 if (copy_from_user(&va, argp, sizeof va))
2667                         goto out;
2668                 r = 0;
2669                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2670                 break;
2671         }
2672         case KVM_X86_SETUP_MCE: {
2673                 u64 mcg_cap;
2674
2675                 r = -EFAULT;
2676                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2677                         goto out;
2678                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2679                 break;
2680         }
2681         case KVM_X86_SET_MCE: {
2682                 struct kvm_x86_mce mce;
2683
2684                 r = -EFAULT;
2685                 if (copy_from_user(&mce, argp, sizeof mce))
2686                         goto out;
2687                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2688                 break;
2689         }
2690         case KVM_GET_VCPU_EVENTS: {
2691                 struct kvm_vcpu_events events;
2692
2693                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2694
2695                 r = -EFAULT;
2696                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2697                         break;
2698                 r = 0;
2699                 break;
2700         }
2701         case KVM_SET_VCPU_EVENTS: {
2702                 struct kvm_vcpu_events events;
2703
2704                 r = -EFAULT;
2705                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2706                         break;
2707
2708                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2709                 break;
2710         }
2711         case KVM_GET_DEBUGREGS: {
2712                 struct kvm_debugregs dbgregs;
2713
2714                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2715
2716                 r = -EFAULT;
2717                 if (copy_to_user(argp, &dbgregs,
2718                                  sizeof(struct kvm_debugregs)))
2719                         break;
2720                 r = 0;
2721                 break;
2722         }
2723         case KVM_SET_DEBUGREGS: {
2724                 struct kvm_debugregs dbgregs;
2725
2726                 r = -EFAULT;
2727                 if (copy_from_user(&dbgregs, argp,
2728                                    sizeof(struct kvm_debugregs)))
2729                         break;
2730
2731                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2732                 break;
2733         }
2734         case KVM_GET_XSAVE: {
2735                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2736                 r = -ENOMEM;
2737                 if (!u.xsave)
2738                         break;
2739
2740                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2741
2742                 r = -EFAULT;
2743                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2744                         break;
2745                 r = 0;
2746                 break;
2747         }
2748         case KVM_SET_XSAVE: {
2749                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2750                 if (IS_ERR(u.xsave)) {
2751                         r = PTR_ERR(u.xsave);
2752                         goto out;
2753                 }
2754
2755                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2756                 break;
2757         }
2758         case KVM_GET_XCRS: {
2759                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2760                 r = -ENOMEM;
2761                 if (!u.xcrs)
2762                         break;
2763
2764                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2765
2766                 r = -EFAULT;
2767                 if (copy_to_user(argp, u.xcrs,
2768                                  sizeof(struct kvm_xcrs)))
2769                         break;
2770                 r = 0;
2771                 break;
2772         }
2773         case KVM_SET_XCRS: {
2774                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2775                 if (IS_ERR(u.xcrs)) {
2776                         r = PTR_ERR(u.xcrs);
2777                         goto out;
2778                 }
2779
2780                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2781                 break;
2782         }
2783         case KVM_SET_TSC_KHZ: {
2784                 u32 user_tsc_khz;
2785
2786                 r = -EINVAL;
2787                 if (!kvm_has_tsc_control)
2788                         break;
2789
2790                 user_tsc_khz = (u32)arg;
2791
2792                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2793                         goto out;
2794
2795                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
2796
2797                 r = 0;
2798                 goto out;
2799         }
2800         case KVM_GET_TSC_KHZ: {
2801                 r = -EIO;
2802                 if (check_tsc_unstable())
2803                         goto out;
2804
2805                 r = vcpu_tsc_khz(vcpu);
2806
2807                 goto out;
2808         }
2809         default:
2810                 r = -EINVAL;
2811         }
2812 out:
2813         kfree(u.buffer);
2814         return r;
2815 }
2816
2817 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2818 {
2819         return VM_FAULT_SIGBUS;
2820 }
2821
2822 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2823 {
2824         int ret;
2825
2826         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2827                 return -1;
2828         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2829         return ret;
2830 }
2831
2832 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2833                                               u64 ident_addr)
2834 {
2835         kvm->arch.ept_identity_map_addr = ident_addr;
2836         return 0;
2837 }
2838
2839 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2840                                           u32 kvm_nr_mmu_pages)
2841 {
2842         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2843                 return -EINVAL;
2844
2845         mutex_lock(&kvm->slots_lock);
2846         spin_lock(&kvm->mmu_lock);
2847
2848         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2849         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2850
2851         spin_unlock(&kvm->mmu_lock);
2852         mutex_unlock(&kvm->slots_lock);
2853         return 0;
2854 }
2855
2856 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2857 {
2858         return kvm->arch.n_max_mmu_pages;
2859 }
2860
2861 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2862 {
2863         int r;
2864
2865         r = 0;
2866         switch (chip->chip_id) {
2867         case KVM_IRQCHIP_PIC_MASTER:
2868                 memcpy(&chip->chip.pic,
2869                         &pic_irqchip(kvm)->pics[0],
2870                         sizeof(struct kvm_pic_state));
2871                 break;
2872         case KVM_IRQCHIP_PIC_SLAVE:
2873                 memcpy(&chip->chip.pic,
2874                         &pic_irqchip(kvm)->pics[1],
2875                         sizeof(struct kvm_pic_state));
2876                 break;
2877         case KVM_IRQCHIP_IOAPIC:
2878                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2879                 break;
2880         default:
2881                 r = -EINVAL;
2882                 break;
2883         }
2884         return r;
2885 }
2886
2887 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2888 {
2889         int r;
2890
2891         r = 0;
2892         switch (chip->chip_id) {
2893         case KVM_IRQCHIP_PIC_MASTER:
2894                 spin_lock(&pic_irqchip(kvm)->lock);
2895                 memcpy(&pic_irqchip(kvm)->pics[0],
2896                         &chip->chip.pic,
2897                         sizeof(struct kvm_pic_state));
2898                 spin_unlock(&pic_irqchip(kvm)->lock);
2899                 break;
2900         case KVM_IRQCHIP_PIC_SLAVE:
2901                 spin_lock(&pic_irqchip(kvm)->lock);
2902                 memcpy(&pic_irqchip(kvm)->pics[1],
2903                         &chip->chip.pic,
2904                         sizeof(struct kvm_pic_state));
2905                 spin_unlock(&pic_irqchip(kvm)->lock);
2906                 break;
2907         case KVM_IRQCHIP_IOAPIC:
2908                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2909                 break;
2910         default:
2911                 r = -EINVAL;
2912                 break;
2913         }
2914         kvm_pic_update_irq(pic_irqchip(kvm));
2915         return r;
2916 }
2917
2918 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2919 {
2920         int r = 0;
2921
2922         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2923         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2924         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2925         return r;
2926 }
2927
2928 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2929 {
2930         int r = 0;
2931
2932         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2933         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2934         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2935         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2936         return r;
2937 }
2938
2939 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2940 {
2941         int r = 0;
2942
2943         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2944         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2945                 sizeof(ps->channels));
2946         ps->flags = kvm->arch.vpit->pit_state.flags;
2947         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2948         memset(&ps->reserved, 0, sizeof(ps->reserved));
2949         return r;
2950 }
2951
2952 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2953 {
2954         int r = 0, start = 0;
2955         u32 prev_legacy, cur_legacy;
2956         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2957         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2958         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2959         if (!prev_legacy && cur_legacy)
2960                 start = 1;
2961         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2962                sizeof(kvm->arch.vpit->pit_state.channels));
2963         kvm->arch.vpit->pit_state.flags = ps->flags;
2964         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2965         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2966         return r;
2967 }
2968
2969 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2970                                  struct kvm_reinject_control *control)
2971 {
2972         if (!kvm->arch.vpit)
2973                 return -ENXIO;
2974         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2975         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2976         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2977         return 0;
2978 }
2979
2980 /**
2981  * write_protect_slot - write protect a slot for dirty logging
2982  * @kvm: the kvm instance
2983  * @memslot: the slot we protect
2984  * @dirty_bitmap: the bitmap indicating which pages are dirty
2985  * @nr_dirty_pages: the number of dirty pages
2986  *
2987  * We have two ways to find all sptes to protect:
2988  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
2989  *    checks ones that have a spte mapping a page in the slot.
2990  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
2991  *
2992  * Generally speaking, if there are not so many dirty pages compared to the
2993  * number of shadow pages, we should use the latter.
2994  *
2995  * Note that letting others write into a page marked dirty in the old bitmap
2996  * by using the remaining tlb entry is not a problem.  That page will become
2997  * write protected again when we flush the tlb and then be reported dirty to
2998  * the user space by copying the old bitmap.
2999  */
3000 static void write_protect_slot(struct kvm *kvm,
3001                                struct kvm_memory_slot *memslot,
3002                                unsigned long *dirty_bitmap,
3003                                unsigned long nr_dirty_pages)
3004 {
3005         /* Not many dirty pages compared to # of shadow pages. */
3006         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3007                 unsigned long gfn_offset;
3008
3009                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3010                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3011
3012                         spin_lock(&kvm->mmu_lock);
3013                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3014                         spin_unlock(&kvm->mmu_lock);
3015                 }
3016                 kvm_flush_remote_tlbs(kvm);
3017         } else {
3018                 spin_lock(&kvm->mmu_lock);
3019                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3020                 spin_unlock(&kvm->mmu_lock);
3021         }
3022 }
3023
3024 /*
3025  * Get (and clear) the dirty memory log for a memory slot.
3026  */
3027 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3028                                       struct kvm_dirty_log *log)
3029 {
3030         int r;
3031         struct kvm_memory_slot *memslot;
3032         unsigned long n, nr_dirty_pages;
3033
3034         mutex_lock(&kvm->slots_lock);
3035
3036         r = -EINVAL;
3037         if (log->slot >= KVM_MEMORY_SLOTS)
3038                 goto out;
3039
3040         memslot = id_to_memslot(kvm->memslots, log->slot);
3041         r = -ENOENT;
3042         if (!memslot->dirty_bitmap)
3043                 goto out;
3044
3045         n = kvm_dirty_bitmap_bytes(memslot);
3046         nr_dirty_pages = memslot->nr_dirty_pages;
3047
3048         /* If nothing is dirty, don't bother messing with page tables. */
3049         if (nr_dirty_pages) {
3050                 struct kvm_memslots *slots, *old_slots;
3051                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3052
3053                 dirty_bitmap = memslot->dirty_bitmap;
3054                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3055                 if (dirty_bitmap == dirty_bitmap_head)
3056                         dirty_bitmap_head += n / sizeof(long);
3057                 memset(dirty_bitmap_head, 0, n);
3058
3059                 r = -ENOMEM;
3060                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3061                 if (!slots)
3062                         goto out;
3063
3064                 memslot = id_to_memslot(slots, log->slot);
3065                 memslot->nr_dirty_pages = 0;
3066                 memslot->dirty_bitmap = dirty_bitmap_head;
3067                 update_memslots(slots, NULL);
3068
3069                 old_slots = kvm->memslots;
3070                 rcu_assign_pointer(kvm->memslots, slots);
3071                 synchronize_srcu_expedited(&kvm->srcu);
3072                 kfree(old_slots);
3073
3074                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3075
3076                 r = -EFAULT;
3077                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3078                         goto out;
3079         } else {
3080                 r = -EFAULT;
3081                 if (clear_user(log->dirty_bitmap, n))
3082                         goto out;
3083         }
3084
3085         r = 0;
3086 out:
3087         mutex_unlock(&kvm->slots_lock);
3088         return r;
3089 }
3090
3091 long kvm_arch_vm_ioctl(struct file *filp,
3092                        unsigned int ioctl, unsigned long arg)
3093 {
3094         struct kvm *kvm = filp->private_data;
3095         void __user *argp = (void __user *)arg;
3096         int r = -ENOTTY;
3097         /*
3098          * This union makes it completely explicit to gcc-3.x
3099          * that these two variables' stack usage should be
3100          * combined, not added together.
3101          */
3102         union {
3103                 struct kvm_pit_state ps;
3104                 struct kvm_pit_state2 ps2;
3105                 struct kvm_pit_config pit_config;
3106         } u;
3107
3108         switch (ioctl) {
3109         case KVM_SET_TSS_ADDR:
3110                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3111                 if (r < 0)
3112                         goto out;
3113                 break;
3114         case KVM_SET_IDENTITY_MAP_ADDR: {
3115                 u64 ident_addr;
3116
3117                 r = -EFAULT;
3118                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3119                         goto out;
3120                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3121                 if (r < 0)
3122                         goto out;
3123                 break;
3124         }
3125         case KVM_SET_NR_MMU_PAGES:
3126                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3127                 if (r)
3128                         goto out;
3129                 break;
3130         case KVM_GET_NR_MMU_PAGES:
3131                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3132                 break;
3133         case KVM_CREATE_IRQCHIP: {
3134                 struct kvm_pic *vpic;
3135
3136                 mutex_lock(&kvm->lock);
3137                 r = -EEXIST;
3138                 if (kvm->arch.vpic)
3139                         goto create_irqchip_unlock;
3140                 r = -ENOMEM;
3141                 vpic = kvm_create_pic(kvm);
3142                 if (vpic) {
3143                         r = kvm_ioapic_init(kvm);
3144                         if (r) {
3145                                 mutex_lock(&kvm->slots_lock);
3146                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3147                                                           &vpic->dev_master);
3148                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3149                                                           &vpic->dev_slave);
3150                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3151                                                           &vpic->dev_eclr);
3152                                 mutex_unlock(&kvm->slots_lock);
3153                                 kfree(vpic);
3154                                 goto create_irqchip_unlock;
3155                         }
3156                 } else
3157                         goto create_irqchip_unlock;
3158                 smp_wmb();
3159                 kvm->arch.vpic = vpic;
3160                 smp_wmb();
3161                 r = kvm_setup_default_irq_routing(kvm);
3162                 if (r) {
3163                         mutex_lock(&kvm->slots_lock);
3164                         mutex_lock(&kvm->irq_lock);
3165                         kvm_ioapic_destroy(kvm);
3166                         kvm_destroy_pic(kvm);
3167                         mutex_unlock(&kvm->irq_lock);
3168                         mutex_unlock(&kvm->slots_lock);
3169                 }
3170         create_irqchip_unlock:
3171                 mutex_unlock(&kvm->lock);
3172                 break;
3173         }
3174         case KVM_CREATE_PIT:
3175                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3176                 goto create_pit;
3177         case KVM_CREATE_PIT2:
3178                 r = -EFAULT;
3179                 if (copy_from_user(&u.pit_config, argp,
3180                                    sizeof(struct kvm_pit_config)))
3181                         goto out;
3182         create_pit:
3183                 mutex_lock(&kvm->slots_lock);
3184                 r = -EEXIST;
3185                 if (kvm->arch.vpit)
3186                         goto create_pit_unlock;
3187                 r = -ENOMEM;
3188                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3189                 if (kvm->arch.vpit)
3190                         r = 0;
3191         create_pit_unlock:
3192                 mutex_unlock(&kvm->slots_lock);
3193                 break;
3194         case KVM_IRQ_LINE_STATUS:
3195         case KVM_IRQ_LINE: {
3196                 struct kvm_irq_level irq_event;
3197
3198                 r = -EFAULT;
3199                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3200                         goto out;
3201                 r = -ENXIO;
3202                 if (irqchip_in_kernel(kvm)) {
3203                         __s32 status;
3204                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3205                                         irq_event.irq, irq_event.level);
3206                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3207                                 r = -EFAULT;
3208                                 irq_event.status = status;
3209                                 if (copy_to_user(argp, &irq_event,
3210                                                         sizeof irq_event))
3211                                         goto out;
3212                         }
3213                         r = 0;
3214                 }
3215                 break;
3216         }
3217         case KVM_GET_IRQCHIP: {
3218                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3219                 struct kvm_irqchip *chip;
3220
3221                 chip = memdup_user(argp, sizeof(*chip));
3222                 if (IS_ERR(chip)) {
3223                         r = PTR_ERR(chip);
3224                         goto out;
3225                 }
3226
3227                 r = -ENXIO;
3228                 if (!irqchip_in_kernel(kvm))
3229                         goto get_irqchip_out;
3230                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3231                 if (r)
3232                         goto get_irqchip_out;
3233                 r = -EFAULT;
3234                 if (copy_to_user(argp, chip, sizeof *chip))
3235                         goto get_irqchip_out;
3236                 r = 0;
3237         get_irqchip_out:
3238                 kfree(chip);
3239                 if (r)
3240                         goto out;
3241                 break;
3242         }
3243         case KVM_SET_IRQCHIP: {
3244                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3245                 struct kvm_irqchip *chip;
3246
3247                 chip = memdup_user(argp, sizeof(*chip));
3248                 if (IS_ERR(chip)) {
3249                         r = PTR_ERR(chip);
3250                         goto out;
3251                 }
3252
3253                 r = -ENXIO;
3254                 if (!irqchip_in_kernel(kvm))
3255                         goto set_irqchip_out;
3256                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3257                 if (r)
3258                         goto set_irqchip_out;
3259                 r = 0;
3260         set_irqchip_out:
3261                 kfree(chip);
3262                 if (r)
3263                         goto out;
3264                 break;
3265         }
3266         case KVM_GET_PIT: {
3267                 r = -EFAULT;
3268                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3269                         goto out;
3270                 r = -ENXIO;
3271                 if (!kvm->arch.vpit)
3272                         goto out;
3273                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3274                 if (r)
3275                         goto out;
3276                 r = -EFAULT;
3277                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3278                         goto out;
3279                 r = 0;
3280                 break;
3281         }
3282         case KVM_SET_PIT: {
3283                 r = -EFAULT;
3284                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3285                         goto out;
3286                 r = -ENXIO;
3287                 if (!kvm->arch.vpit)
3288                         goto out;
3289                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3290                 if (r)
3291                         goto out;
3292                 r = 0;
3293                 break;
3294         }
3295         case KVM_GET_PIT2: {
3296                 r = -ENXIO;
3297                 if (!kvm->arch.vpit)
3298                         goto out;
3299                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3300                 if (r)
3301                         goto out;
3302                 r = -EFAULT;
3303                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3304                         goto out;
3305                 r = 0;
3306                 break;
3307         }
3308         case KVM_SET_PIT2: {
3309                 r = -EFAULT;
3310                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3311                         goto out;
3312                 r = -ENXIO;
3313                 if (!kvm->arch.vpit)
3314                         goto out;
3315                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3316                 if (r)
3317                         goto out;
3318                 r = 0;
3319                 break;
3320         }
3321         case KVM_REINJECT_CONTROL: {
3322                 struct kvm_reinject_control control;
3323                 r =  -EFAULT;
3324                 if (copy_from_user(&control, argp, sizeof(control)))
3325                         goto out;
3326                 r = kvm_vm_ioctl_reinject(kvm, &control);
3327                 if (r)
3328                         goto out;
3329                 r = 0;
3330                 break;
3331         }
3332         case KVM_XEN_HVM_CONFIG: {
3333                 r = -EFAULT;
3334                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3335                                    sizeof(struct kvm_xen_hvm_config)))
3336                         goto out;
3337                 r = -EINVAL;
3338                 if (kvm->arch.xen_hvm_config.flags)
3339                         goto out;
3340                 r = 0;
3341                 break;
3342         }
3343         case KVM_SET_CLOCK: {
3344                 struct kvm_clock_data user_ns;
3345                 u64 now_ns;
3346                 s64 delta;
3347
3348                 r = -EFAULT;
3349                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3350                         goto out;
3351
3352                 r = -EINVAL;
3353                 if (user_ns.flags)
3354                         goto out;
3355
3356                 r = 0;
3357                 local_irq_disable();
3358                 now_ns = get_kernel_ns();
3359                 delta = user_ns.clock - now_ns;
3360                 local_irq_enable();
3361                 kvm->arch.kvmclock_offset = delta;
3362                 break;
3363         }
3364         case KVM_GET_CLOCK: {
3365                 struct kvm_clock_data user_ns;
3366                 u64 now_ns;
3367
3368                 local_irq_disable();
3369                 now_ns = get_kernel_ns();
3370                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3371                 local_irq_enable();
3372                 user_ns.flags = 0;
3373                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3374
3375                 r = -EFAULT;
3376                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3377                         goto out;
3378                 r = 0;
3379                 break;
3380         }
3381
3382         default:
3383                 ;
3384         }
3385 out:
3386         return r;
3387 }
3388
3389 static void kvm_init_msr_list(void)
3390 {
3391         u32 dummy[2];
3392         unsigned i, j;
3393
3394         /* skip the first msrs in the list. KVM-specific */
3395         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3396                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3397                         continue;
3398                 if (j < i)
3399                         msrs_to_save[j] = msrs_to_save[i];
3400                 j++;
3401         }
3402         num_msrs_to_save = j;
3403 }
3404
3405 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3406                            const void *v)
3407 {
3408         int handled = 0;
3409         int n;
3410
3411         do {
3412                 n = min(len, 8);
3413                 if (!(vcpu->arch.apic &&
3414                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3415                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3416                         break;
3417                 handled += n;
3418                 addr += n;
3419                 len -= n;
3420                 v += n;
3421         } while (len);
3422
3423         return handled;
3424 }
3425
3426 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3427 {
3428         int handled = 0;
3429         int n;
3430
3431         do {
3432                 n = min(len, 8);
3433                 if (!(vcpu->arch.apic &&
3434                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3435                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3436                         break;
3437                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3438                 handled += n;
3439                 addr += n;
3440                 len -= n;
3441                 v += n;
3442         } while (len);
3443
3444         return handled;
3445 }
3446
3447 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3448                         struct kvm_segment *var, int seg)
3449 {
3450         kvm_x86_ops->set_segment(vcpu, var, seg);
3451 }
3452
3453 void kvm_get_segment(struct kvm_vcpu *vcpu,
3454                      struct kvm_segment *var, int seg)
3455 {
3456         kvm_x86_ops->get_segment(vcpu, var, seg);
3457 }
3458
3459 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3460 {
3461         gpa_t t_gpa;
3462         struct x86_exception exception;
3463
3464         BUG_ON(!mmu_is_nested(vcpu));
3465
3466         /* NPT walks are always user-walks */
3467         access |= PFERR_USER_MASK;
3468         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3469
3470         return t_gpa;
3471 }
3472
3473 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3474                               struct x86_exception *exception)
3475 {
3476         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3477         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3478 }
3479
3480  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3481                                 struct x86_exception *exception)
3482 {
3483         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3484         access |= PFERR_FETCH_MASK;
3485         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3486 }
3487
3488 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3489                                struct x86_exception *exception)
3490 {
3491         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3492         access |= PFERR_WRITE_MASK;
3493         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3494 }
3495
3496 /* uses this to access any guest's mapped memory without checking CPL */
3497 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3498                                 struct x86_exception *exception)
3499 {
3500         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3501 }
3502
3503 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3504                                       struct kvm_vcpu *vcpu, u32 access,
3505                                       struct x86_exception *exception)
3506 {
3507         void *data = val;
3508         int r = X86EMUL_CONTINUE;
3509
3510         while (bytes) {
3511                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3512                                                             exception);
3513                 unsigned offset = addr & (PAGE_SIZE-1);
3514                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3515                 int ret;
3516
3517                 if (gpa == UNMAPPED_GVA)
3518                         return X86EMUL_PROPAGATE_FAULT;
3519                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3520                 if (ret < 0) {
3521                         r = X86EMUL_IO_NEEDED;
3522                         goto out;
3523                 }
3524
3525                 bytes -= toread;
3526                 data += toread;
3527                 addr += toread;
3528         }
3529 out:
3530         return r;
3531 }
3532
3533 /* used for instruction fetching */
3534 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3535                                 gva_t addr, void *val, unsigned int bytes,
3536                                 struct x86_exception *exception)
3537 {
3538         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3539         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3540
3541         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3542                                           access | PFERR_FETCH_MASK,
3543                                           exception);
3544 }
3545
3546 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3547                                gva_t addr, void *val, unsigned int bytes,
3548                                struct x86_exception *exception)
3549 {
3550         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3551         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3552
3553         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3554                                           exception);
3555 }
3556 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3557
3558 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3559                                       gva_t addr, void *val, unsigned int bytes,
3560                                       struct x86_exception *exception)
3561 {
3562         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3563         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3564 }
3565
3566 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3567                                        gva_t addr, void *val,
3568                                        unsigned int bytes,
3569                                        struct x86_exception *exception)
3570 {
3571         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3572         void *data = val;
3573         int r = X86EMUL_CONTINUE;
3574
3575         while (bytes) {
3576                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3577                                                              PFERR_WRITE_MASK,
3578                                                              exception);
3579                 unsigned offset = addr & (PAGE_SIZE-1);
3580                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3581                 int ret;
3582
3583                 if (gpa == UNMAPPED_GVA)
3584                         return X86EMUL_PROPAGATE_FAULT;
3585                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3586                 if (ret < 0) {
3587                         r = X86EMUL_IO_NEEDED;
3588                         goto out;
3589                 }
3590
3591                 bytes -= towrite;
3592                 data += towrite;
3593                 addr += towrite;
3594         }
3595 out:
3596         return r;
3597 }
3598 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3599
3600 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3601                                 gpa_t *gpa, struct x86_exception *exception,
3602                                 bool write)
3603 {
3604         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3605
3606         if (vcpu_match_mmio_gva(vcpu, gva) &&
3607                   check_write_user_access(vcpu, write, access,
3608                   vcpu->arch.access)) {
3609                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3610                                         (gva & (PAGE_SIZE - 1));
3611                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3612                 return 1;
3613         }
3614
3615         if (write)
3616                 access |= PFERR_WRITE_MASK;
3617
3618         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3619
3620         if (*gpa == UNMAPPED_GVA)
3621                 return -1;
3622
3623         /* For APIC access vmexit */
3624         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3625                 return 1;
3626
3627         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3628                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3629                 return 1;
3630         }
3631
3632         return 0;
3633 }
3634
3635 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3636                         const void *val, int bytes)
3637 {
3638         int ret;
3639
3640         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3641         if (ret < 0)
3642                 return 0;
3643         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3644         return 1;
3645 }
3646
3647 struct read_write_emulator_ops {
3648         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3649                                   int bytes);
3650         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3651                                   void *val, int bytes);
3652         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3653                                int bytes, void *val);
3654         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3655                                     void *val, int bytes);
3656         bool write;
3657 };
3658
3659 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3660 {
3661         if (vcpu->mmio_read_completed) {
3662                 memcpy(val, vcpu->mmio_data, bytes);
3663                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3664                                vcpu->mmio_phys_addr, *(u64 *)val);
3665                 vcpu->mmio_read_completed = 0;
3666                 return 1;
3667         }
3668
3669         return 0;
3670 }
3671
3672 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3673                         void *val, int bytes)
3674 {
3675         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3676 }
3677
3678 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3679                          void *val, int bytes)
3680 {
3681         return emulator_write_phys(vcpu, gpa, val, bytes);
3682 }
3683
3684 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3685 {
3686         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3687         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3688 }
3689
3690 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3691                           void *val, int bytes)
3692 {
3693         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3694         return X86EMUL_IO_NEEDED;
3695 }
3696
3697 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3698                            void *val, int bytes)
3699 {
3700         memcpy(vcpu->mmio_data, val, bytes);
3701         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3702         return X86EMUL_CONTINUE;
3703 }
3704
3705 static struct read_write_emulator_ops read_emultor = {
3706         .read_write_prepare = read_prepare,
3707         .read_write_emulate = read_emulate,
3708         .read_write_mmio = vcpu_mmio_read,
3709         .read_write_exit_mmio = read_exit_mmio,
3710 };
3711
3712 static struct read_write_emulator_ops write_emultor = {
3713         .read_write_emulate = write_emulate,
3714         .read_write_mmio = write_mmio,
3715         .read_write_exit_mmio = write_exit_mmio,
3716         .write = true,
3717 };
3718
3719 static int emulator_read_write_onepage(unsigned long addr, void *val,
3720                                        unsigned int bytes,
3721                                        struct x86_exception *exception,
3722                                        struct kvm_vcpu *vcpu,
3723                                        struct read_write_emulator_ops *ops)
3724 {
3725         gpa_t gpa;
3726         int handled, ret;
3727         bool write = ops->write;
3728
3729         if (ops->read_write_prepare &&
3730                   ops->read_write_prepare(vcpu, val, bytes))
3731                 return X86EMUL_CONTINUE;
3732
3733         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3734
3735         if (ret < 0)
3736                 return X86EMUL_PROPAGATE_FAULT;
3737
3738         /* For APIC access vmexit */
3739         if (ret)
3740                 goto mmio;
3741
3742         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3743                 return X86EMUL_CONTINUE;
3744
3745 mmio:
3746         /*
3747          * Is this MMIO handled locally?
3748          */
3749         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3750         if (handled == bytes)
3751                 return X86EMUL_CONTINUE;
3752
3753         gpa += handled;
3754         bytes -= handled;
3755         val += handled;
3756
3757         vcpu->mmio_needed = 1;
3758         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3759         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3760         vcpu->mmio_size = bytes;
3761         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3762         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3763         vcpu->mmio_index = 0;
3764
3765         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3766 }
3767
3768 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3769                         void *val, unsigned int bytes,
3770                         struct x86_exception *exception,
3771                         struct read_write_emulator_ops *ops)
3772 {
3773         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3774
3775         /* Crossing a page boundary? */
3776         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3777                 int rc, now;
3778
3779                 now = -addr & ~PAGE_MASK;
3780                 rc = emulator_read_write_onepage(addr, val, now, exception,
3781                                                  vcpu, ops);
3782
3783                 if (rc != X86EMUL_CONTINUE)
3784                         return rc;
3785                 addr += now;
3786                 val += now;
3787                 bytes -= now;
3788         }
3789
3790         return emulator_read_write_onepage(addr, val, bytes, exception,
3791                                            vcpu, ops);
3792 }
3793
3794 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3795                                   unsigned long addr,
3796                                   void *val,
3797                                   unsigned int bytes,
3798                                   struct x86_exception *exception)
3799 {
3800         return emulator_read_write(ctxt, addr, val, bytes,
3801                                    exception, &read_emultor);
3802 }
3803
3804 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3805                             unsigned long addr,
3806                             const void *val,
3807                             unsigned int bytes,
3808                             struct x86_exception *exception)
3809 {
3810         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3811                                    exception, &write_emultor);
3812 }
3813
3814 #define CMPXCHG_TYPE(t, ptr, old, new) \
3815         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3816
3817 #ifdef CONFIG_X86_64
3818 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3819 #else
3820 #  define CMPXCHG64(ptr, old, new) \
3821         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3822 #endif
3823
3824 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3825                                      unsigned long addr,
3826                                      const void *old,
3827                                      const void *new,
3828                                      unsigned int bytes,
3829                                      struct x86_exception *exception)
3830 {
3831         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3832         gpa_t gpa;
3833         struct page *page;
3834         char *kaddr;
3835         bool exchanged;
3836
3837         /* guests cmpxchg8b have to be emulated atomically */
3838         if (bytes > 8 || (bytes & (bytes - 1)))
3839                 goto emul_write;
3840
3841         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3842
3843         if (gpa == UNMAPPED_GVA ||
3844             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3845                 goto emul_write;
3846
3847         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3848                 goto emul_write;
3849
3850         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3851         if (is_error_page(page)) {
3852                 kvm_release_page_clean(page);
3853                 goto emul_write;
3854         }
3855
3856         kaddr = kmap_atomic(page, KM_USER0);
3857         kaddr += offset_in_page(gpa);
3858         switch (bytes) {
3859         case 1:
3860                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3861                 break;
3862         case 2:
3863                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3864                 break;
3865         case 4:
3866                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3867                 break;
3868         case 8:
3869                 exchanged = CMPXCHG64(kaddr, old, new);
3870                 break;
3871         default:
3872                 BUG();
3873         }
3874         kunmap_atomic(kaddr, KM_USER0);
3875         kvm_release_page_dirty(page);
3876
3877         if (!exchanged)
3878                 return X86EMUL_CMPXCHG_FAILED;
3879
3880         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3881
3882         return X86EMUL_CONTINUE;
3883
3884 emul_write:
3885         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3886
3887         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3888 }
3889
3890 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3891 {
3892         /* TODO: String I/O for in kernel device */
3893         int r;
3894
3895         if (vcpu->arch.pio.in)
3896                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3897                                     vcpu->arch.pio.size, pd);
3898         else
3899                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3900                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3901                                      pd);
3902         return r;
3903 }
3904
3905 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3906                                unsigned short port, void *val,
3907                                unsigned int count, bool in)
3908 {
3909         trace_kvm_pio(!in, port, size, count);
3910
3911         vcpu->arch.pio.port = port;
3912         vcpu->arch.pio.in = in;
3913         vcpu->arch.pio.count  = count;
3914         vcpu->arch.pio.size = size;
3915
3916         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3917                 vcpu->arch.pio.count = 0;
3918                 return 1;
3919         }
3920
3921         vcpu->run->exit_reason = KVM_EXIT_IO;
3922         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3923         vcpu->run->io.size = size;
3924         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3925         vcpu->run->io.count = count;
3926         vcpu->run->io.port = port;
3927
3928         return 0;
3929 }
3930
3931 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3932                                     int size, unsigned short port, void *val,
3933                                     unsigned int count)
3934 {
3935         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3936         int ret;
3937
3938         if (vcpu->arch.pio.count)
3939                 goto data_avail;
3940
3941         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3942         if (ret) {
3943 data_avail:
3944                 memcpy(val, vcpu->arch.pio_data, size * count);
3945                 vcpu->arch.pio.count = 0;
3946                 return 1;
3947         }
3948
3949         return 0;
3950 }
3951
3952 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3953                                      int size, unsigned short port,
3954                                      const void *val, unsigned int count)
3955 {
3956         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3957
3958         memcpy(vcpu->arch.pio_data, val, size * count);
3959         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3960 }
3961
3962 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3963 {
3964         return kvm_x86_ops->get_segment_base(vcpu, seg);
3965 }
3966
3967 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3968 {
3969         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3970 }
3971
3972 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3973 {
3974         if (!need_emulate_wbinvd(vcpu))
3975                 return X86EMUL_CONTINUE;
3976
3977         if (kvm_x86_ops->has_wbinvd_exit()) {
3978                 int cpu = get_cpu();
3979
3980                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3981                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3982                                 wbinvd_ipi, NULL, 1);
3983                 put_cpu();
3984                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3985         } else
3986                 wbinvd();
3987         return X86EMUL_CONTINUE;
3988 }
3989 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3990
3991 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
3992 {
3993         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
3994 }
3995
3996 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3997 {
3998         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
3999 }
4000
4001 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4002 {
4003
4004         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4005 }
4006
4007 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4008 {
4009         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4010 }
4011
4012 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4013 {
4014         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4015         unsigned long value;
4016
4017         switch (cr) {
4018         case 0:
4019                 value = kvm_read_cr0(vcpu);
4020                 break;
4021         case 2:
4022                 value = vcpu->arch.cr2;
4023                 break;
4024         case 3:
4025                 value = kvm_read_cr3(vcpu);
4026                 break;
4027         case 4:
4028                 value = kvm_read_cr4(vcpu);
4029                 break;
4030         case 8:
4031                 value = kvm_get_cr8(vcpu);
4032                 break;
4033         default:
4034                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4035                 return 0;
4036         }
4037
4038         return value;
4039 }
4040
4041 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4042 {
4043         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4044         int res = 0;
4045
4046         switch (cr) {
4047         case 0:
4048                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4049                 break;
4050         case 2:
4051                 vcpu->arch.cr2 = val;
4052                 break;
4053         case 3:
4054                 res = kvm_set_cr3(vcpu, val);
4055                 break;
4056         case 4:
4057                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4058                 break;
4059         case 8:
4060                 res = kvm_set_cr8(vcpu, val);
4061                 break;
4062         default:
4063                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4064                 res = -1;
4065         }
4066
4067         return res;
4068 }
4069
4070 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4071 {
4072         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4073 }
4074
4075 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4076 {
4077         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4078 }
4079
4080 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4081 {
4082         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4083 }
4084
4085 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4086 {
4087         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4088 }
4089
4090 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4091 {
4092         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4093 }
4094
4095 static unsigned long emulator_get_cached_segment_base(
4096         struct x86_emulate_ctxt *ctxt, int seg)
4097 {
4098         return get_segment_base(emul_to_vcpu(ctxt), seg);
4099 }
4100
4101 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4102                                  struct desc_struct *desc, u32 *base3,
4103                                  int seg)
4104 {
4105         struct kvm_segment var;
4106
4107         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4108         *selector = var.selector;
4109
4110         if (var.unusable)
4111                 return false;
4112
4113         if (var.g)
4114                 var.limit >>= 12;
4115         set_desc_limit(desc, var.limit);
4116         set_desc_base(desc, (unsigned long)var.base);
4117 #ifdef CONFIG_X86_64
4118         if (base3)
4119                 *base3 = var.base >> 32;
4120 #endif
4121         desc->type = var.type;
4122         desc->s = var.s;
4123         desc->dpl = var.dpl;
4124         desc->p = var.present;
4125         desc->avl = var.avl;
4126         desc->l = var.l;
4127         desc->d = var.db;
4128         desc->g = var.g;
4129
4130         return true;
4131 }
4132
4133 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4134                                  struct desc_struct *desc, u32 base3,
4135                                  int seg)
4136 {
4137         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4138         struct kvm_segment var;
4139
4140         var.selector = selector;
4141         var.base = get_desc_base(desc);
4142 #ifdef CONFIG_X86_64
4143         var.base |= ((u64)base3) << 32;
4144 #endif
4145         var.limit = get_desc_limit(desc);
4146         if (desc->g)
4147                 var.limit = (var.limit << 12) | 0xfff;
4148         var.type = desc->type;
4149         var.present = desc->p;
4150         var.dpl = desc->dpl;
4151         var.db = desc->d;
4152         var.s = desc->s;
4153         var.l = desc->l;
4154         var.g = desc->g;
4155         var.avl = desc->avl;
4156         var.present = desc->p;
4157         var.unusable = !var.present;
4158         var.padding = 0;
4159
4160         kvm_set_segment(vcpu, &var, seg);
4161         return;
4162 }
4163
4164 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4165                             u32 msr_index, u64 *pdata)
4166 {
4167         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4168 }
4169
4170 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4171                             u32 msr_index, u64 data)
4172 {
4173         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4174 }
4175
4176 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4177                              u32 pmc, u64 *pdata)
4178 {
4179         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4180 }
4181
4182 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4183 {
4184         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4185 }
4186
4187 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4188 {
4189         preempt_disable();
4190         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4191         /*
4192          * CR0.TS may reference the host fpu state, not the guest fpu state,
4193          * so it may be clear at this point.
4194          */
4195         clts();
4196 }
4197
4198 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4199 {
4200         preempt_enable();
4201 }
4202
4203 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4204                               struct x86_instruction_info *info,
4205                               enum x86_intercept_stage stage)
4206 {
4207         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4208 }
4209
4210 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4211                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4212 {
4213         struct kvm_cpuid_entry2 *cpuid = NULL;
4214
4215         if (eax && ecx)
4216                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4217                                             *eax, *ecx);
4218
4219         if (cpuid) {
4220                 *eax = cpuid->eax;
4221                 *ecx = cpuid->ecx;
4222                 if (ebx)
4223                         *ebx = cpuid->ebx;
4224                 if (edx)
4225                         *edx = cpuid->edx;
4226                 return true;
4227         }
4228
4229         return false;
4230 }
4231
4232 static struct x86_emulate_ops emulate_ops = {
4233         .read_std            = kvm_read_guest_virt_system,
4234         .write_std           = kvm_write_guest_virt_system,
4235         .fetch               = kvm_fetch_guest_virt,
4236         .read_emulated       = emulator_read_emulated,
4237         .write_emulated      = emulator_write_emulated,
4238         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4239         .invlpg              = emulator_invlpg,
4240         .pio_in_emulated     = emulator_pio_in_emulated,
4241         .pio_out_emulated    = emulator_pio_out_emulated,
4242         .get_segment         = emulator_get_segment,
4243         .set_segment         = emulator_set_segment,
4244         .get_cached_segment_base = emulator_get_cached_segment_base,
4245         .get_gdt             = emulator_get_gdt,
4246         .get_idt             = emulator_get_idt,
4247         .set_gdt             = emulator_set_gdt,
4248         .set_idt             = emulator_set_idt,
4249         .get_cr              = emulator_get_cr,
4250         .set_cr              = emulator_set_cr,
4251         .cpl                 = emulator_get_cpl,
4252         .get_dr              = emulator_get_dr,
4253         .set_dr              = emulator_set_dr,
4254         .set_msr             = emulator_set_msr,
4255         .get_msr             = emulator_get_msr,
4256         .read_pmc            = emulator_read_pmc,
4257         .halt                = emulator_halt,
4258         .wbinvd              = emulator_wbinvd,
4259         .fix_hypercall       = emulator_fix_hypercall,
4260         .get_fpu             = emulator_get_fpu,
4261         .put_fpu             = emulator_put_fpu,
4262         .intercept           = emulator_intercept,
4263         .get_cpuid           = emulator_get_cpuid,
4264 };
4265
4266 static void cache_all_regs(struct kvm_vcpu *vcpu)
4267 {
4268         kvm_register_read(vcpu, VCPU_REGS_RAX);
4269         kvm_register_read(vcpu, VCPU_REGS_RSP);
4270         kvm_register_read(vcpu, VCPU_REGS_RIP);
4271         vcpu->arch.regs_dirty = ~0;
4272 }
4273
4274 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4275 {
4276         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4277         /*
4278          * an sti; sti; sequence only disable interrupts for the first
4279          * instruction. So, if the last instruction, be it emulated or
4280          * not, left the system with the INT_STI flag enabled, it
4281          * means that the last instruction is an sti. We should not
4282          * leave the flag on in this case. The same goes for mov ss
4283          */
4284         if (!(int_shadow & mask))
4285                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4286 }
4287
4288 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4289 {
4290         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4291         if (ctxt->exception.vector == PF_VECTOR)
4292                 kvm_propagate_fault(vcpu, &ctxt->exception);
4293         else if (ctxt->exception.error_code_valid)
4294                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4295                                       ctxt->exception.error_code);
4296         else
4297                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4298 }
4299
4300 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4301                               const unsigned long *regs)
4302 {
4303         memset(&ctxt->twobyte, 0,
4304                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4305         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4306
4307         ctxt->fetch.start = 0;
4308         ctxt->fetch.end = 0;
4309         ctxt->io_read.pos = 0;
4310         ctxt->io_read.end = 0;
4311         ctxt->mem_read.pos = 0;
4312         ctxt->mem_read.end = 0;
4313 }
4314
4315 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4316 {
4317         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4318         int cs_db, cs_l;
4319
4320         /*
4321          * TODO: fix emulate.c to use guest_read/write_register
4322          * instead of direct ->regs accesses, can save hundred cycles
4323          * on Intel for instructions that don't read/change RSP, for
4324          * for example.
4325          */
4326         cache_all_regs(vcpu);
4327
4328         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4329
4330         ctxt->eflags = kvm_get_rflags(vcpu);
4331         ctxt->eip = kvm_rip_read(vcpu);
4332         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4333                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4334                      cs_l                               ? X86EMUL_MODE_PROT64 :
4335                      cs_db                              ? X86EMUL_MODE_PROT32 :
4336                                                           X86EMUL_MODE_PROT16;
4337         ctxt->guest_mode = is_guest_mode(vcpu);
4338
4339         init_decode_cache(ctxt, vcpu->arch.regs);
4340         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4341 }
4342
4343 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4344 {
4345         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4346         int ret;
4347
4348         init_emulate_ctxt(vcpu);
4349
4350         ctxt->op_bytes = 2;
4351         ctxt->ad_bytes = 2;
4352         ctxt->_eip = ctxt->eip + inc_eip;
4353         ret = emulate_int_real(ctxt, irq);
4354
4355         if (ret != X86EMUL_CONTINUE)
4356                 return EMULATE_FAIL;
4357
4358         ctxt->eip = ctxt->_eip;
4359         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4360         kvm_rip_write(vcpu, ctxt->eip);
4361         kvm_set_rflags(vcpu, ctxt->eflags);
4362
4363         if (irq == NMI_VECTOR)
4364                 vcpu->arch.nmi_pending = 0;
4365         else
4366                 vcpu->arch.interrupt.pending = false;
4367
4368         return EMULATE_DONE;
4369 }
4370 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4371
4372 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4373 {
4374         int r = EMULATE_DONE;
4375
4376         ++vcpu->stat.insn_emulation_fail;
4377         trace_kvm_emulate_insn_failed(vcpu);
4378         if (!is_guest_mode(vcpu)) {
4379                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4380                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4381                 vcpu->run->internal.ndata = 0;
4382                 r = EMULATE_FAIL;
4383         }
4384         kvm_queue_exception(vcpu, UD_VECTOR);
4385
4386         return r;
4387 }
4388
4389 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4390 {
4391         gpa_t gpa;
4392
4393         if (tdp_enabled)
4394                 return false;
4395
4396         /*
4397          * if emulation was due to access to shadowed page table
4398          * and it failed try to unshadow page and re-entetr the
4399          * guest to let CPU execute the instruction.
4400          */
4401         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4402                 return true;
4403
4404         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4405
4406         if (gpa == UNMAPPED_GVA)
4407                 return true; /* let cpu generate fault */
4408
4409         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4410                 return true;
4411
4412         return false;
4413 }
4414
4415 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4416                               unsigned long cr2,  int emulation_type)
4417 {
4418         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4419         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4420
4421         last_retry_eip = vcpu->arch.last_retry_eip;
4422         last_retry_addr = vcpu->arch.last_retry_addr;
4423
4424         /*
4425          * If the emulation is caused by #PF and it is non-page_table
4426          * writing instruction, it means the VM-EXIT is caused by shadow
4427          * page protected, we can zap the shadow page and retry this
4428          * instruction directly.
4429          *
4430          * Note: if the guest uses a non-page-table modifying instruction
4431          * on the PDE that points to the instruction, then we will unmap
4432          * the instruction and go to an infinite loop. So, we cache the
4433          * last retried eip and the last fault address, if we meet the eip
4434          * and the address again, we can break out of the potential infinite
4435          * loop.
4436          */
4437         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4438
4439         if (!(emulation_type & EMULTYPE_RETRY))
4440                 return false;
4441
4442         if (x86_page_table_writing_insn(ctxt))
4443                 return false;
4444
4445         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4446                 return false;
4447
4448         vcpu->arch.last_retry_eip = ctxt->eip;
4449         vcpu->arch.last_retry_addr = cr2;
4450
4451         if (!vcpu->arch.mmu.direct_map)
4452                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4453
4454         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4455
4456         return true;
4457 }
4458
4459 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4460                             unsigned long cr2,
4461                             int emulation_type,
4462                             void *insn,
4463                             int insn_len)
4464 {
4465         int r;
4466         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4467         bool writeback = true;
4468
4469         kvm_clear_exception_queue(vcpu);
4470
4471         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4472                 init_emulate_ctxt(vcpu);
4473                 ctxt->interruptibility = 0;
4474                 ctxt->have_exception = false;
4475                 ctxt->perm_ok = false;
4476
4477                 ctxt->only_vendor_specific_insn
4478                         = emulation_type & EMULTYPE_TRAP_UD;
4479
4480                 r = x86_decode_insn(ctxt, insn, insn_len);
4481
4482                 trace_kvm_emulate_insn_start(vcpu);
4483                 ++vcpu->stat.insn_emulation;
4484                 if (r != EMULATION_OK)  {
4485                         if (emulation_type & EMULTYPE_TRAP_UD)
4486                                 return EMULATE_FAIL;
4487                         if (reexecute_instruction(vcpu, cr2))
4488                                 return EMULATE_DONE;
4489                         if (emulation_type & EMULTYPE_SKIP)
4490                                 return EMULATE_FAIL;
4491                         return handle_emulation_failure(vcpu);
4492                 }
4493         }
4494
4495         if (emulation_type & EMULTYPE_SKIP) {
4496                 kvm_rip_write(vcpu, ctxt->_eip);
4497                 return EMULATE_DONE;
4498         }
4499
4500         if (retry_instruction(ctxt, cr2, emulation_type))
4501                 return EMULATE_DONE;
4502
4503         /* this is needed for vmware backdoor interface to work since it
4504            changes registers values  during IO operation */
4505         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4506                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4507                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4508         }
4509
4510 restart:
4511         r = x86_emulate_insn(ctxt);
4512
4513         if (r == EMULATION_INTERCEPTED)
4514                 return EMULATE_DONE;
4515
4516         if (r == EMULATION_FAILED) {
4517                 if (reexecute_instruction(vcpu, cr2))
4518                         return EMULATE_DONE;
4519
4520                 return handle_emulation_failure(vcpu);
4521         }
4522
4523         if (ctxt->have_exception) {
4524                 inject_emulated_exception(vcpu);
4525                 r = EMULATE_DONE;
4526         } else if (vcpu->arch.pio.count) {
4527                 if (!vcpu->arch.pio.in)
4528                         vcpu->arch.pio.count = 0;
4529                 else
4530                         writeback = false;
4531                 r = EMULATE_DO_MMIO;
4532         } else if (vcpu->mmio_needed) {
4533                 if (!vcpu->mmio_is_write)
4534                         writeback = false;
4535                 r = EMULATE_DO_MMIO;
4536         } else if (r == EMULATION_RESTART)
4537                 goto restart;
4538         else
4539                 r = EMULATE_DONE;
4540
4541         if (writeback) {
4542                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4543                 kvm_set_rflags(vcpu, ctxt->eflags);
4544                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4545                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4546                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4547                 kvm_rip_write(vcpu, ctxt->eip);
4548         } else
4549                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4550
4551         return r;
4552 }
4553 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4554
4555 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4556 {
4557         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4558         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4559                                             size, port, &val, 1);
4560         /* do not return to emulator after return from userspace */
4561         vcpu->arch.pio.count = 0;
4562         return ret;
4563 }
4564 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4565
4566 static void tsc_bad(void *info)
4567 {
4568         __this_cpu_write(cpu_tsc_khz, 0);
4569 }
4570
4571 static void tsc_khz_changed(void *data)
4572 {
4573         struct cpufreq_freqs *freq = data;
4574         unsigned long khz = 0;
4575
4576         if (data)
4577                 khz = freq->new;
4578         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4579                 khz = cpufreq_quick_get(raw_smp_processor_id());
4580         if (!khz)
4581                 khz = tsc_khz;
4582         __this_cpu_write(cpu_tsc_khz, khz);
4583 }
4584
4585 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4586                                      void *data)
4587 {
4588         struct cpufreq_freqs *freq = data;
4589         struct kvm *kvm;
4590         struct kvm_vcpu *vcpu;
4591         int i, send_ipi = 0;
4592
4593         /*
4594          * We allow guests to temporarily run on slowing clocks,
4595          * provided we notify them after, or to run on accelerating
4596          * clocks, provided we notify them before.  Thus time never
4597          * goes backwards.
4598          *
4599          * However, we have a problem.  We can't atomically update
4600          * the frequency of a given CPU from this function; it is
4601          * merely a notifier, which can be called from any CPU.
4602          * Changing the TSC frequency at arbitrary points in time
4603          * requires a recomputation of local variables related to
4604          * the TSC for each VCPU.  We must flag these local variables
4605          * to be updated and be sure the update takes place with the
4606          * new frequency before any guests proceed.
4607          *
4608          * Unfortunately, the combination of hotplug CPU and frequency
4609          * change creates an intractable locking scenario; the order
4610          * of when these callouts happen is undefined with respect to
4611          * CPU hotplug, and they can race with each other.  As such,
4612          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4613          * undefined; you can actually have a CPU frequency change take
4614          * place in between the computation of X and the setting of the
4615          * variable.  To protect against this problem, all updates of
4616          * the per_cpu tsc_khz variable are done in an interrupt
4617          * protected IPI, and all callers wishing to update the value
4618          * must wait for a synchronous IPI to complete (which is trivial
4619          * if the caller is on the CPU already).  This establishes the
4620          * necessary total order on variable updates.
4621          *
4622          * Note that because a guest time update may take place
4623          * anytime after the setting of the VCPU's request bit, the
4624          * correct TSC value must be set before the request.  However,
4625          * to ensure the update actually makes it to any guest which
4626          * starts running in hardware virtualization between the set
4627          * and the acquisition of the spinlock, we must also ping the
4628          * CPU after setting the request bit.
4629          *
4630          */
4631
4632         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4633                 return 0;
4634         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4635                 return 0;
4636
4637         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4638
4639         raw_spin_lock(&kvm_lock);
4640         list_for_each_entry(kvm, &vm_list, vm_list) {
4641                 kvm_for_each_vcpu(i, vcpu, kvm) {
4642                         if (vcpu->cpu != freq->cpu)
4643                                 continue;
4644                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4645                         if (vcpu->cpu != smp_processor_id())
4646                                 send_ipi = 1;
4647                 }
4648         }
4649         raw_spin_unlock(&kvm_lock);
4650
4651         if (freq->old < freq->new && send_ipi) {
4652                 /*
4653                  * We upscale the frequency.  Must make the guest
4654                  * doesn't see old kvmclock values while running with
4655                  * the new frequency, otherwise we risk the guest sees
4656                  * time go backwards.
4657                  *
4658                  * In case we update the frequency for another cpu
4659                  * (which might be in guest context) send an interrupt
4660                  * to kick the cpu out of guest context.  Next time
4661                  * guest context is entered kvmclock will be updated,
4662                  * so the guest will not see stale values.
4663                  */
4664                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4665         }
4666         return 0;
4667 }
4668
4669 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4670         .notifier_call  = kvmclock_cpufreq_notifier
4671 };
4672
4673 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4674                                         unsigned long action, void *hcpu)
4675 {
4676         unsigned int cpu = (unsigned long)hcpu;
4677
4678         switch (action) {
4679                 case CPU_ONLINE:
4680                 case CPU_DOWN_FAILED:
4681                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4682                         break;
4683                 case CPU_DOWN_PREPARE:
4684                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4685                         break;
4686         }
4687         return NOTIFY_OK;
4688 }
4689
4690 static struct notifier_block kvmclock_cpu_notifier_block = {
4691         .notifier_call  = kvmclock_cpu_notifier,
4692         .priority = -INT_MAX
4693 };
4694
4695 static void kvm_timer_init(void)
4696 {
4697         int cpu;
4698
4699         max_tsc_khz = tsc_khz;
4700         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4701         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4702 #ifdef CONFIG_CPU_FREQ
4703                 struct cpufreq_policy policy;
4704                 memset(&policy, 0, sizeof(policy));
4705                 cpu = get_cpu();
4706                 cpufreq_get_policy(&policy, cpu);
4707                 if (policy.cpuinfo.max_freq)
4708                         max_tsc_khz = policy.cpuinfo.max_freq;
4709                 put_cpu();
4710 #endif
4711                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4712                                           CPUFREQ_TRANSITION_NOTIFIER);
4713         }
4714         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4715         for_each_online_cpu(cpu)
4716                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4717 }
4718
4719 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4720
4721 int kvm_is_in_guest(void)
4722 {
4723         return __this_cpu_read(current_vcpu) != NULL;
4724 }
4725
4726 static int kvm_is_user_mode(void)
4727 {
4728         int user_mode = 3;
4729
4730         if (__this_cpu_read(current_vcpu))
4731                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4732
4733         return user_mode != 0;
4734 }
4735
4736 static unsigned long kvm_get_guest_ip(void)
4737 {
4738         unsigned long ip = 0;
4739
4740         if (__this_cpu_read(current_vcpu))
4741                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4742
4743         return ip;
4744 }
4745
4746 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4747         .is_in_guest            = kvm_is_in_guest,
4748         .is_user_mode           = kvm_is_user_mode,
4749         .get_guest_ip           = kvm_get_guest_ip,
4750 };
4751
4752 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4753 {
4754         __this_cpu_write(current_vcpu, vcpu);
4755 }
4756 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4757
4758 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4759 {
4760         __this_cpu_write(current_vcpu, NULL);
4761 }
4762 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4763
4764 static void kvm_set_mmio_spte_mask(void)
4765 {
4766         u64 mask;
4767         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4768
4769         /*
4770          * Set the reserved bits and the present bit of an paging-structure
4771          * entry to generate page fault with PFER.RSV = 1.
4772          */
4773         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4774         mask |= 1ull;
4775
4776 #ifdef CONFIG_X86_64
4777         /*
4778          * If reserved bit is not supported, clear the present bit to disable
4779          * mmio page fault.
4780          */
4781         if (maxphyaddr == 52)
4782                 mask &= ~1ull;
4783 #endif
4784
4785         kvm_mmu_set_mmio_spte_mask(mask);
4786 }
4787
4788 int kvm_arch_init(void *opaque)
4789 {
4790         int r;
4791         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4792
4793         if (kvm_x86_ops) {
4794                 printk(KERN_ERR "kvm: already loaded the other module\n");
4795                 r = -EEXIST;
4796                 goto out;
4797         }
4798
4799         if (!ops->cpu_has_kvm_support()) {
4800                 printk(KERN_ERR "kvm: no hardware support\n");
4801                 r = -EOPNOTSUPP;
4802                 goto out;
4803         }
4804         if (ops->disabled_by_bios()) {
4805                 printk(KERN_ERR "kvm: disabled by bios\n");
4806                 r = -EOPNOTSUPP;
4807                 goto out;
4808         }
4809
4810         r = kvm_mmu_module_init();
4811         if (r)
4812                 goto out;
4813
4814         kvm_set_mmio_spte_mask();
4815         kvm_init_msr_list();
4816
4817         kvm_x86_ops = ops;
4818         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4819                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4820
4821         kvm_timer_init();
4822
4823         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4824
4825         if (cpu_has_xsave)
4826                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4827
4828         return 0;
4829
4830 out:
4831         return r;
4832 }
4833
4834 void kvm_arch_exit(void)
4835 {
4836         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4837
4838         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4839                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4840                                             CPUFREQ_TRANSITION_NOTIFIER);
4841         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4842         kvm_x86_ops = NULL;
4843         kvm_mmu_module_exit();
4844 }
4845
4846 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4847 {
4848         ++vcpu->stat.halt_exits;
4849         if (irqchip_in_kernel(vcpu->kvm)) {
4850                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4851                 return 1;
4852         } else {
4853                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4854                 return 0;
4855         }
4856 }
4857 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4858
4859 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4860 {
4861         u64 param, ingpa, outgpa, ret;
4862         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4863         bool fast, longmode;
4864         int cs_db, cs_l;
4865
4866         /*
4867          * hypercall generates UD from non zero cpl and real mode
4868          * per HYPER-V spec
4869          */
4870         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4871                 kvm_queue_exception(vcpu, UD_VECTOR);
4872                 return 0;
4873         }
4874
4875         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4876         longmode = is_long_mode(vcpu) && cs_l == 1;
4877
4878         if (!longmode) {
4879                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4880                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4881                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4882                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4883                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4884                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4885         }
4886 #ifdef CONFIG_X86_64
4887         else {
4888                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4889                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4890                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4891         }
4892 #endif
4893
4894         code = param & 0xffff;
4895         fast = (param >> 16) & 0x1;
4896         rep_cnt = (param >> 32) & 0xfff;
4897         rep_idx = (param >> 48) & 0xfff;
4898
4899         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4900
4901         switch (code) {
4902         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4903                 kvm_vcpu_on_spin(vcpu);
4904                 break;
4905         default:
4906                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4907                 break;
4908         }
4909
4910         ret = res | (((u64)rep_done & 0xfff) << 32);
4911         if (longmode) {
4912                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4913         } else {
4914                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4915                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4916         }
4917
4918         return 1;
4919 }
4920
4921 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4922 {
4923         unsigned long nr, a0, a1, a2, a3, ret;
4924         int r = 1;
4925
4926         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4927                 return kvm_hv_hypercall(vcpu);
4928
4929         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4930         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4931         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4932         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4933         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4934
4935         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4936
4937         if (!is_long_mode(vcpu)) {
4938                 nr &= 0xFFFFFFFF;
4939                 a0 &= 0xFFFFFFFF;
4940                 a1 &= 0xFFFFFFFF;
4941                 a2 &= 0xFFFFFFFF;
4942                 a3 &= 0xFFFFFFFF;
4943         }
4944
4945         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4946                 ret = -KVM_EPERM;
4947                 goto out;
4948         }
4949
4950         switch (nr) {
4951         case KVM_HC_VAPIC_POLL_IRQ:
4952                 ret = 0;
4953                 break;
4954         default:
4955                 ret = -KVM_ENOSYS;
4956                 break;
4957         }
4958 out:
4959         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4960         ++vcpu->stat.hypercalls;
4961         return r;
4962 }
4963 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4964
4965 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4966 {
4967         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4968         char instruction[3];
4969         unsigned long rip = kvm_rip_read(vcpu);
4970
4971         /*
4972          * Blow out the MMU to ensure that no other VCPU has an active mapping
4973          * to ensure that the updated hypercall appears atomically across all
4974          * VCPUs.
4975          */
4976         kvm_mmu_zap_all(vcpu->kvm);
4977
4978         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4979
4980         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
4981 }
4982
4983 /*
4984  * Check if userspace requested an interrupt window, and that the
4985  * interrupt window is open.
4986  *
4987  * No need to exit to userspace if we already have an interrupt queued.
4988  */
4989 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4990 {
4991         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4992                 vcpu->run->request_interrupt_window &&
4993                 kvm_arch_interrupt_allowed(vcpu));
4994 }
4995
4996 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4997 {
4998         struct kvm_run *kvm_run = vcpu->run;
4999
5000         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5001         kvm_run->cr8 = kvm_get_cr8(vcpu);
5002         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5003         if (irqchip_in_kernel(vcpu->kvm))
5004                 kvm_run->ready_for_interrupt_injection = 1;
5005         else
5006                 kvm_run->ready_for_interrupt_injection =
5007                         kvm_arch_interrupt_allowed(vcpu) &&
5008                         !kvm_cpu_has_interrupt(vcpu) &&
5009                         !kvm_event_needs_reinjection(vcpu);
5010 }
5011
5012 static void vapic_enter(struct kvm_vcpu *vcpu)
5013 {
5014         struct kvm_lapic *apic = vcpu->arch.apic;
5015         struct page *page;
5016
5017         if (!apic || !apic->vapic_addr)
5018                 return;
5019
5020         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5021
5022         vcpu->arch.apic->vapic_page = page;
5023 }
5024
5025 static void vapic_exit(struct kvm_vcpu *vcpu)
5026 {
5027         struct kvm_lapic *apic = vcpu->arch.apic;
5028         int idx;
5029
5030         if (!apic || !apic->vapic_addr)
5031                 return;
5032
5033         idx = srcu_read_lock(&vcpu->kvm->srcu);
5034         kvm_release_page_dirty(apic->vapic_page);
5035         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5036         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5037 }
5038
5039 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5040 {
5041         int max_irr, tpr;
5042
5043         if (!kvm_x86_ops->update_cr8_intercept)
5044                 return;
5045
5046         if (!vcpu->arch.apic)
5047                 return;
5048
5049         if (!vcpu->arch.apic->vapic_addr)
5050                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5051         else
5052                 max_irr = -1;
5053
5054         if (max_irr != -1)
5055                 max_irr >>= 4;
5056
5057         tpr = kvm_lapic_get_cr8(vcpu);
5058
5059         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5060 }
5061
5062 static void inject_pending_event(struct kvm_vcpu *vcpu)
5063 {
5064         /* try to reinject previous events if any */
5065         if (vcpu->arch.exception.pending) {
5066                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5067                                         vcpu->arch.exception.has_error_code,
5068                                         vcpu->arch.exception.error_code);
5069                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5070                                           vcpu->arch.exception.has_error_code,
5071                                           vcpu->arch.exception.error_code,
5072                                           vcpu->arch.exception.reinject);
5073                 return;
5074         }
5075
5076         if (vcpu->arch.nmi_injected) {
5077                 kvm_x86_ops->set_nmi(vcpu);
5078                 return;
5079         }
5080
5081         if (vcpu->arch.interrupt.pending) {
5082                 kvm_x86_ops->set_irq(vcpu);
5083                 return;
5084         }
5085
5086         /* try to inject new event if pending */
5087         if (vcpu->arch.nmi_pending) {
5088                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5089                         --vcpu->arch.nmi_pending;
5090                         vcpu->arch.nmi_injected = true;
5091                         kvm_x86_ops->set_nmi(vcpu);
5092                 }
5093         } else if (kvm_cpu_has_interrupt(vcpu)) {
5094                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5095                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5096                                             false);
5097                         kvm_x86_ops->set_irq(vcpu);
5098                 }
5099         }
5100 }
5101
5102 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5103 {
5104         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5105                         !vcpu->guest_xcr0_loaded) {
5106                 /* kvm_set_xcr() also depends on this */
5107                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5108                 vcpu->guest_xcr0_loaded = 1;
5109         }
5110 }
5111
5112 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5113 {
5114         if (vcpu->guest_xcr0_loaded) {
5115                 if (vcpu->arch.xcr0 != host_xcr0)
5116                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5117                 vcpu->guest_xcr0_loaded = 0;
5118         }
5119 }
5120
5121 static void process_nmi(struct kvm_vcpu *vcpu)
5122 {
5123         unsigned limit = 2;
5124
5125         /*
5126          * x86 is limited to one NMI running, and one NMI pending after it.
5127          * If an NMI is already in progress, limit further NMIs to just one.
5128          * Otherwise, allow two (and we'll inject the first one immediately).
5129          */
5130         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5131                 limit = 1;
5132
5133         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5134         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5135         kvm_make_request(KVM_REQ_EVENT, vcpu);
5136 }
5137
5138 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5139 {
5140         int r;
5141         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5142                 vcpu->run->request_interrupt_window;
5143         bool req_immediate_exit = 0;
5144
5145         if (vcpu->requests) {
5146                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5147                         kvm_mmu_unload(vcpu);
5148                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5149                         __kvm_migrate_timers(vcpu);
5150                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5151                         r = kvm_guest_time_update(vcpu);
5152                         if (unlikely(r))
5153                                 goto out;
5154                 }
5155                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5156                         kvm_mmu_sync_roots(vcpu);
5157                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5158                         kvm_x86_ops->tlb_flush(vcpu);
5159                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5160                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5161                         r = 0;
5162                         goto out;
5163                 }
5164                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5165                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5166                         r = 0;
5167                         goto out;
5168                 }
5169                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5170                         vcpu->fpu_active = 0;
5171                         kvm_x86_ops->fpu_deactivate(vcpu);
5172                 }
5173                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5174                         /* Page is swapped out. Do synthetic halt */
5175                         vcpu->arch.apf.halted = true;
5176                         r = 1;
5177                         goto out;
5178                 }
5179                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5180                         record_steal_time(vcpu);
5181                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5182                         process_nmi(vcpu);
5183                 req_immediate_exit =
5184                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5185                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5186                         kvm_handle_pmu_event(vcpu);
5187                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5188                         kvm_deliver_pmi(vcpu);
5189         }
5190
5191         r = kvm_mmu_reload(vcpu);
5192         if (unlikely(r))
5193                 goto out;
5194
5195         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5196                 inject_pending_event(vcpu);
5197
5198                 /* enable NMI/IRQ window open exits if needed */
5199                 if (vcpu->arch.nmi_pending)
5200                         kvm_x86_ops->enable_nmi_window(vcpu);
5201                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5202                         kvm_x86_ops->enable_irq_window(vcpu);
5203
5204                 if (kvm_lapic_enabled(vcpu)) {
5205                         update_cr8_intercept(vcpu);
5206                         kvm_lapic_sync_to_vapic(vcpu);
5207                 }
5208         }
5209
5210         preempt_disable();
5211
5212         kvm_x86_ops->prepare_guest_switch(vcpu);
5213         if (vcpu->fpu_active)
5214                 kvm_load_guest_fpu(vcpu);
5215         kvm_load_guest_xcr0(vcpu);
5216
5217         vcpu->mode = IN_GUEST_MODE;
5218
5219         /* We should set ->mode before check ->requests,
5220          * see the comment in make_all_cpus_request.
5221          */
5222         smp_mb();
5223
5224         local_irq_disable();
5225
5226         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5227             || need_resched() || signal_pending(current)) {
5228                 vcpu->mode = OUTSIDE_GUEST_MODE;
5229                 smp_wmb();
5230                 local_irq_enable();
5231                 preempt_enable();
5232                 kvm_x86_ops->cancel_injection(vcpu);
5233                 r = 1;
5234                 goto out;
5235         }
5236
5237         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5238
5239         if (req_immediate_exit)
5240                 smp_send_reschedule(vcpu->cpu);
5241
5242         kvm_guest_enter();
5243
5244         if (unlikely(vcpu->arch.switch_db_regs)) {
5245                 set_debugreg(0, 7);
5246                 set_debugreg(vcpu->arch.eff_db[0], 0);
5247                 set_debugreg(vcpu->arch.eff_db[1], 1);
5248                 set_debugreg(vcpu->arch.eff_db[2], 2);
5249                 set_debugreg(vcpu->arch.eff_db[3], 3);
5250         }
5251
5252         trace_kvm_entry(vcpu->vcpu_id);
5253         kvm_x86_ops->run(vcpu);
5254
5255         /*
5256          * If the guest has used debug registers, at least dr7
5257          * will be disabled while returning to the host.
5258          * If we don't have active breakpoints in the host, we don't
5259          * care about the messed up debug address registers. But if
5260          * we have some of them active, restore the old state.
5261          */
5262         if (hw_breakpoint_active())
5263                 hw_breakpoint_restore();
5264
5265         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5266
5267         vcpu->mode = OUTSIDE_GUEST_MODE;
5268         smp_wmb();
5269         local_irq_enable();
5270
5271         ++vcpu->stat.exits;
5272
5273         /*
5274          * We must have an instruction between local_irq_enable() and
5275          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5276          * the interrupt shadow.  The stat.exits increment will do nicely.
5277          * But we need to prevent reordering, hence this barrier():
5278          */
5279         barrier();
5280
5281         kvm_guest_exit();
5282
5283         preempt_enable();
5284
5285         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5286
5287         /*
5288          * Profile KVM exit RIPs:
5289          */
5290         if (unlikely(prof_on == KVM_PROFILING)) {
5291                 unsigned long rip = kvm_rip_read(vcpu);
5292                 profile_hit(KVM_PROFILING, (void *)rip);
5293         }
5294
5295
5296         kvm_lapic_sync_from_vapic(vcpu);
5297
5298         r = kvm_x86_ops->handle_exit(vcpu);
5299 out:
5300         return r;
5301 }
5302
5303
5304 static int __vcpu_run(struct kvm_vcpu *vcpu)
5305 {
5306         int r;
5307         struct kvm *kvm = vcpu->kvm;
5308
5309         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5310                 pr_debug("vcpu %d received sipi with vector # %x\n",
5311                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5312                 kvm_lapic_reset(vcpu);
5313                 r = kvm_arch_vcpu_reset(vcpu);
5314                 if (r)
5315                         return r;
5316                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5317         }
5318
5319         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5320         vapic_enter(vcpu);
5321
5322         r = 1;
5323         while (r > 0) {
5324                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5325                     !vcpu->arch.apf.halted)
5326                         r = vcpu_enter_guest(vcpu);
5327                 else {
5328                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5329                         kvm_vcpu_block(vcpu);
5330                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5331                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5332                         {
5333                                 switch(vcpu->arch.mp_state) {
5334                                 case KVM_MP_STATE_HALTED:
5335                                         vcpu->arch.mp_state =
5336                                                 KVM_MP_STATE_RUNNABLE;
5337                                 case KVM_MP_STATE_RUNNABLE:
5338                                         vcpu->arch.apf.halted = false;
5339                                         break;
5340                                 case KVM_MP_STATE_SIPI_RECEIVED:
5341                                 default:
5342                                         r = -EINTR;
5343                                         break;
5344                                 }
5345                         }
5346                 }
5347
5348                 if (r <= 0)
5349                         break;
5350
5351                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5352                 if (kvm_cpu_has_pending_timer(vcpu))
5353                         kvm_inject_pending_timer_irqs(vcpu);
5354
5355                 if (dm_request_for_irq_injection(vcpu)) {
5356                         r = -EINTR;
5357                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5358                         ++vcpu->stat.request_irq_exits;
5359                 }
5360
5361                 kvm_check_async_pf_completion(vcpu);
5362
5363                 if (signal_pending(current)) {
5364                         r = -EINTR;
5365                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5366                         ++vcpu->stat.signal_exits;
5367                 }
5368                 if (need_resched()) {
5369                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5370                         kvm_resched(vcpu);
5371                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5372                 }
5373         }
5374
5375         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5376
5377         vapic_exit(vcpu);
5378
5379         return r;
5380 }
5381
5382 static int complete_mmio(struct kvm_vcpu *vcpu)
5383 {
5384         struct kvm_run *run = vcpu->run;
5385         int r;
5386
5387         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5388                 return 1;
5389
5390         if (vcpu->mmio_needed) {
5391                 vcpu->mmio_needed = 0;
5392                 if (!vcpu->mmio_is_write)
5393                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5394                                run->mmio.data, 8);
5395                 vcpu->mmio_index += 8;
5396                 if (vcpu->mmio_index < vcpu->mmio_size) {
5397                         run->exit_reason = KVM_EXIT_MMIO;
5398                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5399                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5400                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5401                         run->mmio.is_write = vcpu->mmio_is_write;
5402                         vcpu->mmio_needed = 1;
5403                         return 0;
5404                 }
5405                 if (vcpu->mmio_is_write)
5406                         return 1;
5407                 vcpu->mmio_read_completed = 1;
5408         }
5409         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5410         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5411         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5412         if (r != EMULATE_DONE)
5413                 return 0;
5414         return 1;
5415 }
5416
5417 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5418 {
5419         int r;
5420         sigset_t sigsaved;
5421
5422         if (!tsk_used_math(current) && init_fpu(current))
5423                 return -ENOMEM;
5424
5425         if (vcpu->sigset_active)
5426                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5427
5428         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5429                 kvm_vcpu_block(vcpu);
5430                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5431                 r = -EAGAIN;
5432                 goto out;
5433         }
5434
5435         /* re-sync apic's tpr */
5436         if (!irqchip_in_kernel(vcpu->kvm)) {
5437                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5438                         r = -EINVAL;
5439                         goto out;
5440                 }
5441         }
5442
5443         r = complete_mmio(vcpu);
5444         if (r <= 0)
5445                 goto out;
5446
5447         r = __vcpu_run(vcpu);
5448
5449 out:
5450         post_kvm_run_save(vcpu);
5451         if (vcpu->sigset_active)
5452                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5453
5454         return r;
5455 }
5456
5457 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5458 {
5459         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5460                 /*
5461                  * We are here if userspace calls get_regs() in the middle of
5462                  * instruction emulation. Registers state needs to be copied
5463                  * back from emulation context to vcpu. Usrapace shouldn't do
5464                  * that usually, but some bad designed PV devices (vmware
5465                  * backdoor interface) need this to work
5466                  */
5467                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5468                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5469                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5470         }
5471         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5472         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5473         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5474         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5475         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5476         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5477         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5478         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5479 #ifdef CONFIG_X86_64
5480         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5481         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5482         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5483         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5484         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5485         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5486         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5487         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5488 #endif
5489
5490         regs->rip = kvm_rip_read(vcpu);
5491         regs->rflags = kvm_get_rflags(vcpu);
5492
5493         return 0;
5494 }
5495
5496 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5497 {
5498         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5499         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5500
5501         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5502         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5503         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5504         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5505         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5506         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5507         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5508         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5509 #ifdef CONFIG_X86_64
5510         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5511         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5512         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5513         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5514         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5515         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5516         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5517         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5518 #endif
5519
5520         kvm_rip_write(vcpu, regs->rip);
5521         kvm_set_rflags(vcpu, regs->rflags);
5522
5523         vcpu->arch.exception.pending = false;
5524
5525         kvm_make_request(KVM_REQ_EVENT, vcpu);
5526
5527         return 0;
5528 }
5529
5530 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5531 {
5532         struct kvm_segment cs;
5533
5534         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5535         *db = cs.db;
5536         *l = cs.l;
5537 }
5538 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5539
5540 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5541                                   struct kvm_sregs *sregs)
5542 {
5543         struct desc_ptr dt;
5544
5545         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5546         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5547         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5548         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5549         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5550         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5551
5552         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5553         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5554
5555         kvm_x86_ops->get_idt(vcpu, &dt);
5556         sregs->idt.limit = dt.size;
5557         sregs->idt.base = dt.address;
5558         kvm_x86_ops->get_gdt(vcpu, &dt);
5559         sregs->gdt.limit = dt.size;
5560         sregs->gdt.base = dt.address;
5561
5562         sregs->cr0 = kvm_read_cr0(vcpu);
5563         sregs->cr2 = vcpu->arch.cr2;
5564         sregs->cr3 = kvm_read_cr3(vcpu);
5565         sregs->cr4 = kvm_read_cr4(vcpu);
5566         sregs->cr8 = kvm_get_cr8(vcpu);
5567         sregs->efer = vcpu->arch.efer;
5568         sregs->apic_base = kvm_get_apic_base(vcpu);
5569
5570         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5571
5572         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5573                 set_bit(vcpu->arch.interrupt.nr,
5574                         (unsigned long *)sregs->interrupt_bitmap);
5575
5576         return 0;
5577 }
5578
5579 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5580                                     struct kvm_mp_state *mp_state)
5581 {
5582         mp_state->mp_state = vcpu->arch.mp_state;
5583         return 0;
5584 }
5585
5586 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5587                                     struct kvm_mp_state *mp_state)
5588 {
5589         vcpu->arch.mp_state = mp_state->mp_state;
5590         kvm_make_request(KVM_REQ_EVENT, vcpu);
5591         return 0;
5592 }
5593
5594 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5595                     bool has_error_code, u32 error_code)
5596 {
5597         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5598         int ret;
5599
5600         init_emulate_ctxt(vcpu);
5601
5602         ret = emulator_task_switch(ctxt, tss_selector, reason,
5603                                    has_error_code, error_code);
5604
5605         if (ret)
5606                 return EMULATE_FAIL;
5607
5608         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5609         kvm_rip_write(vcpu, ctxt->eip);
5610         kvm_set_rflags(vcpu, ctxt->eflags);
5611         kvm_make_request(KVM_REQ_EVENT, vcpu);
5612         return EMULATE_DONE;
5613 }
5614 EXPORT_SYMBOL_GPL(kvm_task_switch);
5615
5616 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5617                                   struct kvm_sregs *sregs)
5618 {
5619         int mmu_reset_needed = 0;
5620         int pending_vec, max_bits, idx;
5621         struct desc_ptr dt;
5622
5623         dt.size = sregs->idt.limit;
5624         dt.address = sregs->idt.base;
5625         kvm_x86_ops->set_idt(vcpu, &dt);
5626         dt.size = sregs->gdt.limit;
5627         dt.address = sregs->gdt.base;
5628         kvm_x86_ops->set_gdt(vcpu, &dt);
5629
5630         vcpu->arch.cr2 = sregs->cr2;
5631         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5632         vcpu->arch.cr3 = sregs->cr3;
5633         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5634
5635         kvm_set_cr8(vcpu, sregs->cr8);
5636
5637         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5638         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5639         kvm_set_apic_base(vcpu, sregs->apic_base);
5640
5641         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5642         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5643         vcpu->arch.cr0 = sregs->cr0;
5644
5645         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5646         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5647         if (sregs->cr4 & X86_CR4_OSXSAVE)
5648                 kvm_update_cpuid(vcpu);
5649
5650         idx = srcu_read_lock(&vcpu->kvm->srcu);
5651         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5652                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5653                 mmu_reset_needed = 1;
5654         }
5655         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5656
5657         if (mmu_reset_needed)
5658                 kvm_mmu_reset_context(vcpu);
5659
5660         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5661         pending_vec = find_first_bit(
5662                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5663         if (pending_vec < max_bits) {
5664                 kvm_queue_interrupt(vcpu, pending_vec, false);
5665                 pr_debug("Set back pending irq %d\n", pending_vec);
5666         }
5667
5668         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5669         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5670         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5671         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5672         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5673         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5674
5675         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5676         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5677
5678         update_cr8_intercept(vcpu);
5679
5680         /* Older userspace won't unhalt the vcpu on reset. */
5681         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5682             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5683             !is_protmode(vcpu))
5684                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5685
5686         kvm_make_request(KVM_REQ_EVENT, vcpu);
5687
5688         return 0;
5689 }
5690
5691 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5692                                         struct kvm_guest_debug *dbg)
5693 {
5694         unsigned long rflags;
5695         int i, r;
5696
5697         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5698                 r = -EBUSY;
5699                 if (vcpu->arch.exception.pending)
5700                         goto out;
5701                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5702                         kvm_queue_exception(vcpu, DB_VECTOR);
5703                 else
5704                         kvm_queue_exception(vcpu, BP_VECTOR);
5705         }
5706
5707         /*
5708          * Read rflags as long as potentially injected trace flags are still
5709          * filtered out.
5710          */
5711         rflags = kvm_get_rflags(vcpu);
5712
5713         vcpu->guest_debug = dbg->control;
5714         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5715                 vcpu->guest_debug = 0;
5716
5717         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5718                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5719                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5720                 vcpu->arch.switch_db_regs =
5721                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5722         } else {
5723                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5724                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5725                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5726         }
5727
5728         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5729                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5730                         get_segment_base(vcpu, VCPU_SREG_CS);
5731
5732         /*
5733          * Trigger an rflags update that will inject or remove the trace
5734          * flags.
5735          */
5736         kvm_set_rflags(vcpu, rflags);
5737
5738         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5739
5740         r = 0;
5741
5742 out:
5743
5744         return r;
5745 }
5746
5747 /*
5748  * Translate a guest virtual address to a guest physical address.
5749  */
5750 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5751                                     struct kvm_translation *tr)
5752 {
5753         unsigned long vaddr = tr->linear_address;
5754         gpa_t gpa;
5755         int idx;
5756
5757         idx = srcu_read_lock(&vcpu->kvm->srcu);
5758         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5759         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5760         tr->physical_address = gpa;
5761         tr->valid = gpa != UNMAPPED_GVA;
5762         tr->writeable = 1;
5763         tr->usermode = 0;
5764
5765         return 0;
5766 }
5767
5768 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5769 {
5770         struct i387_fxsave_struct *fxsave =
5771                         &vcpu->arch.guest_fpu.state->fxsave;
5772
5773         memcpy(fpu->fpr, fxsave->st_space, 128);
5774         fpu->fcw = fxsave->cwd;
5775         fpu->fsw = fxsave->swd;
5776         fpu->ftwx = fxsave->twd;
5777         fpu->last_opcode = fxsave->fop;
5778         fpu->last_ip = fxsave->rip;
5779         fpu->last_dp = fxsave->rdp;
5780         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5781
5782         return 0;
5783 }
5784
5785 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5786 {
5787         struct i387_fxsave_struct *fxsave =
5788                         &vcpu->arch.guest_fpu.state->fxsave;
5789
5790         memcpy(fxsave->st_space, fpu->fpr, 128);
5791         fxsave->cwd = fpu->fcw;
5792         fxsave->swd = fpu->fsw;
5793         fxsave->twd = fpu->ftwx;
5794         fxsave->fop = fpu->last_opcode;
5795         fxsave->rip = fpu->last_ip;
5796         fxsave->rdp = fpu->last_dp;
5797         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5798
5799         return 0;
5800 }
5801
5802 int fx_init(struct kvm_vcpu *vcpu)
5803 {
5804         int err;
5805
5806         err = fpu_alloc(&vcpu->arch.guest_fpu);
5807         if (err)
5808                 return err;
5809
5810         fpu_finit(&vcpu->arch.guest_fpu);
5811
5812         /*
5813          * Ensure guest xcr0 is valid for loading
5814          */
5815         vcpu->arch.xcr0 = XSTATE_FP;
5816
5817         vcpu->arch.cr0 |= X86_CR0_ET;
5818
5819         return 0;
5820 }
5821 EXPORT_SYMBOL_GPL(fx_init);
5822
5823 static void fx_free(struct kvm_vcpu *vcpu)
5824 {
5825         fpu_free(&vcpu->arch.guest_fpu);
5826 }
5827
5828 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5829 {
5830         if (vcpu->guest_fpu_loaded)
5831                 return;
5832
5833         /*
5834          * Restore all possible states in the guest,
5835          * and assume host would use all available bits.
5836          * Guest xcr0 would be loaded later.
5837          */
5838         kvm_put_guest_xcr0(vcpu);
5839         vcpu->guest_fpu_loaded = 1;
5840         unlazy_fpu(current);
5841         fpu_restore_checking(&vcpu->arch.guest_fpu);
5842         trace_kvm_fpu(1);
5843 }
5844
5845 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5846 {
5847         kvm_put_guest_xcr0(vcpu);
5848
5849         if (!vcpu->guest_fpu_loaded)
5850                 return;
5851
5852         vcpu->guest_fpu_loaded = 0;
5853         fpu_save_init(&vcpu->arch.guest_fpu);
5854         ++vcpu->stat.fpu_reload;
5855         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5856         trace_kvm_fpu(0);
5857 }
5858
5859 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5860 {
5861         kvmclock_reset(vcpu);
5862
5863         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5864         fx_free(vcpu);
5865         kvm_x86_ops->vcpu_free(vcpu);
5866 }
5867
5868 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5869                                                 unsigned int id)
5870 {
5871         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5872                 printk_once(KERN_WARNING
5873                 "kvm: SMP vm created on host with unstable TSC; "
5874                 "guest TSC will not be reliable\n");
5875         return kvm_x86_ops->vcpu_create(kvm, id);
5876 }
5877
5878 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5879 {
5880         int r;
5881
5882         vcpu->arch.mtrr_state.have_fixed = 1;
5883         vcpu_load(vcpu);
5884         r = kvm_arch_vcpu_reset(vcpu);
5885         if (r == 0)
5886                 r = kvm_mmu_setup(vcpu);
5887         vcpu_put(vcpu);
5888
5889         return r;
5890 }
5891
5892 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5893 {
5894         vcpu->arch.apf.msr_val = 0;
5895
5896         vcpu_load(vcpu);
5897         kvm_mmu_unload(vcpu);
5898         vcpu_put(vcpu);
5899
5900         fx_free(vcpu);
5901         kvm_x86_ops->vcpu_free(vcpu);
5902 }
5903
5904 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5905 {
5906         atomic_set(&vcpu->arch.nmi_queued, 0);
5907         vcpu->arch.nmi_pending = 0;
5908         vcpu->arch.nmi_injected = false;
5909
5910         vcpu->arch.switch_db_regs = 0;
5911         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5912         vcpu->arch.dr6 = DR6_FIXED_1;
5913         vcpu->arch.dr7 = DR7_FIXED_1;
5914
5915         kvm_make_request(KVM_REQ_EVENT, vcpu);
5916         vcpu->arch.apf.msr_val = 0;
5917         vcpu->arch.st.msr_val = 0;
5918
5919         kvmclock_reset(vcpu);
5920
5921         kvm_clear_async_pf_completion_queue(vcpu);
5922         kvm_async_pf_hash_reset(vcpu);
5923         vcpu->arch.apf.halted = false;
5924
5925         kvm_pmu_reset(vcpu);
5926
5927         return kvm_x86_ops->vcpu_reset(vcpu);
5928 }
5929
5930 int kvm_arch_hardware_enable(void *garbage)
5931 {
5932         struct kvm *kvm;
5933         struct kvm_vcpu *vcpu;
5934         int i;
5935
5936         kvm_shared_msr_cpu_online();
5937         list_for_each_entry(kvm, &vm_list, vm_list)
5938                 kvm_for_each_vcpu(i, vcpu, kvm)
5939                         if (vcpu->cpu == smp_processor_id())
5940                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5941         return kvm_x86_ops->hardware_enable(garbage);
5942 }
5943
5944 void kvm_arch_hardware_disable(void *garbage)
5945 {
5946         kvm_x86_ops->hardware_disable(garbage);
5947         drop_user_return_notifiers(garbage);
5948 }
5949
5950 int kvm_arch_hardware_setup(void)
5951 {
5952         return kvm_x86_ops->hardware_setup();
5953 }
5954
5955 void kvm_arch_hardware_unsetup(void)
5956 {
5957         kvm_x86_ops->hardware_unsetup();
5958 }
5959
5960 void kvm_arch_check_processor_compat(void *rtn)
5961 {
5962         kvm_x86_ops->check_processor_compatibility(rtn);
5963 }
5964
5965 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5966 {
5967         struct page *page;
5968         struct kvm *kvm;
5969         int r;
5970
5971         BUG_ON(vcpu->kvm == NULL);
5972         kvm = vcpu->kvm;
5973
5974         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5975         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5976                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5977         else
5978                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5979
5980         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5981         if (!page) {
5982                 r = -ENOMEM;
5983                 goto fail;
5984         }
5985         vcpu->arch.pio_data = page_address(page);
5986
5987         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
5988
5989         r = kvm_mmu_create(vcpu);
5990         if (r < 0)
5991                 goto fail_free_pio_data;
5992
5993         if (irqchip_in_kernel(kvm)) {
5994                 r = kvm_create_lapic(vcpu);
5995                 if (r < 0)
5996                         goto fail_mmu_destroy;
5997         }
5998
5999         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6000                                        GFP_KERNEL);
6001         if (!vcpu->arch.mce_banks) {
6002                 r = -ENOMEM;
6003                 goto fail_free_lapic;
6004         }
6005         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6006
6007         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6008                 goto fail_free_mce_banks;
6009
6010         kvm_async_pf_hash_reset(vcpu);
6011         kvm_pmu_init(vcpu);
6012
6013         return 0;
6014 fail_free_mce_banks:
6015         kfree(vcpu->arch.mce_banks);
6016 fail_free_lapic:
6017         kvm_free_lapic(vcpu);
6018 fail_mmu_destroy:
6019         kvm_mmu_destroy(vcpu);
6020 fail_free_pio_data:
6021         free_page((unsigned long)vcpu->arch.pio_data);
6022 fail:
6023         return r;
6024 }
6025
6026 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6027 {
6028         int idx;
6029
6030         kvm_pmu_destroy(vcpu);
6031         kfree(vcpu->arch.mce_banks);
6032         kvm_free_lapic(vcpu);
6033         idx = srcu_read_lock(&vcpu->kvm->srcu);
6034         kvm_mmu_destroy(vcpu);
6035         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6036         free_page((unsigned long)vcpu->arch.pio_data);
6037 }
6038
6039 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6040 {
6041         if (type)
6042                 return -EINVAL;
6043
6044         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6045         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6046
6047         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6048         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6049
6050         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6051
6052         return 0;
6053 }
6054
6055 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6056 {
6057         vcpu_load(vcpu);
6058         kvm_mmu_unload(vcpu);
6059         vcpu_put(vcpu);
6060 }
6061
6062 static void kvm_free_vcpus(struct kvm *kvm)
6063 {
6064         unsigned int i;
6065         struct kvm_vcpu *vcpu;
6066
6067         /*
6068          * Unpin any mmu pages first.
6069          */
6070         kvm_for_each_vcpu(i, vcpu, kvm) {
6071                 kvm_clear_async_pf_completion_queue(vcpu);
6072                 kvm_unload_vcpu_mmu(vcpu);
6073         }
6074         kvm_for_each_vcpu(i, vcpu, kvm)
6075                 kvm_arch_vcpu_free(vcpu);
6076
6077         mutex_lock(&kvm->lock);
6078         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6079                 kvm->vcpus[i] = NULL;
6080
6081         atomic_set(&kvm->online_vcpus, 0);
6082         mutex_unlock(&kvm->lock);
6083 }
6084
6085 void kvm_arch_sync_events(struct kvm *kvm)
6086 {
6087         kvm_free_all_assigned_devices(kvm);
6088         kvm_free_pit(kvm);
6089 }
6090
6091 void kvm_arch_destroy_vm(struct kvm *kvm)
6092 {
6093         kvm_iommu_unmap_guest(kvm);
6094         kfree(kvm->arch.vpic);
6095         kfree(kvm->arch.vioapic);
6096         kvm_free_vcpus(kvm);
6097         if (kvm->arch.apic_access_page)
6098                 put_page(kvm->arch.apic_access_page);
6099         if (kvm->arch.ept_identity_pagetable)
6100                 put_page(kvm->arch.ept_identity_pagetable);
6101 }
6102
6103 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6104                                 struct kvm_memory_slot *memslot,
6105                                 struct kvm_memory_slot old,
6106                                 struct kvm_userspace_memory_region *mem,
6107                                 int user_alloc)
6108 {
6109         int npages = memslot->npages;
6110         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6111
6112         /* Prevent internal slot pages from being moved by fork()/COW. */
6113         if (memslot->id >= KVM_MEMORY_SLOTS)
6114                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6115
6116         /*To keep backward compatibility with older userspace,
6117          *x86 needs to hanlde !user_alloc case.
6118          */
6119         if (!user_alloc) {
6120                 if (npages && !old.rmap) {
6121                         unsigned long userspace_addr;
6122
6123                         down_write(&current->mm->mmap_sem);
6124                         userspace_addr = do_mmap(NULL, 0,
6125                                                  npages * PAGE_SIZE,
6126                                                  PROT_READ | PROT_WRITE,
6127                                                  map_flags,
6128                                                  0);
6129                         up_write(&current->mm->mmap_sem);
6130
6131                         if (IS_ERR((void *)userspace_addr))
6132                                 return PTR_ERR((void *)userspace_addr);
6133
6134                         memslot->userspace_addr = userspace_addr;
6135                 }
6136         }
6137
6138
6139         return 0;
6140 }
6141
6142 void kvm_arch_commit_memory_region(struct kvm *kvm,
6143                                 struct kvm_userspace_memory_region *mem,
6144                                 struct kvm_memory_slot old,
6145                                 int user_alloc)
6146 {
6147
6148         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6149
6150         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6151                 int ret;
6152
6153                 down_write(&current->mm->mmap_sem);
6154                 ret = do_munmap(current->mm, old.userspace_addr,
6155                                 old.npages * PAGE_SIZE);
6156                 up_write(&current->mm->mmap_sem);
6157                 if (ret < 0)
6158                         printk(KERN_WARNING
6159                                "kvm_vm_ioctl_set_memory_region: "
6160                                "failed to munmap memory\n");
6161         }
6162
6163         if (!kvm->arch.n_requested_mmu_pages)
6164                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6165
6166         spin_lock(&kvm->mmu_lock);
6167         if (nr_mmu_pages)
6168                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6169         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6170         spin_unlock(&kvm->mmu_lock);
6171 }
6172
6173 void kvm_arch_flush_shadow(struct kvm *kvm)
6174 {
6175         kvm_mmu_zap_all(kvm);
6176         kvm_reload_remote_mmus(kvm);
6177 }
6178
6179 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6180 {
6181         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6182                 !vcpu->arch.apf.halted)
6183                 || !list_empty_careful(&vcpu->async_pf.done)
6184                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6185                 || atomic_read(&vcpu->arch.nmi_queued) ||
6186                 (kvm_arch_interrupt_allowed(vcpu) &&
6187                  kvm_cpu_has_interrupt(vcpu));
6188 }
6189
6190 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6191 {
6192         int me;
6193         int cpu = vcpu->cpu;
6194
6195         if (waitqueue_active(&vcpu->wq)) {
6196                 wake_up_interruptible(&vcpu->wq);
6197                 ++vcpu->stat.halt_wakeup;
6198         }
6199
6200         me = get_cpu();
6201         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6202                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6203                         smp_send_reschedule(cpu);
6204         put_cpu();
6205 }
6206
6207 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6208 {
6209         return kvm_x86_ops->interrupt_allowed(vcpu);
6210 }
6211
6212 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6213 {
6214         unsigned long current_rip = kvm_rip_read(vcpu) +
6215                 get_segment_base(vcpu, VCPU_SREG_CS);
6216
6217         return current_rip == linear_rip;
6218 }
6219 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6220
6221 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6222 {
6223         unsigned long rflags;
6224
6225         rflags = kvm_x86_ops->get_rflags(vcpu);
6226         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6227                 rflags &= ~X86_EFLAGS_TF;
6228         return rflags;
6229 }
6230 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6231
6232 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6233 {
6234         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6235             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6236                 rflags |= X86_EFLAGS_TF;
6237         kvm_x86_ops->set_rflags(vcpu, rflags);
6238         kvm_make_request(KVM_REQ_EVENT, vcpu);
6239 }
6240 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6241
6242 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6243 {
6244         int r;
6245
6246         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6247               is_error_page(work->page))
6248                 return;
6249
6250         r = kvm_mmu_reload(vcpu);
6251         if (unlikely(r))
6252                 return;
6253
6254         if (!vcpu->arch.mmu.direct_map &&
6255               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6256                 return;
6257
6258         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6259 }
6260
6261 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6262 {
6263         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6264 }
6265
6266 static inline u32 kvm_async_pf_next_probe(u32 key)
6267 {
6268         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6269 }
6270
6271 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6272 {
6273         u32 key = kvm_async_pf_hash_fn(gfn);
6274
6275         while (vcpu->arch.apf.gfns[key] != ~0)
6276                 key = kvm_async_pf_next_probe(key);
6277
6278         vcpu->arch.apf.gfns[key] = gfn;
6279 }
6280
6281 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6282 {
6283         int i;
6284         u32 key = kvm_async_pf_hash_fn(gfn);
6285
6286         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6287                      (vcpu->arch.apf.gfns[key] != gfn &&
6288                       vcpu->arch.apf.gfns[key] != ~0); i++)
6289                 key = kvm_async_pf_next_probe(key);
6290
6291         return key;