eb9ddd8efb828175e7be0efcc0616257c67c5943
[linux-2.6.git] / arch / x86 / kernel / i387.c
1 /*
2  *  Copyright (C) 1994 Linus Torvalds
3  *
4  *  Pentium III FXSR, SSE support
5  *  General FPU state handling cleanups
6  *      Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
17 #include <asm/i387.h>
18 #include <asm/user.h>
19
20 #ifdef CONFIG_X86_64
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
23 #else
24 # define save_i387_ia32         save_i387
25 # define restore_i387_ia32      restore_i387
26 # define _fpstate_ia32          _fpstate
27 # define user_i387_ia32_struct  user_i387_struct
28 # define user32_fxsr_struct     user_fxsr_struct
29 #endif
30
31 #ifdef CONFIG_MATH_EMULATION
32 # define HAVE_HWFP              (boot_cpu_data.hard_math)
33 #else
34 # define HAVE_HWFP              1
35 #endif
36
37 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
38 unsigned int xstate_size;
39 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
40
41 void __cpuinit mxcsr_feature_mask_init(void)
42 {
43         unsigned long mask = 0;
44
45         clts();
46         if (cpu_has_fxsr) {
47                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
48                 asm volatile("fxsave %0" : : "m" (fx_scratch));
49                 mask = fx_scratch.mxcsr_mask;
50                 if (mask == 0)
51                         mask = 0x0000ffbf;
52         }
53         mxcsr_feature_mask &= mask;
54         stts();
55 }
56
57 void __init init_thread_xstate(void)
58 {
59         if (!HAVE_HWFP) {
60                 xstate_size = sizeof(struct i387_soft_struct);
61                 return;
62         }
63
64         if (cpu_has_fxsr)
65                 xstate_size = sizeof(struct i387_fxsave_struct);
66 #ifdef CONFIG_X86_32
67         else
68                 xstate_size = sizeof(struct i387_fsave_struct);
69 #endif
70 }
71
72 #ifdef CONFIG_X86_64
73 /*
74  * Called at bootup to set up the initial FPU state that is later cloned
75  * into all processes.
76  */
77 void __cpuinit fpu_init(void)
78 {
79         unsigned long oldcr0 = read_cr0();
80
81         set_in_cr4(X86_CR4_OSFXSR);
82         set_in_cr4(X86_CR4_OSXMMEXCPT);
83
84         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
85
86         mxcsr_feature_mask_init();
87         /* clean state in init */
88         current_thread_info()->status = 0;
89         clear_used_math();
90 }
91 #endif  /* CONFIG_X86_64 */
92
93 /*
94  * The _current_ task is using the FPU for the first time
95  * so initialize it and set the mxcsr to its default
96  * value at reset if we support XMM instructions and then
97  * remeber the current task has used the FPU.
98  */
99 int init_fpu(struct task_struct *tsk)
100 {
101         if (tsk_used_math(tsk)) {
102                 if (HAVE_HWFP && tsk == current)
103                         unlazy_fpu(tsk);
104                 return 0;
105         }
106
107         /*
108          * Memory allocation at the first usage of the FPU and other state.
109          */
110         if (!tsk->thread.xstate) {
111                 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
112                                                       GFP_KERNEL);
113                 if (!tsk->thread.xstate)
114                         return -ENOMEM;
115         }
116
117 #ifdef CONFIG_X86_32
118         if (!HAVE_HWFP) {
119                 memset(tsk->thread.xstate, 0, xstate_size);
120                 finit();
121                 set_stopped_child_used_math(tsk);
122                 return 0;
123         }
124 #endif
125
126         if (cpu_has_fxsr) {
127                 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
128
129                 memset(fx, 0, xstate_size);
130                 fx->cwd = 0x37f;
131                 if (cpu_has_xmm)
132                         fx->mxcsr = MXCSR_DEFAULT;
133         } else {
134                 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
135                 memset(fp, 0, xstate_size);
136                 fp->cwd = 0xffff037fu;
137                 fp->swd = 0xffff0000u;
138                 fp->twd = 0xffffffffu;
139                 fp->fos = 0xffff0000u;
140         }
141         /*
142          * Only the device not available exception or ptrace can call init_fpu.
143          */
144         set_stopped_child_used_math(tsk);
145         return 0;
146 }
147
148 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
149 {
150         return tsk_used_math(target) ? regset->n : 0;
151 }
152
153 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
154 {
155         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
156 }
157
158 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
159                 unsigned int pos, unsigned int count,
160                 void *kbuf, void __user *ubuf)
161 {
162         int ret;
163
164         if (!cpu_has_fxsr)
165                 return -ENODEV;
166
167         ret = init_fpu(target);
168         if (ret)
169                 return ret;
170
171         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
172                                    &target->thread.xstate->fxsave, 0, -1);
173 }
174
175 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
176                 unsigned int pos, unsigned int count,
177                 const void *kbuf, const void __user *ubuf)
178 {
179         int ret;
180
181         if (!cpu_has_fxsr)
182                 return -ENODEV;
183
184         ret = init_fpu(target);
185         if (ret)
186                 return ret;
187
188         set_stopped_child_used_math(target);
189
190         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
191                                  &target->thread.xstate->fxsave, 0, -1);
192
193         /*
194          * mxcsr reserved bits must be masked to zero for security reasons.
195          */
196         target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
197
198         return ret;
199 }
200
201 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
202
203 /*
204  * FPU tag word conversions.
205  */
206
207 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
208 {
209         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
210
211         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
212         tmp = ~twd;
213         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
214         /* and move the valid bits to the lower byte. */
215         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
216         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
217         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
218
219         return tmp;
220 }
221
222 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
223 #define FP_EXP_TAG_VALID        0
224 #define FP_EXP_TAG_ZERO         1
225 #define FP_EXP_TAG_SPECIAL      2
226 #define FP_EXP_TAG_EMPTY        3
227
228 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
229 {
230         struct _fpxreg *st;
231         u32 tos = (fxsave->swd >> 11) & 7;
232         u32 twd = (unsigned long) fxsave->twd;
233         u32 tag;
234         u32 ret = 0xffff0000u;
235         int i;
236
237         for (i = 0; i < 8; i++, twd >>= 1) {
238                 if (twd & 0x1) {
239                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
240
241                         switch (st->exponent & 0x7fff) {
242                         case 0x7fff:
243                                 tag = FP_EXP_TAG_SPECIAL;
244                                 break;
245                         case 0x0000:
246                                 if (!st->significand[0] &&
247                                     !st->significand[1] &&
248                                     !st->significand[2] &&
249                                     !st->significand[3])
250                                         tag = FP_EXP_TAG_ZERO;
251                                 else
252                                         tag = FP_EXP_TAG_SPECIAL;
253                                 break;
254                         default:
255                                 if (st->significand[3] & 0x8000)
256                                         tag = FP_EXP_TAG_VALID;
257                                 else
258                                         tag = FP_EXP_TAG_SPECIAL;
259                                 break;
260                         }
261                 } else {
262                         tag = FP_EXP_TAG_EMPTY;
263                 }
264                 ret |= tag << (2 * i);
265         }
266         return ret;
267 }
268
269 /*
270  * FXSR floating point environment conversions.
271  */
272
273 static void
274 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
275 {
276         struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
277         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
278         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
279         int i;
280
281         env->cwd = fxsave->cwd | 0xffff0000u;
282         env->swd = fxsave->swd | 0xffff0000u;
283         env->twd = twd_fxsr_to_i387(fxsave);
284
285 #ifdef CONFIG_X86_64
286         env->fip = fxsave->rip;
287         env->foo = fxsave->rdp;
288         if (tsk == current) {
289                 /*
290                  * should be actually ds/cs at fpu exception time, but
291                  * that information is not available in 64bit mode.
292                  */
293                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
294                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
295         } else {
296                 struct pt_regs *regs = task_pt_regs(tsk);
297
298                 env->fos = 0xffff0000 | tsk->thread.ds;
299                 env->fcs = regs->cs;
300         }
301 #else
302         env->fip = fxsave->fip;
303         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
304         env->foo = fxsave->foo;
305         env->fos = fxsave->fos;
306 #endif
307
308         for (i = 0; i < 8; ++i)
309                 memcpy(&to[i], &from[i], sizeof(to[0]));
310 }
311
312 static void convert_to_fxsr(struct task_struct *tsk,
313                             const struct user_i387_ia32_struct *env)
314
315 {
316         struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
317         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
318         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
319         int i;
320
321         fxsave->cwd = env->cwd;
322         fxsave->swd = env->swd;
323         fxsave->twd = twd_i387_to_fxsr(env->twd);
324         fxsave->fop = (u16) ((u32) env->fcs >> 16);
325 #ifdef CONFIG_X86_64
326         fxsave->rip = env->fip;
327         fxsave->rdp = env->foo;
328         /* cs and ds ignored */
329 #else
330         fxsave->fip = env->fip;
331         fxsave->fcs = (env->fcs & 0xffff);
332         fxsave->foo = env->foo;
333         fxsave->fos = env->fos;
334 #endif
335
336         for (i = 0; i < 8; ++i)
337                 memcpy(&to[i], &from[i], sizeof(from[0]));
338 }
339
340 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
341                unsigned int pos, unsigned int count,
342                void *kbuf, void __user *ubuf)
343 {
344         struct user_i387_ia32_struct env;
345         int ret;
346
347         ret = init_fpu(target);
348         if (ret)
349                 return ret;
350
351         if (!HAVE_HWFP)
352                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
353
354         if (!cpu_has_fxsr) {
355                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
356                                            &target->thread.xstate->fsave, 0,
357                                            -1);
358         }
359
360         if (kbuf && pos == 0 && count == sizeof(env)) {
361                 convert_from_fxsr(kbuf, target);
362                 return 0;
363         }
364
365         convert_from_fxsr(&env, target);
366
367         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
368 }
369
370 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
371                unsigned int pos, unsigned int count,
372                const void *kbuf, const void __user *ubuf)
373 {
374         struct user_i387_ia32_struct env;
375         int ret;
376
377         ret = init_fpu(target);
378         if (ret)
379                 return ret;
380
381         set_stopped_child_used_math(target);
382
383         if (!HAVE_HWFP)
384                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
385
386         if (!cpu_has_fxsr) {
387                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
388                                           &target->thread.xstate->fsave, 0, -1);
389         }
390
391         if (pos > 0 || count < sizeof(env))
392                 convert_from_fxsr(&env, target);
393
394         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
395         if (!ret)
396                 convert_to_fxsr(target, &env);
397
398         return ret;
399 }
400
401 /*
402  * Signal frame handlers.
403  */
404
405 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
406 {
407         struct task_struct *tsk = current;
408         struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
409
410         unlazy_fpu(tsk);
411         fp->status = fp->swd;
412         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
413                 return -1;
414         return 1;
415 }
416
417 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
418 {
419         struct task_struct *tsk = current;
420         struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
421         struct user_i387_ia32_struct env;
422         int err = 0;
423
424         unlazy_fpu(tsk);
425
426         convert_from_fxsr(&env, tsk);
427         if (__copy_to_user(buf, &env, sizeof(env)))
428                 return -1;
429
430         err |= __put_user(fx->swd, &buf->status);
431         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
432         if (err)
433                 return -1;
434
435         if (__copy_to_user(&buf->_fxsr_env[0], fx,
436                            sizeof(struct i387_fxsave_struct)))
437                 return -1;
438         return 1;
439 }
440
441 int save_i387_ia32(struct _fpstate_ia32 __user *buf)
442 {
443         if (!used_math())
444                 return 0;
445         /*
446          * This will cause a "finit" to be triggered by the next
447          * attempted FPU operation by the 'current' process.
448          */
449         clear_used_math();
450
451         if (!HAVE_HWFP) {
452                 return fpregs_soft_get(current, NULL,
453                                        0, sizeof(struct user_i387_ia32_struct),
454                                        NULL, buf) ? -1 : 1;
455         }
456
457         if (cpu_has_fxsr)
458                 return save_i387_fxsave(buf);
459         else
460                 return save_i387_fsave(buf);
461 }
462
463 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
464 {
465         struct task_struct *tsk = current;
466
467         return __copy_from_user(&tsk->thread.xstate->fsave, buf,
468                                 sizeof(struct i387_fsave_struct));
469 }
470
471 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
472 {
473         struct task_struct *tsk = current;
474         struct user_i387_ia32_struct env;
475         int err;
476
477         err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
478                                sizeof(struct i387_fxsave_struct));
479         /* mxcsr reserved bits must be masked to zero for security reasons */
480         tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
481         if (err || __copy_from_user(&env, buf, sizeof(env)))
482                 return 1;
483         convert_to_fxsr(tsk, &env);
484
485         return 0;
486 }
487
488 int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
489 {
490         int err;
491         struct task_struct *tsk = current;
492
493         if (HAVE_HWFP)
494                 clear_fpu(tsk);
495
496         if (!used_math()) {
497                 err = init_fpu(tsk);
498                 if (err)
499                         return err;
500         }
501
502         if (HAVE_HWFP) {
503                 if (cpu_has_fxsr)
504                         err = restore_i387_fxsave(buf);
505                 else
506                         err = restore_i387_fsave(buf);
507         } else {
508                 err = fpregs_soft_set(current, NULL,
509                                       0, sizeof(struct user_i387_ia32_struct),
510                                       NULL, buf) != 0;
511         }
512         set_used_math();
513
514         return err;
515 }
516
517 /*
518  * FPU state for core dumps.
519  * This is only used for a.out dumps now.
520  * It is declared generically using elf_fpregset_t (which is
521  * struct user_i387_struct) but is in fact only used for 32-bit
522  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
523  */
524 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
525 {
526         struct task_struct *tsk = current;
527         int fpvalid;
528
529         fpvalid = !!used_math();
530         if (fpvalid)
531                 fpvalid = !fpregs_get(tsk, NULL,
532                                       0, sizeof(struct user_i387_ia32_struct),
533                                       fpu, NULL);
534
535         return fpvalid;
536 }
537 EXPORT_SYMBOL(dump_fpu);
538
539 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */