db6839b53195e1a83d9186a76bf9a05562fc39e6
[linux-2.6.git] / arch / x86 / kernel / i387.c
1 /*
2  *  Copyright (C) 1994 Linus Torvalds
3  *
4  *  Pentium III FXSR, SSE support
5  *  General FPU state handling cleanups
6  *      Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11
12 #include <asm/sigcontext.h>
13 #include <asm/processor.h>
14 #include <asm/math_emu.h>
15 #include <asm/uaccess.h>
16 #include <asm/ptrace.h>
17 #include <asm/i387.h>
18 #include <asm/user.h>
19
20 #ifdef CONFIG_X86_64
21 # include <asm/sigcontext32.h>
22 # include <asm/user32.h>
23 #else
24 # define save_i387_ia32         save_i387
25 # define restore_i387_ia32      restore_i387
26 # define _fpstate_ia32          _fpstate
27 # define user_i387_ia32_struct  user_i387_struct
28 # define user32_fxsr_struct     user_fxsr_struct
29 #endif
30
31 #ifdef CONFIG_MATH_EMULATION
32 # define HAVE_HWFP              (boot_cpu_data.hard_math)
33 #else
34 # define HAVE_HWFP              1
35 #endif
36
37 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
38 unsigned int xstate_size;
39 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
40
41 void __cpuinit mxcsr_feature_mask_init(void)
42 {
43         unsigned long mask = 0;
44
45         clts();
46         if (cpu_has_fxsr) {
47                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
48                 asm volatile("fxsave %0" : : "m" (fx_scratch));
49                 mask = fx_scratch.mxcsr_mask;
50                 if (mask == 0)
51                         mask = 0x0000ffbf;
52         }
53         mxcsr_feature_mask &= mask;
54         stts();
55 }
56
57 void __init init_thread_xstate(void)
58 {
59         if (cpu_has_fxsr)
60                 xstate_size = sizeof(struct i387_fxsave_struct);
61 #ifdef CONFIG_X86_32
62         else
63                 xstate_size = sizeof(struct i387_fsave_struct);
64 #endif
65 }
66
67 #ifdef CONFIG_X86_64
68 /*
69  * Called at bootup to set up the initial FPU state that is later cloned
70  * into all processes.
71  */
72 void __cpuinit fpu_init(void)
73 {
74         unsigned long oldcr0 = read_cr0();
75
76         set_in_cr4(X86_CR4_OSFXSR);
77         set_in_cr4(X86_CR4_OSXMMEXCPT);
78
79         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
80
81         mxcsr_feature_mask_init();
82         /* clean state in init */
83         current_thread_info()->status = 0;
84         clear_used_math();
85 }
86 #endif  /* CONFIG_X86_64 */
87
88 /*
89  * The _current_ task is using the FPU for the first time
90  * so initialize it and set the mxcsr to its default
91  * value at reset if we support XMM instructions and then
92  * remeber the current task has used the FPU.
93  */
94 int init_fpu(struct task_struct *tsk)
95 {
96         if (tsk_used_math(tsk)) {
97                 if (tsk == current)
98                         unlazy_fpu(tsk);
99                 return 0;
100         }
101
102         /*
103          * Memory allocation at the first usage of the FPU and other state.
104          */
105         if (!tsk->thread.xstate) {
106                 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
107                                                       GFP_KERNEL);
108                 if (!tsk->thread.xstate)
109                         return -ENOMEM;
110         }
111
112         if (cpu_has_fxsr) {
113                 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
114
115                 memset(fx, 0, xstate_size);
116                 fx->cwd = 0x37f;
117                 if (cpu_has_xmm)
118                         fx->mxcsr = MXCSR_DEFAULT;
119         } else {
120                 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
121                 memset(fp, 0, xstate_size);
122                 fp->cwd = 0xffff037fu;
123                 fp->swd = 0xffff0000u;
124                 fp->twd = 0xffffffffu;
125                 fp->fos = 0xffff0000u;
126         }
127         /*
128          * Only the device not available exception or ptrace can call init_fpu.
129          */
130         set_stopped_child_used_math(tsk);
131         return 0;
132 }
133
134 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
135 {
136         return tsk_used_math(target) ? regset->n : 0;
137 }
138
139 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
140 {
141         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
142 }
143
144 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
145                 unsigned int pos, unsigned int count,
146                 void *kbuf, void __user *ubuf)
147 {
148         int ret;
149
150         if (!cpu_has_fxsr)
151                 return -ENODEV;
152
153         ret = init_fpu(target);
154         if (ret)
155                 return ret;
156
157         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
158                                    &target->thread.xstate->fxsave, 0, -1);
159 }
160
161 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
162                 unsigned int pos, unsigned int count,
163                 const void *kbuf, const void __user *ubuf)
164 {
165         int ret;
166
167         if (!cpu_has_fxsr)
168                 return -ENODEV;
169
170         ret = init_fpu(target);
171         if (ret)
172                 return ret;
173
174         set_stopped_child_used_math(target);
175
176         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
177                                  &target->thread.xstate->fxsave, 0, -1);
178
179         /*
180          * mxcsr reserved bits must be masked to zero for security reasons.
181          */
182         target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
183
184         return ret;
185 }
186
187 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
188
189 /*
190  * FPU tag word conversions.
191  */
192
193 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
194 {
195         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
196
197         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
198         tmp = ~twd;
199         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
200         /* and move the valid bits to the lower byte. */
201         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
202         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
203         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
204
205         return tmp;
206 }
207
208 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
209 #define FP_EXP_TAG_VALID        0
210 #define FP_EXP_TAG_ZERO         1
211 #define FP_EXP_TAG_SPECIAL      2
212 #define FP_EXP_TAG_EMPTY        3
213
214 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
215 {
216         struct _fpxreg *st;
217         u32 tos = (fxsave->swd >> 11) & 7;
218         u32 twd = (unsigned long) fxsave->twd;
219         u32 tag;
220         u32 ret = 0xffff0000u;
221         int i;
222
223         for (i = 0; i < 8; i++, twd >>= 1) {
224                 if (twd & 0x1) {
225                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
226
227                         switch (st->exponent & 0x7fff) {
228                         case 0x7fff:
229                                 tag = FP_EXP_TAG_SPECIAL;
230                                 break;
231                         case 0x0000:
232                                 if (!st->significand[0] &&
233                                     !st->significand[1] &&
234                                     !st->significand[2] &&
235                                     !st->significand[3])
236                                         tag = FP_EXP_TAG_ZERO;
237                                 else
238                                         tag = FP_EXP_TAG_SPECIAL;
239                                 break;
240                         default:
241                                 if (st->significand[3] & 0x8000)
242                                         tag = FP_EXP_TAG_VALID;
243                                 else
244                                         tag = FP_EXP_TAG_SPECIAL;
245                                 break;
246                         }
247                 } else {
248                         tag = FP_EXP_TAG_EMPTY;
249                 }
250                 ret |= tag << (2 * i);
251         }
252         return ret;
253 }
254
255 /*
256  * FXSR floating point environment conversions.
257  */
258
259 static void
260 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
261 {
262         struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
263         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
264         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
265         int i;
266
267         env->cwd = fxsave->cwd | 0xffff0000u;
268         env->swd = fxsave->swd | 0xffff0000u;
269         env->twd = twd_fxsr_to_i387(fxsave);
270
271 #ifdef CONFIG_X86_64
272         env->fip = fxsave->rip;
273         env->foo = fxsave->rdp;
274         if (tsk == current) {
275                 /*
276                  * should be actually ds/cs at fpu exception time, but
277                  * that information is not available in 64bit mode.
278                  */
279                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
280                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
281         } else {
282                 struct pt_regs *regs = task_pt_regs(tsk);
283
284                 env->fos = 0xffff0000 | tsk->thread.ds;
285                 env->fcs = regs->cs;
286         }
287 #else
288         env->fip = fxsave->fip;
289         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
290         env->foo = fxsave->foo;
291         env->fos = fxsave->fos;
292 #endif
293
294         for (i = 0; i < 8; ++i)
295                 memcpy(&to[i], &from[i], sizeof(to[0]));
296 }
297
298 static void convert_to_fxsr(struct task_struct *tsk,
299                             const struct user_i387_ia32_struct *env)
300
301 {
302         struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
303         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
304         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
305         int i;
306
307         fxsave->cwd = env->cwd;
308         fxsave->swd = env->swd;
309         fxsave->twd = twd_i387_to_fxsr(env->twd);
310         fxsave->fop = (u16) ((u32) env->fcs >> 16);
311 #ifdef CONFIG_X86_64
312         fxsave->rip = env->fip;
313         fxsave->rdp = env->foo;
314         /* cs and ds ignored */
315 #else
316         fxsave->fip = env->fip;
317         fxsave->fcs = (env->fcs & 0xffff);
318         fxsave->foo = env->foo;
319         fxsave->fos = env->fos;
320 #endif
321
322         for (i = 0; i < 8; ++i)
323                 memcpy(&to[i], &from[i], sizeof(from[0]));
324 }
325
326 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
327                unsigned int pos, unsigned int count,
328                void *kbuf, void __user *ubuf)
329 {
330         struct user_i387_ia32_struct env;
331         int ret;
332
333         if (!HAVE_HWFP)
334                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
335
336         ret = init_fpu(target);
337         if (ret)
338                 return ret;
339
340         if (!cpu_has_fxsr) {
341                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
342                                            &target->thread.xstate->fsave, 0,
343                                            -1);
344         }
345
346         if (kbuf && pos == 0 && count == sizeof(env)) {
347                 convert_from_fxsr(kbuf, target);
348                 return 0;
349         }
350
351         convert_from_fxsr(&env, target);
352
353         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
354 }
355
356 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
357                unsigned int pos, unsigned int count,
358                const void *kbuf, const void __user *ubuf)
359 {
360         struct user_i387_ia32_struct env;
361         int ret;
362
363         if (!HAVE_HWFP)
364                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
365
366         ret = init_fpu(target);
367         if (ret)
368                 return ret;
369
370         set_stopped_child_used_math(target);
371
372         if (!cpu_has_fxsr) {
373                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
374                                           &target->thread.xstate->fsave, 0, -1);
375         }
376
377         if (pos > 0 || count < sizeof(env))
378                 convert_from_fxsr(&env, target);
379
380         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
381         if (!ret)
382                 convert_to_fxsr(target, &env);
383
384         return ret;
385 }
386
387 /*
388  * Signal frame handlers.
389  */
390
391 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
392 {
393         struct task_struct *tsk = current;
394         struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
395
396         unlazy_fpu(tsk);
397         fp->status = fp->swd;
398         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
399                 return -1;
400         return 1;
401 }
402
403 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
404 {
405         struct task_struct *tsk = current;
406         struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
407         struct user_i387_ia32_struct env;
408         int err = 0;
409
410         unlazy_fpu(tsk);
411
412         convert_from_fxsr(&env, tsk);
413         if (__copy_to_user(buf, &env, sizeof(env)))
414                 return -1;
415
416         err |= __put_user(fx->swd, &buf->status);
417         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
418         if (err)
419                 return -1;
420
421         if (__copy_to_user(&buf->_fxsr_env[0], fx,
422                            sizeof(struct i387_fxsave_struct)))
423                 return -1;
424         return 1;
425 }
426
427 int save_i387_ia32(struct _fpstate_ia32 __user *buf)
428 {
429         if (!used_math())
430                 return 0;
431         /*
432          * This will cause a "finit" to be triggered by the next
433          * attempted FPU operation by the 'current' process.
434          */
435         clear_used_math();
436
437         if (!HAVE_HWFP) {
438                 return fpregs_soft_get(current, NULL,
439                                        0, sizeof(struct user_i387_ia32_struct),
440                                        NULL, buf) ? -1 : 1;
441         }
442
443         if (cpu_has_fxsr)
444                 return save_i387_fxsave(buf);
445         else
446                 return save_i387_fsave(buf);
447 }
448
449 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
450 {
451         struct task_struct *tsk = current;
452
453         clear_fpu(tsk);
454         return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455                                 sizeof(struct i387_fsave_struct));
456 }
457
458 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
459 {
460         struct task_struct *tsk = current;
461         struct user_i387_ia32_struct env;
462         int err;
463
464         clear_fpu(tsk);
465         err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
466                                sizeof(struct i387_fxsave_struct));
467         /* mxcsr reserved bits must be masked to zero for security reasons */
468         tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
469         if (err || __copy_from_user(&env, buf, sizeof(env)))
470                 return 1;
471         convert_to_fxsr(tsk, &env);
472
473         return 0;
474 }
475
476 int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
477 {
478         int err;
479
480         if (HAVE_HWFP) {
481                 if (cpu_has_fxsr)
482                         err = restore_i387_fxsave(buf);
483                 else
484                         err = restore_i387_fsave(buf);
485         } else {
486                 err = fpregs_soft_set(current, NULL,
487                                       0, sizeof(struct user_i387_ia32_struct),
488                                       NULL, buf) != 0;
489         }
490         set_used_math();
491
492         return err;
493 }
494
495 /*
496  * FPU state for core dumps.
497  * This is only used for a.out dumps now.
498  * It is declared generically using elf_fpregset_t (which is
499  * struct user_i387_struct) but is in fact only used for 32-bit
500  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
501  */
502 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
503 {
504         struct task_struct *tsk = current;
505         int fpvalid;
506
507         fpvalid = !!used_math();
508         if (fpvalid)
509                 fpvalid = !fpregs_get(tsk, NULL,
510                                       0, sizeof(struct user_i387_ia32_struct),
511                                       fpu, NULL);
512
513         return fpvalid;
514 }
515 EXPORT_SYMBOL(dump_fpu);
516
517 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */