x86: convert cpuinfo_x86 array to a per_cpu array
[linux-2.6.git] / arch / x86 / kernel / cpu / proc.c
1 #include <linux/smp.h>
2 #include <linux/timex.h>
3 #include <linux/string.h>
4 #include <asm/semaphore.h>
5 #include <linux/seq_file.h>
6 #include <linux/cpufreq.h>
7
8 /*
9  *      Get CPU information for use by the procfs.
10  */
11 static int show_cpuinfo(struct seq_file *m, void *v)
12 {
13         /* 
14          * These flag bits must match the definitions in <asm/cpufeature.h>.
15          * NULL means this bit is undefined or reserved; either way it doesn't
16          * have meaning as far as Linux is concerned.  Note that it's important
17          * to realize there is a difference between this table and CPUID -- if
18          * applications want to get the raw CPUID data, they should access
19          * /dev/cpu/<cpu_nr>/cpuid instead.
20          */
21         static const char * const x86_cap_flags[] = {
22                 /* Intel-defined */
23                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
24                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
25                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
26                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
27
28                 /* AMD-defined */
29                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
30                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
31                 NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
32                 NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
33                 "3dnowext", "3dnow",
34
35                 /* Transmeta-defined */
36                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
37                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
38                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
39                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
40
41                 /* Other (Linux-defined) */
42                 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
43                 NULL, NULL, NULL, NULL,
44                 "constant_tsc", "up", NULL, "arch_perfmon",
45                 "pebs", "bts", NULL, "sync_rdtsc",
46                 "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
47                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
48
49                 /* Intel-defined (#2) */
50                 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
51                 "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
52                 NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
53                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
54
55                 /* VIA/Cyrix/Centaur-defined */
56                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
57                 "ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
58                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
59                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
60
61                 /* AMD-defined (#2) */
62                 "lahf_lm", "cmp_legacy", "svm", "extapic", "cr8_legacy",
63                 "altmovcr8", "abm", "sse4a",
64                 "misalignsse", "3dnowprefetch",
65                 "osvw", "ibs", NULL, NULL, NULL, NULL,
66                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
67                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
68
69                 /* Auxiliary (Linux-defined) */
70                 "ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
71                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
72                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
73                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
74         };
75         static const char * const x86_power_flags[] = {
76                 "ts",   /* temperature sensor */
77                 "fid",  /* frequency id control */
78                 "vid",  /* voltage id control */
79                 "ttp",  /* thermal trip */
80                 "tm",
81                 "stc",
82                 "100mhzsteps",
83                 "hwpstate",
84                 "",     /* constant_tsc - moved to flags */
85                 /* nothing */
86         };
87         struct cpuinfo_x86 *c = v;
88         int i, n = 0;
89         int fpu_exception;
90
91 #ifdef CONFIG_SMP
92         if (!cpu_online(n))
93                 return 0;
94         n = c->cpu_index;
95 #endif
96         seq_printf(m, "processor\t: %d\n"
97                 "vendor_id\t: %s\n"
98                 "cpu family\t: %d\n"
99                 "model\t\t: %d\n"
100                 "model name\t: %s\n",
101                 n,
102                 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
103                 c->x86,
104                 c->x86_model,
105                 c->x86_model_id[0] ? c->x86_model_id : "unknown");
106
107         if (c->x86_mask || c->cpuid_level >= 0)
108                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
109         else
110                 seq_printf(m, "stepping\t: unknown\n");
111
112         if ( cpu_has(c, X86_FEATURE_TSC) ) {
113                 unsigned int freq = cpufreq_quick_get(n);
114                 if (!freq)
115                         freq = cpu_khz;
116                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
117                         freq / 1000, (freq % 1000));
118         }
119
120         /* Cache size */
121         if (c->x86_cache_size >= 0)
122                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
123 #ifdef CONFIG_X86_HT
124         if (c->x86_max_cores * smp_num_siblings > 1) {
125                 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
126                 seq_printf(m, "siblings\t: %d\n",
127                                 cpus_weight(per_cpu(cpu_core_map, n)));
128                 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
129                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
130         }
131 #endif
132         
133         /* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */
134         fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
135         seq_printf(m, "fdiv_bug\t: %s\n"
136                         "hlt_bug\t\t: %s\n"
137                         "f00f_bug\t: %s\n"
138                         "coma_bug\t: %s\n"
139                         "fpu\t\t: %s\n"
140                         "fpu_exception\t: %s\n"
141                         "cpuid level\t: %d\n"
142                         "wp\t\t: %s\n"
143                         "flags\t\t:",
144                      c->fdiv_bug ? "yes" : "no",
145                      c->hlt_works_ok ? "no" : "yes",
146                      c->f00f_bug ? "yes" : "no",
147                      c->coma_bug ? "yes" : "no",
148                      c->hard_math ? "yes" : "no",
149                      fpu_exception ? "yes" : "no",
150                      c->cpuid_level,
151                      c->wp_works_ok ? "yes" : "no");
152
153         for ( i = 0 ; i < 32*NCAPINTS ; i++ )
154                 if ( test_bit(i, c->x86_capability) &&
155                      x86_cap_flags[i] != NULL )
156                         seq_printf(m, " %s", x86_cap_flags[i]);
157
158         for (i = 0; i < 32; i++)
159                 if (c->x86_power & (1 << i)) {
160                         if (i < ARRAY_SIZE(x86_power_flags) &&
161                             x86_power_flags[i])
162                                 seq_printf(m, "%s%s",
163                                            x86_power_flags[i][0]?" ":"",
164                                            x86_power_flags[i]);
165                         else
166                                 seq_printf(m, " [%d]", i);
167                 }
168
169         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
170                      c->loops_per_jiffy/(500000/HZ),
171                      (c->loops_per_jiffy/(5000/HZ)) % 100);
172         seq_printf(m, "clflush size\t: %u\n\n", c->x86_clflush_size);
173
174         return 0;
175 }
176
177 static void *c_start(struct seq_file *m, loff_t *pos)
178 {
179         if (*pos == 0)  /* just in case, cpu 0 is not the first */
180                 *pos = first_cpu(cpu_possible_map);
181         if ((*pos) < NR_CPUS && cpu_possible(*pos))
182                 return &cpu_data(*pos);
183         return NULL;
184 }
185 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
186 {
187         *pos = next_cpu(*pos, cpu_possible_map);
188         return c_start(m, pos);
189 }
190 static void c_stop(struct seq_file *m, void *v)
191 {
192 }
193 struct seq_operations cpuinfo_op = {
194         .start  = c_start,
195         .next   = c_next,
196         .stop   = c_stop,
197         .show   = show_cpuinfo,
198 };