sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
[linux-2.6.git] / arch / sh / cchips / hd6446x / hd64461.c
1 /*
2  *      Copyright (C) 2000 YAEGASHI Takeshi
3  *      Hitachi HD64461 companion chip support
4  */
5
6 #include <linux/sched.h>
7 #include <linux/module.h>
8 #include <linux/kernel.h>
9 #include <linux/param.h>
10 #include <linux/interrupt.h>
11 #include <linux/init.h>
12 #include <linux/irq.h>
13 #include <linux/io.h>
14 #include <asm/irq.h>
15 #include <asm/hd64461.h>
16
17 /* This belongs in cpu specific */
18 #define INTC_ICR1 0xA4140010UL
19
20 static void hd64461_mask_irq(unsigned int irq)
21 {
22         unsigned short nimr;
23         unsigned short mask = 1 << (irq - HD64461_IRQBASE);
24
25         nimr = __raw_readw(HD64461_NIMR);
26         nimr |= mask;
27         __raw_writew(nimr, HD64461_NIMR);
28 }
29
30 static void hd64461_unmask_irq(unsigned int irq)
31 {
32         unsigned short nimr;
33         unsigned short mask = 1 << (irq - HD64461_IRQBASE);
34
35         nimr = __raw_readw(HD64461_NIMR);
36         nimr &= ~mask;
37         __raw_writew(nimr, HD64461_NIMR);
38 }
39
40 static void hd64461_mask_and_ack_irq(unsigned int irq)
41 {
42         hd64461_mask_irq(irq);
43 #ifdef CONFIG_HD64461_ENABLER
44         if (irq == HD64461_IRQBASE + 13)
45                 __raw_writeb(0x00, HD64461_PCC1CSCR);
46 #endif
47 }
48
49 static struct irq_chip hd64461_irq_chip = {
50         .name           = "HD64461-IRQ",
51         .mask           = hd64461_mask_irq,
52         .mask_ack       = hd64461_mask_and_ack_irq,
53         .unmask         = hd64461_unmask_irq,
54 };
55
56 static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
57 {
58         unsigned short intv = __raw_readw(HD64461_NIRR);
59         struct irq_desc *ext_desc;
60         unsigned int ext_irq = HD64461_IRQBASE;
61
62         intv &= (1 << HD64461_IRQ_NUM) - 1;
63
64         while (intv) {
65                 if (intv & 1) {
66                         ext_desc = irq_desc + ext_irq;
67                         handle_level_irq(ext_irq, ext_desc);
68                 }
69                 intv >>= 1;
70                 ext_irq++;
71         }
72 }
73
74 int __init setup_hd64461(void)
75 {
76         int i;
77
78         if (!MACH_HD64461)
79                 return 0;
80
81         printk(KERN_INFO
82                "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
83                HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
84                HD64461_IRQBASE + 15);
85
86 /* Should be at processor specific part.. */
87 #if defined(CONFIG_CPU_SUBTYPE_SH7709)
88         __raw_writew(0x2240, INTC_ICR1);
89 #endif
90         __raw_writew(0xffff, HD64461_NIMR);
91
92         /*  IRQ 80 -> 95 belongs to HD64461  */
93         for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
94                 set_irq_chip_and_handler(i, &hd64461_irq_chip,
95                                          handle_level_irq);
96
97         set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
98         set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
99
100 #ifdef CONFIG_HD64461_ENABLER
101         printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
102         __raw_writeb(0x4c, HD64461_PCC1CSCIER);
103         __raw_writeb(0x00, HD64461_PCC1CSCR);
104 #endif
105
106         return 0;
107 }
108
109 module_init(setup_hd64461);