a9eb6834d9211ff641e996a6da7ecb29970ea426
[linux-2.6.git] / arch / s390 / include / asm / lowcore.h
1 /*
2  *  include/asm-s390/lowcore.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9  */
10
11 #ifndef _ASM_S390_LOWCORE_H
12 #define _ASM_S390_LOWCORE_H
13
14 #define __LC_IPL_PARMBLOCK_PTR          0x0014
15 #define __LC_EXT_PARAMS                 0x0080
16 #define __LC_CPU_ADDRESS                0x0084
17 #define __LC_EXT_INT_CODE               0x0086
18
19 #define __LC_SVC_ILC                    0x0088
20 #define __LC_SVC_INT_CODE               0x008a
21 #define __LC_PGM_ILC                    0x008c
22 #define __LC_PGM_INT_CODE               0x008e
23
24 #define __LC_PER_ATMID                  0x0096
25 #define __LC_PER_ADDRESS                0x0098
26 #define __LC_PER_ACCESS_ID              0x00a1
27 #define __LC_AR_MODE_ID                 0x00a3
28
29 #define __LC_SUBCHANNEL_ID              0x00b8
30 #define __LC_SUBCHANNEL_NR              0x00ba
31 #define __LC_IO_INT_PARM                0x00bc
32 #define __LC_IO_INT_WORD                0x00c0
33 #define __LC_STFL_FAC_LIST              0x00c8
34 #define __LC_MCCK_CODE                  0x00e8
35
36 #define __LC_DUMP_REIPL                 0x0e00
37
38 #ifndef __s390x__
39 #define __LC_RST_NEW_PSW                0x0000
40 #define __LC_RST_OLD_PSW                0x0008
41 #define __LC_EXT_OLD_PSW                0x0018
42 #define __LC_SVC_OLD_PSW                0x0020
43 #define __LC_PGM_OLD_PSW                0x0028
44 #define __LC_MCK_OLD_PSW                0x0030
45 #define __LC_IO_OLD_PSW                 0x0038
46 #define __LC_EXT_NEW_PSW                0x0058
47 #define __LC_SVC_NEW_PSW                0x0060
48 #define __LC_PGM_NEW_PSW                0x0068
49 #define __LC_MCK_NEW_PSW                0x0070
50 #define __LC_IO_NEW_PSW                 0x0078
51 #define __LC_SAVE_AREA                  0x0200
52 #define __LC_RETURN_PSW                 0x0240
53 #define __LC_RETURN_MCCK_PSW            0x0248
54 #define __LC_SYNC_ENTER_TIMER           0x0250
55 #define __LC_ASYNC_ENTER_TIMER          0x0258
56 #define __LC_EXIT_TIMER                 0x0260
57 #define __LC_USER_TIMER                 0x0268
58 #define __LC_SYSTEM_TIMER               0x0270
59 #define __LC_STEAL_TIMER                0x0278
60 #define __LC_LAST_UPDATE_TIMER          0x0280
61 #define __LC_LAST_UPDATE_CLOCK          0x0288
62 #define __LC_CURRENT                    0x0290
63 #define __LC_THREAD_INFO                0x0294
64 #define __LC_KERNEL_STACK               0x0298
65 #define __LC_ASYNC_STACK                0x029c
66 #define __LC_PANIC_STACK                0x02a0
67 #define __LC_KERNEL_ASCE                0x02a4
68 #define __LC_USER_ASCE                  0x02a8
69 #define __LC_USER_EXEC_ASCE             0x02ac
70 #define __LC_CPUID                      0x02b0
71 #define __LC_INT_CLOCK                  0x02c8
72 #define __LC_MACHINE_FLAGS              0x02d8
73 #define __LC_FTRACE_FUNC                0x02dc
74 #define __LC_IRB                        0x0300
75 #define __LC_PFAULT_INTPARM             0x0080
76 #define __LC_CPU_TIMER_SAVE_AREA        0x00d8
77 #define __LC_CLOCK_COMP_SAVE_AREA       0x00e0
78 #define __LC_PSW_SAVE_AREA              0x0100
79 #define __LC_PREFIX_SAVE_AREA           0x0108
80 #define __LC_AREGS_SAVE_AREA            0x0120
81 #define __LC_FPREGS_SAVE_AREA           0x0160
82 #define __LC_GPREGS_SAVE_AREA           0x0180
83 #define __LC_CREGS_SAVE_AREA            0x01c0
84 #else /* __s390x__ */
85 #define __LC_LAST_BREAK                 0x0110
86 #define __LC_RST_OLD_PSW                0x0120
87 #define __LC_EXT_OLD_PSW                0x0130
88 #define __LC_SVC_OLD_PSW                0x0140
89 #define __LC_PGM_OLD_PSW                0x0150
90 #define __LC_MCK_OLD_PSW                0x0160
91 #define __LC_IO_OLD_PSW                 0x0170
92 #define __LC_RST_NEW_PSW                0x01a0
93 #define __LC_EXT_NEW_PSW                0x01b0
94 #define __LC_SVC_NEW_PSW                0x01c0
95 #define __LC_PGM_NEW_PSW                0x01d0
96 #define __LC_MCK_NEW_PSW                0x01e0
97 #define __LC_IO_NEW_PSW                 0x01f0
98 #define __LC_SAVE_AREA                  0x0200
99 #define __LC_RETURN_PSW                 0x0280
100 #define __LC_RETURN_MCCK_PSW            0x0290
101 #define __LC_SYNC_ENTER_TIMER           0x02a0
102 #define __LC_ASYNC_ENTER_TIMER          0x02a8
103 #define __LC_EXIT_TIMER                 0x02b0
104 #define __LC_USER_TIMER                 0x02b8
105 #define __LC_SYSTEM_TIMER               0x02c0
106 #define __LC_STEAL_TIMER                0x02c8
107 #define __LC_LAST_UPDATE_TIMER          0x02d0
108 #define __LC_LAST_UPDATE_CLOCK          0x02d8
109 #define __LC_CURRENT                    0x02e0
110 #define __LC_THREAD_INFO                0x02e8
111 #define __LC_KERNEL_STACK               0x02f0
112 #define __LC_ASYNC_STACK                0x02f8
113 #define __LC_PANIC_STACK                0x0300
114 #define __LC_KERNEL_ASCE                0x0308
115 #define __LC_USER_ASCE                  0x0310
116 #define __LC_USER_EXEC_ASCE             0x0318
117 #define __LC_CPUID                      0x0320
118 #define __LC_INT_CLOCK                  0x0340
119 #define __LC_VDSO_PER_CPU               0x0350
120 #define __LC_MACHINE_FLAGS              0x0358
121 #define __LC_FTRACE_FUNC                0x0360
122 #define __LC_IRB                        0x0380
123 #define __LC_PASTE                      0x03c0
124 #define __LC_PFAULT_INTPARM             0x11b8
125 #define __LC_FPREGS_SAVE_AREA           0x1200
126 #define __LC_GPREGS_SAVE_AREA           0x1280
127 #define __LC_PSW_SAVE_AREA              0x1300
128 #define __LC_PREFIX_SAVE_AREA           0x1318
129 #define __LC_FP_CREG_SAVE_AREA          0x131c
130 #define __LC_TODREG_SAVE_AREA           0x1324
131 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
132 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
133 #define __LC_AREGS_SAVE_AREA            0x1340
134 #define __LC_CREGS_SAVE_AREA            0x1380
135 #endif /* __s390x__ */
136
137 #ifndef __ASSEMBLY__
138
139 #include <asm/cpu.h>
140 #include <asm/ptrace.h>
141 #include <linux/types.h>
142
143 void restart_int_handler(void);
144 void ext_int_handler(void);
145 void system_call(void);
146 void pgm_check_handler(void);
147 void mcck_int_handler(void);
148 void io_int_handler(void);
149
150 #ifdef CONFIG_32BIT
151
152 struct save_area {
153         u32     ext_save;
154         u64     timer;
155         u64     clk_cmp;
156         u8      pad1[24];
157         u8      psw[8];
158         u32     pref_reg;
159         u8      pad2[20];
160         u32     acc_regs[16];
161         u64     fp_regs[4];
162         u32     gp_regs[16];
163         u32     ctrl_regs[16];
164 }  __attribute__((packed));
165
166 #define SAVE_AREA_BASE offsetof(struct _lowcore, extended_save_area_addr)
167
168 #else /* CONFIG_32BIT */
169
170 struct save_area {
171         u64     fp_regs[16];
172         u64     gp_regs[16];
173         u8      psw[16];
174         u8      pad1[8];
175         u32     pref_reg;
176         u32     fp_ctrl_reg;
177         u8      pad2[4];
178         u32     tod_reg;
179         u64     timer;
180         u64     clk_cmp;
181         u8      pad3[8];
182         u32     acc_regs[16];
183         u64     ctrl_regs[16];
184 }  __attribute__((packed));
185
186 #define SAVE_AREA_BASE offsetof(struct _lowcore, floating_pt_save_area)
187
188 #endif /* CONFIG_32BIT */
189
190 #ifndef __s390x__
191 #define LC_ORDER 0
192 #else
193 #define LC_ORDER 1
194 #endif
195
196 #define LC_PAGES (1UL << LC_ORDER)
197
198 struct _lowcore
199 {
200 #ifndef __s390x__
201         /* 0x0000 - 0x01ff: defined by architecture */
202         psw_t   restart_psw;                    /* 0x0000 */
203         __u32   ccw2[4];                        /* 0x0008 */
204         psw_t   external_old_psw;               /* 0x0018 */
205         psw_t   svc_old_psw;                    /* 0x0020 */
206         psw_t   program_old_psw;                /* 0x0028 */
207         psw_t   mcck_old_psw;                   /* 0x0030 */
208         psw_t   io_old_psw;                     /* 0x0038 */
209         __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
210         psw_t   external_new_psw;               /* 0x0058 */
211         psw_t   svc_new_psw;                    /* 0x0060 */
212         psw_t   program_new_psw;                /* 0x0068 */
213         psw_t   mcck_new_psw;                   /* 0x0070 */
214         psw_t   io_new_psw;                     /* 0x0078 */
215         __u32   ext_params;                     /* 0x0080 */
216         __u16   cpu_addr;                       /* 0x0084 */
217         __u16   ext_int_code;                   /* 0x0086 */
218         __u16   svc_ilc;                        /* 0x0088 */
219         __u16   svc_code;                       /* 0x008a */
220         __u16   pgm_ilc;                        /* 0x008c */
221         __u16   pgm_code;                       /* 0x008e */
222         __u32   trans_exc_code;                 /* 0x0090 */
223         __u16   mon_class_num;                  /* 0x0094 */
224         __u16   per_perc_atmid;                 /* 0x0096 */
225         __u32   per_address;                    /* 0x0098 */
226         __u32   monitor_code;                   /* 0x009c */
227         __u8    exc_access_id;                  /* 0x00a0 */
228         __u8    per_access_id;                  /* 0x00a1 */
229         __u8    pad_0x00a2[0x00b8-0x00a2];      /* 0x00a2 */
230         __u16   subchannel_id;                  /* 0x00b8 */
231         __u16   subchannel_nr;                  /* 0x00ba */
232         __u32   io_int_parm;                    /* 0x00bc */
233         __u32   io_int_word;                    /* 0x00c0 */
234         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
235         __u32   stfl_fac_list;                  /* 0x00c8 */
236         __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
237         __u32   extended_save_area_addr;        /* 0x00d4 */
238         __u32   cpu_timer_save_area[2];         /* 0x00d8 */
239         __u32   clock_comp_save_area[2];        /* 0x00e0 */
240         __u32   mcck_interruption_code[2];      /* 0x00e8 */
241         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
242         __u32   external_damage_code;           /* 0x00f4 */
243         __u32   failing_storage_address;        /* 0x00f8 */
244         __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
245         __u32   st_status_fixed_logout[4];      /* 0x0100 */
246         __u8    pad_0x0110[0x0120-0x0110];      /* 0x0110 */
247
248         /* CPU register save area: defined by architecture */
249         __u32   access_regs_save_area[16];      /* 0x0120 */
250         __u32   floating_pt_save_area[8];       /* 0x0160 */
251         __u32   gpregs_save_area[16];           /* 0x0180 */
252         __u32   cregs_save_area[16];            /* 0x01c0 */
253
254         /* Return psws. */
255         __u32   save_area[16];                  /* 0x0200 */
256         psw_t   return_psw;                     /* 0x0240 */
257         psw_t   return_mcck_psw;                /* 0x0248 */
258
259         /* CPU time accounting values */
260         __u64   sync_enter_timer;               /* 0x0250 */
261         __u64   async_enter_timer;              /* 0x0258 */
262         __u64   exit_timer;                     /* 0x0260 */
263         __u64   user_timer;                     /* 0x0268 */
264         __u64   system_timer;                   /* 0x0270 */
265         __u64   steal_timer;                    /* 0x0278 */
266         __u64   last_update_timer;              /* 0x0280 */
267         __u64   last_update_clock;              /* 0x0288 */
268
269         /* Current process. */
270         __u32   current_task;                   /* 0x0290 */
271         __u32   thread_info;                    /* 0x0294 */
272         __u32   kernel_stack;                   /* 0x0298 */
273
274         /* Interrupt and panic stack. */
275         __u32   async_stack;                    /* 0x029c */
276         __u32   panic_stack;                    /* 0x02a0 */
277
278         /* Address space pointer. */
279         __u32   kernel_asce;                    /* 0x02a4 */
280         __u32   user_asce;                      /* 0x02a8 */
281         __u32   user_exec_asce;                 /* 0x02ac */
282
283         /* SMP info area */
284         struct cpuid cpu_id;                    /* 0x02b0 */
285         __u32   cpu_nr;                         /* 0x02b8 */
286         __u32   softirq_pending;                /* 0x02bc */
287         __u32   percpu_offset;                  /* 0x02c0 */
288         __u32   ext_call_fast;                  /* 0x02c4 */
289         __u64   int_clock;                      /* 0x02c8 */
290         __u64   clock_comparator;               /* 0x02d0 */
291         __u32   machine_flags;                  /* 0x02d8 */
292         __u32   ftrace_func;                    /* 0x02dc */
293         __u8    pad_0x02e0[0x0300-0x02e0];      /* 0x02e0 */
294
295         /* Interrupt response block */
296         __u8    irb[64];                        /* 0x0300 */
297
298         __u8    pad_0x0340[0x0e00-0x0340];      /* 0x0340 */
299
300         /*
301          * 0xe00 contains the address of the IPL Parameter Information
302          * block. Dump tools need IPIB for IPL after dump.
303          * Note: do not change the position of any fields in 0x0e00-0x0f00
304          */
305         __u32   ipib;                           /* 0x0e00 */
306         __u32   ipib_checksum;                  /* 0x0e04 */
307
308         /* Align to the top 1k of prefix area */
309         __u8    pad_0x0e08[0x1000-0x0e08];      /* 0x0e08 */
310 #else /* !__s390x__ */
311         /* 0x0000 - 0x01ff: defined by architecture */
312         __u32   ccw1[2];                        /* 0x0000 */
313         __u32   ccw2[4];                        /* 0x0008 */
314         __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
315         __u32   ext_params;                     /* 0x0080 */
316         __u16   cpu_addr;                       /* 0x0084 */
317         __u16   ext_int_code;                   /* 0x0086 */
318         __u16   svc_ilc;                        /* 0x0088 */
319         __u16   svc_code;                       /* 0x008a */
320         __u16   pgm_ilc;                        /* 0x008c */
321         __u16   pgm_code;                       /* 0x008e */
322         __u32   data_exc_code;                  /* 0x0090 */
323         __u16   mon_class_num;                  /* 0x0094 */
324         __u16   per_perc_atmid;                 /* 0x0096 */
325         addr_t  per_address;                    /* 0x0098 */
326         __u8    exc_access_id;                  /* 0x00a0 */
327         __u8    per_access_id;                  /* 0x00a1 */
328         __u8    op_access_id;                   /* 0x00a2 */
329         __u8    ar_access_id;                   /* 0x00a3 */
330         __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
331         addr_t  trans_exc_code;                 /* 0x00a8 */
332         addr_t  monitor_code;                   /* 0x00b0 */
333         __u16   subchannel_id;                  /* 0x00b8 */
334         __u16   subchannel_nr;                  /* 0x00ba */
335         __u32   io_int_parm;                    /* 0x00bc */
336         __u32   io_int_word;                    /* 0x00c0 */
337         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
338         __u32   stfl_fac_list;                  /* 0x00c8 */
339         __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
340         __u32   mcck_interruption_code[2];      /* 0x00e8 */
341         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
342         __u32   external_damage_code;           /* 0x00f4 */
343         addr_t  failing_storage_address;        /* 0x00f8 */
344         __u8    pad_0x0100[0x0120-0x0100];      /* 0x0100 */
345         psw_t   restart_old_psw;                /* 0x0120 */
346         psw_t   external_old_psw;               /* 0x0130 */
347         psw_t   svc_old_psw;                    /* 0x0140 */
348         psw_t   program_old_psw;                /* 0x0150 */
349         psw_t   mcck_old_psw;                   /* 0x0160 */
350         psw_t   io_old_psw;                     /* 0x0170 */
351         __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
352         psw_t   restart_psw;                    /* 0x01a0 */
353         psw_t   external_new_psw;               /* 0x01b0 */
354         psw_t   svc_new_psw;                    /* 0x01c0 */
355         psw_t   program_new_psw;                /* 0x01d0 */
356         psw_t   mcck_new_psw;                   /* 0x01e0 */
357         psw_t   io_new_psw;                     /* 0x01f0 */
358
359         /* Entry/exit save area & return psws. */
360         __u64   save_area[16];                  /* 0x0200 */
361         psw_t   return_psw;                     /* 0x0280 */
362         psw_t   return_mcck_psw;                /* 0x0290 */
363
364         /* CPU accounting and timing values. */
365         __u64   sync_enter_timer;               /* 0x02a0 */
366         __u64   async_enter_timer;              /* 0x02a8 */
367         __u64   exit_timer;                     /* 0x02b0 */
368         __u64   user_timer;                     /* 0x02b8 */
369         __u64   system_timer;                   /* 0x02c0 */
370         __u64   steal_timer;                    /* 0x02c8 */
371         __u64   last_update_timer;              /* 0x02d0 */
372         __u64   last_update_clock;              /* 0x02d8 */
373
374         /* Current process. */
375         __u64   current_task;                   /* 0x02e0 */
376         __u64   thread_info;                    /* 0x02e8 */
377         __u64   kernel_stack;                   /* 0x02f0 */
378
379         /* Interrupt and panic stack. */
380         __u64   async_stack;                    /* 0x02f8 */
381         __u64   panic_stack;                    /* 0x0300 */
382
383         /* Address space pointer. */
384         __u64   kernel_asce;                    /* 0x0308 */
385         __u64   user_asce;                      /* 0x0310 */
386         __u64   user_exec_asce;                 /* 0x0318 */
387
388         /* SMP info area */
389         struct cpuid cpu_id;                    /* 0x0320 */
390         __u32   cpu_nr;                         /* 0x0328 */
391         __u32   softirq_pending;                /* 0x032c */
392         __u64   percpu_offset;                  /* 0x0330 */
393         __u64   ext_call_fast;                  /* 0x0338 */
394         __u64   int_clock;                      /* 0x0340 */
395         __u64   clock_comparator;               /* 0x0348 */
396         __u64   vdso_per_cpu_data;              /* 0x0350 */
397         __u64   machine_flags;                  /* 0x0358 */
398         __u64   ftrace_func;                    /* 0x0360 */
399         __u8    pad_0x0368[0x0380-0x0368];      /* 0x0368 */
400
401         /* Interrupt response block. */
402         __u8    irb[64];                        /* 0x0380 */
403
404         /* Per cpu primary space access list */
405         __u32   paste[16];                      /* 0x03c0 */
406
407         __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
408
409         /*
410          * 0xe00 contains the address of the IPL Parameter Information
411          * block. Dump tools need IPIB for IPL after dump.
412          * Note: do not change the position of any fields in 0x0e00-0x0f00
413          */
414         __u64   ipib;                           /* 0x0e00 */
415         __u32   ipib_checksum;                  /* 0x0e08 */
416         __u8    pad_0x0e0c[0x11b8-0x0e0c];      /* 0x0e0c */
417
418         /* 64 bit extparam used for pfault/diag 250: defined by architecture */
419         __u64   ext_params2;                    /* 0x11B8 */
420         __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
421
422         /* CPU register save area: defined by architecture */
423         __u64   floating_pt_save_area[16];      /* 0x1200 */
424         __u64   gpregs_save_area[16];           /* 0x1280 */
425         __u32   st_status_fixed_logout[4];      /* 0x1300 */
426         __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
427         __u32   prefixreg_save_area;            /* 0x1318 */
428         __u32   fpt_creg_save_area;             /* 0x131c */
429         __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
430         __u32   tod_progreg_save_area;          /* 0x1324 */
431         __u32   cpu_timer_save_area[2];         /* 0x1328 */
432         __u32   clock_comp_save_area[2];        /* 0x1330 */
433         __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
434         __u32   access_regs_save_area[16];      /* 0x1340 */
435         __u64   cregs_save_area[16];            /* 0x1380 */
436
437         /* align to the top of the prefix area */
438         __u8    pad_0x1400[0x2000-0x1400];      /* 0x1400 */
439 #endif /* !__s390x__ */
440 } __attribute__((packed)); /* End structure*/
441
442 #define S390_lowcore (*((struct _lowcore *) 0))
443 extern struct _lowcore *lowcore_ptr[];
444
445 static inline void set_prefix(__u32 address)
446 {
447         asm volatile("spx %0" : : "m" (address) : "memory");
448 }
449
450 static inline __u32 store_prefix(void)
451 {
452         __u32 address;
453
454         asm volatile("stpx %0" : "=m" (address));
455         return address;
456 }
457
458 #endif
459
460 #endif